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1/*
2 * m32r_sio.c
3 *
4 * Driver for M32R serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
8 *
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18/*
19 * A note about mapbase / membase
20 *
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
24 *
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
27 */
28
29#if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30#define SUPPORT_SYSRQ
31#endif
32
33#include <linux/module.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/ioport.h>
37#include <linux/init.h>
38#include <linux/console.h>
39#include <linux/sysrq.h>
40#include <linux/serial.h>
41#include <linux/delay.h>
42
43#include <asm/m32r.h>
44#include <asm/io.h>
45#include <asm/irq.h>
46
47#define BAUD_RATE 115200
48
49#include <linux/serial_core.h>
50#include "m32r_sio_reg.h"
51
52#define PASS_LIMIT 256
53
54/* Standard COM flags */
55#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
56
57static const struct {
58 unsigned int port;
59 unsigned int irq;
60} old_serial_port[] = {
61#if defined(CONFIG_PLAT_USRV)
62 /* PORT IRQ FLAGS */
63 { 0x3F8, PLD_IRQ_UART0 }, /* ttyS0 */
64 { 0x2F8, PLD_IRQ_UART1 }, /* ttyS1 */
65#elif defined(CONFIG_SERIAL_M32R_PLDSIO)
66 { ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV }, /* ttyS0 */
67#else
68 { M32R_SIO_OFFSET, M32R_IRQ_SIO0_R }, /* ttyS0 */
69#endif
70};
71
72#define UART_NR ARRAY_SIZE(old_serial_port)
73
74struct uart_sio_port {
75 struct uart_port port;
76 struct timer_list timer; /* "no irq" timer */
77 struct list_head list; /* ports on this IRQ */
78 unsigned char ier;
79};
80
81struct irq_info {
82 spinlock_t lock;
83 struct list_head *head;
84};
85
86static struct irq_info irq_lists[NR_IRQS];
87
88#ifdef CONFIG_SERIAL_M32R_PLDSIO
89
90#define __sio_in(x) inw((unsigned long)(x))
91#define __sio_out(v,x) outw((v),(unsigned long)(x))
92
93static inline void sio_set_baud_rate(unsigned long baud)
94{
95 unsigned short sbaud;
96 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
97 __sio_out(sbaud, PLD_ESIO0BAUR);
98}
99
100static void sio_reset(void)
101{
102 unsigned short tmp;
103
104 tmp = __sio_in(PLD_ESIO0RXB);
105 tmp = __sio_in(PLD_ESIO0RXB);
106 tmp = __sio_in(PLD_ESIO0CR);
107 sio_set_baud_rate(BAUD_RATE);
108 __sio_out(0x0300, PLD_ESIO0CR);
109 __sio_out(0x0003, PLD_ESIO0CR);
110}
111
112static void sio_init(void)
113{
114 unsigned short tmp;
115
116 tmp = __sio_in(PLD_ESIO0RXB);
117 tmp = __sio_in(PLD_ESIO0RXB);
118 tmp = __sio_in(PLD_ESIO0CR);
119 __sio_out(0x0300, PLD_ESIO0CR);
120 __sio_out(0x0003, PLD_ESIO0CR);
121}
122
123static void sio_error(int *status)
124{
125 printk("SIO0 error[%04x]\n", *status);
126 do {
127 sio_init();
128 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
129}
130
131#else /* not CONFIG_SERIAL_M32R_PLDSIO */
132
133#define __sio_in(x) inl(x)
134#define __sio_out(v,x) outl((v),(x))
135
136static inline void sio_set_baud_rate(unsigned long baud)
137{
138 unsigned long i, j;
139
140 i = boot_cpu_data.bus_clock / (baud * 16);
141 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
142 i -= 1;
143 j = (j + 1) >> 1;
144
145 __sio_out(i, M32R_SIO0_BAUR_PORTL);
146 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
147}
148
149static void sio_reset(void)
150{
151 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
152 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
153 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
154 sio_set_baud_rate(BAUD_RATE);
155 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
156 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
157}
158
159static void sio_init(void)
160{
161 unsigned int tmp;
162
163 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
164 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
165 tmp = __sio_in(M32R_SIO0_STS_PORTL);
166 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
167}
168
169static void sio_error(int *status)
170{
171 printk("SIO0 error[%04x]\n", *status);
172 do {
173 sio_init();
174 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
175}
176
177#endif /* CONFIG_SERIAL_M32R_PLDSIO */
178
179static unsigned int sio_in(struct uart_sio_port *up, int offset)
180{
181 return __sio_in(up->port.iobase + offset);
182}
183
184static void sio_out(struct uart_sio_port *up, int offset, int value)
185{
186 __sio_out(value, up->port.iobase + offset);
187}
188
189static unsigned int serial_in(struct uart_sio_port *up, int offset)
190{
191 if (!offset)
192 return 0;
193
194 return __sio_in(offset);
195}
196
197static void serial_out(struct uart_sio_port *up, int offset, int value)
198{
199 if (!offset)
200 return;
201
202 __sio_out(value, offset);
203}
204
205static void m32r_sio_stop_tx(struct uart_port *port)
206{
207 struct uart_sio_port *up =
208 container_of(port, struct uart_sio_port, port);
209
210 if (up->ier & UART_IER_THRI) {
211 up->ier &= ~UART_IER_THRI;
212 serial_out(up, UART_IER, up->ier);
213 }
214}
215
216static void m32r_sio_start_tx(struct uart_port *port)
217{
218#ifdef CONFIG_SERIAL_M32R_PLDSIO
219 struct uart_sio_port *up =
220 container_of(port, struct uart_sio_port, port);
221 struct circ_buf *xmit = &up->port.state->xmit;
222
223 if (!(up->ier & UART_IER_THRI)) {
224 up->ier |= UART_IER_THRI;
225 serial_out(up, UART_IER, up->ier);
226 if (!uart_circ_empty(xmit)) {
227 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
228 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
229 up->port.icount.tx++;
230 }
231 }
232 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
233#else
234 struct uart_sio_port *up =
235 container_of(port, struct uart_sio_port, port);
236
237 if (!(up->ier & UART_IER_THRI)) {
238 up->ier |= UART_IER_THRI;
239 serial_out(up, UART_IER, up->ier);
240 }
241#endif
242}
243
244static void m32r_sio_stop_rx(struct uart_port *port)
245{
246 struct uart_sio_port *up =
247 container_of(port, struct uart_sio_port, port);
248
249 up->ier &= ~UART_IER_RLSI;
250 up->port.read_status_mask &= ~UART_LSR_DR;
251 serial_out(up, UART_IER, up->ier);
252}
253
254static void m32r_sio_enable_ms(struct uart_port *port)
255{
256 struct uart_sio_port *up =
257 container_of(port, struct uart_sio_port, port);
258
259 up->ier |= UART_IER_MSI;
260 serial_out(up, UART_IER, up->ier);
261}
262
263static void receive_chars(struct uart_sio_port *up, int *status)
264{
265 struct tty_port *port = &up->port.state->port;
266 unsigned char ch;
267 unsigned char flag;
268 int max_count = 256;
269
270 do {
271 ch = sio_in(up, SIORXB);
272 flag = TTY_NORMAL;
273 up->port.icount.rx++;
274
275 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
276 UART_LSR_FE | UART_LSR_OE))) {
277 /*
278 * For statistics only
279 */
280 if (*status & UART_LSR_BI) {
281 *status &= ~(UART_LSR_FE | UART_LSR_PE);
282 up->port.icount.brk++;
283 /*
284 * We do the SysRQ and SAK checking
285 * here because otherwise the break
286 * may get masked by ignore_status_mask
287 * or read_status_mask.
288 */
289 if (uart_handle_break(&up->port))
290 goto ignore_char;
291 } else if (*status & UART_LSR_PE)
292 up->port.icount.parity++;
293 else if (*status & UART_LSR_FE)
294 up->port.icount.frame++;
295 if (*status & UART_LSR_OE)
296 up->port.icount.overrun++;
297
298 /*
299 * Mask off conditions which should be ingored.
300 */
301 *status &= up->port.read_status_mask;
302
303 if (*status & UART_LSR_BI) {
304 pr_debug("handling break....\n");
305 flag = TTY_BREAK;
306 } else if (*status & UART_LSR_PE)
307 flag = TTY_PARITY;
308 else if (*status & UART_LSR_FE)
309 flag = TTY_FRAME;
310 }
311 if (uart_handle_sysrq_char(&up->port, ch))
312 goto ignore_char;
313 if ((*status & up->port.ignore_status_mask) == 0)
314 tty_insert_flip_char(port, ch, flag);
315
316 if (*status & UART_LSR_OE) {
317 /*
318 * Overrun is special, since it's reported
319 * immediately, and doesn't affect the current
320 * character.
321 */
322 tty_insert_flip_char(port, 0, TTY_OVERRUN);
323 }
324 ignore_char:
325 *status = serial_in(up, UART_LSR);
326 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
327
328 spin_unlock(&up->port.lock);
329 tty_flip_buffer_push(port);
330 spin_lock(&up->port.lock);
331}
332
333static void transmit_chars(struct uart_sio_port *up)
334{
335 struct circ_buf *xmit = &up->port.state->xmit;
336 int count;
337
338 if (up->port.x_char) {
339#ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
340 serial_out(up, UART_TX, up->port.x_char);
341#endif
342 up->port.icount.tx++;
343 up->port.x_char = 0;
344 return;
345 }
346 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
347 m32r_sio_stop_tx(&up->port);
348 return;
349 }
350
351 count = up->port.fifosize;
352 do {
353 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
354 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
355 up->port.icount.tx++;
356 if (uart_circ_empty(xmit))
357 break;
358 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
359
360 } while (--count > 0);
361
362 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
363 uart_write_wakeup(&up->port);
364
365 pr_debug("THRE...\n");
366
367 if (uart_circ_empty(xmit))
368 m32r_sio_stop_tx(&up->port);
369}
370
371/*
372 * This handles the interrupt from one port.
373 */
374static inline void m32r_sio_handle_port(struct uart_sio_port *up,
375 unsigned int status)
376{
377 pr_debug("status = %x...\n", status);
378
379 if (status & 0x04)
380 receive_chars(up, &status);
381 if (status & 0x01)
382 transmit_chars(up);
383}
384
385/*
386 * This is the serial driver's interrupt routine.
387 *
388 * Arjan thinks the old way was overly complex, so it got simplified.
389 * Alan disagrees, saying that need the complexity to handle the weird
390 * nature of ISA shared interrupts. (This is a special exception.)
391 *
392 * In order to handle ISA shared interrupts properly, we need to check
393 * that all ports have been serviced, and therefore the ISA interrupt
394 * line has been de-asserted.
395 *
396 * This means we need to loop through all ports. checking that they
397 * don't have an interrupt pending.
398 */
399static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
400{
401 struct irq_info *i = dev_id;
402 struct list_head *l, *end = NULL;
403 int pass_counter = 0;
404
405 pr_debug("m32r_sio_interrupt(%d)...\n", irq);
406
407#ifdef CONFIG_SERIAL_M32R_PLDSIO
408// if (irq == PLD_IRQ_SIO0_SND)
409// irq = PLD_IRQ_SIO0_RCV;
410#else
411 if (irq == M32R_IRQ_SIO0_S)
412 irq = M32R_IRQ_SIO0_R;
413#endif
414
415 spin_lock(&i->lock);
416
417 l = i->head;
418 do {
419 struct uart_sio_port *up;
420 unsigned int sts;
421
422 up = list_entry(l, struct uart_sio_port, list);
423
424 sts = sio_in(up, SIOSTS);
425 if (sts & 0x5) {
426 spin_lock(&up->port.lock);
427 m32r_sio_handle_port(up, sts);
428 spin_unlock(&up->port.lock);
429
430 end = NULL;
431 } else if (end == NULL)
432 end = l;
433
434 l = l->next;
435
436 if (l == i->head && pass_counter++ > PASS_LIMIT) {
437 if (sts & 0xe0)
438 sio_error(&sts);
439 break;
440 }
441 } while (l != end);
442
443 spin_unlock(&i->lock);
444
445 pr_debug("end.\n");
446
447 return IRQ_HANDLED;
448}
449
450/*
451 * To support ISA shared interrupts, we need to have one interrupt
452 * handler that ensures that the IRQ line has been deasserted
453 * before returning. Failing to do this will result in the IRQ
454 * line being stuck active, and, since ISA irqs are edge triggered,
455 * no more IRQs will be seen.
456 */
457static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
458{
459 spin_lock_irq(&i->lock);
460
461 if (!list_empty(i->head)) {
462 if (i->head == &up->list)
463 i->head = i->head->next;
464 list_del(&up->list);
465 } else {
466 BUG_ON(i->head != &up->list);
467 i->head = NULL;
468 }
469
470 spin_unlock_irq(&i->lock);
471}
472
473static int serial_link_irq_chain(struct uart_sio_port *up)
474{
475 struct irq_info *i = irq_lists + up->port.irq;
476 int ret, irq_flags = 0;
477
478 spin_lock_irq(&i->lock);
479
480 if (i->head) {
481 list_add(&up->list, i->head);
482 spin_unlock_irq(&i->lock);
483
484 ret = 0;
485 } else {
486 INIT_LIST_HEAD(&up->list);
487 i->head = &up->list;
488 spin_unlock_irq(&i->lock);
489
490 ret = request_irq(up->port.irq, m32r_sio_interrupt,
491 irq_flags, "SIO0-RX", i);
492 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
493 irq_flags, "SIO0-TX", i);
494 if (ret < 0)
495 serial_do_unlink(i, up);
496 }
497
498 return ret;
499}
500
501static void serial_unlink_irq_chain(struct uart_sio_port *up)
502{
503 struct irq_info *i = irq_lists + up->port.irq;
504
505 BUG_ON(i->head == NULL);
506
507 if (list_empty(i->head)) {
508 free_irq(up->port.irq, i);
509 free_irq(up->port.irq + 1, i);
510 }
511
512 serial_do_unlink(i, up);
513}
514
515/*
516 * This function is used to handle ports that do not have an interrupt.
517 */
518static void m32r_sio_timeout(unsigned long data)
519{
520 struct uart_sio_port *up = (struct uart_sio_port *)data;
521 unsigned int timeout;
522 unsigned int sts;
523
524 sts = sio_in(up, SIOSTS);
525 if (sts & 0x5) {
526 spin_lock(&up->port.lock);
527 m32r_sio_handle_port(up, sts);
528 spin_unlock(&up->port.lock);
529 }
530
531 timeout = up->port.timeout;
532 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
533 mod_timer(&up->timer, jiffies + timeout);
534}
535
536static unsigned int m32r_sio_tx_empty(struct uart_port *port)
537{
538 struct uart_sio_port *up =
539 container_of(port, struct uart_sio_port, port);
540 unsigned long flags;
541 unsigned int ret;
542
543 spin_lock_irqsave(&up->port.lock, flags);
544 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
545 spin_unlock_irqrestore(&up->port.lock, flags);
546
547 return ret;
548}
549
550static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
551{
552 return 0;
553}
554
555static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
556{
557
558}
559
560static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
561{
562
563}
564
565static int m32r_sio_startup(struct uart_port *port)
566{
567 struct uart_sio_port *up =
568 container_of(port, struct uart_sio_port, port);
569 int retval;
570
571 sio_init();
572
573 /*
574 * If the "interrupt" for this port doesn't correspond with any
575 * hardware interrupt, we use a timer-based system. The original
576 * driver used to do this with IRQ0.
577 */
578 if (!up->port.irq) {
579 unsigned int timeout = up->port.timeout;
580
581 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
582
583 up->timer.data = (unsigned long)up;
584 mod_timer(&up->timer, jiffies + timeout);
585 } else {
586 retval = serial_link_irq_chain(up);
587 if (retval)
588 return retval;
589 }
590
591 /*
592 * Finally, enable interrupts. Note: Modem status interrupts
593 * are set via set_termios(), which will be occurring imminently
594 * anyway, so we don't enable them here.
595 * - M32R_SIO: 0x0c
596 * - M32R_PLDSIO: 0x04
597 */
598 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
599 sio_out(up, SIOTRCR, up->ier);
600
601 /*
602 * And clear the interrupt registers again for luck.
603 */
604 sio_reset();
605
606 return 0;
607}
608
609static void m32r_sio_shutdown(struct uart_port *port)
610{
611 struct uart_sio_port *up =
612 container_of(port, struct uart_sio_port, port);
613
614 /*
615 * Disable interrupts from this port
616 */
617 up->ier = 0;
618 sio_out(up, SIOTRCR, 0);
619
620 /*
621 * Disable break condition and FIFOs
622 */
623
624 sio_init();
625
626 if (!up->port.irq)
627 del_timer_sync(&up->timer);
628 else
629 serial_unlink_irq_chain(up);
630}
631
632static unsigned int m32r_sio_get_divisor(struct uart_port *port,
633 unsigned int baud)
634{
635 return uart_get_divisor(port, baud);
636}
637
638static void m32r_sio_set_termios(struct uart_port *port,
639 struct ktermios *termios, struct ktermios *old)
640{
641 struct uart_sio_port *up =
642 container_of(port, struct uart_sio_port, port);
643 unsigned char cval = 0;
644 unsigned long flags;
645 unsigned int baud, quot;
646
647 switch (termios->c_cflag & CSIZE) {
648 case CS5:
649 cval = UART_LCR_WLEN5;
650 break;
651 case CS6:
652 cval = UART_LCR_WLEN6;
653 break;
654 case CS7:
655 cval = UART_LCR_WLEN7;
656 break;
657 default:
658 case CS8:
659 cval = UART_LCR_WLEN8;
660 break;
661 }
662
663 if (termios->c_cflag & CSTOPB)
664 cval |= UART_LCR_STOP;
665 if (termios->c_cflag & PARENB)
666 cval |= UART_LCR_PARITY;
667 if (!(termios->c_cflag & PARODD))
668 cval |= UART_LCR_EPAR;
669#ifdef CMSPAR
670 if (termios->c_cflag & CMSPAR)
671 cval |= UART_LCR_SPAR;
672#endif
673
674 /*
675 * Ask the core to calculate the divisor for us.
676 */
677#ifdef CONFIG_SERIAL_M32R_PLDSIO
678 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
679#else
680 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
681#endif
682 quot = m32r_sio_get_divisor(port, baud);
683
684 /*
685 * Ok, we're now changing the port state. Do it with
686 * interrupts disabled.
687 */
688 spin_lock_irqsave(&up->port.lock, flags);
689
690 sio_set_baud_rate(baud);
691
692 /*
693 * Update the per-port timeout.
694 */
695 uart_update_timeout(port, termios->c_cflag, baud);
696
697 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
698 if (termios->c_iflag & INPCK)
699 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
700 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
701 up->port.read_status_mask |= UART_LSR_BI;
702
703 /*
704 * Characteres to ignore
705 */
706 up->port.ignore_status_mask = 0;
707 if (termios->c_iflag & IGNPAR)
708 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
709 if (termios->c_iflag & IGNBRK) {
710 up->port.ignore_status_mask |= UART_LSR_BI;
711 /*
712 * If we're ignoring parity and break indicators,
713 * ignore overruns too (for real raw support).
714 */
715 if (termios->c_iflag & IGNPAR)
716 up->port.ignore_status_mask |= UART_LSR_OE;
717 }
718
719 /*
720 * ignore all characters if CREAD is not set
721 */
722 if ((termios->c_cflag & CREAD) == 0)
723 up->port.ignore_status_mask |= UART_LSR_DR;
724
725 /*
726 * CTS flow control flag and modem status interrupts
727 */
728 up->ier &= ~UART_IER_MSI;
729 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
730 up->ier |= UART_IER_MSI;
731
732 serial_out(up, UART_IER, up->ier);
733
734 spin_unlock_irqrestore(&up->port.lock, flags);
735}
736
737/*
738 * Resource handling. This is complicated by the fact that resources
739 * depend on the port type. Maybe we should be claiming the standard
740 * 8250 ports, and then trying to get other resources as necessary?
741 */
742static int
743m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
744{
745 unsigned int size = 8 << up->port.regshift;
746#ifndef CONFIG_SERIAL_M32R_PLDSIO
747 unsigned long start;
748#endif
749 int ret = 0;
750
751 switch (up->port.iotype) {
752 case UPIO_MEM:
753 if (up->port.mapbase) {
754#ifdef CONFIG_SERIAL_M32R_PLDSIO
755 *res = request_mem_region(up->port.mapbase, size, "serial");
756#else
757 start = up->port.mapbase;
758 *res = request_mem_region(start, size, "serial");
759#endif
760 if (!*res)
761 ret = -EBUSY;
762 }
763 break;
764
765 case UPIO_PORT:
766 *res = request_region(up->port.iobase, size, "serial");
767 if (!*res)
768 ret = -EBUSY;
769 break;
770 }
771 return ret;
772}
773
774static void m32r_sio_release_port(struct uart_port *port)
775{
776 struct uart_sio_port *up =
777 container_of(port, struct uart_sio_port, port);
778 unsigned long start, offset = 0, size = 0;
779
780 size <<= up->port.regshift;
781
782 switch (up->port.iotype) {
783 case UPIO_MEM:
784 if (up->port.mapbase) {
785 /*
786 * Unmap the area.
787 */
788 iounmap(up->port.membase);
789 up->port.membase = NULL;
790
791 start = up->port.mapbase;
792
793 if (size)
794 release_mem_region(start + offset, size);
795 release_mem_region(start, 8 << up->port.regshift);
796 }
797 break;
798
799 case UPIO_PORT:
800 start = up->port.iobase;
801
802 if (size)
803 release_region(start + offset, size);
804 release_region(start + offset, 8 << up->port.regshift);
805 break;
806
807 default:
808 break;
809 }
810}
811
812static int m32r_sio_request_port(struct uart_port *port)
813{
814 struct uart_sio_port *up =
815 container_of(port, struct uart_sio_port, port);
816 struct resource *res = NULL;
817 int ret = 0;
818
819 ret = m32r_sio_request_std_resource(up, &res);
820
821 /*
822 * If we have a mapbase, then request that as well.
823 */
824 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
825 int size = resource_size(res);
826
827 up->port.membase = ioremap(up->port.mapbase, size);
828 if (!up->port.membase)
829 ret = -ENOMEM;
830 }
831
832 if (ret < 0) {
833 if (res)
834 release_resource(res);
835 }
836
837 return ret;
838}
839
840static void m32r_sio_config_port(struct uart_port *port, int unused)
841{
842 struct uart_sio_port *up =
843 container_of(port, struct uart_sio_port, port);
844 unsigned long flags;
845
846 spin_lock_irqsave(&up->port.lock, flags);
847
848 up->port.fifosize = 1;
849
850 spin_unlock_irqrestore(&up->port.lock, flags);
851}
852
853static int
854m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
855{
856 if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600)
857 return -EINVAL;
858 return 0;
859}
860
861static struct uart_ops m32r_sio_pops = {
862 .tx_empty = m32r_sio_tx_empty,
863 .set_mctrl = m32r_sio_set_mctrl,
864 .get_mctrl = m32r_sio_get_mctrl,
865 .stop_tx = m32r_sio_stop_tx,
866 .start_tx = m32r_sio_start_tx,
867 .stop_rx = m32r_sio_stop_rx,
868 .enable_ms = m32r_sio_enable_ms,
869 .break_ctl = m32r_sio_break_ctl,
870 .startup = m32r_sio_startup,
871 .shutdown = m32r_sio_shutdown,
872 .set_termios = m32r_sio_set_termios,
873 .release_port = m32r_sio_release_port,
874 .request_port = m32r_sio_request_port,
875 .config_port = m32r_sio_config_port,
876 .verify_port = m32r_sio_verify_port,
877};
878
879static struct uart_sio_port m32r_sio_ports[UART_NR];
880
881static void __init m32r_sio_init_ports(void)
882{
883 struct uart_sio_port *up;
884 static int first = 1;
885 int i;
886
887 if (!first)
888 return;
889 first = 0;
890
891 for (i = 0, up = m32r_sio_ports; i < UART_NR; i++, up++) {
892 up->port.iobase = old_serial_port[i].port;
893 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
894 up->port.uartclk = BAUD_RATE * 16;
895 up->port.flags = STD_COM_FLAGS;
896 up->port.membase = 0;
897 up->port.iotype = 0;
898 up->port.regshift = 0;
899 up->port.ops = &m32r_sio_pops;
900 }
901}
902
903static void __init m32r_sio_register_ports(struct uart_driver *drv)
904{
905 int i;
906
907 m32r_sio_init_ports();
908
909 for (i = 0; i < UART_NR; i++) {
910 struct uart_sio_port *up = &m32r_sio_ports[i];
911
912 up->port.line = i;
913 up->port.ops = &m32r_sio_pops;
914 init_timer(&up->timer);
915 up->timer.function = m32r_sio_timeout;
916
917 uart_add_one_port(drv, &up->port);
918 }
919}
920
921#ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
922
923/*
924 * Wait for transmitter & holding register to empty
925 */
926static void wait_for_xmitr(struct uart_sio_port *up)
927{
928 unsigned int status, tmout = 10000;
929
930 /* Wait up to 10ms for the character(s) to be sent. */
931 do {
932 status = sio_in(up, SIOSTS);
933
934 if (--tmout == 0)
935 break;
936 udelay(1);
937 } while ((status & UART_EMPTY) != UART_EMPTY);
938
939 /* Wait up to 1s for flow control if necessary */
940 if (up->port.flags & UPF_CONS_FLOW) {
941 tmout = 1000000;
942 while (--tmout)
943 udelay(1);
944 }
945}
946
947static void m32r_sio_console_putchar(struct uart_port *port, int ch)
948{
949 struct uart_sio_port *up =
950 container_of(port, struct uart_sio_port, port);
951
952 wait_for_xmitr(up);
953 sio_out(up, SIOTXB, ch);
954}
955
956/*
957 * Print a string to the serial port trying not to disturb
958 * any possible real use of the port...
959 *
960 * The console_lock must be held when we get here.
961 */
962static void m32r_sio_console_write(struct console *co, const char *s,
963 unsigned int count)
964{
965 struct uart_sio_port *up = &m32r_sio_ports[co->index];
966 unsigned int ier;
967
968 /*
969 * First save the UER then disable the interrupts
970 */
971 ier = sio_in(up, SIOTRCR);
972 sio_out(up, SIOTRCR, 0);
973
974 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
975
976 /*
977 * Finally, wait for transmitter to become empty
978 * and restore the IER
979 */
980 wait_for_xmitr(up);
981 sio_out(up, SIOTRCR, ier);
982}
983
984static int __init m32r_sio_console_setup(struct console *co, char *options)
985{
986 struct uart_port *port;
987 int baud = 9600;
988 int bits = 8;
989 int parity = 'n';
990 int flow = 'n';
991
992 /*
993 * Check whether an invalid uart number has been specified, and
994 * if so, search for the first available port that does have
995 * console support.
996 */
997 if (co->index >= UART_NR)
998 co->index = 0;
999 port = &m32r_sio_ports[co->index].port;
1000
1001 /*
1002 * Temporary fix.
1003 */
1004 spin_lock_init(&port->lock);
1005
1006 if (options)
1007 uart_parse_options(options, &baud, &parity, &bits, &flow);
1008
1009 return uart_set_options(port, co, baud, parity, bits, flow);
1010}
1011
1012static struct uart_driver m32r_sio_reg;
1013static struct console m32r_sio_console = {
1014 .name = "ttyS",
1015 .write = m32r_sio_console_write,
1016 .device = uart_console_device,
1017 .setup = m32r_sio_console_setup,
1018 .flags = CON_PRINTBUFFER,
1019 .index = -1,
1020 .data = &m32r_sio_reg,
1021};
1022
1023static int __init m32r_sio_console_init(void)
1024{
1025 sio_reset();
1026 sio_init();
1027 m32r_sio_init_ports();
1028 register_console(&m32r_sio_console);
1029 return 0;
1030}
1031console_initcall(m32r_sio_console_init);
1032
1033#define M32R_SIO_CONSOLE &m32r_sio_console
1034#else
1035#define M32R_SIO_CONSOLE NULL
1036#endif
1037
1038static struct uart_driver m32r_sio_reg = {
1039 .owner = THIS_MODULE,
1040 .driver_name = "sio",
1041 .dev_name = "ttyS",
1042 .major = TTY_MAJOR,
1043 .minor = 64,
1044 .nr = UART_NR,
1045 .cons = M32R_SIO_CONSOLE,
1046};
1047
1048static int __init m32r_sio_init(void)
1049{
1050 int ret, i;
1051
1052 printk(KERN_INFO "Serial: M32R SIO driver\n");
1053
1054 for (i = 0; i < nr_irqs; i++)
1055 spin_lock_init(&irq_lists[i].lock);
1056
1057 ret = uart_register_driver(&m32r_sio_reg);
1058 if (ret >= 0)
1059 m32r_sio_register_ports(&m32r_sio_reg);
1060
1061 return ret;
1062}
1063
1064static void __exit m32r_sio_exit(void)
1065{
1066 int i;
1067
1068 for (i = 0; i < UART_NR; i++)
1069 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1070
1071 uart_unregister_driver(&m32r_sio_reg);
1072}
1073
1074module_init(m32r_sio_init);
1075module_exit(m32r_sio_exit);
1076
1077MODULE_LICENSE("GPL");
1078MODULE_DESCRIPTION("Generic M32R SIO serial driver");
1/*
2 * m32r_sio.c
3 *
4 * Driver for M32R serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
8 *
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18/*
19 * A note about mapbase / membase
20 *
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
24 *
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
27 */
28
29#if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30#define SUPPORT_SYSRQ
31#endif
32
33#include <linux/module.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/ioport.h>
37#include <linux/init.h>
38#include <linux/console.h>
39#include <linux/sysrq.h>
40#include <linux/serial.h>
41#include <linux/delay.h>
42
43#include <asm/m32r.h>
44#include <asm/io.h>
45#include <asm/irq.h>
46
47#define BAUD_RATE 115200
48
49#include <linux/serial_core.h>
50#include "m32r_sio.h"
51#include "m32r_sio_reg.h"
52
53/*
54 * Debugging.
55 */
56#if 0
57#define DEBUG_AUTOCONF(fmt...) printk(fmt)
58#else
59#define DEBUG_AUTOCONF(fmt...) do { } while (0)
60#endif
61
62#if 0
63#define DEBUG_INTR(fmt...) printk(fmt)
64#else
65#define DEBUG_INTR(fmt...) do { } while (0)
66#endif
67
68#define PASS_LIMIT 256
69
70#define BASE_BAUD 115200
71
72/* Standard COM flags */
73#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
74
75/*
76 * SERIAL_PORT_DFNS tells us about built-in ports that have no
77 * standard enumeration mechanism. Platforms that can find all
78 * serial ports via mechanisms like ACPI or PCI need not supply it.
79 */
80#if defined(CONFIG_PLAT_USRV)
81
82#define SERIAL_PORT_DFNS \
83 /* UART CLK PORT IRQ FLAGS */ \
84 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
85 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
86
87#else /* !CONFIG_PLAT_USRV */
88
89#if defined(CONFIG_SERIAL_M32R_PLDSIO)
90#define SERIAL_PORT_DFNS \
91 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
92 STD_COM_FLAGS }, /* ttyS0 */
93#else
94#define SERIAL_PORT_DFNS \
95 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
96 STD_COM_FLAGS }, /* ttyS0 */
97#endif
98
99#endif /* !CONFIG_PLAT_USRV */
100
101static struct old_serial_port old_serial_port[] = {
102 SERIAL_PORT_DFNS
103};
104
105#define UART_NR ARRAY_SIZE(old_serial_port)
106
107struct uart_sio_port {
108 struct uart_port port;
109 struct timer_list timer; /* "no irq" timer */
110 struct list_head list; /* ports on this IRQ */
111 unsigned short rev;
112 unsigned char acr;
113 unsigned char ier;
114 unsigned char lcr;
115 unsigned char mcr_mask; /* mask of user bits */
116 unsigned char mcr_force; /* mask of forced bits */
117 unsigned char lsr_break_flag;
118
119 /*
120 * We provide a per-port pm hook.
121 */
122 void (*pm)(struct uart_port *port,
123 unsigned int state, unsigned int old);
124};
125
126struct irq_info {
127 spinlock_t lock;
128 struct list_head *head;
129};
130
131static struct irq_info irq_lists[NR_IRQS];
132
133#ifdef CONFIG_SERIAL_M32R_PLDSIO
134
135#define __sio_in(x) inw((unsigned long)(x))
136#define __sio_out(v,x) outw((v),(unsigned long)(x))
137
138static inline void sio_set_baud_rate(unsigned long baud)
139{
140 unsigned short sbaud;
141 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
142 __sio_out(sbaud, PLD_ESIO0BAUR);
143}
144
145static void sio_reset(void)
146{
147 unsigned short tmp;
148
149 tmp = __sio_in(PLD_ESIO0RXB);
150 tmp = __sio_in(PLD_ESIO0RXB);
151 tmp = __sio_in(PLD_ESIO0CR);
152 sio_set_baud_rate(BAUD_RATE);
153 __sio_out(0x0300, PLD_ESIO0CR);
154 __sio_out(0x0003, PLD_ESIO0CR);
155}
156
157static void sio_init(void)
158{
159 unsigned short tmp;
160
161 tmp = __sio_in(PLD_ESIO0RXB);
162 tmp = __sio_in(PLD_ESIO0RXB);
163 tmp = __sio_in(PLD_ESIO0CR);
164 __sio_out(0x0300, PLD_ESIO0CR);
165 __sio_out(0x0003, PLD_ESIO0CR);
166}
167
168static void sio_error(int *status)
169{
170 printk("SIO0 error[%04x]\n", *status);
171 do {
172 sio_init();
173 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
174}
175
176#else /* not CONFIG_SERIAL_M32R_PLDSIO */
177
178#define __sio_in(x) inl(x)
179#define __sio_out(v,x) outl((v),(x))
180
181static inline void sio_set_baud_rate(unsigned long baud)
182{
183 unsigned long i, j;
184
185 i = boot_cpu_data.bus_clock / (baud * 16);
186 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
187 i -= 1;
188 j = (j + 1) >> 1;
189
190 __sio_out(i, M32R_SIO0_BAUR_PORTL);
191 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
192}
193
194static void sio_reset(void)
195{
196 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
197 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
198 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
199 sio_set_baud_rate(BAUD_RATE);
200 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
201 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
202}
203
204static void sio_init(void)
205{
206 unsigned int tmp;
207
208 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
209 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
210 tmp = __sio_in(M32R_SIO0_STS_PORTL);
211 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
212}
213
214static void sio_error(int *status)
215{
216 printk("SIO0 error[%04x]\n", *status);
217 do {
218 sio_init();
219 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
220}
221
222#endif /* CONFIG_SERIAL_M32R_PLDSIO */
223
224static unsigned int sio_in(struct uart_sio_port *up, int offset)
225{
226 return __sio_in(up->port.iobase + offset);
227}
228
229static void sio_out(struct uart_sio_port *up, int offset, int value)
230{
231 __sio_out(value, up->port.iobase + offset);
232}
233
234static unsigned int serial_in(struct uart_sio_port *up, int offset)
235{
236 if (!offset)
237 return 0;
238
239 return __sio_in(offset);
240}
241
242static void serial_out(struct uart_sio_port *up, int offset, int value)
243{
244 if (!offset)
245 return;
246
247 __sio_out(value, offset);
248}
249
250static void m32r_sio_stop_tx(struct uart_port *port)
251{
252 struct uart_sio_port *up = (struct uart_sio_port *)port;
253
254 if (up->ier & UART_IER_THRI) {
255 up->ier &= ~UART_IER_THRI;
256 serial_out(up, UART_IER, up->ier);
257 }
258}
259
260static void m32r_sio_start_tx(struct uart_port *port)
261{
262#ifdef CONFIG_SERIAL_M32R_PLDSIO
263 struct uart_sio_port *up = (struct uart_sio_port *)port;
264 struct circ_buf *xmit = &up->port.state->xmit;
265
266 if (!(up->ier & UART_IER_THRI)) {
267 up->ier |= UART_IER_THRI;
268 serial_out(up, UART_IER, up->ier);
269 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
270 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
271 up->port.icount.tx++;
272 }
273 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
274#else
275 struct uart_sio_port *up = (struct uart_sio_port *)port;
276
277 if (!(up->ier & UART_IER_THRI)) {
278 up->ier |= UART_IER_THRI;
279 serial_out(up, UART_IER, up->ier);
280 }
281#endif
282}
283
284static void m32r_sio_stop_rx(struct uart_port *port)
285{
286 struct uart_sio_port *up = (struct uart_sio_port *)port;
287
288 up->ier &= ~UART_IER_RLSI;
289 up->port.read_status_mask &= ~UART_LSR_DR;
290 serial_out(up, UART_IER, up->ier);
291}
292
293static void m32r_sio_enable_ms(struct uart_port *port)
294{
295 struct uart_sio_port *up = (struct uart_sio_port *)port;
296
297 up->ier |= UART_IER_MSI;
298 serial_out(up, UART_IER, up->ier);
299}
300
301static void receive_chars(struct uart_sio_port *up, int *status)
302{
303 struct tty_port *port = &up->port.state->port;
304 unsigned char ch;
305 unsigned char flag;
306 int max_count = 256;
307
308 do {
309 ch = sio_in(up, SIORXB);
310 flag = TTY_NORMAL;
311 up->port.icount.rx++;
312
313 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
314 UART_LSR_FE | UART_LSR_OE))) {
315 /*
316 * For statistics only
317 */
318 if (*status & UART_LSR_BI) {
319 *status &= ~(UART_LSR_FE | UART_LSR_PE);
320 up->port.icount.brk++;
321 /*
322 * We do the SysRQ and SAK checking
323 * here because otherwise the break
324 * may get masked by ignore_status_mask
325 * or read_status_mask.
326 */
327 if (uart_handle_break(&up->port))
328 goto ignore_char;
329 } else if (*status & UART_LSR_PE)
330 up->port.icount.parity++;
331 else if (*status & UART_LSR_FE)
332 up->port.icount.frame++;
333 if (*status & UART_LSR_OE)
334 up->port.icount.overrun++;
335
336 /*
337 * Mask off conditions which should be ingored.
338 */
339 *status &= up->port.read_status_mask;
340
341 if (up->port.line == up->port.cons->index) {
342 /* Recover the break flag from console xmit */
343 *status |= up->lsr_break_flag;
344 up->lsr_break_flag = 0;
345 }
346
347 if (*status & UART_LSR_BI) {
348 DEBUG_INTR("handling break....");
349 flag = TTY_BREAK;
350 } else if (*status & UART_LSR_PE)
351 flag = TTY_PARITY;
352 else if (*status & UART_LSR_FE)
353 flag = TTY_FRAME;
354 }
355 if (uart_handle_sysrq_char(&up->port, ch))
356 goto ignore_char;
357 if ((*status & up->port.ignore_status_mask) == 0)
358 tty_insert_flip_char(port, ch, flag);
359
360 if (*status & UART_LSR_OE) {
361 /*
362 * Overrun is special, since it's reported
363 * immediately, and doesn't affect the current
364 * character.
365 */
366 tty_insert_flip_char(port, 0, TTY_OVERRUN);
367 }
368 ignore_char:
369 *status = serial_in(up, UART_LSR);
370 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
371
372 spin_unlock(&up->port.lock);
373 tty_flip_buffer_push(port);
374 spin_lock(&up->port.lock);
375}
376
377static void transmit_chars(struct uart_sio_port *up)
378{
379 struct circ_buf *xmit = &up->port.state->xmit;
380 int count;
381
382 if (up->port.x_char) {
383#ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
384 serial_out(up, UART_TX, up->port.x_char);
385#endif
386 up->port.icount.tx++;
387 up->port.x_char = 0;
388 return;
389 }
390 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
391 m32r_sio_stop_tx(&up->port);
392 return;
393 }
394
395 count = up->port.fifosize;
396 do {
397 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
398 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
399 up->port.icount.tx++;
400 if (uart_circ_empty(xmit))
401 break;
402 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
403
404 } while (--count > 0);
405
406 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
407 uart_write_wakeup(&up->port);
408
409 DEBUG_INTR("THRE...");
410
411 if (uart_circ_empty(xmit))
412 m32r_sio_stop_tx(&up->port);
413}
414
415/*
416 * This handles the interrupt from one port.
417 */
418static inline void m32r_sio_handle_port(struct uart_sio_port *up,
419 unsigned int status)
420{
421 DEBUG_INTR("status = %x...", status);
422
423 if (status & 0x04)
424 receive_chars(up, &status);
425 if (status & 0x01)
426 transmit_chars(up);
427}
428
429/*
430 * This is the serial driver's interrupt routine.
431 *
432 * Arjan thinks the old way was overly complex, so it got simplified.
433 * Alan disagrees, saying that need the complexity to handle the weird
434 * nature of ISA shared interrupts. (This is a special exception.)
435 *
436 * In order to handle ISA shared interrupts properly, we need to check
437 * that all ports have been serviced, and therefore the ISA interrupt
438 * line has been de-asserted.
439 *
440 * This means we need to loop through all ports. checking that they
441 * don't have an interrupt pending.
442 */
443static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
444{
445 struct irq_info *i = dev_id;
446 struct list_head *l, *end = NULL;
447 int pass_counter = 0;
448
449 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
450
451#ifdef CONFIG_SERIAL_M32R_PLDSIO
452// if (irq == PLD_IRQ_SIO0_SND)
453// irq = PLD_IRQ_SIO0_RCV;
454#else
455 if (irq == M32R_IRQ_SIO0_S)
456 irq = M32R_IRQ_SIO0_R;
457#endif
458
459 spin_lock(&i->lock);
460
461 l = i->head;
462 do {
463 struct uart_sio_port *up;
464 unsigned int sts;
465
466 up = list_entry(l, struct uart_sio_port, list);
467
468 sts = sio_in(up, SIOSTS);
469 if (sts & 0x5) {
470 spin_lock(&up->port.lock);
471 m32r_sio_handle_port(up, sts);
472 spin_unlock(&up->port.lock);
473
474 end = NULL;
475 } else if (end == NULL)
476 end = l;
477
478 l = l->next;
479
480 if (l == i->head && pass_counter++ > PASS_LIMIT) {
481 if (sts & 0xe0)
482 sio_error(&sts);
483 break;
484 }
485 } while (l != end);
486
487 spin_unlock(&i->lock);
488
489 DEBUG_INTR("end.\n");
490
491 return IRQ_HANDLED;
492}
493
494/*
495 * To support ISA shared interrupts, we need to have one interrupt
496 * handler that ensures that the IRQ line has been deasserted
497 * before returning. Failing to do this will result in the IRQ
498 * line being stuck active, and, since ISA irqs are edge triggered,
499 * no more IRQs will be seen.
500 */
501static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
502{
503 spin_lock_irq(&i->lock);
504
505 if (!list_empty(i->head)) {
506 if (i->head == &up->list)
507 i->head = i->head->next;
508 list_del(&up->list);
509 } else {
510 BUG_ON(i->head != &up->list);
511 i->head = NULL;
512 }
513
514 spin_unlock_irq(&i->lock);
515}
516
517static int serial_link_irq_chain(struct uart_sio_port *up)
518{
519 struct irq_info *i = irq_lists + up->port.irq;
520 int ret, irq_flags = 0;
521
522 spin_lock_irq(&i->lock);
523
524 if (i->head) {
525 list_add(&up->list, i->head);
526 spin_unlock_irq(&i->lock);
527
528 ret = 0;
529 } else {
530 INIT_LIST_HEAD(&up->list);
531 i->head = &up->list;
532 spin_unlock_irq(&i->lock);
533
534 ret = request_irq(up->port.irq, m32r_sio_interrupt,
535 irq_flags, "SIO0-RX", i);
536 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
537 irq_flags, "SIO0-TX", i);
538 if (ret < 0)
539 serial_do_unlink(i, up);
540 }
541
542 return ret;
543}
544
545static void serial_unlink_irq_chain(struct uart_sio_port *up)
546{
547 struct irq_info *i = irq_lists + up->port.irq;
548
549 BUG_ON(i->head == NULL);
550
551 if (list_empty(i->head)) {
552 free_irq(up->port.irq, i);
553 free_irq(up->port.irq + 1, i);
554 }
555
556 serial_do_unlink(i, up);
557}
558
559/*
560 * This function is used to handle ports that do not have an interrupt.
561 */
562static void m32r_sio_timeout(unsigned long data)
563{
564 struct uart_sio_port *up = (struct uart_sio_port *)data;
565 unsigned int timeout;
566 unsigned int sts;
567
568 sts = sio_in(up, SIOSTS);
569 if (sts & 0x5) {
570 spin_lock(&up->port.lock);
571 m32r_sio_handle_port(up, sts);
572 spin_unlock(&up->port.lock);
573 }
574
575 timeout = up->port.timeout;
576 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
577 mod_timer(&up->timer, jiffies + timeout);
578}
579
580static unsigned int m32r_sio_tx_empty(struct uart_port *port)
581{
582 struct uart_sio_port *up = (struct uart_sio_port *)port;
583 unsigned long flags;
584 unsigned int ret;
585
586 spin_lock_irqsave(&up->port.lock, flags);
587 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
588 spin_unlock_irqrestore(&up->port.lock, flags);
589
590 return ret;
591}
592
593static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
594{
595 return 0;
596}
597
598static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
599{
600
601}
602
603static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
604{
605
606}
607
608static int m32r_sio_startup(struct uart_port *port)
609{
610 struct uart_sio_port *up = (struct uart_sio_port *)port;
611 int retval;
612
613 sio_init();
614
615 /*
616 * If the "interrupt" for this port doesn't correspond with any
617 * hardware interrupt, we use a timer-based system. The original
618 * driver used to do this with IRQ0.
619 */
620 if (!up->port.irq) {
621 unsigned int timeout = up->port.timeout;
622
623 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
624
625 up->timer.data = (unsigned long)up;
626 mod_timer(&up->timer, jiffies + timeout);
627 } else {
628 retval = serial_link_irq_chain(up);
629 if (retval)
630 return retval;
631 }
632
633 /*
634 * Finally, enable interrupts. Note: Modem status interrupts
635 * are set via set_termios(), which will be occurring imminently
636 * anyway, so we don't enable them here.
637 * - M32R_SIO: 0x0c
638 * - M32R_PLDSIO: 0x04
639 */
640 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
641 sio_out(up, SIOTRCR, up->ier);
642
643 /*
644 * And clear the interrupt registers again for luck.
645 */
646 sio_reset();
647
648 return 0;
649}
650
651static void m32r_sio_shutdown(struct uart_port *port)
652{
653 struct uart_sio_port *up = (struct uart_sio_port *)port;
654
655 /*
656 * Disable interrupts from this port
657 */
658 up->ier = 0;
659 sio_out(up, SIOTRCR, 0);
660
661 /*
662 * Disable break condition and FIFOs
663 */
664
665 sio_init();
666
667 if (!up->port.irq)
668 del_timer_sync(&up->timer);
669 else
670 serial_unlink_irq_chain(up);
671}
672
673static unsigned int m32r_sio_get_divisor(struct uart_port *port,
674 unsigned int baud)
675{
676 return uart_get_divisor(port, baud);
677}
678
679static void m32r_sio_set_termios(struct uart_port *port,
680 struct ktermios *termios, struct ktermios *old)
681{
682 struct uart_sio_port *up = (struct uart_sio_port *)port;
683 unsigned char cval = 0;
684 unsigned long flags;
685 unsigned int baud, quot;
686
687 switch (termios->c_cflag & CSIZE) {
688 case CS5:
689 cval = UART_LCR_WLEN5;
690 break;
691 case CS6:
692 cval = UART_LCR_WLEN6;
693 break;
694 case CS7:
695 cval = UART_LCR_WLEN7;
696 break;
697 default:
698 case CS8:
699 cval = UART_LCR_WLEN8;
700 break;
701 }
702
703 if (termios->c_cflag & CSTOPB)
704 cval |= UART_LCR_STOP;
705 if (termios->c_cflag & PARENB)
706 cval |= UART_LCR_PARITY;
707 if (!(termios->c_cflag & PARODD))
708 cval |= UART_LCR_EPAR;
709#ifdef CMSPAR
710 if (termios->c_cflag & CMSPAR)
711 cval |= UART_LCR_SPAR;
712#endif
713
714 /*
715 * Ask the core to calculate the divisor for us.
716 */
717#ifdef CONFIG_SERIAL_M32R_PLDSIO
718 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
719#else
720 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
721#endif
722 quot = m32r_sio_get_divisor(port, baud);
723
724 /*
725 * Ok, we're now changing the port state. Do it with
726 * interrupts disabled.
727 */
728 spin_lock_irqsave(&up->port.lock, flags);
729
730 sio_set_baud_rate(baud);
731
732 /*
733 * Update the per-port timeout.
734 */
735 uart_update_timeout(port, termios->c_cflag, baud);
736
737 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
738 if (termios->c_iflag & INPCK)
739 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
740 if (termios->c_iflag & (BRKINT | PARMRK))
741 up->port.read_status_mask |= UART_LSR_BI;
742
743 /*
744 * Characteres to ignore
745 */
746 up->port.ignore_status_mask = 0;
747 if (termios->c_iflag & IGNPAR)
748 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
749 if (termios->c_iflag & IGNBRK) {
750 up->port.ignore_status_mask |= UART_LSR_BI;
751 /*
752 * If we're ignoring parity and break indicators,
753 * ignore overruns too (for real raw support).
754 */
755 if (termios->c_iflag & IGNPAR)
756 up->port.ignore_status_mask |= UART_LSR_OE;
757 }
758
759 /*
760 * ignore all characters if CREAD is not set
761 */
762 if ((termios->c_cflag & CREAD) == 0)
763 up->port.ignore_status_mask |= UART_LSR_DR;
764
765 /*
766 * CTS flow control flag and modem status interrupts
767 */
768 up->ier &= ~UART_IER_MSI;
769 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
770 up->ier |= UART_IER_MSI;
771
772 serial_out(up, UART_IER, up->ier);
773
774 up->lcr = cval; /* Save LCR */
775 spin_unlock_irqrestore(&up->port.lock, flags);
776}
777
778static void m32r_sio_pm(struct uart_port *port, unsigned int state,
779 unsigned int oldstate)
780{
781 struct uart_sio_port *up = (struct uart_sio_port *)port;
782
783 if (up->pm)
784 up->pm(port, state, oldstate);
785}
786
787/*
788 * Resource handling. This is complicated by the fact that resources
789 * depend on the port type. Maybe we should be claiming the standard
790 * 8250 ports, and then trying to get other resources as necessary?
791 */
792static int
793m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
794{
795 unsigned int size = 8 << up->port.regshift;
796#ifndef CONFIG_SERIAL_M32R_PLDSIO
797 unsigned long start;
798#endif
799 int ret = 0;
800
801 switch (up->port.iotype) {
802 case UPIO_MEM:
803 if (up->port.mapbase) {
804#ifdef CONFIG_SERIAL_M32R_PLDSIO
805 *res = request_mem_region(up->port.mapbase, size, "serial");
806#else
807 start = up->port.mapbase;
808 *res = request_mem_region(start, size, "serial");
809#endif
810 if (!*res)
811 ret = -EBUSY;
812 }
813 break;
814
815 case UPIO_PORT:
816 *res = request_region(up->port.iobase, size, "serial");
817 if (!*res)
818 ret = -EBUSY;
819 break;
820 }
821 return ret;
822}
823
824static void m32r_sio_release_port(struct uart_port *port)
825{
826 struct uart_sio_port *up = (struct uart_sio_port *)port;
827 unsigned long start, offset = 0, size = 0;
828
829 size <<= up->port.regshift;
830
831 switch (up->port.iotype) {
832 case UPIO_MEM:
833 if (up->port.mapbase) {
834 /*
835 * Unmap the area.
836 */
837 iounmap(up->port.membase);
838 up->port.membase = NULL;
839
840 start = up->port.mapbase;
841
842 if (size)
843 release_mem_region(start + offset, size);
844 release_mem_region(start, 8 << up->port.regshift);
845 }
846 break;
847
848 case UPIO_PORT:
849 start = up->port.iobase;
850
851 if (size)
852 release_region(start + offset, size);
853 release_region(start + offset, 8 << up->port.regshift);
854 break;
855
856 default:
857 break;
858 }
859}
860
861static int m32r_sio_request_port(struct uart_port *port)
862{
863 struct uart_sio_port *up = (struct uart_sio_port *)port;
864 struct resource *res = NULL;
865 int ret = 0;
866
867 ret = m32r_sio_request_std_resource(up, &res);
868
869 /*
870 * If we have a mapbase, then request that as well.
871 */
872 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
873 int size = resource_size(res);
874
875 up->port.membase = ioremap(up->port.mapbase, size);
876 if (!up->port.membase)
877 ret = -ENOMEM;
878 }
879
880 if (ret < 0) {
881 if (res)
882 release_resource(res);
883 }
884
885 return ret;
886}
887
888static void m32r_sio_config_port(struct uart_port *port, int unused)
889{
890 struct uart_sio_port *up = (struct uart_sio_port *)port;
891 unsigned long flags;
892
893 spin_lock_irqsave(&up->port.lock, flags);
894
895 up->port.fifosize = 1;
896
897 spin_unlock_irqrestore(&up->port.lock, flags);
898}
899
900static int
901m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
902{
903 if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600)
904 return -EINVAL;
905 return 0;
906}
907
908static struct uart_ops m32r_sio_pops = {
909 .tx_empty = m32r_sio_tx_empty,
910 .set_mctrl = m32r_sio_set_mctrl,
911 .get_mctrl = m32r_sio_get_mctrl,
912 .stop_tx = m32r_sio_stop_tx,
913 .start_tx = m32r_sio_start_tx,
914 .stop_rx = m32r_sio_stop_rx,
915 .enable_ms = m32r_sio_enable_ms,
916 .break_ctl = m32r_sio_break_ctl,
917 .startup = m32r_sio_startup,
918 .shutdown = m32r_sio_shutdown,
919 .set_termios = m32r_sio_set_termios,
920 .pm = m32r_sio_pm,
921 .release_port = m32r_sio_release_port,
922 .request_port = m32r_sio_request_port,
923 .config_port = m32r_sio_config_port,
924 .verify_port = m32r_sio_verify_port,
925};
926
927static struct uart_sio_port m32r_sio_ports[UART_NR];
928
929static void __init m32r_sio_init_ports(void)
930{
931 struct uart_sio_port *up;
932 static int first = 1;
933 int i;
934
935 if (!first)
936 return;
937 first = 0;
938
939 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
940 i++, up++) {
941 up->port.iobase = old_serial_port[i].port;
942 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
943 up->port.uartclk = old_serial_port[i].baud_base * 16;
944 up->port.flags = old_serial_port[i].flags;
945 up->port.membase = old_serial_port[i].iomem_base;
946 up->port.iotype = old_serial_port[i].io_type;
947 up->port.regshift = old_serial_port[i].iomem_reg_shift;
948 up->port.ops = &m32r_sio_pops;
949 }
950}
951
952static void __init m32r_sio_register_ports(struct uart_driver *drv)
953{
954 int i;
955
956 m32r_sio_init_ports();
957
958 for (i = 0; i < UART_NR; i++) {
959 struct uart_sio_port *up = &m32r_sio_ports[i];
960
961 up->port.line = i;
962 up->port.ops = &m32r_sio_pops;
963 init_timer(&up->timer);
964 up->timer.function = m32r_sio_timeout;
965
966 up->mcr_mask = ~0;
967 up->mcr_force = 0;
968
969 uart_add_one_port(drv, &up->port);
970 }
971}
972
973#ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
974
975/*
976 * Wait for transmitter & holding register to empty
977 */
978static inline void wait_for_xmitr(struct uart_sio_port *up)
979{
980 unsigned int status, tmout = 10000;
981
982 /* Wait up to 10ms for the character(s) to be sent. */
983 do {
984 status = sio_in(up, SIOSTS);
985
986 if (--tmout == 0)
987 break;
988 udelay(1);
989 } while ((status & UART_EMPTY) != UART_EMPTY);
990
991 /* Wait up to 1s for flow control if necessary */
992 if (up->port.flags & UPF_CONS_FLOW) {
993 tmout = 1000000;
994 while (--tmout)
995 udelay(1);
996 }
997}
998
999static void m32r_sio_console_putchar(struct uart_port *port, int ch)
1000{
1001 struct uart_sio_port *up = (struct uart_sio_port *)port;
1002
1003 wait_for_xmitr(up);
1004 sio_out(up, SIOTXB, ch);
1005}
1006
1007/*
1008 * Print a string to the serial port trying not to disturb
1009 * any possible real use of the port...
1010 *
1011 * The console_lock must be held when we get here.
1012 */
1013static void m32r_sio_console_write(struct console *co, const char *s,
1014 unsigned int count)
1015{
1016 struct uart_sio_port *up = &m32r_sio_ports[co->index];
1017 unsigned int ier;
1018
1019 /*
1020 * First save the UER then disable the interrupts
1021 */
1022 ier = sio_in(up, SIOTRCR);
1023 sio_out(up, SIOTRCR, 0);
1024
1025 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1026
1027 /*
1028 * Finally, wait for transmitter to become empty
1029 * and restore the IER
1030 */
1031 wait_for_xmitr(up);
1032 sio_out(up, SIOTRCR, ier);
1033}
1034
1035static int __init m32r_sio_console_setup(struct console *co, char *options)
1036{
1037 struct uart_port *port;
1038 int baud = 9600;
1039 int bits = 8;
1040 int parity = 'n';
1041 int flow = 'n';
1042
1043 /*
1044 * Check whether an invalid uart number has been specified, and
1045 * if so, search for the first available port that does have
1046 * console support.
1047 */
1048 if (co->index >= UART_NR)
1049 co->index = 0;
1050 port = &m32r_sio_ports[co->index].port;
1051
1052 /*
1053 * Temporary fix.
1054 */
1055 spin_lock_init(&port->lock);
1056
1057 if (options)
1058 uart_parse_options(options, &baud, &parity, &bits, &flow);
1059
1060 return uart_set_options(port, co, baud, parity, bits, flow);
1061}
1062
1063static struct uart_driver m32r_sio_reg;
1064static struct console m32r_sio_console = {
1065 .name = "ttyS",
1066 .write = m32r_sio_console_write,
1067 .device = uart_console_device,
1068 .setup = m32r_sio_console_setup,
1069 .flags = CON_PRINTBUFFER,
1070 .index = -1,
1071 .data = &m32r_sio_reg,
1072};
1073
1074static int __init m32r_sio_console_init(void)
1075{
1076 sio_reset();
1077 sio_init();
1078 m32r_sio_init_ports();
1079 register_console(&m32r_sio_console);
1080 return 0;
1081}
1082console_initcall(m32r_sio_console_init);
1083
1084#define M32R_SIO_CONSOLE &m32r_sio_console
1085#else
1086#define M32R_SIO_CONSOLE NULL
1087#endif
1088
1089static struct uart_driver m32r_sio_reg = {
1090 .owner = THIS_MODULE,
1091 .driver_name = "sio",
1092 .dev_name = "ttyS",
1093 .major = TTY_MAJOR,
1094 .minor = 64,
1095 .nr = UART_NR,
1096 .cons = M32R_SIO_CONSOLE,
1097};
1098
1099/**
1100 * m32r_sio_suspend_port - suspend one serial port
1101 * @line: serial line number
1102 *
1103 * Suspend one serial port.
1104 */
1105void m32r_sio_suspend_port(int line)
1106{
1107 uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1108}
1109
1110/**
1111 * m32r_sio_resume_port - resume one serial port
1112 * @line: serial line number
1113 *
1114 * Resume one serial port.
1115 */
1116void m32r_sio_resume_port(int line)
1117{
1118 uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1119}
1120
1121static int __init m32r_sio_init(void)
1122{
1123 int ret, i;
1124
1125 printk(KERN_INFO "Serial: M32R SIO driver\n");
1126
1127 for (i = 0; i < nr_irqs; i++)
1128 spin_lock_init(&irq_lists[i].lock);
1129
1130 ret = uart_register_driver(&m32r_sio_reg);
1131 if (ret >= 0)
1132 m32r_sio_register_ports(&m32r_sio_reg);
1133
1134 return ret;
1135}
1136
1137static void __exit m32r_sio_exit(void)
1138{
1139 int i;
1140
1141 for (i = 0; i < UART_NR; i++)
1142 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1143
1144 uart_unregister_driver(&m32r_sio_reg);
1145}
1146
1147module_init(m32r_sio_init);
1148module_exit(m32r_sio_exit);
1149
1150EXPORT_SYMBOL(m32r_sio_suspend_port);
1151EXPORT_SYMBOL(m32r_sio_resume_port);
1152
1153MODULE_LICENSE("GPL");
1154MODULE_DESCRIPTION("Generic M32R SIO serial driver");