Loading...
1/*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/i2c.h>
19#include <linux/platform_data/pca953x.h>
20#include <linux/slab.h>
21#include <asm/unaligned.h>
22#include <linux/of_platform.h>
23#include <linux/acpi.h>
24
25#define PCA953X_INPUT 0
26#define PCA953X_OUTPUT 1
27#define PCA953X_INVERT 2
28#define PCA953X_DIRECTION 3
29
30#define REG_ADDR_AI 0x80
31
32#define PCA957X_IN 0
33#define PCA957X_INVRT 1
34#define PCA957X_BKEN 2
35#define PCA957X_PUPD 3
36#define PCA957X_CFG 4
37#define PCA957X_OUT 5
38#define PCA957X_MSK 6
39#define PCA957X_INTS 7
40
41#define PCA_GPIO_MASK 0x00FF
42#define PCA_INT 0x0100
43#define PCA953X_TYPE 0x1000
44#define PCA957X_TYPE 0x2000
45#define PCA_TYPE_MASK 0xF000
46
47#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
48
49static const struct i2c_device_id pca953x_id[] = {
50 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
51 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
52 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
53 { "pca9536", 4 | PCA953X_TYPE, },
54 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
55 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
56 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
57 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
58 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
59 { "pca9556", 8 | PCA953X_TYPE, },
60 { "pca9557", 8 | PCA953X_TYPE, },
61 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
62 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
63 { "pca9698", 40 | PCA953X_TYPE, },
64
65 { "max7310", 8 | PCA953X_TYPE, },
66 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
67 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
68 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
69 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
70 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
71 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
72 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
73 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
74 { "xra1202", 8 | PCA953X_TYPE },
75 { }
76};
77MODULE_DEVICE_TABLE(i2c, pca953x_id);
78
79static const struct acpi_device_id pca953x_acpi_ids[] = {
80 { "INT3491", 16 | PCA953X_TYPE | PCA_INT, },
81 { }
82};
83MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
84
85#define MAX_BANK 5
86#define BANK_SZ 8
87
88#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
89
90struct pca953x_chip {
91 unsigned gpio_start;
92 u8 reg_output[MAX_BANK];
93 u8 reg_direction[MAX_BANK];
94 struct mutex i2c_lock;
95
96#ifdef CONFIG_GPIO_PCA953X_IRQ
97 struct mutex irq_lock;
98 u8 irq_mask[MAX_BANK];
99 u8 irq_stat[MAX_BANK];
100 u8 irq_trig_raise[MAX_BANK];
101 u8 irq_trig_fall[MAX_BANK];
102#endif
103
104 struct i2c_client *client;
105 struct gpio_chip gpio_chip;
106 const char *const *names;
107 int chip_type;
108 unsigned long driver_data;
109};
110
111static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
112 int off)
113{
114 int ret;
115 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
116 int offset = off / BANK_SZ;
117
118 ret = i2c_smbus_read_byte_data(chip->client,
119 (reg << bank_shift) + offset);
120 *val = ret;
121
122 if (ret < 0) {
123 dev_err(&chip->client->dev, "failed reading register\n");
124 return ret;
125 }
126
127 return 0;
128}
129
130static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
131 int off)
132{
133 int ret = 0;
134 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
135 int offset = off / BANK_SZ;
136
137 ret = i2c_smbus_write_byte_data(chip->client,
138 (reg << bank_shift) + offset, val);
139
140 if (ret < 0) {
141 dev_err(&chip->client->dev, "failed writing register\n");
142 return ret;
143 }
144
145 return 0;
146}
147
148static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
149{
150 int ret = 0;
151
152 if (chip->gpio_chip.ngpio <= 8)
153 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
154 else if (chip->gpio_chip.ngpio >= 24) {
155 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
156 ret = i2c_smbus_write_i2c_block_data(chip->client,
157 (reg << bank_shift) | REG_ADDR_AI,
158 NBANK(chip), val);
159 } else {
160 switch (chip->chip_type) {
161 case PCA953X_TYPE:
162 ret = i2c_smbus_write_word_data(chip->client,
163 reg << 1, cpu_to_le16(get_unaligned((u16 *)val)));
164 break;
165 case PCA957X_TYPE:
166 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
167 val[0]);
168 if (ret < 0)
169 break;
170 ret = i2c_smbus_write_byte_data(chip->client,
171 (reg << 1) + 1,
172 val[1]);
173 break;
174 }
175 }
176
177 if (ret < 0) {
178 dev_err(&chip->client->dev, "failed writing register\n");
179 return ret;
180 }
181
182 return 0;
183}
184
185static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
186{
187 int ret;
188
189 if (chip->gpio_chip.ngpio <= 8) {
190 ret = i2c_smbus_read_byte_data(chip->client, reg);
191 *val = ret;
192 } else if (chip->gpio_chip.ngpio >= 24) {
193 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
194
195 ret = i2c_smbus_read_i2c_block_data(chip->client,
196 (reg << bank_shift) | REG_ADDR_AI,
197 NBANK(chip), val);
198 } else {
199 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
200 val[0] = (u16)ret & 0xFF;
201 val[1] = (u16)ret >> 8;
202 }
203 if (ret < 0) {
204 dev_err(&chip->client->dev, "failed reading register\n");
205 return ret;
206 }
207
208 return 0;
209}
210
211static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
212{
213 struct pca953x_chip *chip = gpiochip_get_data(gc);
214 u8 reg_val;
215 int ret, offset = 0;
216
217 mutex_lock(&chip->i2c_lock);
218 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
219
220 switch (chip->chip_type) {
221 case PCA953X_TYPE:
222 offset = PCA953X_DIRECTION;
223 break;
224 case PCA957X_TYPE:
225 offset = PCA957X_CFG;
226 break;
227 }
228 ret = pca953x_write_single(chip, offset, reg_val, off);
229 if (ret)
230 goto exit;
231
232 chip->reg_direction[off / BANK_SZ] = reg_val;
233 ret = 0;
234exit:
235 mutex_unlock(&chip->i2c_lock);
236 return ret;
237}
238
239static int pca953x_gpio_direction_output(struct gpio_chip *gc,
240 unsigned off, int val)
241{
242 struct pca953x_chip *chip = gpiochip_get_data(gc);
243 u8 reg_val;
244 int ret, offset = 0;
245
246 mutex_lock(&chip->i2c_lock);
247 /* set output level */
248 if (val)
249 reg_val = chip->reg_output[off / BANK_SZ]
250 | (1u << (off % BANK_SZ));
251 else
252 reg_val = chip->reg_output[off / BANK_SZ]
253 & ~(1u << (off % BANK_SZ));
254
255 switch (chip->chip_type) {
256 case PCA953X_TYPE:
257 offset = PCA953X_OUTPUT;
258 break;
259 case PCA957X_TYPE:
260 offset = PCA957X_OUT;
261 break;
262 }
263 ret = pca953x_write_single(chip, offset, reg_val, off);
264 if (ret)
265 goto exit;
266
267 chip->reg_output[off / BANK_SZ] = reg_val;
268
269 /* then direction */
270 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
271 switch (chip->chip_type) {
272 case PCA953X_TYPE:
273 offset = PCA953X_DIRECTION;
274 break;
275 case PCA957X_TYPE:
276 offset = PCA957X_CFG;
277 break;
278 }
279 ret = pca953x_write_single(chip, offset, reg_val, off);
280 if (ret)
281 goto exit;
282
283 chip->reg_direction[off / BANK_SZ] = reg_val;
284 ret = 0;
285exit:
286 mutex_unlock(&chip->i2c_lock);
287 return ret;
288}
289
290static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
291{
292 struct pca953x_chip *chip = gpiochip_get_data(gc);
293 u32 reg_val;
294 int ret, offset = 0;
295
296 mutex_lock(&chip->i2c_lock);
297 switch (chip->chip_type) {
298 case PCA953X_TYPE:
299 offset = PCA953X_INPUT;
300 break;
301 case PCA957X_TYPE:
302 offset = PCA957X_IN;
303 break;
304 }
305 ret = pca953x_read_single(chip, offset, ®_val, off);
306 mutex_unlock(&chip->i2c_lock);
307 if (ret < 0) {
308 /* NOTE: diagnostic already emitted; that's all we should
309 * do unless gpio_*_value_cansleep() calls become different
310 * from their nonsleeping siblings (and report faults).
311 */
312 return 0;
313 }
314
315 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
316}
317
318static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
319{
320 struct pca953x_chip *chip = gpiochip_get_data(gc);
321 u8 reg_val;
322 int ret, offset = 0;
323
324 mutex_lock(&chip->i2c_lock);
325 if (val)
326 reg_val = chip->reg_output[off / BANK_SZ]
327 | (1u << (off % BANK_SZ));
328 else
329 reg_val = chip->reg_output[off / BANK_SZ]
330 & ~(1u << (off % BANK_SZ));
331
332 switch (chip->chip_type) {
333 case PCA953X_TYPE:
334 offset = PCA953X_OUTPUT;
335 break;
336 case PCA957X_TYPE:
337 offset = PCA957X_OUT;
338 break;
339 }
340 ret = pca953x_write_single(chip, offset, reg_val, off);
341 if (ret)
342 goto exit;
343
344 chip->reg_output[off / BANK_SZ] = reg_val;
345exit:
346 mutex_unlock(&chip->i2c_lock);
347}
348
349
350static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
351 unsigned long *mask, unsigned long *bits)
352{
353 struct pca953x_chip *chip = gpiochip_get_data(gc);
354 u8 reg_val[MAX_BANK];
355 int ret, offset = 0;
356 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
357 int bank;
358
359 switch (chip->chip_type) {
360 case PCA953X_TYPE:
361 offset = PCA953X_OUTPUT;
362 break;
363 case PCA957X_TYPE:
364 offset = PCA957X_OUT;
365 break;
366 }
367
368 memcpy(reg_val, chip->reg_output, NBANK(chip));
369 mutex_lock(&chip->i2c_lock);
370 for(bank=0; bank<NBANK(chip); bank++) {
371 unsigned bankmask = mask[bank / sizeof(*mask)] >>
372 ((bank % sizeof(*mask)) * 8);
373 if(bankmask) {
374 unsigned bankval = bits[bank / sizeof(*bits)] >>
375 ((bank % sizeof(*bits)) * 8);
376 reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval;
377 }
378 }
379 ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val);
380 if (ret)
381 goto exit;
382
383 memcpy(chip->reg_output, reg_val, NBANK(chip));
384exit:
385 mutex_unlock(&chip->i2c_lock);
386}
387
388static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
389{
390 struct gpio_chip *gc;
391
392 gc = &chip->gpio_chip;
393
394 gc->direction_input = pca953x_gpio_direction_input;
395 gc->direction_output = pca953x_gpio_direction_output;
396 gc->get = pca953x_gpio_get_value;
397 gc->set = pca953x_gpio_set_value;
398 gc->set_multiple = pca953x_gpio_set_multiple;
399 gc->can_sleep = true;
400
401 gc->base = chip->gpio_start;
402 gc->ngpio = gpios;
403 gc->label = chip->client->name;
404 gc->parent = &chip->client->dev;
405 gc->owner = THIS_MODULE;
406 gc->names = chip->names;
407}
408
409#ifdef CONFIG_GPIO_PCA953X_IRQ
410static void pca953x_irq_mask(struct irq_data *d)
411{
412 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
413 struct pca953x_chip *chip = gpiochip_get_data(gc);
414
415 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
416}
417
418static void pca953x_irq_unmask(struct irq_data *d)
419{
420 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
421 struct pca953x_chip *chip = gpiochip_get_data(gc);
422
423 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
424}
425
426static void pca953x_irq_bus_lock(struct irq_data *d)
427{
428 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
429 struct pca953x_chip *chip = gpiochip_get_data(gc);
430
431 mutex_lock(&chip->irq_lock);
432}
433
434static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
435{
436 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
437 struct pca953x_chip *chip = gpiochip_get_data(gc);
438 u8 new_irqs;
439 int level, i;
440
441 /* Look for any newly setup interrupt */
442 for (i = 0; i < NBANK(chip); i++) {
443 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
444 new_irqs &= ~chip->reg_direction[i];
445
446 while (new_irqs) {
447 level = __ffs(new_irqs);
448 pca953x_gpio_direction_input(&chip->gpio_chip,
449 level + (BANK_SZ * i));
450 new_irqs &= ~(1 << level);
451 }
452 }
453
454 mutex_unlock(&chip->irq_lock);
455}
456
457static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
458{
459 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
460 struct pca953x_chip *chip = gpiochip_get_data(gc);
461 int bank_nb = d->hwirq / BANK_SZ;
462 u8 mask = 1 << (d->hwirq % BANK_SZ);
463
464 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
465 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
466 d->irq, type);
467 return -EINVAL;
468 }
469
470 if (type & IRQ_TYPE_EDGE_FALLING)
471 chip->irq_trig_fall[bank_nb] |= mask;
472 else
473 chip->irq_trig_fall[bank_nb] &= ~mask;
474
475 if (type & IRQ_TYPE_EDGE_RISING)
476 chip->irq_trig_raise[bank_nb] |= mask;
477 else
478 chip->irq_trig_raise[bank_nb] &= ~mask;
479
480 return 0;
481}
482
483static struct irq_chip pca953x_irq_chip = {
484 .name = "pca953x",
485 .irq_mask = pca953x_irq_mask,
486 .irq_unmask = pca953x_irq_unmask,
487 .irq_bus_lock = pca953x_irq_bus_lock,
488 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
489 .irq_set_type = pca953x_irq_set_type,
490};
491
492static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
493{
494 u8 cur_stat[MAX_BANK];
495 u8 old_stat[MAX_BANK];
496 bool pending_seen = false;
497 bool trigger_seen = false;
498 u8 trigger[MAX_BANK];
499 int ret, i, offset = 0;
500
501 switch (chip->chip_type) {
502 case PCA953X_TYPE:
503 offset = PCA953X_INPUT;
504 break;
505 case PCA957X_TYPE:
506 offset = PCA957X_IN;
507 break;
508 }
509 ret = pca953x_read_regs(chip, offset, cur_stat);
510 if (ret)
511 return false;
512
513 /* Remove output pins from the equation */
514 for (i = 0; i < NBANK(chip); i++)
515 cur_stat[i] &= chip->reg_direction[i];
516
517 memcpy(old_stat, chip->irq_stat, NBANK(chip));
518
519 for (i = 0; i < NBANK(chip); i++) {
520 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
521 if (trigger[i])
522 trigger_seen = true;
523 }
524
525 if (!trigger_seen)
526 return false;
527
528 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
529
530 for (i = 0; i < NBANK(chip); i++) {
531 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
532 (cur_stat[i] & chip->irq_trig_raise[i]);
533 pending[i] &= trigger[i];
534 if (pending[i])
535 pending_seen = true;
536 }
537
538 return pending_seen;
539}
540
541static irqreturn_t pca953x_irq_handler(int irq, void *devid)
542{
543 struct pca953x_chip *chip = devid;
544 u8 pending[MAX_BANK];
545 u8 level;
546 unsigned nhandled = 0;
547 int i;
548
549 if (!pca953x_irq_pending(chip, pending))
550 return IRQ_NONE;
551
552 for (i = 0; i < NBANK(chip); i++) {
553 while (pending[i]) {
554 level = __ffs(pending[i]);
555 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
556 level + (BANK_SZ * i)));
557 pending[i] &= ~(1 << level);
558 nhandled++;
559 }
560 }
561
562 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
563}
564
565static int pca953x_irq_setup(struct pca953x_chip *chip,
566 int irq_base)
567{
568 struct i2c_client *client = chip->client;
569 int ret, i, offset = 0;
570
571 if (client->irq && irq_base != -1
572 && (chip->driver_data & PCA_INT)) {
573
574 switch (chip->chip_type) {
575 case PCA953X_TYPE:
576 offset = PCA953X_INPUT;
577 break;
578 case PCA957X_TYPE:
579 offset = PCA957X_IN;
580 break;
581 }
582 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
583 if (ret)
584 return ret;
585
586 /*
587 * There is no way to know which GPIO line generated the
588 * interrupt. We have to rely on the previous read for
589 * this purpose.
590 */
591 for (i = 0; i < NBANK(chip); i++)
592 chip->irq_stat[i] &= chip->reg_direction[i];
593 mutex_init(&chip->irq_lock);
594
595 ret = devm_request_threaded_irq(&client->dev,
596 client->irq,
597 NULL,
598 pca953x_irq_handler,
599 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
600 IRQF_SHARED,
601 dev_name(&client->dev), chip);
602 if (ret) {
603 dev_err(&client->dev, "failed to request irq %d\n",
604 client->irq);
605 return ret;
606 }
607
608 ret = gpiochip_irqchip_add(&chip->gpio_chip,
609 &pca953x_irq_chip,
610 irq_base,
611 handle_simple_irq,
612 IRQ_TYPE_NONE);
613 if (ret) {
614 dev_err(&client->dev,
615 "could not connect irqchip to gpiochip\n");
616 return ret;
617 }
618
619 gpiochip_set_chained_irqchip(&chip->gpio_chip,
620 &pca953x_irq_chip,
621 client->irq, NULL);
622 }
623
624 return 0;
625}
626
627#else /* CONFIG_GPIO_PCA953X_IRQ */
628static int pca953x_irq_setup(struct pca953x_chip *chip,
629 int irq_base)
630{
631 struct i2c_client *client = chip->client;
632
633 if (irq_base != -1 && (chip->driver_data & PCA_INT))
634 dev_warn(&client->dev, "interrupt support not compiled in\n");
635
636 return 0;
637}
638#endif
639
640static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
641{
642 int ret;
643 u8 val[MAX_BANK];
644
645 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
646 if (ret)
647 goto out;
648
649 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
650 chip->reg_direction);
651 if (ret)
652 goto out;
653
654 /* set platform specific polarity inversion */
655 if (invert)
656 memset(val, 0xFF, NBANK(chip));
657 else
658 memset(val, 0, NBANK(chip));
659
660 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
661out:
662 return ret;
663}
664
665static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
666{
667 int ret;
668 u8 val[MAX_BANK];
669
670 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
671 if (ret)
672 goto out;
673 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
674 if (ret)
675 goto out;
676
677 /* set platform specific polarity inversion */
678 if (invert)
679 memset(val, 0xFF, NBANK(chip));
680 else
681 memset(val, 0, NBANK(chip));
682 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
683 if (ret)
684 goto out;
685
686 /* To enable register 6, 7 to control pull up and pull down */
687 memset(val, 0x02, NBANK(chip));
688 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
689 if (ret)
690 goto out;
691
692 return 0;
693out:
694 return ret;
695}
696
697static const struct of_device_id pca953x_dt_ids[];
698
699static int pca953x_probe(struct i2c_client *client,
700 const struct i2c_device_id *id)
701{
702 struct pca953x_platform_data *pdata;
703 struct pca953x_chip *chip;
704 int irq_base = 0;
705 int ret;
706 u32 invert = 0;
707
708 chip = devm_kzalloc(&client->dev,
709 sizeof(struct pca953x_chip), GFP_KERNEL);
710 if (chip == NULL)
711 return -ENOMEM;
712
713 pdata = dev_get_platdata(&client->dev);
714 if (pdata) {
715 irq_base = pdata->irq_base;
716 chip->gpio_start = pdata->gpio_base;
717 invert = pdata->invert;
718 chip->names = pdata->names;
719 } else {
720 chip->gpio_start = -1;
721 irq_base = 0;
722 }
723
724 chip->client = client;
725
726 if (id) {
727 chip->driver_data = id->driver_data;
728 } else {
729 const struct acpi_device_id *id;
730 const struct of_device_id *match;
731
732 match = of_match_device(pca953x_dt_ids, &client->dev);
733 if (match) {
734 chip->driver_data = (int)(uintptr_t)match->data;
735 } else {
736 id = acpi_match_device(pca953x_acpi_ids, &client->dev);
737 if (!id)
738 return -ENODEV;
739
740 chip->driver_data = id->driver_data;
741 }
742 }
743
744 chip->chip_type = PCA_CHIP_TYPE(chip->driver_data);
745
746 mutex_init(&chip->i2c_lock);
747
748 /* initialize cached registers from their original values.
749 * we can't share this chip with another i2c master.
750 */
751 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
752
753 if (chip->chip_type == PCA953X_TYPE)
754 ret = device_pca953x_init(chip, invert);
755 else
756 ret = device_pca957x_init(chip, invert);
757 if (ret)
758 return ret;
759
760 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
761 if (ret)
762 return ret;
763
764 ret = pca953x_irq_setup(chip, irq_base);
765 if (ret)
766 return ret;
767
768 if (pdata && pdata->setup) {
769 ret = pdata->setup(client, chip->gpio_chip.base,
770 chip->gpio_chip.ngpio, pdata->context);
771 if (ret < 0)
772 dev_warn(&client->dev, "setup failed, %d\n", ret);
773 }
774
775 i2c_set_clientdata(client, chip);
776 return 0;
777}
778
779static int pca953x_remove(struct i2c_client *client)
780{
781 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
782 struct pca953x_chip *chip = i2c_get_clientdata(client);
783 int ret = 0;
784
785 if (pdata && pdata->teardown) {
786 ret = pdata->teardown(client, chip->gpio_chip.base,
787 chip->gpio_chip.ngpio, pdata->context);
788 if (ret < 0) {
789 dev_err(&client->dev, "%s failed, %d\n",
790 "teardown", ret);
791 return ret;
792 }
793 }
794
795 return 0;
796}
797
798/* convenience to stop overlong match-table lines */
799#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
800#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
801
802static const struct of_device_id pca953x_dt_ids[] = {
803 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
804 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
805 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
806 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
807 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
808 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
809 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
810 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
811 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
812 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
813 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
814 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
815 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
816 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
817
818 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
819 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
820 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
821 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
822
823 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
824 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
825 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
826 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
827
828 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
829
830 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
831 { }
832};
833
834MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
835
836static struct i2c_driver pca953x_driver = {
837 .driver = {
838 .name = "pca953x",
839 .of_match_table = pca953x_dt_ids,
840 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
841 },
842 .probe = pca953x_probe,
843 .remove = pca953x_remove,
844 .id_table = pca953x_id,
845};
846
847static int __init pca953x_init(void)
848{
849 return i2c_add_driver(&pca953x_driver);
850}
851/* register after i2c postcore initcall and before
852 * subsys initcalls that may rely on these GPIOs
853 */
854subsys_initcall(pca953x_init);
855
856static void __exit pca953x_exit(void)
857{
858 i2c_del_driver(&pca953x_driver);
859}
860module_exit(pca953x_exit);
861
862MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
863MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
864MODULE_LICENSE("GPL");
1/*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/irqdomain.h>
20#include <linux/i2c.h>
21#include <linux/platform_data/pca953x.h>
22#include <linux/slab.h>
23#ifdef CONFIG_OF_GPIO
24#include <linux/of_platform.h>
25#endif
26
27#define PCA953X_INPUT 0
28#define PCA953X_OUTPUT 1
29#define PCA953X_INVERT 2
30#define PCA953X_DIRECTION 3
31
32#define REG_ADDR_AI 0x80
33
34#define PCA957X_IN 0
35#define PCA957X_INVRT 1
36#define PCA957X_BKEN 2
37#define PCA957X_PUPD 3
38#define PCA957X_CFG 4
39#define PCA957X_OUT 5
40#define PCA957X_MSK 6
41#define PCA957X_INTS 7
42
43#define PCA_GPIO_MASK 0x00FF
44#define PCA_INT 0x0100
45#define PCA953X_TYPE 0x1000
46#define PCA957X_TYPE 0x2000
47
48static const struct i2c_device_id pca953x_id[] = {
49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
52 { "pca9536", 4 | PCA953X_TYPE, },
53 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
54 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
57 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
58 { "pca9556", 8 | PCA953X_TYPE, },
59 { "pca9557", 8 | PCA953X_TYPE, },
60 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
61 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
62 { "pca9698", 40 | PCA953X_TYPE, },
63
64 { "max7310", 8 | PCA953X_TYPE, },
65 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
66 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
67 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
68 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
69 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
70 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
71 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
72 { "xra1202", 8 | PCA953X_TYPE },
73 { }
74};
75MODULE_DEVICE_TABLE(i2c, pca953x_id);
76
77#define MAX_BANK 5
78#define BANK_SZ 8
79
80#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
81
82struct pca953x_chip {
83 unsigned gpio_start;
84 u8 reg_output[MAX_BANK];
85 u8 reg_direction[MAX_BANK];
86 struct mutex i2c_lock;
87
88#ifdef CONFIG_GPIO_PCA953X_IRQ
89 struct mutex irq_lock;
90 u8 irq_mask[MAX_BANK];
91 u8 irq_stat[MAX_BANK];
92 u8 irq_trig_raise[MAX_BANK];
93 u8 irq_trig_fall[MAX_BANK];
94 struct irq_domain *domain;
95#endif
96
97 struct i2c_client *client;
98 struct gpio_chip gpio_chip;
99 const char *const *names;
100 int chip_type;
101};
102
103static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
104 int off)
105{
106 int ret;
107 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
108 int offset = off / BANK_SZ;
109
110 ret = i2c_smbus_read_byte_data(chip->client,
111 (reg << bank_shift) + offset);
112 *val = ret;
113
114 if (ret < 0) {
115 dev_err(&chip->client->dev, "failed reading register\n");
116 return ret;
117 }
118
119 return 0;
120}
121
122static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
123 int off)
124{
125 int ret = 0;
126 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
127 int offset = off / BANK_SZ;
128
129 ret = i2c_smbus_write_byte_data(chip->client,
130 (reg << bank_shift) + offset, val);
131
132 if (ret < 0) {
133 dev_err(&chip->client->dev, "failed writing register\n");
134 return ret;
135 }
136
137 return 0;
138}
139
140static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
141{
142 int ret = 0;
143
144 if (chip->gpio_chip.ngpio <= 8)
145 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
146 else if (chip->gpio_chip.ngpio >= 24) {
147 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
148 ret = i2c_smbus_write_i2c_block_data(chip->client,
149 (reg << bank_shift) | REG_ADDR_AI,
150 NBANK(chip), val);
151 } else {
152 switch (chip->chip_type) {
153 case PCA953X_TYPE:
154 ret = i2c_smbus_write_word_data(chip->client,
155 reg << 1, (u16) *val);
156 break;
157 case PCA957X_TYPE:
158 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
159 val[0]);
160 if (ret < 0)
161 break;
162 ret = i2c_smbus_write_byte_data(chip->client,
163 (reg << 1) + 1,
164 val[1]);
165 break;
166 }
167 }
168
169 if (ret < 0) {
170 dev_err(&chip->client->dev, "failed writing register\n");
171 return ret;
172 }
173
174 return 0;
175}
176
177static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
178{
179 int ret;
180
181 if (chip->gpio_chip.ngpio <= 8) {
182 ret = i2c_smbus_read_byte_data(chip->client, reg);
183 *val = ret;
184 } else if (chip->gpio_chip.ngpio >= 24) {
185 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
186
187 ret = i2c_smbus_read_i2c_block_data(chip->client,
188 (reg << bank_shift) | REG_ADDR_AI,
189 NBANK(chip), val);
190 } else {
191 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
192 val[0] = (u16)ret & 0xFF;
193 val[1] = (u16)ret >> 8;
194 }
195 if (ret < 0) {
196 dev_err(&chip->client->dev, "failed reading register\n");
197 return ret;
198 }
199
200 return 0;
201}
202
203static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
204{
205 struct pca953x_chip *chip;
206 u8 reg_val;
207 int ret, offset = 0;
208
209 chip = container_of(gc, struct pca953x_chip, gpio_chip);
210
211 mutex_lock(&chip->i2c_lock);
212 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
213
214 switch (chip->chip_type) {
215 case PCA953X_TYPE:
216 offset = PCA953X_DIRECTION;
217 break;
218 case PCA957X_TYPE:
219 offset = PCA957X_CFG;
220 break;
221 }
222 ret = pca953x_write_single(chip, offset, reg_val, off);
223 if (ret)
224 goto exit;
225
226 chip->reg_direction[off / BANK_SZ] = reg_val;
227 ret = 0;
228exit:
229 mutex_unlock(&chip->i2c_lock);
230 return ret;
231}
232
233static int pca953x_gpio_direction_output(struct gpio_chip *gc,
234 unsigned off, int val)
235{
236 struct pca953x_chip *chip;
237 u8 reg_val;
238 int ret, offset = 0;
239
240 chip = container_of(gc, struct pca953x_chip, gpio_chip);
241
242 mutex_lock(&chip->i2c_lock);
243 /* set output level */
244 if (val)
245 reg_val = chip->reg_output[off / BANK_SZ]
246 | (1u << (off % BANK_SZ));
247 else
248 reg_val = chip->reg_output[off / BANK_SZ]
249 & ~(1u << (off % BANK_SZ));
250
251 switch (chip->chip_type) {
252 case PCA953X_TYPE:
253 offset = PCA953X_OUTPUT;
254 break;
255 case PCA957X_TYPE:
256 offset = PCA957X_OUT;
257 break;
258 }
259 ret = pca953x_write_single(chip, offset, reg_val, off);
260 if (ret)
261 goto exit;
262
263 chip->reg_output[off / BANK_SZ] = reg_val;
264
265 /* then direction */
266 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
267 switch (chip->chip_type) {
268 case PCA953X_TYPE:
269 offset = PCA953X_DIRECTION;
270 break;
271 case PCA957X_TYPE:
272 offset = PCA957X_CFG;
273 break;
274 }
275 ret = pca953x_write_single(chip, offset, reg_val, off);
276 if (ret)
277 goto exit;
278
279 chip->reg_direction[off / BANK_SZ] = reg_val;
280 ret = 0;
281exit:
282 mutex_unlock(&chip->i2c_lock);
283 return ret;
284}
285
286static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
287{
288 struct pca953x_chip *chip;
289 u32 reg_val;
290 int ret, offset = 0;
291
292 chip = container_of(gc, struct pca953x_chip, gpio_chip);
293
294 mutex_lock(&chip->i2c_lock);
295 switch (chip->chip_type) {
296 case PCA953X_TYPE:
297 offset = PCA953X_INPUT;
298 break;
299 case PCA957X_TYPE:
300 offset = PCA957X_IN;
301 break;
302 }
303 ret = pca953x_read_single(chip, offset, ®_val, off);
304 mutex_unlock(&chip->i2c_lock);
305 if (ret < 0) {
306 /* NOTE: diagnostic already emitted; that's all we should
307 * do unless gpio_*_value_cansleep() calls become different
308 * from their nonsleeping siblings (and report faults).
309 */
310 return 0;
311 }
312
313 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
314}
315
316static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
317{
318 struct pca953x_chip *chip;
319 u8 reg_val;
320 int ret, offset = 0;
321
322 chip = container_of(gc, struct pca953x_chip, gpio_chip);
323
324 mutex_lock(&chip->i2c_lock);
325 if (val)
326 reg_val = chip->reg_output[off / BANK_SZ]
327 | (1u << (off % BANK_SZ));
328 else
329 reg_val = chip->reg_output[off / BANK_SZ]
330 & ~(1u << (off % BANK_SZ));
331
332 switch (chip->chip_type) {
333 case PCA953X_TYPE:
334 offset = PCA953X_OUTPUT;
335 break;
336 case PCA957X_TYPE:
337 offset = PCA957X_OUT;
338 break;
339 }
340 ret = pca953x_write_single(chip, offset, reg_val, off);
341 if (ret)
342 goto exit;
343
344 chip->reg_output[off / BANK_SZ] = reg_val;
345exit:
346 mutex_unlock(&chip->i2c_lock);
347}
348
349static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
350{
351 struct gpio_chip *gc;
352
353 gc = &chip->gpio_chip;
354
355 gc->direction_input = pca953x_gpio_direction_input;
356 gc->direction_output = pca953x_gpio_direction_output;
357 gc->get = pca953x_gpio_get_value;
358 gc->set = pca953x_gpio_set_value;
359 gc->can_sleep = true;
360
361 gc->base = chip->gpio_start;
362 gc->ngpio = gpios;
363 gc->label = chip->client->name;
364 gc->dev = &chip->client->dev;
365 gc->owner = THIS_MODULE;
366 gc->names = chip->names;
367}
368
369#ifdef CONFIG_GPIO_PCA953X_IRQ
370static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
371{
372 struct pca953x_chip *chip;
373
374 chip = container_of(gc, struct pca953x_chip, gpio_chip);
375 return irq_create_mapping(chip->domain, off);
376}
377
378static void pca953x_irq_mask(struct irq_data *d)
379{
380 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
381
382 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
383}
384
385static void pca953x_irq_unmask(struct irq_data *d)
386{
387 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
388
389 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
390}
391
392static void pca953x_irq_bus_lock(struct irq_data *d)
393{
394 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
395
396 mutex_lock(&chip->irq_lock);
397}
398
399static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
400{
401 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
402 u8 new_irqs;
403 int level, i;
404
405 /* Look for any newly setup interrupt */
406 for (i = 0; i < NBANK(chip); i++) {
407 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
408 new_irqs &= ~chip->reg_direction[i];
409
410 while (new_irqs) {
411 level = __ffs(new_irqs);
412 pca953x_gpio_direction_input(&chip->gpio_chip,
413 level + (BANK_SZ * i));
414 new_irqs &= ~(1 << level);
415 }
416 }
417
418 mutex_unlock(&chip->irq_lock);
419}
420
421static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
422{
423 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
424 int bank_nb = d->hwirq / BANK_SZ;
425 u8 mask = 1 << (d->hwirq % BANK_SZ);
426
427 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
428 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
429 d->irq, type);
430 return -EINVAL;
431 }
432
433 if (type & IRQ_TYPE_EDGE_FALLING)
434 chip->irq_trig_fall[bank_nb] |= mask;
435 else
436 chip->irq_trig_fall[bank_nb] &= ~mask;
437
438 if (type & IRQ_TYPE_EDGE_RISING)
439 chip->irq_trig_raise[bank_nb] |= mask;
440 else
441 chip->irq_trig_raise[bank_nb] &= ~mask;
442
443 return 0;
444}
445
446static struct irq_chip pca953x_irq_chip = {
447 .name = "pca953x",
448 .irq_mask = pca953x_irq_mask,
449 .irq_unmask = pca953x_irq_unmask,
450 .irq_bus_lock = pca953x_irq_bus_lock,
451 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
452 .irq_set_type = pca953x_irq_set_type,
453};
454
455static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
456{
457 u8 cur_stat[MAX_BANK];
458 u8 old_stat[MAX_BANK];
459 u8 pendings = 0;
460 u8 trigger[MAX_BANK], triggers = 0;
461 int ret, i, offset = 0;
462
463 switch (chip->chip_type) {
464 case PCA953X_TYPE:
465 offset = PCA953X_INPUT;
466 break;
467 case PCA957X_TYPE:
468 offset = PCA957X_IN;
469 break;
470 }
471 ret = pca953x_read_regs(chip, offset, cur_stat);
472 if (ret)
473 return 0;
474
475 /* Remove output pins from the equation */
476 for (i = 0; i < NBANK(chip); i++)
477 cur_stat[i] &= chip->reg_direction[i];
478
479 memcpy(old_stat, chip->irq_stat, NBANK(chip));
480
481 for (i = 0; i < NBANK(chip); i++) {
482 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
483 triggers += trigger[i];
484 }
485
486 if (!triggers)
487 return 0;
488
489 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
490
491 for (i = 0; i < NBANK(chip); i++) {
492 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
493 (cur_stat[i] & chip->irq_trig_raise[i]);
494 pending[i] &= trigger[i];
495 pendings += pending[i];
496 }
497
498 return pendings;
499}
500
501static irqreturn_t pca953x_irq_handler(int irq, void *devid)
502{
503 struct pca953x_chip *chip = devid;
504 u8 pending[MAX_BANK];
505 u8 level;
506 int i;
507
508 if (!pca953x_irq_pending(chip, pending))
509 return IRQ_HANDLED;
510
511 for (i = 0; i < NBANK(chip); i++) {
512 while (pending[i]) {
513 level = __ffs(pending[i]);
514 handle_nested_irq(irq_find_mapping(chip->domain,
515 level + (BANK_SZ * i)));
516 pending[i] &= ~(1 << level);
517 }
518 }
519
520 return IRQ_HANDLED;
521}
522
523static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
524 irq_hw_number_t hwirq)
525{
526 irq_clear_status_flags(irq, IRQ_NOREQUEST);
527 irq_set_chip_data(irq, d->host_data);
528 irq_set_chip(irq, &pca953x_irq_chip);
529 irq_set_nested_thread(irq, true);
530#ifdef CONFIG_ARM
531 set_irq_flags(irq, IRQF_VALID);
532#else
533 irq_set_noprobe(irq);
534#endif
535
536 return 0;
537}
538
539static const struct irq_domain_ops pca953x_irq_simple_ops = {
540 .map = pca953x_gpio_irq_map,
541 .xlate = irq_domain_xlate_twocell,
542};
543
544static int pca953x_irq_setup(struct pca953x_chip *chip,
545 const struct i2c_device_id *id,
546 int irq_base)
547{
548 struct i2c_client *client = chip->client;
549 int ret, i, offset = 0;
550
551 if (irq_base != -1
552 && (id->driver_data & PCA_INT)) {
553
554 switch (chip->chip_type) {
555 case PCA953X_TYPE:
556 offset = PCA953X_INPUT;
557 break;
558 case PCA957X_TYPE:
559 offset = PCA957X_IN;
560 break;
561 }
562 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
563 if (ret)
564 return ret;
565
566 /*
567 * There is no way to know which GPIO line generated the
568 * interrupt. We have to rely on the previous read for
569 * this purpose.
570 */
571 for (i = 0; i < NBANK(chip); i++)
572 chip->irq_stat[i] &= chip->reg_direction[i];
573 mutex_init(&chip->irq_lock);
574
575 chip->domain = irq_domain_add_simple(client->dev.of_node,
576 chip->gpio_chip.ngpio,
577 irq_base,
578 &pca953x_irq_simple_ops,
579 chip);
580 if (!chip->domain)
581 return -ENODEV;
582
583 ret = devm_request_threaded_irq(&client->dev,
584 client->irq,
585 NULL,
586 pca953x_irq_handler,
587 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
588 dev_name(&client->dev), chip);
589 if (ret) {
590 dev_err(&client->dev, "failed to request irq %d\n",
591 client->irq);
592 return ret;
593 }
594
595 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
596 }
597
598 return 0;
599}
600
601#else /* CONFIG_GPIO_PCA953X_IRQ */
602static int pca953x_irq_setup(struct pca953x_chip *chip,
603 const struct i2c_device_id *id,
604 int irq_base)
605{
606 struct i2c_client *client = chip->client;
607
608 if (irq_base != -1 && (id->driver_data & PCA_INT))
609 dev_warn(&client->dev, "interrupt support not compiled in\n");
610
611 return 0;
612}
613#endif
614
615/*
616 * Handlers for alternative sources of platform_data
617 */
618#ifdef CONFIG_OF_GPIO
619/*
620 * Translate OpenFirmware node properties into platform_data
621 * WARNING: This is DEPRECATED and will be removed eventually!
622 */
623static void
624pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
625{
626 struct device_node *node;
627 const __be32 *val;
628 int size;
629
630 *gpio_base = -1;
631
632 node = client->dev.of_node;
633 if (node == NULL)
634 return;
635
636 val = of_get_property(node, "linux,gpio-base", &size);
637 WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
638 if (val) {
639 if (size != sizeof(*val))
640 dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
641 node->full_name);
642 else
643 *gpio_base = be32_to_cpup(val);
644 }
645
646 val = of_get_property(node, "polarity", NULL);
647 WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
648 if (val)
649 *invert = *val;
650}
651#else
652static void
653pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
654{
655 *gpio_base = -1;
656}
657#endif
658
659static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
660{
661 int ret;
662 u8 val[MAX_BANK];
663
664 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
665 if (ret)
666 goto out;
667
668 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
669 chip->reg_direction);
670 if (ret)
671 goto out;
672
673 /* set platform specific polarity inversion */
674 if (invert)
675 memset(val, 0xFF, NBANK(chip));
676 else
677 memset(val, 0, NBANK(chip));
678
679 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
680out:
681 return ret;
682}
683
684static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
685{
686 int ret;
687 u8 val[MAX_BANK];
688
689 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
690 if (ret)
691 goto out;
692 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
693 if (ret)
694 goto out;
695
696 /* set platform specific polarity inversion */
697 if (invert)
698 memset(val, 0xFF, NBANK(chip));
699 else
700 memset(val, 0, NBANK(chip));
701 pca953x_write_regs(chip, PCA957X_INVRT, val);
702
703 /* To enable register 6, 7 to controll pull up and pull down */
704 memset(val, 0x02, NBANK(chip));
705 pca953x_write_regs(chip, PCA957X_BKEN, val);
706
707 return 0;
708out:
709 return ret;
710}
711
712static int pca953x_probe(struct i2c_client *client,
713 const struct i2c_device_id *id)
714{
715 struct pca953x_platform_data *pdata;
716 struct pca953x_chip *chip;
717 int irq_base = 0;
718 int ret;
719 u32 invert = 0;
720
721 chip = devm_kzalloc(&client->dev,
722 sizeof(struct pca953x_chip), GFP_KERNEL);
723 if (chip == NULL)
724 return -ENOMEM;
725
726 pdata = dev_get_platdata(&client->dev);
727 if (pdata) {
728 irq_base = pdata->irq_base;
729 chip->gpio_start = pdata->gpio_base;
730 invert = pdata->invert;
731 chip->names = pdata->names;
732 } else {
733 pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
734#ifdef CONFIG_OF_GPIO
735 /* If I2C node has no interrupts property, disable GPIO interrupts */
736 if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
737 irq_base = -1;
738#endif
739 }
740
741 chip->client = client;
742
743 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
744
745 mutex_init(&chip->i2c_lock);
746
747 /* initialize cached registers from their original values.
748 * we can't share this chip with another i2c master.
749 */
750 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
751
752 if (chip->chip_type == PCA953X_TYPE)
753 ret = device_pca953x_init(chip, invert);
754 else
755 ret = device_pca957x_init(chip, invert);
756 if (ret)
757 return ret;
758
759 ret = pca953x_irq_setup(chip, id, irq_base);
760 if (ret)
761 return ret;
762
763 ret = gpiochip_add(&chip->gpio_chip);
764 if (ret)
765 return ret;
766
767 if (pdata && pdata->setup) {
768 ret = pdata->setup(client, chip->gpio_chip.base,
769 chip->gpio_chip.ngpio, pdata->context);
770 if (ret < 0)
771 dev_warn(&client->dev, "setup failed, %d\n", ret);
772 }
773
774 i2c_set_clientdata(client, chip);
775 return 0;
776}
777
778static int pca953x_remove(struct i2c_client *client)
779{
780 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
781 struct pca953x_chip *chip = i2c_get_clientdata(client);
782 int ret = 0;
783
784 if (pdata && pdata->teardown) {
785 ret = pdata->teardown(client, chip->gpio_chip.base,
786 chip->gpio_chip.ngpio, pdata->context);
787 if (ret < 0) {
788 dev_err(&client->dev, "%s failed, %d\n",
789 "teardown", ret);
790 return ret;
791 }
792 }
793
794 ret = gpiochip_remove(&chip->gpio_chip);
795 if (ret) {
796 dev_err(&client->dev, "%s failed, %d\n",
797 "gpiochip_remove()", ret);
798 return ret;
799 }
800
801 return 0;
802}
803
804static const struct of_device_id pca953x_dt_ids[] = {
805 { .compatible = "nxp,pca9505", },
806 { .compatible = "nxp,pca9534", },
807 { .compatible = "nxp,pca9535", },
808 { .compatible = "nxp,pca9536", },
809 { .compatible = "nxp,pca9537", },
810 { .compatible = "nxp,pca9538", },
811 { .compatible = "nxp,pca9539", },
812 { .compatible = "nxp,pca9554", },
813 { .compatible = "nxp,pca9555", },
814 { .compatible = "nxp,pca9556", },
815 { .compatible = "nxp,pca9557", },
816 { .compatible = "nxp,pca9574", },
817 { .compatible = "nxp,pca9575", },
818 { .compatible = "nxp,pca9698", },
819
820 { .compatible = "maxim,max7310", },
821 { .compatible = "maxim,max7312", },
822 { .compatible = "maxim,max7313", },
823 { .compatible = "maxim,max7315", },
824
825 { .compatible = "ti,pca6107", },
826 { .compatible = "ti,tca6408", },
827 { .compatible = "ti,tca6416", },
828 { .compatible = "ti,tca6424", },
829
830 { .compatible = "exar,xra1202", },
831 { }
832};
833
834MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
835
836static struct i2c_driver pca953x_driver = {
837 .driver = {
838 .name = "pca953x",
839 .of_match_table = pca953x_dt_ids,
840 },
841 .probe = pca953x_probe,
842 .remove = pca953x_remove,
843 .id_table = pca953x_id,
844};
845
846static int __init pca953x_init(void)
847{
848 return i2c_add_driver(&pca953x_driver);
849}
850/* register after i2c postcore initcall and before
851 * subsys initcalls that may rely on these GPIOs
852 */
853subsys_initcall(pca953x_init);
854
855static void __exit pca953x_exit(void)
856{
857 i2c_del_driver(&pca953x_driver);
858}
859module_exit(pca953x_exit);
860
861MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
862MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
863MODULE_LICENSE("GPL");