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1/*
2 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
3 *
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/mutex.h>
14#include <linux/spi/spi.h>
15#include <linux/gpio.h>
16#include <linux/of_gpio.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19
20#define GEN_74X164_NUMBER_GPIOS 8
21
22struct gen_74x164_chip {
23 struct gpio_chip gpio_chip;
24 struct mutex lock;
25 u32 registers;
26 /*
27 * Since the registers are chained, every byte sent will make
28 * the previous byte shift to the next register in the
29 * chain. Thus, the first byte sent will end up in the last
30 * register at the end of the transfer. So, to have a logical
31 * numbering, store the bytes in reverse order.
32 */
33 u8 buffer[0];
34};
35
36static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
37{
38 struct spi_transfer xfer = {
39 .tx_buf = chip->buffer,
40 .len = chip->registers,
41 };
42
43 return spi_sync_transfer(to_spi_device(chip->gpio_chip.parent),
44 &xfer, 1);
45}
46
47static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
48{
49 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
50 u8 bank = chip->registers - 1 - offset / 8;
51 u8 pin = offset % 8;
52 int ret;
53
54 mutex_lock(&chip->lock);
55 ret = (chip->buffer[bank] >> pin) & 0x1;
56 mutex_unlock(&chip->lock);
57
58 return ret;
59}
60
61static void gen_74x164_set_value(struct gpio_chip *gc,
62 unsigned offset, int val)
63{
64 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
65 u8 bank = chip->registers - 1 - offset / 8;
66 u8 pin = offset % 8;
67
68 mutex_lock(&chip->lock);
69 if (val)
70 chip->buffer[bank] |= (1 << pin);
71 else
72 chip->buffer[bank] &= ~(1 << pin);
73
74 __gen_74x164_write_config(chip);
75 mutex_unlock(&chip->lock);
76}
77
78static int gen_74x164_direction_output(struct gpio_chip *gc,
79 unsigned offset, int val)
80{
81 gen_74x164_set_value(gc, offset, val);
82 return 0;
83}
84
85static int gen_74x164_probe(struct spi_device *spi)
86{
87 struct gen_74x164_chip *chip;
88 u32 nregs;
89 int ret;
90
91 /*
92 * bits_per_word cannot be configured in platform data
93 */
94 spi->bits_per_word = 8;
95
96 ret = spi_setup(spi);
97 if (ret < 0)
98 return ret;
99
100 if (of_property_read_u32(spi->dev.of_node, "registers-number",
101 &nregs)) {
102 dev_err(&spi->dev,
103 "Missing registers-number property in the DT.\n");
104 return -EINVAL;
105 }
106
107 chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
108 if (!chip)
109 return -ENOMEM;
110
111 spi_set_drvdata(spi, chip);
112
113 chip->gpio_chip.label = spi->modalias;
114 chip->gpio_chip.direction_output = gen_74x164_direction_output;
115 chip->gpio_chip.get = gen_74x164_get_value;
116 chip->gpio_chip.set = gen_74x164_set_value;
117 chip->gpio_chip.base = -1;
118
119 chip->registers = nregs;
120 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
121
122 chip->gpio_chip.can_sleep = true;
123 chip->gpio_chip.parent = &spi->dev;
124 chip->gpio_chip.owner = THIS_MODULE;
125
126 mutex_init(&chip->lock);
127
128 ret = __gen_74x164_write_config(chip);
129 if (ret) {
130 dev_err(&spi->dev, "Failed writing: %d\n", ret);
131 goto exit_destroy;
132 }
133
134 ret = gpiochip_add_data(&chip->gpio_chip, chip);
135 if (!ret)
136 return 0;
137
138exit_destroy:
139 mutex_destroy(&chip->lock);
140
141 return ret;
142}
143
144static int gen_74x164_remove(struct spi_device *spi)
145{
146 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
147
148 gpiochip_remove(&chip->gpio_chip);
149 mutex_destroy(&chip->lock);
150
151 return 0;
152}
153
154static const struct of_device_id gen_74x164_dt_ids[] = {
155 { .compatible = "fairchild,74hc595" },
156 {},
157};
158MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
159
160static struct spi_driver gen_74x164_driver = {
161 .driver = {
162 .name = "74x164",
163 .of_match_table = gen_74x164_dt_ids,
164 },
165 .probe = gen_74x164_probe,
166 .remove = gen_74x164_remove,
167};
168module_spi_driver(gen_74x164_driver);
169
170MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
171MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
172MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
173MODULE_LICENSE("GPL v2");
1/*
2 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
3 *
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/mutex.h>
14#include <linux/spi/spi.h>
15#include <linux/gpio.h>
16#include <linux/of_gpio.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19
20#define GEN_74X164_NUMBER_GPIOS 8
21
22struct gen_74x164_chip {
23 u8 *buffer;
24 struct gpio_chip gpio_chip;
25 struct mutex lock;
26 u32 registers;
27};
28
29static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc)
30{
31 return container_of(gc, struct gen_74x164_chip, gpio_chip);
32}
33
34static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
35{
36 struct spi_device *spi = to_spi_device(chip->gpio_chip.dev);
37 struct spi_message message;
38 struct spi_transfer *msg_buf;
39 int i, ret = 0;
40
41 msg_buf = kzalloc(chip->registers * sizeof(struct spi_transfer),
42 GFP_KERNEL);
43 if (!msg_buf)
44 return -ENOMEM;
45
46 spi_message_init(&message);
47
48 /*
49 * Since the registers are chained, every byte sent will make
50 * the previous byte shift to the next register in the
51 * chain. Thus, the first byte send will end up in the last
52 * register at the end of the transfer. So, to have a logical
53 * numbering, send the bytes in reverse order so that the last
54 * byte of the buffer will end up in the last register.
55 */
56 for (i = chip->registers - 1; i >= 0; i--) {
57 msg_buf[i].tx_buf = chip->buffer + i;
58 msg_buf[i].len = sizeof(u8);
59 spi_message_add_tail(msg_buf + i, &message);
60 }
61
62 ret = spi_sync(spi, &message);
63
64 kfree(msg_buf);
65
66 return ret;
67}
68
69static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
70{
71 struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
72 u8 bank = offset / 8;
73 u8 pin = offset % 8;
74 int ret;
75
76 mutex_lock(&chip->lock);
77 ret = (chip->buffer[bank] >> pin) & 0x1;
78 mutex_unlock(&chip->lock);
79
80 return ret;
81}
82
83static void gen_74x164_set_value(struct gpio_chip *gc,
84 unsigned offset, int val)
85{
86 struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc);
87 u8 bank = offset / 8;
88 u8 pin = offset % 8;
89
90 mutex_lock(&chip->lock);
91 if (val)
92 chip->buffer[bank] |= (1 << pin);
93 else
94 chip->buffer[bank] &= ~(1 << pin);
95
96 __gen_74x164_write_config(chip);
97 mutex_unlock(&chip->lock);
98}
99
100static int gen_74x164_direction_output(struct gpio_chip *gc,
101 unsigned offset, int val)
102{
103 gen_74x164_set_value(gc, offset, val);
104 return 0;
105}
106
107static int gen_74x164_probe(struct spi_device *spi)
108{
109 struct gen_74x164_chip *chip;
110 int ret;
111
112 /*
113 * bits_per_word cannot be configured in platform data
114 */
115 spi->bits_per_word = 8;
116
117 ret = spi_setup(spi);
118 if (ret < 0)
119 return ret;
120
121 chip = devm_kzalloc(&spi->dev, sizeof(*chip), GFP_KERNEL);
122 if (!chip)
123 return -ENOMEM;
124
125 spi_set_drvdata(spi, chip);
126
127 chip->gpio_chip.label = spi->modalias;
128 chip->gpio_chip.direction_output = gen_74x164_direction_output;
129 chip->gpio_chip.get = gen_74x164_get_value;
130 chip->gpio_chip.set = gen_74x164_set_value;
131 chip->gpio_chip.base = -1;
132
133 if (of_property_read_u32(spi->dev.of_node, "registers-number",
134 &chip->registers)) {
135 dev_err(&spi->dev,
136 "Missing registers-number property in the DT.\n");
137 return -EINVAL;
138 }
139
140 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
141 chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL);
142 if (!chip->buffer)
143 return -ENOMEM;
144
145 chip->gpio_chip.can_sleep = true;
146 chip->gpio_chip.dev = &spi->dev;
147 chip->gpio_chip.owner = THIS_MODULE;
148
149 mutex_init(&chip->lock);
150
151 ret = __gen_74x164_write_config(chip);
152 if (ret) {
153 dev_err(&spi->dev, "Failed writing: %d\n", ret);
154 goto exit_destroy;
155 }
156
157 ret = gpiochip_add(&chip->gpio_chip);
158 if (!ret)
159 return 0;
160
161exit_destroy:
162 mutex_destroy(&chip->lock);
163
164 return ret;
165}
166
167static int gen_74x164_remove(struct spi_device *spi)
168{
169 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
170 int ret;
171
172 ret = gpiochip_remove(&chip->gpio_chip);
173 if (!ret)
174 mutex_destroy(&chip->lock);
175
176 return ret;
177}
178
179static const struct of_device_id gen_74x164_dt_ids[] = {
180 { .compatible = "fairchild,74hc595" },
181 {},
182};
183MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
184
185static struct spi_driver gen_74x164_driver = {
186 .driver = {
187 .name = "74x164",
188 .owner = THIS_MODULE,
189 .of_match_table = gen_74x164_dt_ids,
190 },
191 .probe = gen_74x164_probe,
192 .remove = gen_74x164_remove,
193};
194module_spi_driver(gen_74x164_driver);
195
196MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
197MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
198MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
199MODULE_LICENSE("GPL v2");