Loading...
Note: File does not exist in v4.6.
1/*
2 * arch/arm/kernel/kprobes-test-thumb.c
3 *
4 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <asm/opcodes.h>
14
15#include "kprobes-test.h"
16
17
18#define TEST_ISA "16"
19
20#define DONT_TEST_IN_ITBLOCK(tests) \
21 kprobe_test_flags |= TEST_FLAG_NO_ITBLOCK; \
22 tests \
23 kprobe_test_flags &= ~TEST_FLAG_NO_ITBLOCK;
24
25#define CONDITION_INSTRUCTIONS(cc_pos, tests) \
26 kprobe_test_cc_position = cc_pos; \
27 DONT_TEST_IN_ITBLOCK(tests) \
28 kprobe_test_cc_position = 0;
29
30#define TEST_ITBLOCK(code) \
31 kprobe_test_flags |= TEST_FLAG_FULL_ITBLOCK; \
32 TESTCASE_START(code) \
33 TEST_ARG_END("") \
34 "50: nop \n\t" \
35 "1: "code" \n\t" \
36 " mov r1, #0x11 \n\t" \
37 " mov r2, #0x22 \n\t" \
38 " mov r3, #0x33 \n\t" \
39 "2: nop \n\t" \
40 TESTCASE_END \
41 kprobe_test_flags &= ~TEST_FLAG_FULL_ITBLOCK;
42
43#define TEST_THUMB_TO_ARM_INTERWORK_P(code1, reg, val, code2) \
44 TESTCASE_START(code1 #reg code2) \
45 TEST_ARG_PTR(reg, val) \
46 TEST_ARG_REG(14, 99f+1) \
47 TEST_ARG_MEM(15, 3f) \
48 TEST_ARG_END("") \
49 " nop \n\t" /* To align 1f */ \
50 "50: nop \n\t" \
51 "1: "code1 #reg code2" \n\t" \
52 " bx lr \n\t" \
53 ".arm \n\t" \
54 "3: adr lr, 2f+1 \n\t" \
55 " bx lr \n\t" \
56 ".thumb \n\t" \
57 "2: nop \n\t" \
58 TESTCASE_END
59
60
61void kprobe_thumb16_test_cases(void)
62{
63 kprobe_test_flags = TEST_FLAG_NARROW_INSTR;
64
65 TEST_GROUP("Shift (immediate), add, subtract, move, and compare")
66
67 TEST_R( "lsls r7, r",0,VAL1,", #5")
68 TEST_R( "lsls r0, r",7,VAL2,", #11")
69 TEST_R( "lsrs r7, r",0,VAL1,", #5")
70 TEST_R( "lsrs r0, r",7,VAL2,", #11")
71 TEST_R( "asrs r7, r",0,VAL1,", #5")
72 TEST_R( "asrs r0, r",7,VAL2,", #11")
73 TEST_RR( "adds r2, r",0,VAL1,", r",7,VAL2,"")
74 TEST_RR( "adds r5, r",7,VAL2,", r",0,VAL2,"")
75 TEST_RR( "subs r2, r",0,VAL1,", r",7,VAL2,"")
76 TEST_RR( "subs r5, r",7,VAL2,", r",0,VAL2,"")
77 TEST_R( "adds r7, r",0,VAL1,", #5")
78 TEST_R( "adds r0, r",7,VAL2,", #2")
79 TEST_R( "subs r7, r",0,VAL1,", #5")
80 TEST_R( "subs r0, r",7,VAL2,", #2")
81 TEST( "movs.n r0, #0x5f")
82 TEST( "movs.n r7, #0xa0")
83 TEST_R( "cmp.n r",0,0x5e, ", #0x5f")
84 TEST_R( "cmp.n r",5,0x15f,", #0x5f")
85 TEST_R( "cmp.n r",7,0xa0, ", #0xa0")
86 TEST_R( "adds.n r",0,VAL1,", #0x5f")
87 TEST_R( "adds.n r",7,VAL2,", #0xa0")
88 TEST_R( "subs.n r",0,VAL1,", #0x5f")
89 TEST_R( "subs.n r",7,VAL2,", #0xa0")
90
91 TEST_GROUP("16-bit Thumb data-processing instructions")
92
93#define DATA_PROCESSING16(op,val) \
94 TEST_RR( op" r",0,VAL1,", r",7,val,"") \
95 TEST_RR( op" r",7,VAL2,", r",0,val,"")
96
97 DATA_PROCESSING16("ands",0xf00f00ff)
98 DATA_PROCESSING16("eors",0xf00f00ff)
99 DATA_PROCESSING16("lsls",11)
100 DATA_PROCESSING16("lsrs",11)
101 DATA_PROCESSING16("asrs",11)
102 DATA_PROCESSING16("adcs",VAL2)
103 DATA_PROCESSING16("sbcs",VAL2)
104 DATA_PROCESSING16("rors",11)
105 DATA_PROCESSING16("tst",0xf00f00ff)
106 TEST_R("rsbs r",0,VAL1,", #0")
107 TEST_R("rsbs r",7,VAL2,", #0")
108 DATA_PROCESSING16("cmp",0xf00f00ff)
109 DATA_PROCESSING16("cmn",0xf00f00ff)
110 DATA_PROCESSING16("orrs",0xf00f00ff)
111 DATA_PROCESSING16("muls",VAL2)
112 DATA_PROCESSING16("bics",0xf00f00ff)
113 DATA_PROCESSING16("mvns",VAL2)
114
115 TEST_GROUP("Special data instructions and branch and exchange")
116
117 TEST_RR( "add r",0, VAL1,", r",7,VAL2,"")
118 TEST_RR( "add r",3, VAL2,", r",8,VAL3,"")
119 TEST_RR( "add r",8, VAL3,", r",0,VAL1,"")
120 TEST_R( "add sp" ", r",8,-8, "")
121 TEST_R( "add r",14,VAL1,", pc")
122 TEST_BF_R("add pc" ", r",0,2f-1f-8,"")
123 TEST_UNSUPPORTED(__inst_thumb16(0x44ff) " @ add pc, pc")
124
125 TEST_RR( "cmp r",3,VAL1,", r",8,VAL2,"")
126 TEST_RR( "cmp r",8,VAL2,", r",0,VAL1,"")
127 TEST_R( "cmp sp" ", r",8,-8, "")
128
129 TEST_R( "mov r0, r",7,VAL2,"")
130 TEST_R( "mov r3, r",8,VAL3,"")
131 TEST_R( "mov r8, r",0,VAL1,"")
132 TEST_P( "mov sp, r",8,-8, "")
133 TEST( "mov lr, pc")
134 TEST_BF_R("mov pc, r",0,2f, "")
135
136 TEST_BF_R("bx r",0, 2f+1,"")
137 TEST_BF_R("bx r",14,2f+1,"")
138 TESTCASE_START("bx pc")
139 TEST_ARG_REG(14, 99f+1)
140 TEST_ARG_END("")
141 " nop \n\t" /* To align the bx pc*/
142 "50: nop \n\t"
143 "1: bx pc \n\t"
144 " bx lr \n\t"
145 ".arm \n\t"
146 " adr lr, 2f+1 \n\t"
147 " bx lr \n\t"
148 ".thumb \n\t"
149 "2: nop \n\t"
150 TESTCASE_END
151
152 TEST_BF_R("blx r",0, 2f+1,"")
153 TEST_BB_R("blx r",14,2f+1,"")
154 TEST_UNSUPPORTED(__inst_thumb16(0x47f8) " @ blx pc")
155
156 TEST_GROUP("Load from Literal Pool")
157
158 TEST_X( "ldr r0, 3f",
159 ".align \n\t"
160 "3: .word "__stringify(VAL1))
161 TEST_X( "ldr r7, 3f",
162 ".space 128 \n\t"
163 ".align \n\t"
164 "3: .word "__stringify(VAL2))
165
166 TEST_GROUP("16-bit Thumb Load/store instructions")
167
168 TEST_RPR("str r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
169 TEST_RPR("str r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
170 TEST_RPR("strh r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
171 TEST_RPR("strh r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
172 TEST_RPR("strb r",0, VAL1,", [r",1, 24,", r",2, 48,"]")
173 TEST_RPR("strb r",7, VAL2,", [r",6, 24,", r",5, 48,"]")
174 TEST_PR( "ldrsb r0, [r",1, 24,", r",2, 48,"]")
175 TEST_PR( "ldrsb r7, [r",6, 24,", r",5, 50,"]")
176 TEST_PR( "ldr r0, [r",1, 24,", r",2, 48,"]")
177 TEST_PR( "ldr r7, [r",6, 24,", r",5, 48,"]")
178 TEST_PR( "ldrh r0, [r",1, 24,", r",2, 48,"]")
179 TEST_PR( "ldrh r7, [r",6, 24,", r",5, 50,"]")
180 TEST_PR( "ldrb r0, [r",1, 24,", r",2, 48,"]")
181 TEST_PR( "ldrb r7, [r",6, 24,", r",5, 50,"]")
182 TEST_PR( "ldrsh r0, [r",1, 24,", r",2, 48,"]")
183 TEST_PR( "ldrsh r7, [r",6, 24,", r",5, 50,"]")
184
185 TEST_RP("str r",0, VAL1,", [r",1, 24,", #120]")
186 TEST_RP("str r",7, VAL2,", [r",6, 24,", #120]")
187 TEST_P( "ldr r0, [r",1, 24,", #120]")
188 TEST_P( "ldr r7, [r",6, 24,", #120]")
189 TEST_RP("strb r",0, VAL1,", [r",1, 24,", #30]")
190 TEST_RP("strb r",7, VAL2,", [r",6, 24,", #30]")
191 TEST_P( "ldrb r0, [r",1, 24,", #30]")
192 TEST_P( "ldrb r7, [r",6, 24,", #30]")
193 TEST_RP("strh r",0, VAL1,", [r",1, 24,", #60]")
194 TEST_RP("strh r",7, VAL2,", [r",6, 24,", #60]")
195 TEST_P( "ldrh r0, [r",1, 24,", #60]")
196 TEST_P( "ldrh r7, [r",6, 24,", #60]")
197
198 TEST_R( "str r",0, VAL1,", [sp, #0]")
199 TEST_R( "str r",7, VAL2,", [sp, #160]")
200 TEST( "ldr r0, [sp, #0]")
201 TEST( "ldr r7, [sp, #160]")
202
203 TEST_RP("str r",0, VAL1,", [r",0, 24,"]")
204 TEST_P( "ldr r0, [r",0, 24,"]")
205
206 TEST_GROUP("Generate PC-/SP-relative address")
207
208 TEST("add r0, pc, #4")
209 TEST("add r7, pc, #1020")
210 TEST("add r0, sp, #4")
211 TEST("add r7, sp, #1020")
212
213 TEST_GROUP("Miscellaneous 16-bit instructions")
214
215 TEST_UNSUPPORTED( "cpsie i")
216 TEST_UNSUPPORTED( "cpsid i")
217 TEST_UNSUPPORTED( "setend le")
218 TEST_UNSUPPORTED( "setend be")
219
220 TEST("add sp, #"__stringify(TEST_MEMORY_SIZE)) /* Assumes TEST_MEMORY_SIZE < 0x400 */
221 TEST("sub sp, #0x7f*4")
222
223DONT_TEST_IN_ITBLOCK(
224 TEST_BF_R( "cbnz r",0,0, ", 2f")
225 TEST_BF_R( "cbz r",2,-1,", 2f")
226 TEST_BF_RX( "cbnz r",4,1, ", 2f", SPACE_0x20)
227 TEST_BF_RX( "cbz r",7,0, ", 2f", SPACE_0x40)
228)
229 TEST_R("sxth r0, r",7, HH1,"")
230 TEST_R("sxth r7, r",0, HH2,"")
231 TEST_R("sxtb r0, r",7, HH1,"")
232 TEST_R("sxtb r7, r",0, HH2,"")
233 TEST_R("uxth r0, r",7, HH1,"")
234 TEST_R("uxth r7, r",0, HH2,"")
235 TEST_R("uxtb r0, r",7, HH1,"")
236 TEST_R("uxtb r7, r",0, HH2,"")
237 TEST_R("rev r0, r",7, VAL1,"")
238 TEST_R("rev r7, r",0, VAL2,"")
239 TEST_R("rev16 r0, r",7, VAL1,"")
240 TEST_R("rev16 r7, r",0, VAL2,"")
241 TEST_UNSUPPORTED(__inst_thumb16(0xba80) "")
242 TEST_UNSUPPORTED(__inst_thumb16(0xbabf) "")
243 TEST_R("revsh r0, r",7, VAL1,"")
244 TEST_R("revsh r7, r",0, VAL2,"")
245
246#define TEST_POPPC(code, offset) \
247 TESTCASE_START(code) \
248 TEST_ARG_PTR(13, offset) \
249 TEST_ARG_END("") \
250 TEST_BRANCH_F(code) \
251 TESTCASE_END
252
253 TEST("push {r0}")
254 TEST("push {r7}")
255 TEST("push {r14}")
256 TEST("push {r0-r7,r14}")
257 TEST("push {r0,r2,r4,r6,r14}")
258 TEST("push {r1,r3,r5,r7}")
259 TEST("pop {r0}")
260 TEST("pop {r7}")
261 TEST("pop {r0,r2,r4,r6}")
262 TEST_POPPC("pop {pc}",15*4)
263 TEST_POPPC("pop {r0-r7,pc}",7*4)
264 TEST_POPPC("pop {r1,r3,r5,r7,pc}",11*4)
265 TEST_THUMB_TO_ARM_INTERWORK_P("pop {pc} @ ",13,15*4,"")
266 TEST_THUMB_TO_ARM_INTERWORK_P("pop {r0-r7,pc} @ ",13,7*4,"")
267
268 TEST_UNSUPPORTED("bkpt.n 0")
269 TEST_UNSUPPORTED("bkpt.n 255")
270
271 TEST_SUPPORTED("yield")
272 TEST("sev")
273 TEST("nop")
274 TEST("wfi")
275 TEST_SUPPORTED("wfe")
276 TEST_UNSUPPORTED(__inst_thumb16(0xbf50) "") /* Unassigned hints */
277 TEST_UNSUPPORTED(__inst_thumb16(0xbff0) "") /* Unassigned hints */
278
279#define TEST_IT(code, code2) \
280 TESTCASE_START(code) \
281 TEST_ARG_END("") \
282 "50: nop \n\t" \
283 "1: "code" \n\t" \
284 " "code2" \n\t" \
285 "2: nop \n\t" \
286 TESTCASE_END
287
288DONT_TEST_IN_ITBLOCK(
289 TEST_IT("it eq","moveq r0,#0")
290 TEST_IT("it vc","movvc r0,#0")
291 TEST_IT("it le","movle r0,#0")
292 TEST_IT("ite eq","moveq r0,#0\n\t movne r1,#1")
293 TEST_IT("itet vc","movvc r0,#0\n\t movvs r1,#1\n\t movvc r2,#2")
294 TEST_IT("itete le","movle r0,#0\n\t movgt r1,#1\n\t movle r2,#2\n\t movgt r3,#3")
295 TEST_IT("itttt le","movle r0,#0\n\t movle r1,#1\n\t movle r2,#2\n\t movle r3,#3")
296 TEST_IT("iteee le","movle r0,#0\n\t movgt r1,#1\n\t movgt r2,#2\n\t movgt r3,#3")
297)
298
299 TEST_GROUP("Load and store multiple")
300
301 TEST_P("ldmia r",4, 16*4,"!, {r0,r7}")
302 TEST_P("ldmia r",7, 16*4,"!, {r0-r6}")
303 TEST_P("stmia r",4, 16*4,"!, {r0,r7}")
304 TEST_P("stmia r",0, 16*4,"!, {r0-r7}")
305
306 TEST_GROUP("Conditional branch and Supervisor Call instructions")
307
308CONDITION_INSTRUCTIONS(8,
309 TEST_BF("beq 2f")
310 TEST_BB("bne 2b")
311 TEST_BF("bgt 2f")
312 TEST_BB("blt 2b")
313)
314 TEST_UNSUPPORTED(__inst_thumb16(0xde00) "")
315 TEST_UNSUPPORTED(__inst_thumb16(0xdeff) "")
316 TEST_UNSUPPORTED("svc #0x00")
317 TEST_UNSUPPORTED("svc #0xff")
318
319 TEST_GROUP("Unconditional branch")
320
321 TEST_BF( "b 2f")
322 TEST_BB( "b 2b")
323 TEST_BF_X("b 2f", SPACE_0x400)
324 TEST_BB_X("b 2b", SPACE_0x400)
325
326 TEST_GROUP("Testing instructions in IT blocks")
327
328 TEST_ITBLOCK("subs.n r0, r0")
329
330 verbose("\n");
331}
332
333
334void kprobe_thumb32_test_cases(void)
335{
336 kprobe_test_flags = 0;
337
338 TEST_GROUP("Load/store multiple")
339
340 TEST_UNSUPPORTED("rfedb sp")
341 TEST_UNSUPPORTED("rfeia sp")
342 TEST_UNSUPPORTED("rfedb sp!")
343 TEST_UNSUPPORTED("rfeia sp!")
344
345 TEST_P( "stmia r",0, 16*4,", {r0,r8}")
346 TEST_P( "stmia r",4, 16*4,", {r0-r12,r14}")
347 TEST_P( "stmia r",7, 16*4,"!, {r8-r12,r14}")
348 TEST_P( "stmia r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
349
350 TEST_P( "ldmia r",0, 16*4,", {r0,r8}")
351 TEST_P( "ldmia r",4, 0, ", {r0-r12,r14}")
352 TEST_BF_P("ldmia r",5, 8*4, "!, {r6-r12,r15}")
353 TEST_P( "ldmia r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
354 TEST_BF_P("ldmia r",14,14*4,"!, {r4,pc}")
355
356 TEST_P( "stmdb r",0, 16*4,", {r0,r8}")
357 TEST_P( "stmdb r",4, 16*4,", {r0-r12,r14}")
358 TEST_P( "stmdb r",5, 16*4,"!, {r8-r12,r14}")
359 TEST_P( "stmdb r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
360
361 TEST_P( "ldmdb r",0, 16*4,", {r0,r8}")
362 TEST_P( "ldmdb r",4, 16*4,", {r0-r12,r14}")
363 TEST_BF_P("ldmdb r",5, 16*4,"!, {r6-r12,r15}")
364 TEST_P( "ldmdb r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
365 TEST_BF_P("ldmdb r",14,16*4,"!, {r4,pc}")
366
367 TEST_P( "stmdb r",13,16*4,"!, {r3-r12,lr}")
368 TEST_P( "stmdb r",13,16*4,"!, {r3-r12}")
369 TEST_P( "stmdb r",2, 16*4,", {r3-r12,lr}")
370 TEST_P( "stmdb r",13,16*4,"!, {r2-r12,lr}")
371 TEST_P( "stmdb r",0, 16*4,", {r0-r12}")
372 TEST_P( "stmdb r",0, 16*4,", {r0-r12,lr}")
373
374 TEST_BF_P("ldmia r",13,5*4, "!, {r3-r12,pc}")
375 TEST_P( "ldmia r",13,5*4, "!, {r3-r12}")
376 TEST_BF_P("ldmia r",2, 5*4, "!, {r3-r12,pc}")
377 TEST_BF_P("ldmia r",13,4*4, "!, {r2-r12,pc}")
378 TEST_P( "ldmia r",0, 16*4,", {r0-r12}")
379 TEST_P( "ldmia r",0, 16*4,", {r0-r12,lr}")
380
381 TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",0,14*4,", {r12,pc}")
382 TEST_THUMB_TO_ARM_INTERWORK_P("ldmia r",13,2*4,", {r0-r12,pc}")
383
384 TEST_UNSUPPORTED(__inst_thumb32(0xe88f0101) " @ stmia pc, {r0,r8}")
385 TEST_UNSUPPORTED(__inst_thumb32(0xe92f5f00) " @ stmdb pc!, {r8-r12,r14}")
386 TEST_UNSUPPORTED(__inst_thumb32(0xe8bdc000) " @ ldmia r13!, {r14,pc}")
387 TEST_UNSUPPORTED(__inst_thumb32(0xe93ec000) " @ ldmdb r14!, {r14,pc}")
388 TEST_UNSUPPORTED(__inst_thumb32(0xe8a73f00) " @ stmia r7!, {r8-r12,sp}")
389 TEST_UNSUPPORTED(__inst_thumb32(0xe8a79f00) " @ stmia r7!, {r8-r12,pc}")
390 TEST_UNSUPPORTED(__inst_thumb32(0xe93e2010) " @ ldmdb r14!, {r4,sp}")
391
392 TEST_GROUP("Load/store double or exclusive, table branch")
393
394 TEST_P( "ldrd r0, r1, [r",1, 24,", #-16]")
395 TEST( "ldrd r12, r14, [sp, #16]")
396 TEST_P( "ldrd r1, r0, [r",7, 24,", #-16]!")
397 TEST( "ldrd r14, r12, [sp, #16]!")
398 TEST_P( "ldrd r1, r0, [r",7, 24,"], #16")
399 TEST( "ldrd r7, r8, [sp], #-16")
400
401 TEST_X( "ldrd r12, r14, 3f",
402 ".align 3 \n\t"
403 "3: .word "__stringify(VAL1)" \n\t"
404 " .word "__stringify(VAL2))
405
406 TEST_UNSUPPORTED(__inst_thumb32(0xe9ffec04) " @ ldrd r14, r12, [pc, #16]!")
407 TEST_UNSUPPORTED(__inst_thumb32(0xe8ffec04) " @ ldrd r14, r12, [pc], #16")
408 TEST_UNSUPPORTED(__inst_thumb32(0xe9d4d800) " @ ldrd sp, r8, [r4]")
409 TEST_UNSUPPORTED(__inst_thumb32(0xe9d4f800) " @ ldrd pc, r8, [r4]")
410 TEST_UNSUPPORTED(__inst_thumb32(0xe9d47d00) " @ ldrd r7, sp, [r4]")
411 TEST_UNSUPPORTED(__inst_thumb32(0xe9d47f00) " @ ldrd r7, pc, [r4]")
412
413 TEST_RRP("strd r",0, VAL1,", r",1, VAL2,", [r",1, 24,", #-16]")
414 TEST_RR( "strd r",12,VAL2,", r",14,VAL1,", [sp, #16]")
415 TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,", #-16]!")
416 TEST_RR( "strd r",14,VAL2,", r",12,VAL1,", [sp, #16]!")
417 TEST_RRP("strd r",1, VAL1,", r",0, VAL2,", [r",7, 24,"], #16")
418 TEST_RR( "strd r",7, VAL2,", r",8, VAL1,", [sp], #-16")
419 TEST_UNSUPPORTED(__inst_thumb32(0xe9efec04) " @ strd r14, r12, [pc, #16]!")
420 TEST_UNSUPPORTED(__inst_thumb32(0xe8efec04) " @ strd r14, r12, [pc], #16")
421
422 TEST_RX("tbb [pc, r",0, (9f-(1f+4)),"]",
423 "9: \n\t"
424 ".byte (2f-1b-4)>>1 \n\t"
425 ".byte (3f-1b-4)>>1 \n\t"
426 "3: mvn r0, r0 \n\t"
427 "2: nop \n\t")
428
429 TEST_RX("tbb [pc, r",4, (9f-(1f+4)+1),"]",
430 "9: \n\t"
431 ".byte (2f-1b-4)>>1 \n\t"
432 ".byte (3f-1b-4)>>1 \n\t"
433 "3: mvn r0, r0 \n\t"
434 "2: nop \n\t")
435
436 TEST_RRX("tbb [r",1,9f,", r",2,0,"]",
437 "9: \n\t"
438 ".byte (2f-1b-4)>>1 \n\t"
439 ".byte (3f-1b-4)>>1 \n\t"
440 "3: mvn r0, r0 \n\t"
441 "2: nop \n\t")
442
443 TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,"]",
444 "9: \n\t"
445 ".short (2f-1b-4)>>1 \n\t"
446 ".short (3f-1b-4)>>1 \n\t"
447 "3: mvn r0, r0 \n\t"
448 "2: nop \n\t")
449
450 TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,"]",
451 "9: \n\t"
452 ".short (2f-1b-4)>>1 \n\t"
453 ".short (3f-1b-4)>>1 \n\t"
454 "3: mvn r0, r0 \n\t"
455 "2: nop \n\t")
456
457 TEST_RRX("tbh [r",1,9f, ", r",14,1,"]",
458 "9: \n\t"
459 ".short (2f-1b-4)>>1 \n\t"
460 ".short (3f-1b-4)>>1 \n\t"
461 "3: mvn r0, r0 \n\t"
462 "2: nop \n\t")
463
464 TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01f) " @ tbh [r1, pc]")
465 TEST_UNSUPPORTED(__inst_thumb32(0xe8d1f01d) " @ tbh [r1, sp]")
466 TEST_UNSUPPORTED(__inst_thumb32(0xe8ddf012) " @ tbh [sp, r2]")
467
468 TEST_UNSUPPORTED("strexb r0, r1, [r2]")
469 TEST_UNSUPPORTED("strexh r0, r1, [r2]")
470 TEST_UNSUPPORTED("strexd r0, r1, [r2]")
471 TEST_UNSUPPORTED("ldrexb r0, [r1]")
472 TEST_UNSUPPORTED("ldrexh r0, [r1]")
473 TEST_UNSUPPORTED("ldrexd r0, [r1]")
474
475 TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
476
477#define _DATA_PROCESSING32_DNM(op,s,val) \
478 TEST_RR(op s".w r0, r",1, VAL1,", r",2, val, "") \
479 TEST_RR(op s" r1, r",1, VAL1,", r",2, val, ", lsl #3") \
480 TEST_RR(op s" r2, r",3, VAL1,", r",2, val, ", lsr #4") \
481 TEST_RR(op s" r3, r",3, VAL1,", r",2, val, ", asr #5") \
482 TEST_RR(op s" r4, r",5, VAL1,", r",2, N(val),", asr #6") \
483 TEST_RR(op s" r5, r",5, VAL1,", r",2, val, ", ror #7") \
484 TEST_RR(op s" r8, r",9, VAL1,", r",10,val, ", rrx") \
485 TEST_R( op s" r0, r",11,VAL1,", #0x00010001") \
486 TEST_R( op s" r11, r",0, VAL1,", #0xf5000000") \
487 TEST_R( op s" r7, r",8, VAL2,", #0x000af000")
488
489#define DATA_PROCESSING32_DNM(op,val) \
490 _DATA_PROCESSING32_DNM(op,"",val) \
491 _DATA_PROCESSING32_DNM(op,"s",val)
492
493#define DATA_PROCESSING32_NM(op,val) \
494 TEST_RR(op".w r",1, VAL1,", r",2, val, "") \
495 TEST_RR(op" r",1, VAL1,", r",2, val, ", lsl #3") \
496 TEST_RR(op" r",3, VAL1,", r",2, val, ", lsr #4") \
497 TEST_RR(op" r",3, VAL1,", r",2, val, ", asr #5") \
498 TEST_RR(op" r",5, VAL1,", r",2, N(val),", asr #6") \
499 TEST_RR(op" r",5, VAL1,", r",2, val, ", ror #7") \
500 TEST_RR(op" r",9, VAL1,", r",10,val, ", rrx") \
501 TEST_R( op" r",11,VAL1,", #0x00010001") \
502 TEST_R( op" r",0, VAL1,", #0xf5000000") \
503 TEST_R( op" r",8, VAL2,", #0x000af000")
504
505#define _DATA_PROCESSING32_DM(op,s,val) \
506 TEST_R( op s".w r0, r",14, val, "") \
507 TEST_R( op s" r1, r",12, val, ", lsl #3") \
508 TEST_R( op s" r2, r",11, val, ", lsr #4") \
509 TEST_R( op s" r3, r",10, val, ", asr #5") \
510 TEST_R( op s" r4, r",9, N(val),", asr #6") \
511 TEST_R( op s" r5, r",8, val, ", ror #7") \
512 TEST_R( op s" r8, r",7,val, ", rrx") \
513 TEST( op s" r0, #0x00010001") \
514 TEST( op s" r11, #0xf5000000") \
515 TEST( op s" r7, #0x000af000") \
516 TEST( op s" r4, #0x00005a00")
517
518#define DATA_PROCESSING32_DM(op,val) \
519 _DATA_PROCESSING32_DM(op,"",val) \
520 _DATA_PROCESSING32_DM(op,"s",val)
521
522 DATA_PROCESSING32_DNM("and",0xf00f00ff)
523 DATA_PROCESSING32_NM("tst",0xf00f00ff)
524 DATA_PROCESSING32_DNM("bic",0xf00f00ff)
525 DATA_PROCESSING32_DNM("orr",0xf00f00ff)
526 DATA_PROCESSING32_DM("mov",VAL2)
527 DATA_PROCESSING32_DNM("orn",0xf00f00ff)
528 DATA_PROCESSING32_DM("mvn",VAL2)
529 DATA_PROCESSING32_DNM("eor",0xf00f00ff)
530 DATA_PROCESSING32_NM("teq",0xf00f00ff)
531 DATA_PROCESSING32_DNM("add",VAL2)
532 DATA_PROCESSING32_NM("cmn",VAL2)
533 DATA_PROCESSING32_DNM("adc",VAL2)
534 DATA_PROCESSING32_DNM("sbc",VAL2)
535 DATA_PROCESSING32_DNM("sub",VAL2)
536 DATA_PROCESSING32_NM("cmp",VAL2)
537 DATA_PROCESSING32_DNM("rsb",VAL2)
538
539 TEST_RR("pkhbt r0, r",0, HH1,", r",1, HH2,"")
540 TEST_RR("pkhbt r14,r",12, HH1,", r",10,HH2,", lsl #2")
541 TEST_RR("pkhtb r0, r",0, HH1,", r",1, HH2,"")
542 TEST_RR("pkhtb r14,r",12, HH1,", r",10,HH2,", asr #2")
543
544 TEST_UNSUPPORTED(__inst_thumb32(0xea170f0d) " @ tst.w r7, sp")
545 TEST_UNSUPPORTED(__inst_thumb32(0xea170f0f) " @ tst.w r7, pc")
546 TEST_UNSUPPORTED(__inst_thumb32(0xea1d0f07) " @ tst.w sp, r7")
547 TEST_UNSUPPORTED(__inst_thumb32(0xea1f0f07) " @ tst.w pc, r7")
548 TEST_UNSUPPORTED(__inst_thumb32(0xf01d1f08) " @ tst sp, #0x00080008")
549 TEST_UNSUPPORTED(__inst_thumb32(0xf01f1f08) " @ tst pc, #0x00080008")
550
551 TEST_UNSUPPORTED(__inst_thumb32(0xea970f0d) " @ teq.w r7, sp")
552 TEST_UNSUPPORTED(__inst_thumb32(0xea970f0f) " @ teq.w r7, pc")
553 TEST_UNSUPPORTED(__inst_thumb32(0xea9d0f07) " @ teq.w sp, r7")
554 TEST_UNSUPPORTED(__inst_thumb32(0xea9f0f07) " @ teq.w pc, r7")
555 TEST_UNSUPPORTED(__inst_thumb32(0xf09d1f08) " @ tst sp, #0x00080008")
556 TEST_UNSUPPORTED(__inst_thumb32(0xf09f1f08) " @ tst pc, #0x00080008")
557
558 TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0d) " @ cmn.w r7, sp")
559 TEST_UNSUPPORTED(__inst_thumb32(0xeb170f0f) " @ cmn.w r7, pc")
560 TEST_P("cmn.w sp, r",7,0,"")
561 TEST_UNSUPPORTED(__inst_thumb32(0xeb1f0f07) " @ cmn.w pc, r7")
562 TEST( "cmn sp, #0x00080008")
563 TEST_UNSUPPORTED(__inst_thumb32(0xf11f1f08) " @ cmn pc, #0x00080008")
564
565 TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0d) " @ cmp.w r7, sp")
566 TEST_UNSUPPORTED(__inst_thumb32(0xebb70f0f) " @ cmp.w r7, pc")
567 TEST_P("cmp.w sp, r",7,0,"")
568 TEST_UNSUPPORTED(__inst_thumb32(0xebbf0f07) " @ cmp.w pc, r7")
569 TEST( "cmp sp, #0x00080008")
570 TEST_UNSUPPORTED(__inst_thumb32(0xf1bf1f08) " @ cmp pc, #0x00080008")
571
572 TEST_UNSUPPORTED(__inst_thumb32(0xea5f070d) " @ movs.w r7, sp")
573 TEST_UNSUPPORTED(__inst_thumb32(0xea5f070f) " @ movs.w r7, pc")
574 TEST_UNSUPPORTED(__inst_thumb32(0xea5f0d07) " @ movs.w sp, r7")
575 TEST_UNSUPPORTED(__inst_thumb32(0xea4f0f07) " @ mov.w pc, r7")
576 TEST_UNSUPPORTED(__inst_thumb32(0xf04f1d08) " @ mov sp, #0x00080008")
577 TEST_UNSUPPORTED(__inst_thumb32(0xf04f1f08) " @ mov pc, #0x00080008")
578
579 TEST_R("add.w r0, sp, r",1, 4,"")
580 TEST_R("adds r0, sp, r",1, 4,", asl #3")
581 TEST_R("add r0, sp, r",1, 4,", asl #4")
582 TEST_R("add r0, sp, r",1, 16,", ror #1")
583 TEST_R("add.w sp, sp, r",1, 4,"")
584 TEST_R("add sp, sp, r",1, 4,", asl #3")
585 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d1d01) " @ add sp, sp, r1, asl #4")
586 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d71) " @ add sp, sp, r1, ror #1")
587 TEST( "add.w r0, sp, #24")
588 TEST( "add.w sp, sp, #24")
589 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0f01) " @ add pc, sp, r1")
590 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000f) " @ add r0, sp, pc")
591 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d000d) " @ add r0, sp, sp")
592 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0f) " @ add sp, sp, pc")
593 TEST_UNSUPPORTED(__inst_thumb32(0xeb0d0d0d) " @ add sp, sp, sp")
594
595 TEST_R("sub.w r0, sp, r",1, 4,"")
596 TEST_R("subs r0, sp, r",1, 4,", asl #3")
597 TEST_R("sub r0, sp, r",1, 4,", asl #4")
598 TEST_R("sub r0, sp, r",1, 16,", ror #1")
599 TEST_R("sub.w sp, sp, r",1, 4,"")
600 TEST_R("sub sp, sp, r",1, 4,", asl #3")
601 TEST_UNSUPPORTED(__inst_thumb32(0xebad1d01) " @ sub sp, sp, r1, asl #4")
602 TEST_UNSUPPORTED(__inst_thumb32(0xebad0d71) " @ sub sp, sp, r1, ror #1")
603 TEST_UNSUPPORTED(__inst_thumb32(0xebad0f01) " @ sub pc, sp, r1")
604 TEST( "sub.w r0, sp, #24")
605 TEST( "sub.w sp, sp, #24")
606
607 TEST_UNSUPPORTED(__inst_thumb32(0xea02010f) " @ and r1, r2, pc")
608 TEST_UNSUPPORTED(__inst_thumb32(0xea0f0103) " @ and r1, pc, r3")
609 TEST_UNSUPPORTED(__inst_thumb32(0xea020f03) " @ and pc, r2, r3")
610 TEST_UNSUPPORTED(__inst_thumb32(0xea02010d) " @ and r1, r2, sp")
611 TEST_UNSUPPORTED(__inst_thumb32(0xea0d0103) " @ and r1, sp, r3")
612 TEST_UNSUPPORTED(__inst_thumb32(0xea020d03) " @ and sp, r2, r3")
613 TEST_UNSUPPORTED(__inst_thumb32(0xf00d1108) " @ and r1, sp, #0x00080008")
614 TEST_UNSUPPORTED(__inst_thumb32(0xf00f1108) " @ and r1, pc, #0x00080008")
615 TEST_UNSUPPORTED(__inst_thumb32(0xf0021d08) " @ and sp, r8, #0x00080008")
616 TEST_UNSUPPORTED(__inst_thumb32(0xf0021f08) " @ and pc, r8, #0x00080008")
617
618 TEST_UNSUPPORTED(__inst_thumb32(0xeb02010f) " @ add r1, r2, pc")
619 TEST_UNSUPPORTED(__inst_thumb32(0xeb0f0103) " @ add r1, pc, r3")
620 TEST_UNSUPPORTED(__inst_thumb32(0xeb020f03) " @ add pc, r2, r3")
621 TEST_UNSUPPORTED(__inst_thumb32(0xeb02010d) " @ add r1, r2, sp")
622 TEST_SUPPORTED( __inst_thumb32(0xeb0d0103) " @ add r1, sp, r3")
623 TEST_UNSUPPORTED(__inst_thumb32(0xeb020d03) " @ add sp, r2, r3")
624 TEST_SUPPORTED( __inst_thumb32(0xf10d1108) " @ add r1, sp, #0x00080008")
625 TEST_UNSUPPORTED(__inst_thumb32(0xf10d1f08) " @ add pc, sp, #0x00080008")
626 TEST_UNSUPPORTED(__inst_thumb32(0xf10f1108) " @ add r1, pc, #0x00080008")
627 TEST_UNSUPPORTED(__inst_thumb32(0xf1021d08) " @ add sp, r8, #0x00080008")
628 TEST_UNSUPPORTED(__inst_thumb32(0xf1021f08) " @ add pc, r8, #0x00080008")
629
630 TEST_UNSUPPORTED(__inst_thumb32(0xeaa00000) "")
631 TEST_UNSUPPORTED(__inst_thumb32(0xeaf00000) "")
632 TEST_UNSUPPORTED(__inst_thumb32(0xeb200000) "")
633 TEST_UNSUPPORTED(__inst_thumb32(0xeb800000) "")
634 TEST_UNSUPPORTED(__inst_thumb32(0xebe00000) "")
635
636 TEST_UNSUPPORTED(__inst_thumb32(0xf0a00000) "")
637 TEST_UNSUPPORTED(__inst_thumb32(0xf0c00000) "")
638 TEST_UNSUPPORTED(__inst_thumb32(0xf0f00000) "")
639 TEST_UNSUPPORTED(__inst_thumb32(0xf1200000) "")
640 TEST_UNSUPPORTED(__inst_thumb32(0xf1800000) "")
641 TEST_UNSUPPORTED(__inst_thumb32(0xf1e00000) "")
642
643 TEST_GROUP("Coprocessor instructions")
644
645 TEST_UNSUPPORTED(__inst_thumb32(0xec000000) "")
646 TEST_UNSUPPORTED(__inst_thumb32(0xeff00000) "")
647 TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
648 TEST_UNSUPPORTED(__inst_thumb32(0xfff00000) "")
649
650 TEST_GROUP("Data-processing (plain binary immediate)")
651
652 TEST_R("addw r0, r",1, VAL1,", #0x123")
653 TEST( "addw r14, sp, #0xf5a")
654 TEST( "addw sp, sp, #0x20")
655 TEST( "addw r7, pc, #0x888")
656 TEST_UNSUPPORTED(__inst_thumb32(0xf20f1f20) " @ addw pc, pc, #0x120")
657 TEST_UNSUPPORTED(__inst_thumb32(0xf20d1f20) " @ addw pc, sp, #0x120")
658 TEST_UNSUPPORTED(__inst_thumb32(0xf20f1d20) " @ addw sp, pc, #0x120")
659 TEST_UNSUPPORTED(__inst_thumb32(0xf2001d20) " @ addw sp, r0, #0x120")
660
661 TEST_R("subw r0, r",1, VAL1,", #0x123")
662 TEST( "subw r14, sp, #0xf5a")
663 TEST( "subw sp, sp, #0x20")
664 TEST( "subw r7, pc, #0x888")
665 TEST_UNSUPPORTED(__inst_thumb32(0xf2af1f20) " @ subw pc, pc, #0x120")
666 TEST_UNSUPPORTED(__inst_thumb32(0xf2ad1f20) " @ subw pc, sp, #0x120")
667 TEST_UNSUPPORTED(__inst_thumb32(0xf2af1d20) " @ subw sp, pc, #0x120")
668 TEST_UNSUPPORTED(__inst_thumb32(0xf2a01d20) " @ subw sp, r0, #0x120")
669
670 TEST("movw r0, #0")
671 TEST("movw r0, #0xffff")
672 TEST("movw lr, #0xffff")
673 TEST_UNSUPPORTED(__inst_thumb32(0xf2400d00) " @ movw sp, #0")
674 TEST_UNSUPPORTED(__inst_thumb32(0xf2400f00) " @ movw pc, #0")
675
676 TEST_R("movt r",0, VAL1,", #0")
677 TEST_R("movt r",0, VAL2,", #0xffff")
678 TEST_R("movt r",14,VAL1,", #0xffff")
679 TEST_UNSUPPORTED(__inst_thumb32(0xf2c00d00) " @ movt sp, #0")
680 TEST_UNSUPPORTED(__inst_thumb32(0xf2c00f00) " @ movt pc, #0")
681
682 TEST_R( "ssat r0, #24, r",0, VAL1,"")
683 TEST_R( "ssat r14, #24, r",12, VAL2,"")
684 TEST_R( "ssat r0, #24, r",0, VAL1,", lsl #8")
685 TEST_R( "ssat r14, #24, r",12, VAL2,", asr #8")
686 TEST_UNSUPPORTED(__inst_thumb32(0xf30c0d17) " @ ssat sp, #24, r12")
687 TEST_UNSUPPORTED(__inst_thumb32(0xf30c0f17) " @ ssat pc, #24, r12")
688 TEST_UNSUPPORTED(__inst_thumb32(0xf30d0c17) " @ ssat r12, #24, sp")
689 TEST_UNSUPPORTED(__inst_thumb32(0xf30f0c17) " @ ssat r12, #24, pc")
690
691 TEST_R( "usat r0, #24, r",0, VAL1,"")
692 TEST_R( "usat r14, #24, r",12, VAL2,"")
693 TEST_R( "usat r0, #24, r",0, VAL1,", lsl #8")
694 TEST_R( "usat r14, #24, r",12, VAL2,", asr #8")
695 TEST_UNSUPPORTED(__inst_thumb32(0xf38c0d17) " @ usat sp, #24, r12")
696 TEST_UNSUPPORTED(__inst_thumb32(0xf38c0f17) " @ usat pc, #24, r12")
697 TEST_UNSUPPORTED(__inst_thumb32(0xf38d0c17) " @ usat r12, #24, sp")
698 TEST_UNSUPPORTED(__inst_thumb32(0xf38f0c17) " @ usat r12, #24, pc")
699
700 TEST_R( "ssat16 r0, #12, r",0, HH1,"")
701 TEST_R( "ssat16 r14, #12, r",12, HH2,"")
702 TEST_UNSUPPORTED(__inst_thumb32(0xf32c0d0b) " @ ssat16 sp, #12, r12")
703 TEST_UNSUPPORTED(__inst_thumb32(0xf32c0f0b) " @ ssat16 pc, #12, r12")
704 TEST_UNSUPPORTED(__inst_thumb32(0xf32d0c0b) " @ ssat16 r12, #12, sp")
705 TEST_UNSUPPORTED(__inst_thumb32(0xf32f0c0b) " @ ssat16 r12, #12, pc")
706
707 TEST_R( "usat16 r0, #12, r",0, HH1,"")
708 TEST_R( "usat16 r14, #12, r",12, HH2,"")
709 TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0d0b) " @ usat16 sp, #12, r12")
710 TEST_UNSUPPORTED(__inst_thumb32(0xf3ac0f0b) " @ usat16 pc, #12, r12")
711 TEST_UNSUPPORTED(__inst_thumb32(0xf3ad0c0b) " @ usat16 r12, #12, sp")
712 TEST_UNSUPPORTED(__inst_thumb32(0xf3af0c0b) " @ usat16 r12, #12, pc")
713
714 TEST_R( "sbfx r0, r",0 , VAL1,", #0, #31")
715 TEST_R( "sbfx r14, r",12, VAL2,", #8, #16")
716 TEST_R( "sbfx r4, r",10, VAL1,", #16, #15")
717 TEST_UNSUPPORTED(__inst_thumb32(0xf34c2d0f) " @ sbfx sp, r12, #8, #16")
718 TEST_UNSUPPORTED(__inst_thumb32(0xf34c2f0f) " @ sbfx pc, r12, #8, #16")
719 TEST_UNSUPPORTED(__inst_thumb32(0xf34d2c0f) " @ sbfx r12, sp, #8, #16")
720 TEST_UNSUPPORTED(__inst_thumb32(0xf34f2c0f) " @ sbfx r12, pc, #8, #16")
721
722 TEST_R( "ubfx r0, r",0 , VAL1,", #0, #31")
723 TEST_R( "ubfx r14, r",12, VAL2,", #8, #16")
724 TEST_R( "ubfx r4, r",10, VAL1,", #16, #15")
725 TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2d0f) " @ ubfx sp, r12, #8, #16")
726 TEST_UNSUPPORTED(__inst_thumb32(0xf3cc2f0f) " @ ubfx pc, r12, #8, #16")
727 TEST_UNSUPPORTED(__inst_thumb32(0xf3cd2c0f) " @ ubfx r12, sp, #8, #16")
728 TEST_UNSUPPORTED(__inst_thumb32(0xf3cf2c0f) " @ ubfx r12, pc, #8, #16")
729
730 TEST_R( "bfc r",0, VAL1,", #4, #20")
731 TEST_R( "bfc r",14,VAL2,", #4, #20")
732 TEST_R( "bfc r",7, VAL1,", #0, #31")
733 TEST_R( "bfc r",8, VAL2,", #0, #31")
734 TEST_UNSUPPORTED(__inst_thumb32(0xf36f0d1e) " @ bfc sp, #0, #31")
735 TEST_UNSUPPORTED(__inst_thumb32(0xf36f0f1e) " @ bfc pc, #0, #31")
736
737 TEST_RR( "bfi r",0, VAL1,", r",0 , VAL2,", #0, #31")
738 TEST_RR( "bfi r",12,VAL1,", r",14 , VAL2,", #4, #20")
739 TEST_UNSUPPORTED(__inst_thumb32(0xf36e1d17) " @ bfi sp, r14, #4, #20")
740 TEST_UNSUPPORTED(__inst_thumb32(0xf36e1f17) " @ bfi pc, r14, #4, #20")
741 TEST_UNSUPPORTED(__inst_thumb32(0xf36d1e17) " @ bfi r14, sp, #4, #20")
742
743 TEST_GROUP("Branches and miscellaneous control")
744
745CONDITION_INSTRUCTIONS(22,
746 TEST_BF("beq.w 2f")
747 TEST_BB("bne.w 2b")
748 TEST_BF("bgt.w 2f")
749 TEST_BB("blt.w 2b")
750 TEST_BF_X("bpl.w 2f", SPACE_0x1000)
751)
752
753 TEST_UNSUPPORTED("msr cpsr, r0")
754 TEST_UNSUPPORTED("msr cpsr_f, r1")
755 TEST_UNSUPPORTED("msr spsr, r2")
756
757 TEST_UNSUPPORTED("cpsie.w i")
758 TEST_UNSUPPORTED("cpsid.w i")
759 TEST_UNSUPPORTED("cps 0x13")
760
761 TEST_SUPPORTED("yield.w")
762 TEST("sev.w")
763 TEST("nop.w")
764 TEST("wfi.w")
765 TEST_SUPPORTED("wfe.w")
766 TEST_UNSUPPORTED("dbg.w #0")
767
768 TEST_UNSUPPORTED("clrex")
769 TEST_UNSUPPORTED("dsb")
770 TEST_UNSUPPORTED("dmb")
771 TEST_UNSUPPORTED("isb")
772
773 TEST_UNSUPPORTED("bxj r0")
774
775 TEST_UNSUPPORTED("subs pc, lr, #4")
776
777 TEST("mrs r0, cpsr")
778 TEST("mrs r14, cpsr")
779 TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8d00) " @ mrs sp, spsr")
780 TEST_UNSUPPORTED(__inst_thumb32(0xf3ef8f00) " @ mrs pc, spsr")
781 TEST_UNSUPPORTED("mrs r0, spsr")
782 TEST_UNSUPPORTED("mrs lr, spsr")
783
784 TEST_UNSUPPORTED(__inst_thumb32(0xf7f08000) " @ smc #0")
785
786 TEST_UNSUPPORTED(__inst_thumb32(0xf7f0a000) " @ undefeined")
787
788 TEST_BF( "b.w 2f")
789 TEST_BB( "b.w 2b")
790 TEST_BF_X("b.w 2f", SPACE_0x1000)
791
792 TEST_BF( "bl.w 2f")
793 TEST_BB( "bl.w 2b")
794 TEST_BB_X("bl.w 2b", SPACE_0x1000)
795
796 TEST_X( "blx __dummy_arm_subroutine",
797 ".arm \n\t"
798 ".align \n\t"
799 ".type __dummy_arm_subroutine, %%function \n\t"
800 "__dummy_arm_subroutine: \n\t"
801 "mov r0, pc \n\t"
802 "bx lr \n\t"
803 ".thumb \n\t"
804 )
805 TEST( "blx __dummy_arm_subroutine")
806
807 TEST_GROUP("Store single data item")
808
809#define SINGLE_STORE(size) \
810 TEST_RP( "str"size" r",0, VAL1,", [r",11,-1024,", #1024]") \
811 TEST_RP( "str"size" r",14,VAL2,", [r",1, -1024,", #1080]") \
812 TEST_RP( "str"size" r",0, VAL1,", [r",11,256, ", #-120]") \
813 TEST_RP( "str"size" r",14,VAL2,", [r",1, 256, ", #-128]") \
814 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, "], #120") \
815 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, "], #128") \
816 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, "], #-120") \
817 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, "], #-128") \
818 TEST_RP( "str"size" r",0, VAL1,", [r",11,24, ", #120]!") \
819 TEST_RP( "str"size" r",14,VAL2,", [r",1, 24, ", #128]!") \
820 TEST_RP( "str"size" r",0, VAL1,", [r",11,256, ", #-120]!") \
821 TEST_RP( "str"size" r",14,VAL2,", [r",1, 256, ", #-128]!") \
822 TEST_RPR("str"size".w r",0, VAL1,", [r",1, 0,", r",2, 4,"]") \
823 TEST_RPR("str"size" r",14,VAL2,", [r",10,0,", r",11,4,", lsl #1]") \
824 TEST_R( "str"size".w r",7, VAL1,", [sp, #24]") \
825 TEST_RP( "str"size".w r",0, VAL2,", [r",0,0, "]") \
826 TEST_UNSUPPORTED("str"size"t r0, [r1, #4]")
827
828 SINGLE_STORE("b")
829 SINGLE_STORE("h")
830 SINGLE_STORE("")
831
832 TEST("str sp, [sp]")
833 TEST_UNSUPPORTED(__inst_thumb32(0xf8cfe000) " @ str r14, [pc]")
834 TEST_UNSUPPORTED(__inst_thumb32(0xf8cef000) " @ str pc, [r14]")
835
836 TEST_GROUP("Advanced SIMD element or structure load/store instructions")
837
838 TEST_UNSUPPORTED(__inst_thumb32(0xf9000000) "")
839 TEST_UNSUPPORTED(__inst_thumb32(0xf92fffff) "")
840 TEST_UNSUPPORTED(__inst_thumb32(0xf9800000) "")
841 TEST_UNSUPPORTED(__inst_thumb32(0xf9efffff) "")
842
843 TEST_GROUP("Load single data item and memory hints")
844
845#define SINGLE_LOAD(size) \
846 TEST_P( "ldr"size" r0, [r",11,-1024, ", #1024]") \
847 TEST_P( "ldr"size" r14, [r",1, -1024,", #1080]") \
848 TEST_P( "ldr"size" r0, [r",11,256, ", #-120]") \
849 TEST_P( "ldr"size" r14, [r",1, 256, ", #-128]") \
850 TEST_P( "ldr"size" r0, [r",11,24, "], #120") \
851 TEST_P( "ldr"size" r14, [r",1, 24, "], #128") \
852 TEST_P( "ldr"size" r0, [r",11,24, "], #-120") \
853 TEST_P( "ldr"size" r14, [r",1,24, "], #-128") \
854 TEST_P( "ldr"size" r0, [r",11,24, ", #120]!") \
855 TEST_P( "ldr"size" r14, [r",1, 24, ", #128]!") \
856 TEST_P( "ldr"size" r0, [r",11,256, ", #-120]!") \
857 TEST_P( "ldr"size" r14, [r",1, 256, ", #-128]!") \
858 TEST_PR("ldr"size".w r0, [r",1, 0,", r",2, 4,"]") \
859 TEST_PR("ldr"size" r14, [r",10,0,", r",11,4,", lsl #1]") \
860 TEST_X( "ldr"size".w r0, 3f", \
861 ".align 3 \n\t" \
862 "3: .word "__stringify(VAL1)) \
863 TEST_X( "ldr"size".w r14, 3f", \
864 ".align 3 \n\t" \
865 "3: .word "__stringify(VAL2)) \
866 TEST( "ldr"size".w r7, 3b") \
867 TEST( "ldr"size".w r7, [sp, #24]") \
868 TEST_P( "ldr"size".w r0, [r",0,0, "]") \
869 TEST_UNSUPPORTED("ldr"size"t r0, [r1, #4]")
870
871 SINGLE_LOAD("b")
872 SINGLE_LOAD("sb")
873 SINGLE_LOAD("h")
874 SINGLE_LOAD("sh")
875 SINGLE_LOAD("")
876
877 TEST_BF_P("ldr pc, [r",14, 15*4,"]")
878 TEST_P( "ldr sp, [r",14, 13*4,"]")
879 TEST_BF_R("ldr pc, [sp, r",14, 15*4,"]")
880 TEST_R( "ldr sp, [sp, r",14, 13*4,"]")
881 TEST_THUMB_TO_ARM_INTERWORK_P("ldr pc, [r",0,0,", #15*4]")
882 TEST_SUPPORTED("ldr sp, 99f")
883 TEST_SUPPORTED("ldr pc, 99f")
884
885 TEST_UNSUPPORTED(__inst_thumb32(0xf854700d) " @ ldr r7, [r4, sp]")
886 TEST_UNSUPPORTED(__inst_thumb32(0xf854700f) " @ ldr r7, [r4, pc]")
887 TEST_UNSUPPORTED(__inst_thumb32(0xf814700d) " @ ldrb r7, [r4, sp]")
888 TEST_UNSUPPORTED(__inst_thumb32(0xf814700f) " @ ldrb r7, [r4, pc]")
889 TEST_UNSUPPORTED(__inst_thumb32(0xf89fd004) " @ ldrb sp, 99f")
890 TEST_UNSUPPORTED(__inst_thumb32(0xf814d008) " @ ldrb sp, [r4, r8]")
891 TEST_UNSUPPORTED(__inst_thumb32(0xf894d000) " @ ldrb sp, [r4]")
892
893 TEST_UNSUPPORTED(__inst_thumb32(0xf8600000) "") /* Unallocated space */
894 TEST_UNSUPPORTED(__inst_thumb32(0xf9ffffff) "") /* Unallocated space */
895 TEST_UNSUPPORTED(__inst_thumb32(0xf9500000) "") /* Unallocated space */
896 TEST_UNSUPPORTED(__inst_thumb32(0xf95fffff) "") /* Unallocated space */
897 TEST_UNSUPPORTED(__inst_thumb32(0xf8000800) "") /* Unallocated space */
898 TEST_UNSUPPORTED(__inst_thumb32(0xf97ffaff) "") /* Unallocated space */
899
900 TEST( "pli [pc, #4]")
901 TEST( "pli [pc, #-4]")
902 TEST( "pld [pc, #4]")
903 TEST( "pld [pc, #-4]")
904
905 TEST_P( "pld [r",0,-1024,", #1024]")
906 TEST( __inst_thumb32(0xf8b0f400) " @ pldw [r0, #1024]")
907 TEST_P( "pli [r",4, 0b,", #1024]")
908 TEST_P( "pld [r",7, 120,", #-120]")
909 TEST( __inst_thumb32(0xf837fc78) " @ pldw [r7, #-120]")
910 TEST_P( "pli [r",11,120,", #-120]")
911 TEST( "pld [sp, #0]")
912
913 TEST_PR("pld [r",7, 24, ", r",0, 16,"]")
914 TEST_PR("pld [r",8, 24, ", r",12,16,", lsl #3]")
915 TEST_SUPPORTED(__inst_thumb32(0xf837f000) " @ pldw [r7, r0]")
916 TEST_SUPPORTED(__inst_thumb32(0xf838f03c) " @ pldw [r8, r12, lsl #3]");
917 TEST_RR("pli [r",12,0b,", r",0, 16,"]")
918 TEST_RR("pli [r",0, 0b,", r",12,16,", lsl #3]")
919 TEST_R( "pld [sp, r",1, 16,"]")
920 TEST_UNSUPPORTED(__inst_thumb32(0xf817f00d) " @pld [r7, sp]")
921 TEST_UNSUPPORTED(__inst_thumb32(0xf817f00f) " @pld [r7, pc]")
922
923 TEST_GROUP("Data-processing (register)")
924
925#define SHIFTS32(op) \
926 TEST_RR(op" r0, r",1, VAL1,", r",2, 3, "") \
927 TEST_RR(op" r14, r",12,VAL2,", r",11,10,"")
928
929 SHIFTS32("lsl")
930 SHIFTS32("lsls")
931 SHIFTS32("lsr")
932 SHIFTS32("lsrs")
933 SHIFTS32("asr")
934 SHIFTS32("asrs")
935 SHIFTS32("ror")
936 SHIFTS32("rors")
937
938 TEST_UNSUPPORTED(__inst_thumb32(0xfa01ff02) " @ lsl pc, r1, r2")
939 TEST_UNSUPPORTED(__inst_thumb32(0xfa01fd02) " @ lsl sp, r1, r2")
940 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff002) " @ lsl r0, pc, r2")
941 TEST_UNSUPPORTED(__inst_thumb32(0xfa0df002) " @ lsl r0, sp, r2")
942 TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00f) " @ lsl r0, r1, pc")
943 TEST_UNSUPPORTED(__inst_thumb32(0xfa01f00d) " @ lsl r0, r1, sp")
944
945 TEST_RR( "sxtah r0, r",0, HH1,", r",1, HH2,"")
946 TEST_RR( "sxtah r14,r",12, HH2,", r",10,HH1,", ror #8")
947 TEST_R( "sxth r8, r",7, HH1,"")
948
949 TEST_UNSUPPORTED(__inst_thumb32(0xfa0fff87) " @ sxth pc, r7");
950 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ffd87) " @ sxth sp, r7");
951 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88f) " @ sxth r8, pc");
952 TEST_UNSUPPORTED(__inst_thumb32(0xfa0ff88d) " @ sxth r8, sp");
953
954 TEST_RR( "uxtah r0, r",0, HH1,", r",1, HH2,"")
955 TEST_RR( "uxtah r14,r",12, HH2,", r",10,HH1,", ror #8")
956 TEST_R( "uxth r8, r",7, HH1,"")
957
958 TEST_RR( "sxtab16 r0, r",0, HH1,", r",1, HH2,"")
959 TEST_RR( "sxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8")
960 TEST_R( "sxtb16 r8, r",7, HH1,"")
961
962 TEST_RR( "uxtab16 r0, r",0, HH1,", r",1, HH2,"")
963 TEST_RR( "uxtab16 r14,r",12, HH2,", r",10,HH1,", ror #8")
964 TEST_R( "uxtb16 r8, r",7, HH1,"")
965
966 TEST_RR( "sxtab r0, r",0, HH1,", r",1, HH2,"")
967 TEST_RR( "sxtab r14,r",12, HH2,", r",10,HH1,", ror #8")
968 TEST_R( "sxtb r8, r",7, HH1,"")
969
970 TEST_RR( "uxtab r0, r",0, HH1,", r",1, HH2,"")
971 TEST_RR( "uxtab r14,r",12, HH2,", r",10,HH1,", ror #8")
972 TEST_R( "uxtb r8, r",7, HH1,"")
973
974 TEST_UNSUPPORTED(__inst_thumb32(0xfa6000f0) "")
975 TEST_UNSUPPORTED(__inst_thumb32(0xfa7fffff) "")
976
977#define PARALLEL_ADD_SUB(op) \
978 TEST_RR( op"add16 r0, r",0, HH1,", r",1, HH2,"") \
979 TEST_RR( op"add16 r14, r",12,HH2,", r",10,HH1,"") \
980 TEST_RR( op"asx r0, r",0, HH1,", r",1, HH2,"") \
981 TEST_RR( op"asx r14, r",12,HH2,", r",10,HH1,"") \
982 TEST_RR( op"sax r0, r",0, HH1,", r",1, HH2,"") \
983 TEST_RR( op"sax r14, r",12,HH2,", r",10,HH1,"") \
984 TEST_RR( op"sub16 r0, r",0, HH1,", r",1, HH2,"") \
985 TEST_RR( op"sub16 r14, r",12,HH2,", r",10,HH1,"") \
986 TEST_RR( op"add8 r0, r",0, HH1,", r",1, HH2,"") \
987 TEST_RR( op"add8 r14, r",12,HH2,", r",10,HH1,"") \
988 TEST_RR( op"sub8 r0, r",0, HH1,", r",1, HH2,"") \
989 TEST_RR( op"sub8 r14, r",12,HH2,", r",10,HH1,"")
990
991 TEST_GROUP("Parallel addition and subtraction, signed")
992
993 PARALLEL_ADD_SUB("s")
994 PARALLEL_ADD_SUB("q")
995 PARALLEL_ADD_SUB("sh")
996
997 TEST_GROUP("Parallel addition and subtraction, unsigned")
998
999 PARALLEL_ADD_SUB("u")
1000 PARALLEL_ADD_SUB("uq")
1001 PARALLEL_ADD_SUB("uh")
1002
1003 TEST_GROUP("Miscellaneous operations")
1004
1005 TEST_RR("qadd r0, r",1, VAL1,", r",2, VAL2,"")
1006 TEST_RR("qadd lr, r",9, VAL2,", r",8, VAL1,"")
1007 TEST_RR("qsub r0, r",1, VAL1,", r",2, VAL2,"")
1008 TEST_RR("qsub lr, r",9, VAL2,", r",8, VAL1,"")
1009 TEST_RR("qdadd r0, r",1, VAL1,", r",2, VAL2,"")
1010 TEST_RR("qdadd lr, r",9, VAL2,", r",8, VAL1,"")
1011 TEST_RR("qdsub r0, r",1, VAL1,", r",2, VAL2,"")
1012 TEST_RR("qdsub lr, r",9, VAL2,", r",8, VAL1,"")
1013
1014 TEST_R("rev.w r0, r",0, VAL1,"")
1015 TEST_R("rev r14, r",12, VAL2,"")
1016 TEST_R("rev16.w r0, r",0, VAL1,"")
1017 TEST_R("rev16 r14, r",12, VAL2,"")
1018 TEST_R("rbit r0, r",0, VAL1,"")
1019 TEST_R("rbit r14, r",12, VAL2,"")
1020 TEST_R("revsh.w r0, r",0, VAL1,"")
1021 TEST_R("revsh r14, r",12, VAL2,"")
1022
1023 TEST_UNSUPPORTED(__inst_thumb32(0xfa9cff8c) " @ rev pc, r12");
1024 TEST_UNSUPPORTED(__inst_thumb32(0xfa9cfd8c) " @ rev sp, r12");
1025 TEST_UNSUPPORTED(__inst_thumb32(0xfa9ffe8f) " @ rev r14, pc");
1026 TEST_UNSUPPORTED(__inst_thumb32(0xfa9dfe8d) " @ rev r14, sp");
1027
1028 TEST_RR("sel r0, r",0, VAL1,", r",1, VAL2,"")
1029 TEST_RR("sel r14, r",12,VAL1,", r",10, VAL2,"")
1030
1031 TEST_R("clz r0, r",0, 0x0,"")
1032 TEST_R("clz r7, r",14,0x1,"")
1033 TEST_R("clz lr, r",7, 0xffffffff,"")
1034
1035 TEST_UNSUPPORTED(__inst_thumb32(0xfa80f030) "") /* Unallocated space */
1036 TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
1037 TEST_UNSUPPORTED(__inst_thumb32(0xfab0f000) "") /* Unallocated space */
1038 TEST_UNSUPPORTED(__inst_thumb32(0xfaffff7f) "") /* Unallocated space */
1039
1040 TEST_GROUP("Multiply, multiply accumulate, and absolute difference operations")
1041
1042 TEST_RR( "mul r0, r",1, VAL1,", r",2, VAL2,"")
1043 TEST_RR( "mul r7, r",8, VAL2,", r",9, VAL2,"")
1044 TEST_UNSUPPORTED(__inst_thumb32(0xfb08ff09) " @ mul pc, r8, r9")
1045 TEST_UNSUPPORTED(__inst_thumb32(0xfb08fd09) " @ mul sp, r8, r9")
1046 TEST_UNSUPPORTED(__inst_thumb32(0xfb0ff709) " @ mul r7, pc, r9")
1047 TEST_UNSUPPORTED(__inst_thumb32(0xfb0df709) " @ mul r7, sp, r9")
1048 TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70f) " @ mul r7, r8, pc")
1049 TEST_UNSUPPORTED(__inst_thumb32(0xfb08f70d) " @ mul r7, r8, sp")
1050
1051 TEST_RRR( "mla r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1052 TEST_RRR( "mla r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1053 TEST_UNSUPPORTED(__inst_thumb32(0xfb08af09) " @ mla pc, r8, r9, r10");
1054 TEST_UNSUPPORTED(__inst_thumb32(0xfb08ad09) " @ mla sp, r8, r9, r10");
1055 TEST_UNSUPPORTED(__inst_thumb32(0xfb0fa709) " @ mla r7, pc, r9, r10");
1056 TEST_UNSUPPORTED(__inst_thumb32(0xfb0da709) " @ mla r7, sp, r9, r10");
1057 TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70f) " @ mla r7, r8, pc, r10");
1058 TEST_UNSUPPORTED(__inst_thumb32(0xfb08a70d) " @ mla r7, r8, sp, r10");
1059 TEST_UNSUPPORTED(__inst_thumb32(0xfb08d709) " @ mla r7, r8, r9, sp");
1060
1061 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1062 TEST_RRR( "mls r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1063
1064 TEST_RRR( "smlabb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1065 TEST_RRR( "smlabb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1066 TEST_RRR( "smlatb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1067 TEST_RRR( "smlatb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1068 TEST_RRR( "smlabt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1069 TEST_RRR( "smlabt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1070 TEST_RRR( "smlatt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1071 TEST_RRR( "smlatt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1072 TEST_RR( "smulbb r0, r",1, VAL1,", r",2, VAL2,"")
1073 TEST_RR( "smulbb r7, r",8, VAL3,", r",9, VAL1,"")
1074 TEST_RR( "smultb r0, r",1, VAL1,", r",2, VAL2,"")
1075 TEST_RR( "smultb r7, r",8, VAL3,", r",9, VAL1,"")
1076 TEST_RR( "smulbt r0, r",1, VAL1,", r",2, VAL2,"")
1077 TEST_RR( "smulbt r7, r",8, VAL3,", r",9, VAL1,"")
1078 TEST_RR( "smultt r0, r",1, VAL1,", r",2, VAL2,"")
1079 TEST_RR( "smultt r7, r",8, VAL3,", r",9, VAL1,"")
1080
1081 TEST_RRR( "smlad r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1082 TEST_RRR( "smlad r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1083 TEST_RRR( "smladx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1084 TEST_RRR( "smladx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1085 TEST_RR( "smuad r0, r",0, HH1,", r",1, HH2,"")
1086 TEST_RR( "smuad r14, r",12,HH2,", r",10,HH1,"")
1087 TEST_RR( "smuadx r0, r",0, HH1,", r",1, HH2,"")
1088 TEST_RR( "smuadx r14, r",12,HH2,", r",10,HH1,"")
1089
1090 TEST_RRR( "smlawb r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1091 TEST_RRR( "smlawb r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1092 TEST_RRR( "smlawt r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"")
1093 TEST_RRR( "smlawt r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
1094 TEST_RR( "smulwb r0, r",1, VAL1,", r",2, VAL2,"")
1095 TEST_RR( "smulwb r7, r",8, VAL3,", r",9, VAL1,"")
1096 TEST_RR( "smulwt r0, r",1, VAL1,", r",2, VAL2,"")
1097 TEST_RR( "smulwt r7, r",8, VAL3,", r",9, VAL1,"")
1098
1099 TEST_RRR( "smlsd r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1100 TEST_RRR( "smlsd r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1101 TEST_RRR( "smlsdx r0, r",0, HH1,", r",1, HH2,", r",2, VAL1,"")
1102 TEST_RRR( "smlsdx r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
1103 TEST_RR( "smusd r0, r",0, HH1,", r",1, HH2,"")
1104 TEST_RR( "smusd r14, r",12,HH2,", r",10,HH1,"")
1105 TEST_RR( "smusdx r0, r",0, HH1,", r",1, HH2,"")
1106 TEST_RR( "smusdx r14, r",12,HH2,", r",10,HH1,"")
1107
1108 TEST_RRR( "smmla r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1109 TEST_RRR( "smmla r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1110 TEST_RRR( "smmlar r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1111 TEST_RRR( "smmlar r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1112 TEST_RR( "smmul r0, r",0, VAL1,", r",1, VAL2,"")
1113 TEST_RR( "smmul r14, r",12,VAL2,", r",10,VAL1,"")
1114 TEST_RR( "smmulr r0, r",0, VAL1,", r",1, VAL2,"")
1115 TEST_RR( "smmulr r14, r",12,VAL2,", r",10,VAL1,"")
1116
1117 TEST_RRR( "smmls r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1118 TEST_RRR( "smmls r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1119 TEST_RRR( "smmlsr r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL1,"")
1120 TEST_RRR( "smmlsr r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1121
1122 TEST_RRR( "usada8 r0, r",0, VAL1,", r",1, VAL2,", r",2, VAL3,"")
1123 TEST_RRR( "usada8 r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
1124 TEST_RR( "usad8 r0, r",0, VAL1,", r",1, VAL2,"")
1125 TEST_RR( "usad8 r14, r",12,VAL2,", r",10,VAL1,"")
1126
1127 TEST_UNSUPPORTED(__inst_thumb32(0xfb00f010) "") /* Unallocated space */
1128 TEST_UNSUPPORTED(__inst_thumb32(0xfb0fff1f) "") /* Unallocated space */
1129 TEST_UNSUPPORTED(__inst_thumb32(0xfb70f010) "") /* Unallocated space */
1130 TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
1131 TEST_UNSUPPORTED(__inst_thumb32(0xfb700010) "") /* Unallocated space */
1132 TEST_UNSUPPORTED(__inst_thumb32(0xfb7fff1f) "") /* Unallocated space */
1133
1134 TEST_GROUP("Long multiply, long multiply accumulate, and divide")
1135
1136 TEST_RR( "smull r0, r1, r",2, VAL1,", r",3, VAL2,"")
1137 TEST_RR( "smull r7, r8, r",9, VAL2,", r",10, VAL1,"")
1138 TEST_UNSUPPORTED(__inst_thumb32(0xfb89f80a) " @ smull pc, r8, r9, r10");
1139 TEST_UNSUPPORTED(__inst_thumb32(0xfb89d80a) " @ smull sp, r8, r9, r10");
1140 TEST_UNSUPPORTED(__inst_thumb32(0xfb897f0a) " @ smull r7, pc, r9, r10");
1141 TEST_UNSUPPORTED(__inst_thumb32(0xfb897d0a) " @ smull r7, sp, r9, r10");
1142 TEST_UNSUPPORTED(__inst_thumb32(0xfb8f780a) " @ smull r7, r8, pc, r10");
1143 TEST_UNSUPPORTED(__inst_thumb32(0xfb8d780a) " @ smull r7, r8, sp, r10");
1144 TEST_UNSUPPORTED(__inst_thumb32(0xfb89780f) " @ smull r7, r8, r9, pc");
1145 TEST_UNSUPPORTED(__inst_thumb32(0xfb89780d) " @ smull r7, r8, r9, sp");
1146
1147 TEST_RR( "umull r0, r1, r",2, VAL1,", r",3, VAL2,"")
1148 TEST_RR( "umull r7, r8, r",9, VAL2,", r",10, VAL1,"")
1149
1150 TEST_RRRR( "smlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1151 TEST_RRRR( "smlal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1152
1153 TEST_RRRR( "smlalbb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1154 TEST_RRRR( "smlalbb r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1155 TEST_RRRR( "smlalbt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1156 TEST_RRRR( "smlalbt r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1157 TEST_RRRR( "smlaltb r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1158 TEST_RRRR( "smlaltb r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1159 TEST_RRRR( "smlaltt r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1160 TEST_RRRR( "smlaltt r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1161
1162 TEST_RRRR( "smlald r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1163 TEST_RRRR( "smlald r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1164 TEST_RRRR( "smlaldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1165 TEST_RRRR( "smlaldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1166
1167 TEST_RRRR( "smlsld r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1168 TEST_RRRR( "smlsld r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1169 TEST_RRRR( "smlsldx r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1170 TEST_RRRR( "smlsldx r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1171
1172 TEST_RRRR( "umlal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1173 TEST_RRRR( "umlal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1174 TEST_RRRR( "umaal r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
1175 TEST_RRRR( "umaal r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
1176
1177 TEST_GROUP("Coprocessor instructions")
1178
1179 TEST_UNSUPPORTED(__inst_thumb32(0xfc000000) "")
1180 TEST_UNSUPPORTED(__inst_thumb32(0xffffffff) "")
1181
1182 TEST_GROUP("Testing instructions in IT blocks")
1183
1184 TEST_ITBLOCK("sub.w r0, r0")
1185
1186 verbose("\n");
1187}
1188