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1/*
2 * Broadcom specific Advanced Microcontroller Bus
3 * Broadcom USB-core driver (BCMA bus glue)
4 *
5 * Copyright 2011-2015 Hauke Mehrtens <hauke@hauke-m.de>
6 * Copyright 2015 Felix Fietkau <nbd@openwrt.org>
7 *
8 * Based on ssb-ohci driver
9 * Copyright 2007 Michael Buesch <m@bues.ch>
10 *
11 * Derived from the OHCI-PCI driver
12 * Copyright 1999 Roman Weissgaerber
13 * Copyright 2000-2002 David Brownell
14 * Copyright 1999 Linus Torvalds
15 * Copyright 1999 Gregory P. Smith
16 *
17 * Derived from the USBcore related parts of Broadcom-SB
18 * Copyright 2005-2011 Broadcom Corporation
19 *
20 * Licensed under the GNU/GPL. See COPYING for details.
21 */
22#include <linux/bcma/bcma.h>
23#include <linux/delay.h>
24#include <linux/gpio/consumer.h>
25#include <linux/platform_device.h>
26#include <linux/module.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/of_gpio.h>
30#include <linux/usb/ehci_pdriver.h>
31#include <linux/usb/ohci_pdriver.h>
32
33MODULE_AUTHOR("Hauke Mehrtens");
34MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
35MODULE_LICENSE("GPL");
36
37struct bcma_hcd_device {
38 struct bcma_device *core;
39 struct platform_device *ehci_dev;
40 struct platform_device *ohci_dev;
41 struct gpio_desc *gpio_desc;
42};
43
44/* Wait for bitmask in a register to get set or cleared.
45 * timeout is in units of ten-microseconds.
46 */
47static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
48 int timeout)
49{
50 int i;
51 u32 val;
52
53 for (i = 0; i < timeout; i++) {
54 val = bcma_read32(dev, reg);
55 if ((val & bitmask) == bitmask)
56 return 0;
57 udelay(10);
58 }
59
60 return -ETIMEDOUT;
61}
62
63static void bcma_hcd_4716wa(struct bcma_device *dev)
64{
65#ifdef CONFIG_BCMA_DRIVER_MIPS
66 /* Work around for 4716 failures. */
67 if (dev->bus->chipinfo.id == 0x4716) {
68 u32 tmp;
69
70 tmp = bcma_cpu_clock(&dev->bus->drv_mips);
71 if (tmp >= 480000000)
72 tmp = 0x1846b; /* set CDR to 0x11(fast) */
73 else if (tmp == 453000000)
74 tmp = 0x1046b; /* set CDR to 0x10(slow) */
75 else
76 tmp = 0;
77
78 /* Change Shim mdio control reg to fix host not acking at
79 * high frequencies
80 */
81 if (tmp) {
82 bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
83 udelay(500);
84
85 bcma_write32(dev, 0x524, tmp);
86 udelay(500);
87 bcma_write32(dev, 0x524, 0x4ab);
88 udelay(500);
89 bcma_read32(dev, 0x528);
90 bcma_write32(dev, 0x528, 0x80000000);
91 }
92 }
93#endif /* CONFIG_BCMA_DRIVER_MIPS */
94}
95
96/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
97static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
98{
99 u32 tmp;
100
101 /*
102 * USB 2.0 special considerations:
103 *
104 * 1. Since the core supports both OHCI and EHCI functions, it must
105 * only be reset once.
106 *
107 * 2. In addition to the standard SI reset sequence, the Host Control
108 * Register must be programmed to bring the USB core and various
109 * phy components out of reset.
110 */
111 if (!bcma_core_is_enabled(dev)) {
112 bcma_core_enable(dev, 0);
113 mdelay(10);
114 if (dev->id.rev >= 5) {
115 /* Enable Misc PLL */
116 tmp = bcma_read32(dev, 0x1e0);
117 tmp |= 0x100;
118 bcma_write32(dev, 0x1e0, tmp);
119 if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
120 printk(KERN_EMERG "Failed to enable misc PPL!\n");
121
122 /* Take out of resets */
123 bcma_write32(dev, 0x200, 0x4ff);
124 udelay(25);
125 bcma_write32(dev, 0x200, 0x6ff);
126 udelay(25);
127
128 /* Make sure digital and AFE are locked in USB PHY */
129 bcma_write32(dev, 0x524, 0x6b);
130 udelay(50);
131 tmp = bcma_read32(dev, 0x524);
132 udelay(50);
133 bcma_write32(dev, 0x524, 0xab);
134 udelay(50);
135 tmp = bcma_read32(dev, 0x524);
136 udelay(50);
137 bcma_write32(dev, 0x524, 0x2b);
138 udelay(50);
139 tmp = bcma_read32(dev, 0x524);
140 udelay(50);
141 bcma_write32(dev, 0x524, 0x10ab);
142 udelay(50);
143 tmp = bcma_read32(dev, 0x524);
144
145 if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
146 tmp = bcma_read32(dev, 0x528);
147 printk(KERN_EMERG
148 "USB20H mdio_rddata 0x%08x\n", tmp);
149 }
150 bcma_write32(dev, 0x528, 0x80000000);
151 tmp = bcma_read32(dev, 0x314);
152 udelay(265);
153 bcma_write32(dev, 0x200, 0x7ff);
154 udelay(10);
155
156 /* Take USB and HSIC out of non-driving modes */
157 bcma_write32(dev, 0x510, 0);
158 } else {
159 bcma_write32(dev, 0x200, 0x7ff);
160
161 udelay(1);
162 }
163
164 bcma_hcd_4716wa(dev);
165 }
166}
167
168static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
169{
170 struct bcma_device *arm_core;
171 void __iomem *dmu;
172
173 arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
174 if (!arm_core) {
175 dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n");
176 return;
177 }
178
179 dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
180 if (!dmu) {
181 dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n");
182 return;
183 }
184
185 /* Unlock DMU PLL settings */
186 iowrite32(0x0000ea68, dmu + 0x180);
187
188 /* Write USB 2.0 PLL control setting */
189 iowrite32(0x00dd10c3, dmu + 0x164);
190
191 /* Lock DMU PLL settings */
192 iowrite32(0x00000000, dmu + 0x180);
193
194 iounmap(dmu);
195}
196
197static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev)
198{
199 u32 val;
200
201 /*
202 * Delay after PHY initialized to ensure HC is ready to be configured
203 */
204 usleep_range(1000, 2000);
205
206 /* Set packet buffer OUT threshold */
207 val = bcma_read32(dev, 0x94);
208 val &= 0xffff;
209 val |= 0x80 << 16;
210 bcma_write32(dev, 0x94, val);
211
212 /* Enable break memory transfer */
213 val = bcma_read32(dev, 0x9c);
214 val |= 1;
215 bcma_write32(dev, 0x9c, val);
216}
217
218static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
219{
220 bcma_core_enable(dev, 0);
221
222 if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
223 dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
224 if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
225 dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
226 bcma_hcd_init_chip_arm_phy(dev);
227
228 bcma_hcd_init_chip_arm_hc(dev);
229 }
230}
231
232static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
233{
234 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
235
236 if (IS_ERR_OR_NULL(usb_dev->gpio_desc))
237 return;
238
239 gpiod_set_value(usb_dev->gpio_desc, val);
240}
241
242static const struct usb_ehci_pdata ehci_pdata = {
243};
244
245static const struct usb_ohci_pdata ohci_pdata = {
246};
247
248static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
249 const char *name, u32 addr,
250 const void *data,
251 size_t size)
252{
253 struct platform_device *hci_dev;
254 struct resource hci_res[2];
255 int ret;
256
257 memset(hci_res, 0, sizeof(hci_res));
258
259 hci_res[0].start = addr;
260 hci_res[0].end = hci_res[0].start + 0x1000 - 1;
261 hci_res[0].flags = IORESOURCE_MEM;
262
263 hci_res[1].start = dev->irq;
264 hci_res[1].flags = IORESOURCE_IRQ;
265
266 hci_dev = platform_device_alloc(name, 0);
267 if (!hci_dev)
268 return ERR_PTR(-ENOMEM);
269
270 hci_dev->dev.parent = &dev->dev;
271 hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
272
273 ret = platform_device_add_resources(hci_dev, hci_res,
274 ARRAY_SIZE(hci_res));
275 if (ret)
276 goto err_alloc;
277 if (data)
278 ret = platform_device_add_data(hci_dev, data, size);
279 if (ret)
280 goto err_alloc;
281 ret = platform_device_add(hci_dev);
282 if (ret)
283 goto err_alloc;
284
285 return hci_dev;
286
287err_alloc:
288 platform_device_put(hci_dev);
289 return ERR_PTR(ret);
290}
291
292static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
293{
294 struct bcma_device *dev = usb_dev->core;
295 struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
296 u32 ohci_addr;
297 int err;
298
299 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
300 return -EOPNOTSUPP;
301
302 switch (dev->id.id) {
303 case BCMA_CORE_NS_USB20:
304 bcma_hcd_init_chip_arm(dev);
305 break;
306 case BCMA_CORE_USB20_HOST:
307 bcma_hcd_init_chip_mips(dev);
308 break;
309 default:
310 return -ENODEV;
311 }
312
313 /* In AI chips EHCI is addrspace 0, OHCI is 1 */
314 ohci_addr = dev->addr_s[0];
315 if ((chipinfo->id == BCMA_CHIP_ID_BCM5357 ||
316 chipinfo->id == BCMA_CHIP_ID_BCM4749)
317 && chipinfo->rev == 0)
318 ohci_addr = 0x18009000;
319
320 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
321 ohci_addr, &ohci_pdata,
322 sizeof(ohci_pdata));
323 if (IS_ERR(usb_dev->ohci_dev))
324 return PTR_ERR(usb_dev->ohci_dev);
325
326 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
327 dev->addr, &ehci_pdata,
328 sizeof(ehci_pdata));
329 if (IS_ERR(usb_dev->ehci_dev)) {
330 err = PTR_ERR(usb_dev->ehci_dev);
331 goto err_unregister_ohci_dev;
332 }
333
334 return 0;
335
336err_unregister_ohci_dev:
337 platform_device_unregister(usb_dev->ohci_dev);
338 return err;
339}
340
341static int bcma_hcd_probe(struct bcma_device *core)
342{
343 int err;
344 struct bcma_hcd_device *usb_dev;
345
346 /* TODO: Probably need checks here; is the core connected? */
347
348 usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
349 GFP_KERNEL);
350 if (!usb_dev)
351 return -ENOMEM;
352 usb_dev->core = core;
353
354 if (core->dev.of_node)
355 usb_dev->gpio_desc = devm_get_gpiod_from_child(&core->dev, "vcc",
356 &core->dev.of_node->fwnode);
357 if (!IS_ERR_OR_NULL(usb_dev->gpio_desc))
358 gpiod_direction_output(usb_dev->gpio_desc, 1);
359
360 switch (core->id.id) {
361 case BCMA_CORE_USB20_HOST:
362 case BCMA_CORE_NS_USB20:
363 err = bcma_hcd_usb20_init(usb_dev);
364 if (err)
365 return err;
366 break;
367 default:
368 return -ENODEV;
369 }
370
371 bcma_set_drvdata(core, usb_dev);
372 return 0;
373}
374
375static void bcma_hcd_remove(struct bcma_device *dev)
376{
377 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
378 struct platform_device *ohci_dev = usb_dev->ohci_dev;
379 struct platform_device *ehci_dev = usb_dev->ehci_dev;
380
381 if (ohci_dev)
382 platform_device_unregister(ohci_dev);
383 if (ehci_dev)
384 platform_device_unregister(ehci_dev);
385
386 bcma_core_disable(dev, 0);
387}
388
389static void bcma_hcd_shutdown(struct bcma_device *dev)
390{
391 bcma_hci_platform_power_gpio(dev, false);
392 bcma_core_disable(dev, 0);
393}
394
395#ifdef CONFIG_PM
396
397static int bcma_hcd_suspend(struct bcma_device *dev)
398{
399 bcma_hci_platform_power_gpio(dev, false);
400 bcma_core_disable(dev, 0);
401
402 return 0;
403}
404
405static int bcma_hcd_resume(struct bcma_device *dev)
406{
407 bcma_hci_platform_power_gpio(dev, true);
408 bcma_core_enable(dev, 0);
409
410 return 0;
411}
412
413#else /* !CONFIG_PM */
414#define bcma_hcd_suspend NULL
415#define bcma_hcd_resume NULL
416#endif /* CONFIG_PM */
417
418static const struct bcma_device_id bcma_hcd_table[] = {
419 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
420 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
421 {},
422};
423MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
424
425static struct bcma_driver bcma_hcd_driver = {
426 .name = KBUILD_MODNAME,
427 .id_table = bcma_hcd_table,
428 .probe = bcma_hcd_probe,
429 .remove = bcma_hcd_remove,
430 .shutdown = bcma_hcd_shutdown,
431 .suspend = bcma_hcd_suspend,
432 .resume = bcma_hcd_resume,
433};
434
435static int __init bcma_hcd_init(void)
436{
437 return bcma_driver_register(&bcma_hcd_driver);
438}
439module_init(bcma_hcd_init);
440
441static void __exit bcma_hcd_exit(void)
442{
443 bcma_driver_unregister(&bcma_hcd_driver);
444}
445module_exit(bcma_hcd_exit);
1/*
2 * Broadcom specific Advanced Microcontroller Bus
3 * Broadcom USB-core driver (BCMA bus glue)
4 *
5 * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
6 *
7 * Based on ssb-ohci driver
8 * Copyright 2007 Michael Buesch <m@bues.ch>
9 *
10 * Derived from the OHCI-PCI driver
11 * Copyright 1999 Roman Weissgaerber
12 * Copyright 2000-2002 David Brownell
13 * Copyright 1999 Linus Torvalds
14 * Copyright 1999 Gregory P. Smith
15 *
16 * Derived from the USBcore related parts of Broadcom-SB
17 * Copyright 2005-2011 Broadcom Corporation
18 *
19 * Licensed under the GNU/GPL. See COPYING for details.
20 */
21#include <linux/bcma/bcma.h>
22#include <linux/delay.h>
23#include <linux/platform_device.h>
24#include <linux/module.h>
25#include <linux/slab.h>
26#include <linux/usb/ehci_pdriver.h>
27#include <linux/usb/ohci_pdriver.h>
28
29MODULE_AUTHOR("Hauke Mehrtens");
30MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
31MODULE_LICENSE("GPL");
32
33struct bcma_hcd_device {
34 struct platform_device *ehci_dev;
35 struct platform_device *ohci_dev;
36};
37
38/* Wait for bitmask in a register to get set or cleared.
39 * timeout is in units of ten-microseconds.
40 */
41static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
42 int timeout)
43{
44 int i;
45 u32 val;
46
47 for (i = 0; i < timeout; i++) {
48 val = bcma_read32(dev, reg);
49 if ((val & bitmask) == bitmask)
50 return 0;
51 udelay(10);
52 }
53
54 return -ETIMEDOUT;
55}
56
57static void bcma_hcd_4716wa(struct bcma_device *dev)
58{
59#ifdef CONFIG_BCMA_DRIVER_MIPS
60 /* Work around for 4716 failures. */
61 if (dev->bus->chipinfo.id == 0x4716) {
62 u32 tmp;
63
64 tmp = bcma_cpu_clock(&dev->bus->drv_mips);
65 if (tmp >= 480000000)
66 tmp = 0x1846b; /* set CDR to 0x11(fast) */
67 else if (tmp == 453000000)
68 tmp = 0x1046b; /* set CDR to 0x10(slow) */
69 else
70 tmp = 0;
71
72 /* Change Shim mdio control reg to fix host not acking at
73 * high frequencies
74 */
75 if (tmp) {
76 bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
77 udelay(500);
78
79 bcma_write32(dev, 0x524, tmp);
80 udelay(500);
81 bcma_write32(dev, 0x524, 0x4ab);
82 udelay(500);
83 bcma_read32(dev, 0x528);
84 bcma_write32(dev, 0x528, 0x80000000);
85 }
86 }
87#endif /* CONFIG_BCMA_DRIVER_MIPS */
88}
89
90/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
91static void bcma_hcd_init_chip(struct bcma_device *dev)
92{
93 u32 tmp;
94
95 /*
96 * USB 2.0 special considerations:
97 *
98 * 1. Since the core supports both OHCI and EHCI functions, it must
99 * only be reset once.
100 *
101 * 2. In addition to the standard SI reset sequence, the Host Control
102 * Register must be programmed to bring the USB core and various
103 * phy components out of reset.
104 */
105 if (!bcma_core_is_enabled(dev)) {
106 bcma_core_enable(dev, 0);
107 mdelay(10);
108 if (dev->id.rev >= 5) {
109 /* Enable Misc PLL */
110 tmp = bcma_read32(dev, 0x1e0);
111 tmp |= 0x100;
112 bcma_write32(dev, 0x1e0, tmp);
113 if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
114 printk(KERN_EMERG "Failed to enable misc PPL!\n");
115
116 /* Take out of resets */
117 bcma_write32(dev, 0x200, 0x4ff);
118 udelay(25);
119 bcma_write32(dev, 0x200, 0x6ff);
120 udelay(25);
121
122 /* Make sure digital and AFE are locked in USB PHY */
123 bcma_write32(dev, 0x524, 0x6b);
124 udelay(50);
125 tmp = bcma_read32(dev, 0x524);
126 udelay(50);
127 bcma_write32(dev, 0x524, 0xab);
128 udelay(50);
129 tmp = bcma_read32(dev, 0x524);
130 udelay(50);
131 bcma_write32(dev, 0x524, 0x2b);
132 udelay(50);
133 tmp = bcma_read32(dev, 0x524);
134 udelay(50);
135 bcma_write32(dev, 0x524, 0x10ab);
136 udelay(50);
137 tmp = bcma_read32(dev, 0x524);
138
139 if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
140 tmp = bcma_read32(dev, 0x528);
141 printk(KERN_EMERG
142 "USB20H mdio_rddata 0x%08x\n", tmp);
143 }
144 bcma_write32(dev, 0x528, 0x80000000);
145 tmp = bcma_read32(dev, 0x314);
146 udelay(265);
147 bcma_write32(dev, 0x200, 0x7ff);
148 udelay(10);
149
150 /* Take USB and HSIC out of non-driving modes */
151 bcma_write32(dev, 0x510, 0);
152 } else {
153 bcma_write32(dev, 0x200, 0x7ff);
154
155 udelay(1);
156 }
157
158 bcma_hcd_4716wa(dev);
159 }
160}
161
162static const struct usb_ehci_pdata ehci_pdata = {
163};
164
165static const struct usb_ohci_pdata ohci_pdata = {
166};
167
168static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, bool ohci, u32 addr)
169{
170 struct platform_device *hci_dev;
171 struct resource hci_res[2];
172 int ret = -ENOMEM;
173
174 memset(hci_res, 0, sizeof(hci_res));
175
176 hci_res[0].start = addr;
177 hci_res[0].end = hci_res[0].start + 0x1000 - 1;
178 hci_res[0].flags = IORESOURCE_MEM;
179
180 hci_res[1].start = dev->irq;
181 hci_res[1].flags = IORESOURCE_IRQ;
182
183 hci_dev = platform_device_alloc(ohci ? "ohci-platform" :
184 "ehci-platform" , 0);
185 if (!hci_dev)
186 return NULL;
187
188 hci_dev->dev.parent = &dev->dev;
189 hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
190
191 ret = platform_device_add_resources(hci_dev, hci_res,
192 ARRAY_SIZE(hci_res));
193 if (ret)
194 goto err_alloc;
195 if (ohci)
196 ret = platform_device_add_data(hci_dev, &ohci_pdata,
197 sizeof(ohci_pdata));
198 else
199 ret = platform_device_add_data(hci_dev, &ehci_pdata,
200 sizeof(ehci_pdata));
201 if (ret)
202 goto err_alloc;
203 ret = platform_device_add(hci_dev);
204 if (ret)
205 goto err_alloc;
206
207 return hci_dev;
208
209err_alloc:
210 platform_device_put(hci_dev);
211 return ERR_PTR(ret);
212}
213
214static int bcma_hcd_probe(struct bcma_device *dev)
215{
216 int err;
217 u16 chipid_top;
218 u32 ohci_addr;
219 struct bcma_hcd_device *usb_dev;
220 struct bcma_chipinfo *chipinfo;
221
222 chipinfo = &dev->bus->chipinfo;
223 /* USBcores are only connected on embedded devices. */
224 chipid_top = (chipinfo->id & 0xFF00);
225 if (chipid_top != 0x4700 && chipid_top != 0x5300)
226 return -ENODEV;
227
228 /* TODO: Probably need checks here; is the core connected? */
229
230 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
231 return -EOPNOTSUPP;
232
233 usb_dev = kzalloc(sizeof(struct bcma_hcd_device), GFP_KERNEL);
234 if (!usb_dev)
235 return -ENOMEM;
236
237 bcma_hcd_init_chip(dev);
238
239 /* In AI chips EHCI is addrspace 0, OHCI is 1 */
240 ohci_addr = dev->addr1;
241 if ((chipinfo->id == 0x5357 || chipinfo->id == 0x4749)
242 && chipinfo->rev == 0)
243 ohci_addr = 0x18009000;
244
245 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, true, ohci_addr);
246 if (IS_ERR(usb_dev->ohci_dev)) {
247 err = PTR_ERR(usb_dev->ohci_dev);
248 goto err_free_usb_dev;
249 }
250
251 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, false, dev->addr);
252 if (IS_ERR(usb_dev->ehci_dev)) {
253 err = PTR_ERR(usb_dev->ehci_dev);
254 goto err_unregister_ohci_dev;
255 }
256
257 bcma_set_drvdata(dev, usb_dev);
258 return 0;
259
260err_unregister_ohci_dev:
261 platform_device_unregister(usb_dev->ohci_dev);
262err_free_usb_dev:
263 kfree(usb_dev);
264 return err;
265}
266
267static void bcma_hcd_remove(struct bcma_device *dev)
268{
269 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
270 struct platform_device *ohci_dev = usb_dev->ohci_dev;
271 struct platform_device *ehci_dev = usb_dev->ehci_dev;
272
273 if (ohci_dev)
274 platform_device_unregister(ohci_dev);
275 if (ehci_dev)
276 platform_device_unregister(ehci_dev);
277
278 bcma_core_disable(dev, 0);
279}
280
281static void bcma_hcd_shutdown(struct bcma_device *dev)
282{
283 bcma_core_disable(dev, 0);
284}
285
286#ifdef CONFIG_PM
287
288static int bcma_hcd_suspend(struct bcma_device *dev)
289{
290 bcma_core_disable(dev, 0);
291
292 return 0;
293}
294
295static int bcma_hcd_resume(struct bcma_device *dev)
296{
297 bcma_core_enable(dev, 0);
298
299 return 0;
300}
301
302#else /* !CONFIG_PM */
303#define bcma_hcd_suspend NULL
304#define bcma_hcd_resume NULL
305#endif /* CONFIG_PM */
306
307static const struct bcma_device_id bcma_hcd_table[] = {
308 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
309 BCMA_CORETABLE_END
310};
311MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
312
313static struct bcma_driver bcma_hcd_driver = {
314 .name = KBUILD_MODNAME,
315 .id_table = bcma_hcd_table,
316 .probe = bcma_hcd_probe,
317 .remove = bcma_hcd_remove,
318 .shutdown = bcma_hcd_shutdown,
319 .suspend = bcma_hcd_suspend,
320 .resume = bcma_hcd_resume,
321};
322
323static int __init bcma_hcd_init(void)
324{
325 return bcma_driver_register(&bcma_hcd_driver);
326}
327module_init(bcma_hcd_init);
328
329static void __exit bcma_hcd_exit(void)
330{
331 bcma_driver_unregister(&bcma_hcd_driver);
332}
333module_exit(bcma_hcd_exit);