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1/*
2 * lpc_sch.c - LPC interface for Intel Poulsbo SCH
3 *
4 * LPC bridge function of the Intel SCH contains many other
5 * functional units, such as Interrupt controllers, Timers,
6 * Power Management, System Management, GPIO, RTC, and LPC
7 * Configuration Registers.
8 *
9 * Copyright (c) 2010 CompuLab Ltd
10 * Copyright (c) 2014 Intel Corp.
11 * Author: Denis Turischev <denis@compulab.co.il>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License 2 as published
15 * by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/errno.h>
26#include <linux/acpi.h>
27#include <linux/pci.h>
28#include <linux/mfd/core.h>
29
30#define SMBASE 0x40
31#define SMBUS_IO_SIZE 64
32
33#define GPIOBASE 0x44
34#define GPIO_IO_SIZE 64
35#define GPIO_IO_SIZE_CENTERTON 128
36
37/* Intel Quark X1000 GPIO IRQ Number */
38#define GPIO_IRQ_QUARK_X1000 9
39
40#define WDTBASE 0x84
41#define WDT_IO_SIZE 64
42
43enum sch_chipsets {
44 LPC_SCH = 0, /* Intel Poulsbo SCH */
45 LPC_ITC, /* Intel Tunnel Creek */
46 LPC_CENTERTON, /* Intel Centerton */
47 LPC_QUARK_X1000, /* Intel Quark X1000 */
48};
49
50struct lpc_sch_info {
51 unsigned int io_size_smbus;
52 unsigned int io_size_gpio;
53 unsigned int io_size_wdt;
54 int irq_gpio;
55};
56
57static struct lpc_sch_info sch_chipset_info[] = {
58 [LPC_SCH] = {
59 .io_size_smbus = SMBUS_IO_SIZE,
60 .io_size_gpio = GPIO_IO_SIZE,
61 .irq_gpio = -1,
62 },
63 [LPC_ITC] = {
64 .io_size_smbus = SMBUS_IO_SIZE,
65 .io_size_gpio = GPIO_IO_SIZE,
66 .io_size_wdt = WDT_IO_SIZE,
67 .irq_gpio = -1,
68 },
69 [LPC_CENTERTON] = {
70 .io_size_smbus = SMBUS_IO_SIZE,
71 .io_size_gpio = GPIO_IO_SIZE_CENTERTON,
72 .io_size_wdt = WDT_IO_SIZE,
73 .irq_gpio = -1,
74 },
75 [LPC_QUARK_X1000] = {
76 .io_size_gpio = GPIO_IO_SIZE,
77 .irq_gpio = GPIO_IRQ_QUARK_X1000,
78 .io_size_wdt = WDT_IO_SIZE,
79 },
80};
81
82static const struct pci_device_id lpc_sch_ids[] = {
83 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
84 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
85 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
86 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
87 { 0, }
88};
89MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
90
91#define LPC_NO_RESOURCE 1
92#define LPC_SKIP_RESOURCE 2
93
94static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
95 struct resource *res, int size)
96{
97 unsigned int base_addr_cfg;
98 unsigned short base_addr;
99
100 if (size == 0)
101 return LPC_NO_RESOURCE;
102
103 pci_read_config_dword(pdev, where, &base_addr_cfg);
104 base_addr = 0;
105 if (!(base_addr_cfg & (1 << 31)))
106 dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
107 name);
108 else
109 base_addr = (unsigned short)base_addr_cfg;
110
111 if (base_addr == 0) {
112 dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
113 return LPC_SKIP_RESOURCE;
114 }
115
116 res->start = base_addr;
117 res->end = base_addr + size - 1;
118 res->flags = IORESOURCE_IO;
119
120 return 0;
121}
122
123static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
124 const char *name, int size, int irq,
125 int id, struct mfd_cell *cell)
126{
127 struct resource *res;
128 int ret;
129
130 res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
131 if (!res)
132 return -ENOMEM;
133
134 ret = lpc_sch_get_io(pdev, where, name, res, size);
135 if (ret)
136 return ret;
137
138 memset(cell, 0, sizeof(*cell));
139
140 cell->name = name;
141 cell->resources = res;
142 cell->num_resources = 1;
143 cell->ignore_resource_conflicts = true;
144 cell->id = id;
145
146 /* Check if we need to add an IRQ resource */
147 if (irq < 0)
148 return 0;
149
150 res++;
151
152 res->start = irq;
153 res->end = irq;
154 res->flags = IORESOURCE_IRQ;
155
156 cell->num_resources++;
157
158 return 0;
159}
160
161static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
162{
163 struct mfd_cell lpc_sch_cells[3];
164 struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
165 unsigned int cells = 0;
166 int ret;
167
168 ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
169 info->io_size_smbus, -1,
170 id->device, &lpc_sch_cells[cells]);
171 if (ret < 0)
172 return ret;
173 if (ret == 0)
174 cells++;
175
176 ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
177 info->io_size_gpio, info->irq_gpio,
178 id->device, &lpc_sch_cells[cells]);
179 if (ret < 0)
180 return ret;
181 if (ret == 0)
182 cells++;
183
184 ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
185 info->io_size_wdt, -1,
186 id->device, &lpc_sch_cells[cells]);
187 if (ret < 0)
188 return ret;
189 if (ret == 0)
190 cells++;
191
192 if (cells == 0) {
193 dev_err(&dev->dev, "All decode registers disabled.\n");
194 return -ENODEV;
195 }
196
197 return mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
198}
199
200static void lpc_sch_remove(struct pci_dev *dev)
201{
202 mfd_remove_devices(&dev->dev);
203}
204
205static struct pci_driver lpc_sch_driver = {
206 .name = "lpc_sch",
207 .id_table = lpc_sch_ids,
208 .probe = lpc_sch_probe,
209 .remove = lpc_sch_remove,
210};
211
212module_pci_driver(lpc_sch_driver);
213
214MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
215MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
216MODULE_LICENSE("GPL");
1/*
2 * lpc_sch.c - LPC interface for Intel Poulsbo SCH
3 *
4 * LPC bridge function of the Intel SCH contains many other
5 * functional units, such as Interrupt controllers, Timers,
6 * Power Management, System Management, GPIO, RTC, and LPC
7 * Configuration Registers.
8 *
9 * Copyright (c) 2010 CompuLab Ltd
10 * Author: Denis Turischev <denis@compulab.co.il>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License 2 as published
14 * by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/errno.h>
29#include <linux/acpi.h>
30#include <linux/pci.h>
31#include <linux/mfd/core.h>
32
33#define SMBASE 0x40
34#define SMBUS_IO_SIZE 64
35
36#define GPIOBASE 0x44
37#define GPIO_IO_SIZE 64
38#define GPIO_IO_SIZE_CENTERTON 128
39
40#define WDTBASE 0x84
41#define WDT_IO_SIZE 64
42
43static struct resource smbus_sch_resource = {
44 .flags = IORESOURCE_IO,
45};
46
47static struct resource gpio_sch_resource = {
48 .flags = IORESOURCE_IO,
49};
50
51static struct resource wdt_sch_resource = {
52 .flags = IORESOURCE_IO,
53};
54
55static struct mfd_cell lpc_sch_cells[3];
56
57static struct mfd_cell isch_smbus_cell = {
58 .name = "isch_smbus",
59 .num_resources = 1,
60 .resources = &smbus_sch_resource,
61 .ignore_resource_conflicts = true,
62};
63
64static struct mfd_cell sch_gpio_cell = {
65 .name = "sch_gpio",
66 .num_resources = 1,
67 .resources = &gpio_sch_resource,
68 .ignore_resource_conflicts = true,
69};
70
71static struct mfd_cell wdt_sch_cell = {
72 .name = "ie6xx_wdt",
73 .num_resources = 1,
74 .resources = &wdt_sch_resource,
75 .ignore_resource_conflicts = true,
76};
77
78static const struct pci_device_id lpc_sch_ids[] = {
79 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
80 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
81 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
82 { 0, }
83};
84MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
85
86static int lpc_sch_probe(struct pci_dev *dev,
87 const struct pci_device_id *id)
88{
89 unsigned int base_addr_cfg;
90 unsigned short base_addr;
91 int i, cells = 0;
92 int ret;
93
94 pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
95 base_addr = 0;
96 if (!(base_addr_cfg & (1 << 31)))
97 dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
98 else
99 base_addr = (unsigned short)base_addr_cfg;
100
101 if (base_addr == 0) {
102 dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
103 } else {
104 lpc_sch_cells[cells++] = isch_smbus_cell;
105 smbus_sch_resource.start = base_addr;
106 smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
107 }
108
109 pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
110 base_addr = 0;
111 if (!(base_addr_cfg & (1 << 31)))
112 dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
113 else
114 base_addr = (unsigned short)base_addr_cfg;
115
116 if (base_addr == 0) {
117 dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
118 } else {
119 lpc_sch_cells[cells++] = sch_gpio_cell;
120 gpio_sch_resource.start = base_addr;
121 if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
122 gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
123 else
124 gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
125 }
126
127 if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
128 || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
129 pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
130 base_addr = 0;
131 if (!(base_addr_cfg & (1 << 31)))
132 dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
133 else
134 base_addr = (unsigned short)base_addr_cfg;
135 if (base_addr == 0)
136 dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
137 else {
138 lpc_sch_cells[cells++] = wdt_sch_cell;
139 wdt_sch_resource.start = base_addr;
140 wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
141 }
142 }
143
144 if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
145 dev_err(&dev->dev, "Cell count exceeds array size");
146 return -ENODEV;
147 }
148
149 if (cells == 0) {
150 dev_err(&dev->dev, "All decode registers disabled.\n");
151 return -ENODEV;
152 }
153
154 for (i = 0; i < cells; i++)
155 lpc_sch_cells[i].id = id->device;
156
157 ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
158 if (ret)
159 mfd_remove_devices(&dev->dev);
160
161 return ret;
162}
163
164static void lpc_sch_remove(struct pci_dev *dev)
165{
166 mfd_remove_devices(&dev->dev);
167}
168
169static struct pci_driver lpc_sch_driver = {
170 .name = "lpc_sch",
171 .id_table = lpc_sch_ids,
172 .probe = lpc_sch_probe,
173 .remove = lpc_sch_remove,
174};
175
176module_pci_driver(lpc_sch_driver);
177
178MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
179MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
180MODULE_LICENSE("GPL");