1/*
  2 * Tegra host1x Interrupt Management
  3 *
  4 * Copyright (C) 2010 Google, Inc.
  5 * Copyright (c) 2010-2013, NVIDIA Corporation.
  6 *
  7 * This program is free software; you can redistribute it and/or modify it
  8 * under the terms and conditions of the GNU General Public License,
  9 * version 2, as published by the Free Software Foundation.
 10 *
 11 * This program is distributed in the hope it will be useful, but WITHOUT
 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 14 * more details.
 15 *
 16 * You should have received a copy of the GNU General Public License
 17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 18 */
 19
 20#include <linux/interrupt.h>
 21#include <linux/irq.h>
 22#include <linux/io.h>
 23
 24#include "../intr.h"
 25#include "../dev.h"
 26
 27/*
 28 * Sync point threshold interrupt service function
 29 * Handles sync point threshold triggers, in interrupt context
 30 */
 31static void host1x_intr_syncpt_handle(struct host1x_syncpt *syncpt)
 32{
 33	unsigned int id = syncpt->id;
 34	struct host1x *host = syncpt->host;
 35
 36	host1x_sync_writel(host, BIT_MASK(id),
 37		HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(BIT_WORD(id)));
 38	host1x_sync_writel(host, BIT_MASK(id),
 39		HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(BIT_WORD(id)));
 40
 41	queue_work(host->intr_wq, &syncpt->intr.work);
 42}
 43
 44static irqreturn_t syncpt_thresh_isr(int irq, void *dev_id)
 45{
 46	struct host1x *host = dev_id;
 47	unsigned long reg;
 48	int i, id;
 49
 50	for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); i++) {
 51		reg = host1x_sync_readl(host,
 52			HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i));
 53		for_each_set_bit(id, &reg, BITS_PER_LONG) {
 54			struct host1x_syncpt *syncpt =
 55				host->syncpt + (i * BITS_PER_LONG + id);
 56			host1x_intr_syncpt_handle(syncpt);
 57		}
 58	}
 59
 60	return IRQ_HANDLED;
 61}
 62
 63static void _host1x_intr_disable_all_syncpt_intrs(struct host1x *host)
 64{
 65	u32 i;
 66
 67	for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); ++i) {
 68		host1x_sync_writel(host, 0xffffffffu,
 69			HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(i));
 70		host1x_sync_writel(host, 0xffffffffu,
 71			HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i));
 72	}
 73}
 74
 75static int _host1x_intr_init_host_sync(struct host1x *host, u32 cpm,
 76	void (*syncpt_thresh_work)(struct work_struct *))
 77{
 78	int i, err;
 79
 80	host1x_hw_intr_disable_all_syncpt_intrs(host);
 81
 82	for (i = 0; i < host->info->nb_pts; i++)
 83		INIT_WORK(&host->syncpt[i].intr.work, syncpt_thresh_work);
 84
 85	err = devm_request_irq(host->dev, host->intr_syncpt_irq,
 86			       syncpt_thresh_isr, IRQF_SHARED,
 87			       "host1x_syncpt", host);
 88	if (IS_ERR_VALUE(err)) {
 89		WARN_ON(1);
 90		return err;
 91	}
 92
 93	/* disable the ip_busy_timeout. this prevents write drops */
 94	host1x_sync_writel(host, 0, HOST1X_SYNC_IP_BUSY_TIMEOUT);
 95
 96	/*
 97	 * increase the auto-ack timout to the maximum value. 2d will hang
 98	 * otherwise on Tegra2.
 99	 */
100	host1x_sync_writel(host, 0xff, HOST1X_SYNC_CTXSW_TIMEOUT_CFG);
101
102	/* update host clocks per usec */
103	host1x_sync_writel(host, cpm, HOST1X_SYNC_USEC_CLK);
104
105	return 0;
106}
107
108static void _host1x_intr_set_syncpt_threshold(struct host1x *host,
109	u32 id, u32 thresh)
110{
111	host1x_sync_writel(host, thresh, HOST1X_SYNC_SYNCPT_INT_THRESH(id));
112}
113
114static void _host1x_intr_enable_syncpt_intr(struct host1x *host, u32 id)
115{
116	host1x_sync_writel(host, BIT_MASK(id),
117		HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(BIT_WORD(id)));
118}
119
120static void _host1x_intr_disable_syncpt_intr(struct host1x *host, u32 id)
121{
122	host1x_sync_writel(host, BIT_MASK(id),
123		HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(BIT_WORD(id)));
124	host1x_sync_writel(host, BIT_MASK(id),
125		HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(BIT_WORD(id)));
126}
127
128static int _host1x_free_syncpt_irq(struct host1x *host)
129{
130	devm_free_irq(host->dev, host->intr_syncpt_irq, host);
131	flush_workqueue(host->intr_wq);
132	return 0;
133}
134
135static const struct host1x_intr_ops host1x_intr_ops = {
136	.init_host_sync = _host1x_intr_init_host_sync,
137	.set_syncpt_threshold = _host1x_intr_set_syncpt_threshold,
138	.enable_syncpt_intr = _host1x_intr_enable_syncpt_intr,
139	.disable_syncpt_intr = _host1x_intr_disable_syncpt_intr,
140	.disable_all_syncpt_intrs = _host1x_intr_disable_all_syncpt_intrs,
141	.free_syncpt_irq = _host1x_free_syncpt_irq,
142};