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1/* Included from asm/pgtable-*.h only ! */
2
3/*
4 * Some bits are only used on some cpu families... Make sure that all
5 * the undefined gets a sensible default
6 */
7#ifndef _PAGE_HASHPTE
8#define _PAGE_HASHPTE 0
9#endif
10#ifndef _PAGE_SHARED
11#define _PAGE_SHARED 0
12#endif
13#ifndef _PAGE_HWWRITE
14#define _PAGE_HWWRITE 0
15#endif
16#ifndef _PAGE_EXEC
17#define _PAGE_EXEC 0
18#endif
19#ifndef _PAGE_ENDIAN
20#define _PAGE_ENDIAN 0
21#endif
22#ifndef _PAGE_COHERENT
23#define _PAGE_COHERENT 0
24#endif
25#ifndef _PAGE_WRITETHRU
26#define _PAGE_WRITETHRU 0
27#endif
28#ifndef _PAGE_4K_PFN
29#define _PAGE_4K_PFN 0
30#endif
31#ifndef _PAGE_SAO
32#define _PAGE_SAO 0
33#endif
34#ifndef _PAGE_PSIZE
35#define _PAGE_PSIZE 0
36#endif
37/* _PAGE_RO and _PAGE_RW shall not be defined at the same time */
38#ifndef _PAGE_RO
39#define _PAGE_RO 0
40#else
41#define _PAGE_RW 0
42#endif
43
44#ifndef _PAGE_PTE
45#define _PAGE_PTE 0
46#endif
47
48#ifndef _PMD_PRESENT_MASK
49#define _PMD_PRESENT_MASK _PMD_PRESENT
50#endif
51#ifndef _PMD_SIZE
52#define _PMD_SIZE 0
53#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
54#endif
55#ifndef _PAGE_KERNEL_RO
56#define _PAGE_KERNEL_RO (_PAGE_RO)
57#endif
58#ifndef _PAGE_KERNEL_ROX
59#define _PAGE_KERNEL_ROX (_PAGE_EXEC | _PAGE_RO)
60#endif
61#ifndef _PAGE_KERNEL_RW
62#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
63#endif
64#ifndef _PAGE_KERNEL_RWX
65#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
66#endif
67#ifndef _PAGE_HPTEFLAGS
68#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
69#endif
70#ifndef _PTE_NONE_MASK
71#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
72#endif
73
74/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
75 * kernel without large page PMD support
76 */
77#ifndef __ASSEMBLY__
78extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
79#endif /* __ASSEMBLY__ */
80
81/* Location of the PFN in the PTE. Most 32-bit platforms use the same
82 * as _PAGE_SHIFT here (ie, naturally aligned).
83 * Platform who don't just pre-define the value so we don't override it here
84 */
85#ifndef PTE_RPN_SHIFT
86#define PTE_RPN_SHIFT (PAGE_SHIFT)
87#endif
88
89/* The mask convered by the RPN must be a ULL on 32-bit platforms with
90 * 64-bit PTEs
91 */
92#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
93#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
94#else
95#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
96#endif
97
98/* _PAGE_CHG_MASK masks of bits that are to be preserved across
99 * pgprot changes
100 */
101#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
102 _PAGE_ACCESSED | _PAGE_SPECIAL)
103
104/* Mask of bits returned by pte_pgprot() */
105#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
106 _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
107 _PAGE_USER | _PAGE_ACCESSED | _PAGE_RO | \
108 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
109
110/*
111 * We define 2 sets of base prot bits, one for basic pages (ie,
112 * cacheable kernel and user pages) and one for non cacheable
113 * pages. We always set _PAGE_COHERENT when SMP is enabled or
114 * the processor might need it for DMA coherency.
115 */
116#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
117#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \
118 defined(CONFIG_PPC_E500MC)
119#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
120#else
121#define _PAGE_BASE (_PAGE_BASE_NC)
122#endif
123
124/* Permission masks used to generate the __P and __S table,
125 *
126 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
127 *
128 * Write permissions imply read permissions for now (we could make write-only
129 * pages on BookE but we don't bother for now). Execute permission control is
130 * possible on platforms that define _PAGE_EXEC
131 *
132 * Note due to the way vm flags are laid out, the bits are XWR
133 */
134#define PAGE_NONE __pgprot(_PAGE_BASE)
135#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
136#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | \
137 _PAGE_EXEC)
138#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO)
139#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
140 _PAGE_EXEC)
141#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO)
142#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
143 _PAGE_EXEC)
144
145#define __P000 PAGE_NONE
146#define __P001 PAGE_READONLY
147#define __P010 PAGE_COPY
148#define __P011 PAGE_COPY
149#define __P100 PAGE_READONLY_X
150#define __P101 PAGE_READONLY_X
151#define __P110 PAGE_COPY_X
152#define __P111 PAGE_COPY_X
153
154#define __S000 PAGE_NONE
155#define __S001 PAGE_READONLY
156#define __S010 PAGE_SHARED
157#define __S011 PAGE_SHARED
158#define __S100 PAGE_READONLY_X
159#define __S101 PAGE_READONLY_X
160#define __S110 PAGE_SHARED_X
161#define __S111 PAGE_SHARED_X
162
163/* Permission masks used for kernel mappings */
164#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
165#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
166 _PAGE_NO_CACHE)
167#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
168 _PAGE_NO_CACHE | _PAGE_GUARDED)
169#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
170#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
171#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
172
173/* Protection used for kernel text. We want the debuggers to be able to
174 * set breakpoints anywhere, so don't write protect the kernel text
175 * on platforms where such control is possible.
176 */
177#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
178 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
179#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
180#else
181#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
182#endif
183
184/* Make modules code happy. We don't set RO yet */
185#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
186
187/*
188 * Don't just check for any non zero bits in __PAGE_USER, since for book3e
189 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
190 * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
191 */
192#define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER)
193
194/* Advertise special mapping type for AGP */
195#define PAGE_AGP (PAGE_KERNEL_NC)
196#define HAVE_PAGE_AGP
197
198/* Advertise support for _PAGE_SPECIAL */
199#define __HAVE_ARCH_PTE_SPECIAL
200
1/* Included from asm/pgtable-*.h only ! */
2
3/*
4 * Some bits are only used on some cpu families... Make sure that all
5 * the undefined gets a sensible default
6 */
7#ifndef _PAGE_HASHPTE
8#define _PAGE_HASHPTE 0
9#endif
10#ifndef _PAGE_SHARED
11#define _PAGE_SHARED 0
12#endif
13#ifndef _PAGE_HWWRITE
14#define _PAGE_HWWRITE 0
15#endif
16#ifndef _PAGE_EXEC
17#define _PAGE_EXEC 0
18#endif
19#ifndef _PAGE_ENDIAN
20#define _PAGE_ENDIAN 0
21#endif
22#ifndef _PAGE_COHERENT
23#define _PAGE_COHERENT 0
24#endif
25#ifndef _PAGE_WRITETHRU
26#define _PAGE_WRITETHRU 0
27#endif
28#ifndef _PAGE_4K_PFN
29#define _PAGE_4K_PFN 0
30#endif
31#ifndef _PAGE_SAO
32#define _PAGE_SAO 0
33#endif
34#ifndef _PAGE_PSIZE
35#define _PAGE_PSIZE 0
36#endif
37#ifndef _PMD_PRESENT_MASK
38#define _PMD_PRESENT_MASK _PMD_PRESENT
39#endif
40#ifndef _PMD_SIZE
41#define _PMD_SIZE 0
42#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
43#endif
44#ifndef _PAGE_KERNEL_RO
45#define _PAGE_KERNEL_RO 0
46#endif
47#ifndef _PAGE_KERNEL_ROX
48#define _PAGE_KERNEL_ROX (_PAGE_EXEC)
49#endif
50#ifndef _PAGE_KERNEL_RW
51#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
52#endif
53#ifndef _PAGE_KERNEL_RWX
54#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
55#endif
56#ifndef _PAGE_HPTEFLAGS
57#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
58#endif
59#ifndef _PTE_NONE_MASK
60#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
61#endif
62
63/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
64 * kernel without large page PMD support
65 */
66#ifndef __ASSEMBLY__
67extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
68#endif /* __ASSEMBLY__ */
69
70/* Location of the PFN in the PTE. Most 32-bit platforms use the same
71 * as _PAGE_SHIFT here (ie, naturally aligned).
72 * Platform who don't just pre-define the value so we don't override it here
73 */
74#ifndef PTE_RPN_SHIFT
75#define PTE_RPN_SHIFT (PAGE_SHIFT)
76#endif
77
78/* The mask convered by the RPN must be a ULL on 32-bit platforms with
79 * 64-bit PTEs
80 */
81#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
82#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
83#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
84#else
85#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
86#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
87#endif
88
89/* _PAGE_CHG_MASK masks of bits that are to be preserved across
90 * pgprot changes
91 */
92#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
93 _PAGE_ACCESSED | _PAGE_SPECIAL)
94
95/* Mask of bits returned by pte_pgprot() */
96#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
97 _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
98 _PAGE_USER | _PAGE_ACCESSED | \
99 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
100
101/*
102 * We define 2 sets of base prot bits, one for basic pages (ie,
103 * cacheable kernel and user pages) and one for non cacheable
104 * pages. We always set _PAGE_COHERENT when SMP is enabled or
105 * the processor might need it for DMA coherency.
106 */
107#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
108#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
109#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
110#else
111#define _PAGE_BASE (_PAGE_BASE_NC)
112#endif
113
114/* Permission masks used to generate the __P and __S table,
115 *
116 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
117 *
118 * Write permissions imply read permissions for now (we could make write-only
119 * pages on BookE but we don't bother for now). Execute permission control is
120 * possible on platforms that define _PAGE_EXEC
121 *
122 * Note due to the way vm flags are laid out, the bits are XWR
123 */
124#define PAGE_NONE __pgprot(_PAGE_BASE)
125#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
126#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
127#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
128#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
129#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
130#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
131
132#define __P000 PAGE_NONE
133#define __P001 PAGE_READONLY
134#define __P010 PAGE_COPY
135#define __P011 PAGE_COPY
136#define __P100 PAGE_READONLY_X
137#define __P101 PAGE_READONLY_X
138#define __P110 PAGE_COPY_X
139#define __P111 PAGE_COPY_X
140
141#define __S000 PAGE_NONE
142#define __S001 PAGE_READONLY
143#define __S010 PAGE_SHARED
144#define __S011 PAGE_SHARED
145#define __S100 PAGE_READONLY_X
146#define __S101 PAGE_READONLY_X
147#define __S110 PAGE_SHARED_X
148#define __S111 PAGE_SHARED_X
149
150/* Permission masks used for kernel mappings */
151#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
152#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
153 _PAGE_NO_CACHE)
154#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
155 _PAGE_NO_CACHE | _PAGE_GUARDED)
156#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
157#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
158#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
159
160/* Protection used for kernel text. We want the debuggers to be able to
161 * set breakpoints anywhere, so don't write protect the kernel text
162 * on platforms where such control is possible.
163 */
164#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
165 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
166#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
167#else
168#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
169#endif
170
171/* Make modules code happy. We don't set RO yet */
172#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
173
174/*
175 * Don't just check for any non zero bits in __PAGE_USER, since for book3e
176 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
177 * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
178 */
179#define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER)
180
181/* Advertise special mapping type for AGP */
182#define PAGE_AGP (PAGE_KERNEL_NC)
183#define HAVE_PAGE_AGP
184
185/* Advertise support for _PAGE_SPECIAL */
186#define __HAVE_ARCH_PTE_SPECIAL
187