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1/*
2 * Based on arch/arm/kernel/setup.c
3 *
4 * Copyright (C) 1995-2001 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/acpi.h>
21#include <linux/export.h>
22#include <linux/kernel.h>
23#include <linux/stddef.h>
24#include <linux/ioport.h>
25#include <linux/delay.h>
26#include <linux/utsname.h>
27#include <linux/initrd.h>
28#include <linux/console.h>
29#include <linux/cache.h>
30#include <linux/bootmem.h>
31#include <linux/screen_info.h>
32#include <linux/init.h>
33#include <linux/kexec.h>
34#include <linux/crash_dump.h>
35#include <linux/root_dev.h>
36#include <linux/cpu.h>
37#include <linux/interrupt.h>
38#include <linux/smp.h>
39#include <linux/fs.h>
40#include <linux/proc_fs.h>
41#include <linux/memblock.h>
42#include <linux/of_iommu.h>
43#include <linux/of_fdt.h>
44#include <linux/of_platform.h>
45#include <linux/efi.h>
46#include <linux/psci.h>
47
48#include <asm/acpi.h>
49#include <asm/fixmap.h>
50#include <asm/cpu.h>
51#include <asm/cputype.h>
52#include <asm/elf.h>
53#include <asm/cpufeature.h>
54#include <asm/cpu_ops.h>
55#include <asm/kasan.h>
56#include <asm/sections.h>
57#include <asm/setup.h>
58#include <asm/smp_plat.h>
59#include <asm/cacheflush.h>
60#include <asm/tlbflush.h>
61#include <asm/traps.h>
62#include <asm/memblock.h>
63#include <asm/efi.h>
64#include <asm/xen/hypervisor.h>
65#include <asm/mmu_context.h>
66
67phys_addr_t __fdt_pointer __initdata;
68
69/*
70 * Standard memory resources
71 */
72static struct resource mem_res[] = {
73 {
74 .name = "Kernel code",
75 .start = 0,
76 .end = 0,
77 .flags = IORESOURCE_SYSTEM_RAM
78 },
79 {
80 .name = "Kernel data",
81 .start = 0,
82 .end = 0,
83 .flags = IORESOURCE_SYSTEM_RAM
84 }
85};
86
87#define kernel_code mem_res[0]
88#define kernel_data mem_res[1]
89
90/*
91 * The recorded values of x0 .. x3 upon kernel entry.
92 */
93u64 __cacheline_aligned boot_args[4];
94
95void __init smp_setup_processor_id(void)
96{
97 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
98 cpu_logical_map(0) = mpidr;
99
100 /*
101 * clear __my_cpu_offset on boot CPU to avoid hang caused by
102 * using percpu variable early, for example, lockdep will
103 * access percpu variable inside lock_release
104 */
105 set_my_cpu_offset(0);
106 pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr);
107}
108
109bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
110{
111 return phys_id == cpu_logical_map(cpu);
112}
113
114struct mpidr_hash mpidr_hash;
115/**
116 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
117 * level in order to build a linear index from an
118 * MPIDR value. Resulting algorithm is a collision
119 * free hash carried out through shifting and ORing
120 */
121static void __init smp_build_mpidr_hash(void)
122{
123 u32 i, affinity, fs[4], bits[4], ls;
124 u64 mask = 0;
125 /*
126 * Pre-scan the list of MPIDRS and filter out bits that do
127 * not contribute to affinity levels, ie they never toggle.
128 */
129 for_each_possible_cpu(i)
130 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
131 pr_debug("mask of set bits %#llx\n", mask);
132 /*
133 * Find and stash the last and first bit set at all affinity levels to
134 * check how many bits are required to represent them.
135 */
136 for (i = 0; i < 4; i++) {
137 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
138 /*
139 * Find the MSB bit and LSB bits position
140 * to determine how many bits are required
141 * to express the affinity level.
142 */
143 ls = fls(affinity);
144 fs[i] = affinity ? ffs(affinity) - 1 : 0;
145 bits[i] = ls - fs[i];
146 }
147 /*
148 * An index can be created from the MPIDR_EL1 by isolating the
149 * significant bits at each affinity level and by shifting
150 * them in order to compress the 32 bits values space to a
151 * compressed set of values. This is equivalent to hashing
152 * the MPIDR_EL1 through shifting and ORing. It is a collision free
153 * hash though not minimal since some levels might contain a number
154 * of CPUs that is not an exact power of 2 and their bit
155 * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
156 */
157 mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
158 mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
159 mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
160 (bits[1] + bits[0]);
161 mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
162 fs[3] - (bits[2] + bits[1] + bits[0]);
163 mpidr_hash.mask = mask;
164 mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
165 pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
166 mpidr_hash.shift_aff[0],
167 mpidr_hash.shift_aff[1],
168 mpidr_hash.shift_aff[2],
169 mpidr_hash.shift_aff[3],
170 mpidr_hash.mask,
171 mpidr_hash.bits);
172 /*
173 * 4x is an arbitrary value used to warn on a hash table much bigger
174 * than expected on most systems.
175 */
176 if (mpidr_hash_size() > 4 * num_possible_cpus())
177 pr_warn("Large number of MPIDR hash buckets detected\n");
178 __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
179}
180
181static void __init setup_machine_fdt(phys_addr_t dt_phys)
182{
183 void *dt_virt = fixmap_remap_fdt(dt_phys);
184
185 if (!dt_virt || !early_init_dt_scan(dt_virt)) {
186 pr_crit("\n"
187 "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
188 "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
189 "\nPlease check your bootloader.",
190 &dt_phys, dt_virt);
191
192 while (true)
193 cpu_relax();
194 }
195
196 dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
197}
198
199static void __init request_standard_resources(void)
200{
201 struct memblock_region *region;
202 struct resource *res;
203
204 kernel_code.start = virt_to_phys(_text);
205 kernel_code.end = virt_to_phys(_etext - 1);
206 kernel_data.start = virt_to_phys(_sdata);
207 kernel_data.end = virt_to_phys(_end - 1);
208
209 for_each_memblock(memory, region) {
210 res = alloc_bootmem_low(sizeof(*res));
211 res->name = "System RAM";
212 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
213 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
214 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
215
216 request_resource(&iomem_resource, res);
217
218 if (kernel_code.start >= res->start &&
219 kernel_code.end <= res->end)
220 request_resource(res, &kernel_code);
221 if (kernel_data.start >= res->start &&
222 kernel_data.end <= res->end)
223 request_resource(res, &kernel_data);
224 }
225}
226
227#ifdef CONFIG_BLK_DEV_INITRD
228/*
229 * Relocate initrd if it is not completely within the linear mapping.
230 * This would be the case if mem= cuts out all or part of it.
231 */
232static void __init relocate_initrd(void)
233{
234 phys_addr_t orig_start = __virt_to_phys(initrd_start);
235 phys_addr_t orig_end = __virt_to_phys(initrd_end);
236 phys_addr_t ram_end = memblock_end_of_DRAM();
237 phys_addr_t new_start;
238 unsigned long size, to_free = 0;
239 void *dest;
240
241 if (orig_end <= ram_end)
242 return;
243
244 /*
245 * Any of the original initrd which overlaps the linear map should
246 * be freed after relocating.
247 */
248 if (orig_start < ram_end)
249 to_free = ram_end - orig_start;
250
251 size = orig_end - orig_start;
252 if (!size)
253 return;
254
255 /* initrd needs to be relocated completely inside linear mapping */
256 new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
257 size, PAGE_SIZE);
258 if (!new_start)
259 panic("Cannot relocate initrd of size %ld\n", size);
260 memblock_reserve(new_start, size);
261
262 initrd_start = __phys_to_virt(new_start);
263 initrd_end = initrd_start + size;
264
265 pr_info("Moving initrd from [%llx-%llx] to [%llx-%llx]\n",
266 orig_start, orig_start + size - 1,
267 new_start, new_start + size - 1);
268
269 dest = (void *)initrd_start;
270
271 if (to_free) {
272 memcpy(dest, (void *)__phys_to_virt(orig_start), to_free);
273 dest += to_free;
274 }
275
276 copy_from_early_mem(dest, orig_start + to_free, size - to_free);
277
278 if (to_free) {
279 pr_info("Freeing original RAMDISK from [%llx-%llx]\n",
280 orig_start, orig_start + to_free - 1);
281 memblock_free(orig_start, to_free);
282 }
283}
284#else
285static inline void __init relocate_initrd(void)
286{
287}
288#endif
289
290u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
291
292void __init setup_arch(char **cmdline_p)
293{
294 pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
295
296 sprintf(init_utsname()->machine, ELF_PLATFORM);
297 init_mm.start_code = (unsigned long) _text;
298 init_mm.end_code = (unsigned long) _etext;
299 init_mm.end_data = (unsigned long) _edata;
300 init_mm.brk = (unsigned long) _end;
301
302 *cmdline_p = boot_command_line;
303
304 early_fixmap_init();
305 early_ioremap_init();
306
307 setup_machine_fdt(__fdt_pointer);
308
309 parse_early_param();
310
311 /*
312 * Unmask asynchronous aborts after bringing up possible earlycon.
313 * (Report possible System Errors once we can report this occurred)
314 */
315 local_async_enable();
316
317 /*
318 * TTBR0 is only used for the identity mapping at this stage. Make it
319 * point to zero page to avoid speculatively fetching new entries.
320 */
321 cpu_uninstall_idmap();
322
323 efi_init();
324 arm64_memblock_init();
325
326 /* Parse the ACPI tables for possible boot-time configuration */
327 acpi_boot_table_init();
328
329 paging_init();
330 relocate_initrd();
331
332 kasan_init();
333
334 request_standard_resources();
335
336 early_ioremap_reset();
337
338 if (acpi_disabled) {
339 unflatten_device_tree();
340 psci_dt_init();
341 } else {
342 psci_acpi_init();
343 }
344 xen_early_init();
345
346 cpu_read_bootcpu_ops();
347 smp_init_cpus();
348 smp_build_mpidr_hash();
349
350#ifdef CONFIG_VT
351#if defined(CONFIG_VGA_CONSOLE)
352 conswitchp = &vga_con;
353#elif defined(CONFIG_DUMMY_CONSOLE)
354 conswitchp = &dummy_con;
355#endif
356#endif
357 if (boot_args[1] || boot_args[2] || boot_args[3]) {
358 pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
359 "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
360 "This indicates a broken bootloader or old kernel\n",
361 boot_args[1], boot_args[2], boot_args[3]);
362 }
363}
364
365static int __init arm64_device_init(void)
366{
367 if (of_have_populated_dt()) {
368 of_iommu_init();
369 of_platform_populate(NULL, of_default_bus_match_table,
370 NULL, NULL);
371 } else if (acpi_disabled) {
372 pr_crit("Device tree not populated\n");
373 }
374 return 0;
375}
376arch_initcall_sync(arm64_device_init);
377
378static int __init topology_init(void)
379{
380 int i;
381
382 for_each_possible_cpu(i) {
383 struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
384 cpu->hotpluggable = 1;
385 register_cpu(cpu, i);
386 }
387
388 return 0;
389}
390subsys_initcall(topology_init);
391
392/*
393 * Dump out kernel offset information on panic.
394 */
395static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
396 void *p)
397{
398 u64 const kaslr_offset = kimage_vaddr - KIMAGE_VADDR;
399
400 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset > 0) {
401 pr_emerg("Kernel Offset: 0x%llx from 0x%lx\n",
402 kaslr_offset, KIMAGE_VADDR);
403 } else {
404 pr_emerg("Kernel Offset: disabled\n");
405 }
406 return 0;
407}
408
409static struct notifier_block kernel_offset_notifier = {
410 .notifier_call = dump_kernel_offset
411};
412
413static int __init register_kernel_offset_dumper(void)
414{
415 atomic_notifier_chain_register(&panic_notifier_list,
416 &kernel_offset_notifier);
417 return 0;
418}
419__initcall(register_kernel_offset_dumper);