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  1/*
  2 * Intel(R) Trace Hub data structures
  3 *
  4 * Copyright (C) 2014-2015 Intel Corporation.
  5 *
  6 * This program is free software; you can redistribute it and/or modify it
  7 * under the terms and conditions of the GNU General Public License,
  8 * version 2, as published by the Free Software Foundation.
  9 *
 10 * This program is distributed in the hope it will be useful, but WITHOUT
 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 13 * more details.
 14 */
 15
 16#ifndef __INTEL_TH_H__
 17#define __INTEL_TH_H__
 18
 19/* intel_th_device device types */
 20enum {
 21	/* Devices that generate trace data */
 22	INTEL_TH_SOURCE = 0,
 23	/* Output ports (MSC, PTI) */
 24	INTEL_TH_OUTPUT,
 25	/* Switch, the Global Trace Hub (GTH) */
 26	INTEL_TH_SWITCH,
 27};
 28
 29/**
 30 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices
 31 * @port:	output port number, assigned by the switch
 32 * @type:	GTH_{MSU,CTP,PTI}
 33 * @scratchpad:	scratchpad bits to flag when this output is enabled
 34 * @multiblock:	true for multiblock output configuration
 35 * @active:	true when this output is enabled
 36 *
 37 * Output port descriptor, used by switch driver to tell which output
 38 * port this output device corresponds to. Filled in at output device's
 39 * probe time by switch::assign(). Passed from output device driver to
 40 * switch related code to enable/disable its port.
 41 */
 42struct intel_th_output {
 43	int		port;
 44	unsigned int	type;
 45	unsigned int	scratchpad;
 46	bool		multiblock;
 47	bool		active;
 48};
 49
 50/**
 51 * struct intel_th_device - device on the intel_th bus
 52 * @dev:		device
 53 * @resource:		array of resources available to this device
 54 * @num_resources:	number of resources in @resource array
 55 * @type:		INTEL_TH_{SOURCE,OUTPUT,SWITCH}
 56 * @id:			device instance or -1
 57 * @output:		output descriptor for INTEL_TH_OUTPUT devices
 58 * @name:		device name to match the driver
 59 */
 60struct intel_th_device {
 61	struct device	dev;
 62	struct resource	*resource;
 63	unsigned int	num_resources;
 64	unsigned int	type;
 65	int		id;
 66
 67	/* INTEL_TH_OUTPUT specific */
 68	struct intel_th_output	output;
 69
 70	char		name[];
 71};
 72
 73#define to_intel_th_device(_d)				\
 74	container_of((_d), struct intel_th_device, dev)
 75
 76/**
 77 * intel_th_device_get_resource() - obtain @num'th resource of type @type
 78 * @thdev:	the device to search the resource for
 79 * @type:	resource type
 80 * @num:	number of the resource
 81 */
 82static inline struct resource *
 83intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type,
 84			     unsigned int num)
 85{
 86	int i;
 87
 88	for (i = 0; i < thdev->num_resources; i++)
 89		if (resource_type(&thdev->resource[i]) == type && !num--)
 90			return &thdev->resource[i];
 91
 92	return NULL;
 93}
 94
 95/**
 96 * intel_th_output_assigned() - if an output device is assigned to a switch port
 97 * @thdev:	the output device
 98 *
 99 * Return:	true if the device is INTEL_TH_OUTPUT *and* is assigned a port
100 */
101static inline bool
102intel_th_output_assigned(struct intel_th_device *thdev)
103{
104	return thdev->type == INTEL_TH_OUTPUT &&
105		thdev->output.port >= 0;
106}
107
108/**
109 * struct intel_th_driver - driver for an intel_th_device device
110 * @driver:	generic driver
111 * @probe:	probe method
112 * @remove:	remove method
113 * @assign:	match a given output type device against available outputs
114 * @unassign:	deassociate an output type device from an output port
115 * @enable:	enable tracing for a given output device
116 * @disable:	disable tracing for a given output device
117 * @fops:	file operations for device nodes
118 *
119 * Callbacks @probe and @remove are required for all device types.
120 * Switch device driver needs to fill in @assign, @enable and @disable
121 * callbacks.
122 */
123struct intel_th_driver {
124	struct device_driver	driver;
125	int			(*probe)(struct intel_th_device *thdev);
126	void			(*remove)(struct intel_th_device *thdev);
127	/* switch (GTH) ops */
128	int			(*assign)(struct intel_th_device *thdev,
129					  struct intel_th_device *othdev);
130	void			(*unassign)(struct intel_th_device *thdev,
131					    struct intel_th_device *othdev);
132	void			(*enable)(struct intel_th_device *thdev,
133					  struct intel_th_output *output);
134	void			(*disable)(struct intel_th_device *thdev,
135					   struct intel_th_output *output);
136	/* output ops */
137	void			(*irq)(struct intel_th_device *thdev);
138	int			(*activate)(struct intel_th_device *thdev);
139	void			(*deactivate)(struct intel_th_device *thdev);
140	/* file_operations for those who want a device node */
141	const struct file_operations *fops;
142
143	/* source ops */
144	int			(*set_output)(struct intel_th_device *thdev,
145					      unsigned int master);
146};
147
148#define to_intel_th_driver(_d)					\
149	container_of((_d), struct intel_th_driver, driver)
150
151static inline struct intel_th_device *
152to_intel_th_hub(struct intel_th_device *thdev)
153{
154	struct device *parent = thdev->dev.parent;
155
156	if (!parent)
157		return NULL;
158
159	return to_intel_th_device(parent);
160}
161
162struct intel_th *
163intel_th_alloc(struct device *dev, struct resource *devres,
164	       unsigned int ndevres, int irq);
165void intel_th_free(struct intel_th *th);
166
167int intel_th_driver_register(struct intel_th_driver *thdrv);
168void intel_th_driver_unregister(struct intel_th_driver *thdrv);
169
170int intel_th_trace_enable(struct intel_th_device *thdev);
171int intel_th_trace_disable(struct intel_th_device *thdev);
172int intel_th_set_output(struct intel_th_device *thdev,
173			unsigned int master);
174
175enum {
176	TH_MMIO_CONFIG = 0,
177	TH_MMIO_SW = 2,
178	TH_MMIO_END,
179};
180
181#define TH_SUBDEVICE_MAX	6
182#define TH_POSSIBLE_OUTPUTS	8
183#define TH_CONFIGURABLE_MASTERS 256
184#define TH_MSC_MAX		2
185
186/**
187 * struct intel_th - Intel TH controller
188 * @dev:	driver core's device
189 * @thdev:	subdevices
190 * @hub:	"switch" subdevice (GTH)
191 * @id:		this Intel TH controller's device ID in the system
192 * @major:	device node major for output devices
193 */
194struct intel_th {
195	struct device		*dev;
196
197	struct intel_th_device	*thdev[TH_SUBDEVICE_MAX];
198	struct intel_th_device	*hub;
199
200	int			id;
201	int			major;
202#ifdef CONFIG_INTEL_TH_DEBUG
203	struct dentry		*dbg;
204#endif
205};
206
207/*
208 * Register windows
209 */
210enum {
211	/* Global Trace Hub (GTH) */
212	REG_GTH_OFFSET		= 0x0000,
213	REG_GTH_LENGTH		= 0x2000,
214
215	/* Software Trace Hub (STH) [0x4000..0x4fff] */
216	REG_STH_OFFSET		= 0x4000,
217	REG_STH_LENGTH		= 0x2000,
218
219	/* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */
220	REG_MSU_OFFSET		= 0xa0000,
221	REG_MSU_LENGTH		= 0x02000,
222
223	/* Internal MSU trace buffer [0x80000..0x9ffff] */
224	BUF_MSU_OFFSET		= 0x80000,
225	BUF_MSU_LENGTH		= 0x20000,
226
227	/* PTI output == same window as GTH */
228	REG_PTI_OFFSET		= REG_GTH_OFFSET,
229	REG_PTI_LENGTH		= REG_GTH_LENGTH,
230
231	/* DCI Handler (DCIH) == some window as MSU */
232	REG_DCIH_OFFSET		= REG_MSU_OFFSET,
233	REG_DCIH_LENGTH		= REG_MSU_LENGTH,
234};
235
236/*
237 * GTH, output ports configuration
238 */
239enum {
240	GTH_NONE = 0,
241	GTH_MSU,	/* memory/usb */
242	GTH_CTP,	/* Common Trace Port */
243	GTH_PTI = 4,	/* MIPI-PTI */
244};
245
246/*
247 * Scratchpad bits: tell firmware and external debuggers
248 * what we are up to.
249 */
250enum {
251	/* Memory is the primary destination */
252	SCRPD_MEM_IS_PRIM_DEST		= BIT(0),
253	/* XHCI DbC is the primary destination */
254	SCRPD_DBC_IS_PRIM_DEST		= BIT(1),
255	/* PTI is the primary destination */
256	SCRPD_PTI_IS_PRIM_DEST		= BIT(2),
257	/* BSSB is the primary destination */
258	SCRPD_BSSB_IS_PRIM_DEST		= BIT(3),
259	/* PTI is the alternate destination */
260	SCRPD_PTI_IS_ALT_DEST		= BIT(4),
261	/* BSSB is the alternate destination */
262	SCRPD_BSSB_IS_ALT_DEST		= BIT(5),
263	/* DeepSx exit occurred */
264	SCRPD_DEEPSX_EXIT		= BIT(6),
265	/* S4 exit occurred */
266	SCRPD_S4_EXIT			= BIT(7),
267	/* S5 exit occurred */
268	SCRPD_S5_EXIT			= BIT(8),
269	/* MSU controller 0/1 is enabled */
270	SCRPD_MSC0_IS_ENABLED		= BIT(9),
271	SCRPD_MSC1_IS_ENABLED		= BIT(10),
272	/* Sx exit occurred */
273	SCRPD_SX_EXIT			= BIT(11),
274	/* Trigger Unit is enabled */
275	SCRPD_TRIGGER_IS_ENABLED	= BIT(12),
276	SCRPD_ODLA_IS_ENABLED		= BIT(13),
277	SCRPD_SOCHAP_IS_ENABLED		= BIT(14),
278	SCRPD_STH_IS_ENABLED		= BIT(15),
279	SCRPD_DCIH_IS_ENABLED		= BIT(16),
280	SCRPD_VER_IS_ENABLED		= BIT(17),
281	/* External debugger is using Intel TH */
282	SCRPD_DEBUGGER_IN_USE		= BIT(24),
283};
284
285#endif