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  1menu "Platform options"
  2
  3comment "Memory settings"
  4
  5config NIOS2_MEM_BASE
  6	hex "Memory base address"
  7	default "0x00000000"
  8	help
  9	  This is the physical address of the memory that the kernel will run
 10	  from. This address is used to link the kernel and setup initial memory
 11	  management. You should take the raw memory address without any MMU
 12	  or cache bits set.
 13	  Please not that this address is used directly so you have to manually
 14	  do address translation if it's connected to a bridge.
 15
 16comment "Device tree"
 17
 18config NIOS2_DTB_AT_PHYS_ADDR
 19	bool "DTB at physical address"
 20	default n
 21	help
 22	  When enabled you can select a physical address to load the dtb from.
 23	  Normally this address is passed by a bootloader such as u-boot but
 24	  using this you can use a devicetree without a bootloader.
 25	  This way you can store a devicetree in NOR flash or an onchip rom.
 26	  Please note that this address is used directly so you have to manually
 27	  do address translation if it's connected to a bridge. Also take into
 28	  account that when using an MMU you'd have to ad 0xC0000000 to your
 29	  address
 30
 31config NIOS2_DTB_PHYS_ADDR
 32	hex "DTB Address"
 33	depends on NIOS2_DTB_AT_PHYS_ADDR
 34	default "0xC0000000"
 35	help
 36	  Physical address of a dtb blob.
 37
 38config NIOS2_DTB_SOURCE_BOOL
 39	bool "Compile and link device tree into kernel image"
 40	default n
 41	help
 42	  This allows you to specify a dts (device tree source) file
 43	  which will be compiled and linked into the kernel image.
 44
 45config NIOS2_DTB_SOURCE
 46	string "Device tree source file"
 47	depends on NIOS2_DTB_SOURCE_BOOL
 48	default ""
 49	help
 50	  Absolute path to the device tree source (dts) file describing your
 51	  system.
 52
 53comment "Nios II instructions"
 54
 55config NIOS2_ARCH_REVISION
 56	int "Select Nios II architecture revision"
 57	range 1 2
 58	default 1
 59	help
 60	  Select between Nios II R1 and Nios II R2 . The architectures
 61	  are binary incompatible. Default is R1 .
 62
 63config NIOS2_HW_MUL_SUPPORT
 64	bool "Enable MUL instruction"
 65	default n
 66	help
 67	  Set to true if you configured the Nios II to include the MUL
 68	  instruction.  This will enable the -mhw-mul compiler flag.
 69
 70config NIOS2_HW_MULX_SUPPORT
 71	bool "Enable MULX instruction"
 72	default n
 73	help
 74	  Set to true if you configured the Nios II to include the MULX
 75	  instruction.  Enables the -mhw-mulx compiler flag.
 76
 77config NIOS2_HW_DIV_SUPPORT
 78	bool "Enable DIV instruction"
 79	default n
 80	help
 81	  Set to true if you configured the Nios II to include the DIV
 82	  instruction.  Enables the -mhw-div compiler flag.
 83
 84config NIOS2_BMX_SUPPORT
 85	bool "Enable BMX instructions"
 86	depends on NIOS2_ARCH_REVISION = 2
 87	default n
 88	help
 89	  Set to true if you configured the Nios II R2 to include
 90	  the BMX Bit Manipulation Extension instructions. Enables
 91	  the -mbmx compiler flag.
 92
 93config NIOS2_CDX_SUPPORT
 94	bool "Enable CDX instructions"
 95	depends on NIOS2_ARCH_REVISION = 2
 96	default n
 97	help
 98	  Set to true if you configured the Nios II R2 to include
 99	  the CDX Bit Manipulation Extension instructions. Enables
100	  the -mcdx compiler flag.
101
102config NIOS2_FPU_SUPPORT
103	bool "Custom floating point instr support"
104	default n
105	help
106	  Enables the -mcustom-fpu-cfg=60-1 compiler flag.
107
108config NIOS2_CI_SWAB_SUPPORT
109	bool "Byteswap custom instruction"
110	default n
111	help
112	  Use the byteswap (endian converter) Nios II custom instruction provided
113	  by Altera and which can be enabled in QSYS builder. This accelerates
114	  endian conversions in the kernel (e.g. ntohs).
115
116config NIOS2_CI_SWAB_NO
117	int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT
118	default 0
119	help
120	  Number of the instruction as configured in QSYS Builder.
121
122comment "Cache settings"
123
124config CUSTOM_CACHE_SETTINGS
125	bool "Custom cache settings"
126	help
127	  This option allows you to tweak the cache settings used during early
128	  boot (where the information from device tree is not yet available).
129	  There should be no reason to change these values. Linux will work
130	  perfectly fine, even if the Nios II is configured with smaller caches.
131
132	  Say N here unless you know what you are doing.
133
134config NIOS2_DCACHE_SIZE
135	hex "D-Cache size" if CUSTOM_CACHE_SETTINGS
136	range 0x200 0x10000
137	default "0x800"
138	help
139	  Maximum possible data cache size.
140
141config NIOS2_DCACHE_LINE_SIZE
142	hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS
143	range 0x10 0x20
144	default "0x20"
145	help
146	  Minimum possible data cache line size.
147
148config NIOS2_ICACHE_SIZE
149	hex "I-Cache size" if CUSTOM_CACHE_SETTINGS
150	range 0x200 0x10000
151	default "0x1000"
152	help
153	  Maximum possible instruction cache size.
154
155endmenu