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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 | /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle * Copyright (c) 2000 by Silicon Graphics, Inc. * Copyright (c) 2001 MIPS Technologies, Inc. */ #ifndef _ASM_STRING_H #define _ASM_STRING_H /* * Most of the inline functions are rather naive implementations so I just * didn't bother updating them for 64-bit ... */ #ifdef CONFIG_32BIT #ifndef IN_STRING_C #define __HAVE_ARCH_STRCPY static __inline__ char *strcpy(char *__dest, __const__ char *__src) { char *__xdest = __dest; __asm__ __volatile__( ".set\tnoreorder\n\t" ".set\tnoat\n" "1:\tlbu\t$1,(%1)\n\t" "addiu\t%1,1\n\t" "sb\t$1,(%0)\n\t" "bnez\t$1,1b\n\t" "addiu\t%0,1\n\t" ".set\tat\n\t" ".set\treorder" : "=r" (__dest), "=r" (__src) : "0" (__dest), "1" (__src) : "memory"); return __xdest; } #define __HAVE_ARCH_STRNCPY static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) { char *__xdest = __dest; if (__n == 0) return __xdest; __asm__ __volatile__( ".set\tnoreorder\n\t" ".set\tnoat\n" "1:\tlbu\t$1,(%1)\n\t" "subu\t%2,1\n\t" "sb\t$1,(%0)\n\t" "beqz\t$1,2f\n\t" "addiu\t%0,1\n\t" "bnez\t%2,1b\n\t" "addiu\t%1,1\n" "2:\n\t" ".set\tat\n\t" ".set\treorder" : "=r" (__dest), "=r" (__src), "=r" (__n) : "0" (__dest), "1" (__src), "2" (__n) : "memory"); return __xdest; } #define __HAVE_ARCH_STRCMP static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) { int __res; __asm__ __volatile__( ".set\tnoreorder\n\t" ".set\tnoat\n\t" "lbu\t%2,(%0)\n" "1:\tlbu\t$1,(%1)\n\t" "addiu\t%0,1\n\t" "bne\t$1,%2,2f\n\t" "addiu\t%1,1\n\t" "bnez\t%2,1b\n\t" "lbu\t%2,(%0)\n\t" #if defined(CONFIG_CPU_R3000) "nop\n\t" #endif "move\t%2,$1\n" "2:\tsubu\t%2,$1\n" "3:\t.set\tat\n\t" ".set\treorder" : "=r" (__cs), "=r" (__ct), "=r" (__res) : "0" (__cs), "1" (__ct)); return __res; } #endif /* !defined(IN_STRING_C) */ #define __HAVE_ARCH_STRNCMP static __inline__ int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) { int __res; __asm__ __volatile__( ".set\tnoreorder\n\t" ".set\tnoat\n" "1:\tlbu\t%3,(%0)\n\t" "beqz\t%2,2f\n\t" "lbu\t$1,(%1)\n\t" "subu\t%2,1\n\t" "bne\t$1,%3,3f\n\t" "addiu\t%0,1\n\t" "bnez\t%3,1b\n\t" "addiu\t%1,1\n" "2:\n\t" #if defined(CONFIG_CPU_R3000) "nop\n\t" #endif "move\t%3,$1\n" "3:\tsubu\t%3,$1\n\t" ".set\tat\n\t" ".set\treorder" : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res) : "0" (__cs), "1" (__ct), "2" (__count)); return __res; } #endif /* CONFIG_32BIT */ #define __HAVE_ARCH_MEMSET extern void *memset(void *__s, int __c, size_t __count); #define __HAVE_ARCH_MEMCPY extern void *memcpy(void *__to, __const__ void *__from, size_t __n); #define __HAVE_ARCH_MEMMOVE extern void *memmove(void *__dest, __const__ void *__src, size_t __n); #endif /* _ASM_STRING_H */ |