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1/*
2 * Renesas R-Car Gen3 for USB2.0 PHY driver
3 *
4 * Copyright (C) 2015-2017 Renesas Electronics Corporation
5 *
6 * This is based on the phy-rcar-gen2 driver:
7 * Copyright (C) 2014 Renesas Solutions Corp.
8 * Copyright (C) 2014 Cogent Embedded, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/extcon-provider.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/of_device.h>
22#include <linux/phy/phy.h>
23#include <linux/platform_device.h>
24#include <linux/pm_runtime.h>
25#include <linux/regulator/consumer.h>
26#include <linux/usb/of.h>
27#include <linux/workqueue.h>
28
29/******* USB2.0 Host registers (original offset is +0x200) *******/
30#define USB2_INT_ENABLE 0x000
31#define USB2_USBCTR 0x00c
32#define USB2_SPD_RSM_TIMSET 0x10c
33#define USB2_OC_TIMSET 0x110
34#define USB2_COMMCTRL 0x600
35#define USB2_OBINTSTA 0x604
36#define USB2_OBINTEN 0x608
37#define USB2_VBCTRL 0x60c
38#define USB2_LINECTRL1 0x610
39#define USB2_ADPCTRL 0x630
40
41/* INT_ENABLE */
42#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
43#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
44#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
45#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \
46 USB2_INT_ENABLE_USBH_INTB_EN | \
47 USB2_INT_ENABLE_USBH_INTA_EN)
48
49/* USBCTR */
50#define USB2_USBCTR_DIRPD BIT(2)
51#define USB2_USBCTR_PLL_RST BIT(1)
52
53/* SPD_RSM_TIMSET */
54#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
55
56/* OC_TIMSET */
57#define USB2_OC_TIMSET_INIT 0x000209ab
58
59/* COMMCTRL */
60#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
61
62/* OBINTSTA and OBINTEN */
63#define USB2_OBINT_SESSVLDCHG BIT(12)
64#define USB2_OBINT_IDDIGCHG BIT(11)
65#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
66 USB2_OBINT_IDDIGCHG)
67
68/* VBCTRL */
69#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
70
71/* LINECTRL1 */
72#define USB2_LINECTRL1_DPRPD_EN BIT(19)
73#define USB2_LINECTRL1_DP_RPD BIT(18)
74#define USB2_LINECTRL1_DMRPD_EN BIT(17)
75#define USB2_LINECTRL1_DM_RPD BIT(16)
76#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
77
78/* ADPCTRL */
79#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
80#define USB2_ADPCTRL_IDDIG BIT(19)
81#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
82#define USB2_ADPCTRL_DRVVBUS BIT(4)
83
84#define RCAR_GEN3_PHY_HAS_DEDICATED_PINS 1
85
86struct rcar_gen3_chan {
87 void __iomem *base;
88 struct extcon_dev *extcon;
89 struct phy *phy;
90 struct regulator *vbus;
91 struct work_struct work;
92 bool extcon_host;
93 bool has_otg_pins;
94};
95
96static void rcar_gen3_phy_usb2_work(struct work_struct *work)
97{
98 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
99 work);
100
101 if (ch->extcon_host) {
102 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
103 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
104 } else {
105 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
106 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
107 }
108}
109
110static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
111{
112 void __iomem *usb2_base = ch->base;
113 u32 val = readl(usb2_base + USB2_COMMCTRL);
114
115 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
116 if (host)
117 val &= ~USB2_COMMCTRL_OTG_PERI;
118 else
119 val |= USB2_COMMCTRL_OTG_PERI;
120 writel(val, usb2_base + USB2_COMMCTRL);
121}
122
123static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
124{
125 void __iomem *usb2_base = ch->base;
126 u32 val = readl(usb2_base + USB2_LINECTRL1);
127
128 dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
129 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
130 if (dp)
131 val |= USB2_LINECTRL1_DP_RPD;
132 if (dm)
133 val |= USB2_LINECTRL1_DM_RPD;
134 writel(val, usb2_base + USB2_LINECTRL1);
135}
136
137static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
138{
139 void __iomem *usb2_base = ch->base;
140 u32 val = readl(usb2_base + USB2_ADPCTRL);
141
142 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
143 if (vbus)
144 val |= USB2_ADPCTRL_DRVVBUS;
145 else
146 val &= ~USB2_ADPCTRL_DRVVBUS;
147 writel(val, usb2_base + USB2_ADPCTRL);
148}
149
150static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
151{
152 rcar_gen3_set_linectrl(ch, 1, 1);
153 rcar_gen3_set_host_mode(ch, 1);
154 rcar_gen3_enable_vbus_ctrl(ch, 1);
155
156 ch->extcon_host = true;
157 schedule_work(&ch->work);
158}
159
160static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
161{
162 rcar_gen3_set_linectrl(ch, 0, 1);
163 rcar_gen3_set_host_mode(ch, 0);
164 rcar_gen3_enable_vbus_ctrl(ch, 0);
165
166 ch->extcon_host = false;
167 schedule_work(&ch->work);
168}
169
170static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
171{
172 void __iomem *usb2_base = ch->base;
173 u32 val;
174
175 val = readl(usb2_base + USB2_LINECTRL1);
176 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
177
178 rcar_gen3_set_linectrl(ch, 1, 1);
179 rcar_gen3_set_host_mode(ch, 1);
180 rcar_gen3_enable_vbus_ctrl(ch, 0);
181
182 val = readl(usb2_base + USB2_LINECTRL1);
183 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
184}
185
186static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
187{
188 rcar_gen3_set_linectrl(ch, 0, 1);
189 rcar_gen3_set_host_mode(ch, 0);
190 rcar_gen3_enable_vbus_ctrl(ch, 1);
191}
192
193static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
194{
195 void __iomem *usb2_base = ch->base;
196 u32 val;
197
198 val = readl(usb2_base + USB2_OBINTEN);
199 writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
200
201 rcar_gen3_enable_vbus_ctrl(ch, 0);
202 rcar_gen3_init_for_host(ch);
203
204 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
205}
206
207static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
208{
209 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
210}
211
212static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
213{
214 if (!rcar_gen3_check_id(ch))
215 rcar_gen3_init_for_host(ch);
216 else
217 rcar_gen3_init_for_peri(ch);
218}
219
220static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
221{
222 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
223}
224
225static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
226{
227 if (rcar_gen3_is_host(ch))
228 return PHY_MODE_USB_HOST;
229
230 return PHY_MODE_USB_DEVICE;
231}
232
233static ssize_t role_store(struct device *dev, struct device_attribute *attr,
234 const char *buf, size_t count)
235{
236 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
237 bool is_b_device;
238 enum phy_mode cur_mode, new_mode;
239
240 if (!ch->has_otg_pins || !ch->phy->init_count)
241 return -EIO;
242
243 if (!strncmp(buf, "host", strlen("host")))
244 new_mode = PHY_MODE_USB_HOST;
245 else if (!strncmp(buf, "peripheral", strlen("peripheral")))
246 new_mode = PHY_MODE_USB_DEVICE;
247 else
248 return -EINVAL;
249
250 /* is_b_device: true is B-Device. false is A-Device. */
251 is_b_device = rcar_gen3_check_id(ch);
252 cur_mode = rcar_gen3_get_phy_mode(ch);
253
254 /* If current and new mode is the same, this returns the error */
255 if (cur_mode == new_mode)
256 return -EINVAL;
257
258 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
259 if (!is_b_device) /* A-Peripheral */
260 rcar_gen3_init_from_a_peri_to_a_host(ch);
261 else /* B-Peripheral */
262 rcar_gen3_init_for_b_host(ch);
263 } else { /* And is_host must be true */
264 if (!is_b_device) /* A-Host */
265 rcar_gen3_init_for_a_peri(ch);
266 else /* B-Host */
267 rcar_gen3_init_for_peri(ch);
268 }
269
270 return count;
271}
272
273static ssize_t role_show(struct device *dev, struct device_attribute *attr,
274 char *buf)
275{
276 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
277
278 if (!ch->has_otg_pins || !ch->phy->init_count)
279 return -EIO;
280
281 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
282 "peripheral");
283}
284static DEVICE_ATTR_RW(role);
285
286static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
287{
288 void __iomem *usb2_base = ch->base;
289 u32 val;
290
291 val = readl(usb2_base + USB2_VBCTRL);
292 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
293 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
294 val = readl(usb2_base + USB2_OBINTEN);
295 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
296 val = readl(usb2_base + USB2_ADPCTRL);
297 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
298 val = readl(usb2_base + USB2_LINECTRL1);
299 rcar_gen3_set_linectrl(ch, 0, 0);
300 writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
301 usb2_base + USB2_LINECTRL1);
302
303 rcar_gen3_device_recognition(ch);
304}
305
306static int rcar_gen3_phy_usb2_init(struct phy *p)
307{
308 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
309 void __iomem *usb2_base = channel->base;
310
311 /* Initialize USB2 part */
312 writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
313 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
314 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
315
316 /* Initialize otg part */
317 if (channel->has_otg_pins)
318 rcar_gen3_init_otg(channel);
319
320 return 0;
321}
322
323static int rcar_gen3_phy_usb2_exit(struct phy *p)
324{
325 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
326
327 writel(0, channel->base + USB2_INT_ENABLE);
328
329 return 0;
330}
331
332static int rcar_gen3_phy_usb2_power_on(struct phy *p)
333{
334 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
335 void __iomem *usb2_base = channel->base;
336 u32 val;
337 int ret;
338
339 if (channel->vbus) {
340 ret = regulator_enable(channel->vbus);
341 if (ret)
342 return ret;
343 }
344
345 val = readl(usb2_base + USB2_USBCTR);
346 val |= USB2_USBCTR_PLL_RST;
347 writel(val, usb2_base + USB2_USBCTR);
348 val &= ~USB2_USBCTR_PLL_RST;
349 writel(val, usb2_base + USB2_USBCTR);
350
351 return 0;
352}
353
354static int rcar_gen3_phy_usb2_power_off(struct phy *p)
355{
356 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
357 int ret = 0;
358
359 if (channel->vbus)
360 ret = regulator_disable(channel->vbus);
361
362 return ret;
363}
364
365static const struct phy_ops rcar_gen3_phy_usb2_ops = {
366 .init = rcar_gen3_phy_usb2_init,
367 .exit = rcar_gen3_phy_usb2_exit,
368 .power_on = rcar_gen3_phy_usb2_power_on,
369 .power_off = rcar_gen3_phy_usb2_power_off,
370 .owner = THIS_MODULE,
371};
372
373static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
374{
375 struct rcar_gen3_chan *ch = _ch;
376 void __iomem *usb2_base = ch->base;
377 u32 status = readl(usb2_base + USB2_OBINTSTA);
378 irqreturn_t ret = IRQ_NONE;
379
380 if (status & USB2_OBINT_BITS) {
381 dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
382 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
383 rcar_gen3_device_recognition(ch);
384 ret = IRQ_HANDLED;
385 }
386
387 return ret;
388}
389
390static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
391 {
392 .compatible = "renesas,usb2-phy-r8a7795",
393 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
394 },
395 {
396 .compatible = "renesas,usb2-phy-r8a7796",
397 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
398 },
399 {
400 .compatible = "renesas,usb2-phy-r8a77965",
401 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS,
402 },
403 {
404 .compatible = "renesas,rcar-gen3-usb2-phy",
405 },
406 { }
407};
408MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
409
410static const unsigned int rcar_gen3_phy_cable[] = {
411 EXTCON_USB,
412 EXTCON_USB_HOST,
413 EXTCON_NONE,
414};
415
416static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
417{
418 struct device *dev = &pdev->dev;
419 struct rcar_gen3_chan *channel;
420 struct phy_provider *provider;
421 struct resource *res;
422 int irq, ret = 0;
423
424 if (!dev->of_node) {
425 dev_err(dev, "This driver needs device tree\n");
426 return -EINVAL;
427 }
428
429 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
430 if (!channel)
431 return -ENOMEM;
432
433 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
434 channel->base = devm_ioremap_resource(dev, res);
435 if (IS_ERR(channel->base))
436 return PTR_ERR(channel->base);
437
438 /* call request_irq for OTG */
439 irq = platform_get_irq(pdev, 0);
440 if (irq >= 0) {
441 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
442 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
443 IRQF_SHARED, dev_name(dev), channel);
444 if (irq < 0)
445 dev_err(dev, "No irq handler (%d)\n", irq);
446 }
447
448 if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) {
449 int ret;
450
451 channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev);
452 channel->extcon = devm_extcon_dev_allocate(dev,
453 rcar_gen3_phy_cable);
454 if (IS_ERR(channel->extcon))
455 return PTR_ERR(channel->extcon);
456
457 ret = devm_extcon_dev_register(dev, channel->extcon);
458 if (ret < 0) {
459 dev_err(dev, "Failed to register extcon\n");
460 return ret;
461 }
462 }
463
464 /*
465 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
466 * And then, phy-core will manage runtime pm for this device.
467 */
468 pm_runtime_enable(dev);
469 channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
470 if (IS_ERR(channel->phy)) {
471 dev_err(dev, "Failed to create USB2 PHY\n");
472 ret = PTR_ERR(channel->phy);
473 goto error;
474 }
475
476 channel->vbus = devm_regulator_get_optional(dev, "vbus");
477 if (IS_ERR(channel->vbus)) {
478 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
479 ret = PTR_ERR(channel->vbus);
480 goto error;
481 }
482 channel->vbus = NULL;
483 }
484
485 platform_set_drvdata(pdev, channel);
486 phy_set_drvdata(channel->phy, channel);
487
488 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
489 if (IS_ERR(provider)) {
490 dev_err(dev, "Failed to register PHY provider\n");
491 ret = PTR_ERR(provider);
492 goto error;
493 } else if (channel->has_otg_pins) {
494 int ret;
495
496 ret = device_create_file(dev, &dev_attr_role);
497 if (ret < 0)
498 goto error;
499 }
500
501 return 0;
502
503error:
504 pm_runtime_disable(dev);
505
506 return ret;
507}
508
509static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
510{
511 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
512
513 if (channel->has_otg_pins)
514 device_remove_file(&pdev->dev, &dev_attr_role);
515
516 pm_runtime_disable(&pdev->dev);
517
518 return 0;
519};
520
521static struct platform_driver rcar_gen3_phy_usb2_driver = {
522 .driver = {
523 .name = "phy_rcar_gen3_usb2",
524 .of_match_table = rcar_gen3_phy_usb2_match_table,
525 },
526 .probe = rcar_gen3_phy_usb2_probe,
527 .remove = rcar_gen3_phy_usb2_remove,
528};
529module_platform_driver(rcar_gen3_phy_usb2_driver);
530
531MODULE_LICENSE("GPL v2");
532MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
533MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Renesas R-Car Gen3 for USB2.0 PHY driver
4 *
5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
6 *
7 * This is based on the phy-rcar-gen2 driver:
8 * Copyright (C) 2014 Renesas Solutions Corp.
9 * Copyright (C) 2014 Cogent Embedded, Inc.
10 */
11
12#include <linux/extcon-provider.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/phy/phy.h>
19#include <linux/platform_device.h>
20#include <linux/pm_runtime.h>
21#include <linux/regulator/consumer.h>
22#include <linux/string.h>
23#include <linux/usb/of.h>
24#include <linux/workqueue.h>
25
26/******* USB2.0 Host registers (original offset is +0x200) *******/
27#define USB2_INT_ENABLE 0x000
28#define USB2_USBCTR 0x00c
29#define USB2_SPD_RSM_TIMSET 0x10c
30#define USB2_OC_TIMSET 0x110
31#define USB2_COMMCTRL 0x600
32#define USB2_OBINTSTA 0x604
33#define USB2_OBINTEN 0x608
34#define USB2_VBCTRL 0x60c
35#define USB2_LINECTRL1 0x610
36#define USB2_ADPCTRL 0x630
37
38/* INT_ENABLE */
39#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
40#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
41#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
42
43/* USBCTR */
44#define USB2_USBCTR_DIRPD BIT(2)
45#define USB2_USBCTR_PLL_RST BIT(1)
46
47/* SPD_RSM_TIMSET */
48#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
49
50/* OC_TIMSET */
51#define USB2_OC_TIMSET_INIT 0x000209ab
52
53/* COMMCTRL */
54#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
55
56/* OBINTSTA and OBINTEN */
57#define USB2_OBINT_SESSVLDCHG BIT(12)
58#define USB2_OBINT_IDDIGCHG BIT(11)
59#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
60 USB2_OBINT_IDDIGCHG)
61
62/* VBCTRL */
63#define USB2_VBCTRL_OCCLREN BIT(16)
64#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
65#define USB2_VBCTRL_VBOUT BIT(0)
66
67/* LINECTRL1 */
68#define USB2_LINECTRL1_DPRPD_EN BIT(19)
69#define USB2_LINECTRL1_DP_RPD BIT(18)
70#define USB2_LINECTRL1_DMRPD_EN BIT(17)
71#define USB2_LINECTRL1_DM_RPD BIT(16)
72#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
73
74/* ADPCTRL */
75#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
76#define USB2_ADPCTRL_IDDIG BIT(19)
77#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
78#define USB2_ADPCTRL_DRVVBUS BIT(4)
79
80/* RZ/G2L specific */
81#define USB2_OBINT_IDCHG_EN BIT(0)
82#define USB2_LINECTRL1_USB2_IDMON BIT(0)
83
84#define NUM_OF_PHYS 4
85enum rcar_gen3_phy_index {
86 PHY_INDEX_BOTH_HC,
87 PHY_INDEX_OHCI,
88 PHY_INDEX_EHCI,
89 PHY_INDEX_HSUSB
90};
91
92static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
93 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
94 USB2_INT_ENABLE_USBH_INTA_EN,
95 USB2_INT_ENABLE_USBH_INTB_EN,
96 0
97};
98
99struct rcar_gen3_phy {
100 struct phy *phy;
101 struct rcar_gen3_chan *ch;
102 u32 int_enable_bits;
103 bool initialized;
104 bool otg_initialized;
105 bool powered;
106};
107
108struct rcar_gen3_chan {
109 void __iomem *base;
110 struct device *dev; /* platform_device's device */
111 struct extcon_dev *extcon;
112 struct rcar_gen3_phy rphys[NUM_OF_PHYS];
113 struct regulator *vbus;
114 struct work_struct work;
115 struct mutex lock; /* protects rphys[...].powered */
116 enum usb_dr_mode dr_mode;
117 int irq;
118 u32 obint_enable_bits;
119 bool extcon_host;
120 bool is_otg_channel;
121 bool uses_otg_pins;
122 bool soc_no_adp_ctrl;
123};
124
125struct rcar_gen3_phy_drv_data {
126 const struct phy_ops *phy_usb2_ops;
127 bool no_adp_ctrl;
128};
129
130/*
131 * Combination about is_otg_channel and uses_otg_pins:
132 *
133 * Parameters || Behaviors
134 * is_otg_channel | uses_otg_pins || irqs | role sysfs
135 * ---------------------+---------------++--------------+------------
136 * true | true || enabled | enabled
137 * true | false || disabled | enabled
138 * false | any || disabled | disabled
139 */
140
141static void rcar_gen3_phy_usb2_work(struct work_struct *work)
142{
143 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
144 work);
145
146 if (ch->extcon_host) {
147 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
148 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
149 } else {
150 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
151 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
152 }
153}
154
155static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
156{
157 void __iomem *usb2_base = ch->base;
158 u32 val = readl(usb2_base + USB2_COMMCTRL);
159
160 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
161 if (host)
162 val &= ~USB2_COMMCTRL_OTG_PERI;
163 else
164 val |= USB2_COMMCTRL_OTG_PERI;
165 writel(val, usb2_base + USB2_COMMCTRL);
166}
167
168static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
169{
170 void __iomem *usb2_base = ch->base;
171 u32 val = readl(usb2_base + USB2_LINECTRL1);
172
173 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
174 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
175 if (dp)
176 val |= USB2_LINECTRL1_DP_RPD;
177 if (dm)
178 val |= USB2_LINECTRL1_DM_RPD;
179 writel(val, usb2_base + USB2_LINECTRL1);
180}
181
182static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
183{
184 void __iomem *usb2_base = ch->base;
185 u32 vbus_ctrl_reg = USB2_ADPCTRL;
186 u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
187 u32 val;
188
189 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
190 if (ch->soc_no_adp_ctrl) {
191 vbus_ctrl_reg = USB2_VBCTRL;
192 vbus_ctrl_val = USB2_VBCTRL_VBOUT;
193 }
194
195 val = readl(usb2_base + vbus_ctrl_reg);
196 if (vbus)
197 val |= vbus_ctrl_val;
198 else
199 val &= ~vbus_ctrl_val;
200 writel(val, usb2_base + vbus_ctrl_reg);
201}
202
203static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
204{
205 void __iomem *usb2_base = ch->base;
206 u32 val = readl(usb2_base + USB2_OBINTEN);
207
208 if (ch->uses_otg_pins && enable)
209 val |= ch->obint_enable_bits;
210 else
211 val &= ~ch->obint_enable_bits;
212 writel(val, usb2_base + USB2_OBINTEN);
213}
214
215static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
216{
217 rcar_gen3_set_linectrl(ch, 1, 1);
218 rcar_gen3_set_host_mode(ch, 1);
219 rcar_gen3_enable_vbus_ctrl(ch, 1);
220
221 ch->extcon_host = true;
222 schedule_work(&ch->work);
223}
224
225static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
226{
227 rcar_gen3_set_linectrl(ch, 0, 1);
228 rcar_gen3_set_host_mode(ch, 0);
229 rcar_gen3_enable_vbus_ctrl(ch, 0);
230
231 ch->extcon_host = false;
232 schedule_work(&ch->work);
233}
234
235static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
236{
237 void __iomem *usb2_base = ch->base;
238 u32 val;
239
240 val = readl(usb2_base + USB2_LINECTRL1);
241 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
242
243 rcar_gen3_set_linectrl(ch, 1, 1);
244 rcar_gen3_set_host_mode(ch, 1);
245 rcar_gen3_enable_vbus_ctrl(ch, 0);
246
247 val = readl(usb2_base + USB2_LINECTRL1);
248 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
249}
250
251static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
252{
253 rcar_gen3_set_linectrl(ch, 0, 1);
254 rcar_gen3_set_host_mode(ch, 0);
255 rcar_gen3_enable_vbus_ctrl(ch, 1);
256}
257
258static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
259{
260 rcar_gen3_control_otg_irq(ch, 0);
261
262 rcar_gen3_enable_vbus_ctrl(ch, 1);
263 rcar_gen3_init_for_host(ch);
264
265 rcar_gen3_control_otg_irq(ch, 1);
266}
267
268static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
269{
270 if (!ch->uses_otg_pins)
271 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
272
273 if (ch->soc_no_adp_ctrl)
274 return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
275
276 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
277}
278
279static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
280{
281 if (!rcar_gen3_check_id(ch))
282 rcar_gen3_init_for_host(ch);
283 else
284 rcar_gen3_init_for_peri(ch);
285}
286
287static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
288{
289 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
290}
291
292static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
293{
294 if (rcar_gen3_is_host(ch))
295 return PHY_MODE_USB_HOST;
296
297 return PHY_MODE_USB_DEVICE;
298}
299
300static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
301{
302 int i;
303
304 for (i = 0; i < NUM_OF_PHYS; i++) {
305 if (ch->rphys[i].initialized)
306 return true;
307 }
308
309 return false;
310}
311
312static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
313{
314 int i;
315
316 for (i = 0; i < NUM_OF_PHYS; i++) {
317 if (ch->rphys[i].otg_initialized)
318 return false;
319 }
320
321 return true;
322}
323
324static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
325{
326 int i;
327
328 for (i = 0; i < NUM_OF_PHYS; i++) {
329 if (ch->rphys[i].powered)
330 return false;
331 }
332
333 return true;
334}
335
336static ssize_t role_store(struct device *dev, struct device_attribute *attr,
337 const char *buf, size_t count)
338{
339 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
340 bool is_b_device;
341 enum phy_mode cur_mode, new_mode;
342
343 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
344 return -EIO;
345
346 if (sysfs_streq(buf, "host"))
347 new_mode = PHY_MODE_USB_HOST;
348 else if (sysfs_streq(buf, "peripheral"))
349 new_mode = PHY_MODE_USB_DEVICE;
350 else
351 return -EINVAL;
352
353 /* is_b_device: true is B-Device. false is A-Device. */
354 is_b_device = rcar_gen3_check_id(ch);
355 cur_mode = rcar_gen3_get_phy_mode(ch);
356
357 /* If current and new mode is the same, this returns the error */
358 if (cur_mode == new_mode)
359 return -EINVAL;
360
361 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
362 if (!is_b_device) /* A-Peripheral */
363 rcar_gen3_init_from_a_peri_to_a_host(ch);
364 else /* B-Peripheral */
365 rcar_gen3_init_for_b_host(ch);
366 } else { /* And is_host must be true */
367 if (!is_b_device) /* A-Host */
368 rcar_gen3_init_for_a_peri(ch);
369 else /* B-Host */
370 rcar_gen3_init_for_peri(ch);
371 }
372
373 return count;
374}
375
376static ssize_t role_show(struct device *dev, struct device_attribute *attr,
377 char *buf)
378{
379 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
380
381 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
382 return -EIO;
383
384 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
385 "peripheral");
386}
387static DEVICE_ATTR_RW(role);
388
389static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
390{
391 void __iomem *usb2_base = ch->base;
392 u32 val;
393
394 /* Should not use functions of read-modify-write a register */
395 val = readl(usb2_base + USB2_LINECTRL1);
396 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
397 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
398 writel(val, usb2_base + USB2_LINECTRL1);
399
400 if (!ch->soc_no_adp_ctrl) {
401 val = readl(usb2_base + USB2_VBCTRL);
402 val &= ~USB2_VBCTRL_OCCLREN;
403 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
404 val = readl(usb2_base + USB2_ADPCTRL);
405 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
406 }
407 msleep(20);
408
409 writel(0xffffffff, usb2_base + USB2_OBINTSTA);
410 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
411
412 rcar_gen3_device_recognition(ch);
413}
414
415static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
416{
417 struct rcar_gen3_chan *ch = _ch;
418 void __iomem *usb2_base = ch->base;
419 u32 status = readl(usb2_base + USB2_OBINTSTA);
420 irqreturn_t ret = IRQ_NONE;
421
422 if (status & ch->obint_enable_bits) {
423 dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
424 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
425 rcar_gen3_device_recognition(ch);
426 ret = IRQ_HANDLED;
427 }
428
429 return ret;
430}
431
432static int rcar_gen3_phy_usb2_init(struct phy *p)
433{
434 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
435 struct rcar_gen3_chan *channel = rphy->ch;
436 void __iomem *usb2_base = channel->base;
437 u32 val;
438 int ret;
439
440 if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) {
441 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
442 ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq,
443 IRQF_SHARED, dev_name(channel->dev), channel);
444 if (ret < 0) {
445 dev_err(channel->dev, "No irq handler (%d)\n", channel->irq);
446 return ret;
447 }
448 }
449
450 /* Initialize USB2 part */
451 val = readl(usb2_base + USB2_INT_ENABLE);
452 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
453 writel(val, usb2_base + USB2_INT_ENABLE);
454 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
455 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
456
457 /* Initialize otg part */
458 if (channel->is_otg_channel) {
459 if (rcar_gen3_needs_init_otg(channel))
460 rcar_gen3_init_otg(channel);
461 rphy->otg_initialized = true;
462 }
463
464 rphy->initialized = true;
465
466 return 0;
467}
468
469static int rcar_gen3_phy_usb2_exit(struct phy *p)
470{
471 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
472 struct rcar_gen3_chan *channel = rphy->ch;
473 void __iomem *usb2_base = channel->base;
474 u32 val;
475
476 rphy->initialized = false;
477
478 if (channel->is_otg_channel)
479 rphy->otg_initialized = false;
480
481 val = readl(usb2_base + USB2_INT_ENABLE);
482 val &= ~rphy->int_enable_bits;
483 if (!rcar_gen3_is_any_rphy_initialized(channel))
484 val &= ~USB2_INT_ENABLE_UCOM_INTEN;
485 writel(val, usb2_base + USB2_INT_ENABLE);
486
487 if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel))
488 free_irq(channel->irq, channel);
489
490 return 0;
491}
492
493static int rcar_gen3_phy_usb2_power_on(struct phy *p)
494{
495 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
496 struct rcar_gen3_chan *channel = rphy->ch;
497 void __iomem *usb2_base = channel->base;
498 u32 val;
499 int ret = 0;
500
501 mutex_lock(&channel->lock);
502 if (!rcar_gen3_are_all_rphys_power_off(channel))
503 goto out;
504
505 if (channel->vbus) {
506 ret = regulator_enable(channel->vbus);
507 if (ret)
508 goto out;
509 }
510
511 val = readl(usb2_base + USB2_USBCTR);
512 val |= USB2_USBCTR_PLL_RST;
513 writel(val, usb2_base + USB2_USBCTR);
514 val &= ~USB2_USBCTR_PLL_RST;
515 writel(val, usb2_base + USB2_USBCTR);
516
517out:
518 /* The powered flag should be set for any other phys anyway */
519 rphy->powered = true;
520 mutex_unlock(&channel->lock);
521
522 return 0;
523}
524
525static int rcar_gen3_phy_usb2_power_off(struct phy *p)
526{
527 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
528 struct rcar_gen3_chan *channel = rphy->ch;
529 int ret = 0;
530
531 mutex_lock(&channel->lock);
532 rphy->powered = false;
533
534 if (!rcar_gen3_are_all_rphys_power_off(channel))
535 goto out;
536
537 if (channel->vbus)
538 ret = regulator_disable(channel->vbus);
539
540out:
541 mutex_unlock(&channel->lock);
542
543 return ret;
544}
545
546static const struct phy_ops rcar_gen3_phy_usb2_ops = {
547 .init = rcar_gen3_phy_usb2_init,
548 .exit = rcar_gen3_phy_usb2_exit,
549 .power_on = rcar_gen3_phy_usb2_power_on,
550 .power_off = rcar_gen3_phy_usb2_power_off,
551 .owner = THIS_MODULE,
552};
553
554static const struct phy_ops rz_g1c_phy_usb2_ops = {
555 .init = rcar_gen3_phy_usb2_init,
556 .exit = rcar_gen3_phy_usb2_exit,
557 .owner = THIS_MODULE,
558};
559
560static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
561 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
562 .no_adp_ctrl = false,
563};
564
565static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
566 .phy_usb2_ops = &rz_g1c_phy_usb2_ops,
567 .no_adp_ctrl = false,
568};
569
570static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
571 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
572 .no_adp_ctrl = true,
573};
574
575static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
576 {
577 .compatible = "renesas,usb2-phy-r8a77470",
578 .data = &rz_g1c_phy_usb2_data,
579 },
580 {
581 .compatible = "renesas,usb2-phy-r8a7795",
582 .data = &rcar_gen3_phy_usb2_data,
583 },
584 {
585 .compatible = "renesas,usb2-phy-r8a7796",
586 .data = &rcar_gen3_phy_usb2_data,
587 },
588 {
589 .compatible = "renesas,usb2-phy-r8a77965",
590 .data = &rcar_gen3_phy_usb2_data,
591 },
592 {
593 .compatible = "renesas,rzg2l-usb2-phy",
594 .data = &rz_g2l_phy_usb2_data,
595 },
596 {
597 .compatible = "renesas,rcar-gen3-usb2-phy",
598 .data = &rcar_gen3_phy_usb2_data,
599 },
600 { /* sentinel */ },
601};
602MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
603
604static const unsigned int rcar_gen3_phy_cable[] = {
605 EXTCON_USB,
606 EXTCON_USB_HOST,
607 EXTCON_NONE,
608};
609
610static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
611 const struct of_phandle_args *args)
612{
613 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
614
615 if (args->args_count == 0) /* For old version dts */
616 return ch->rphys[PHY_INDEX_BOTH_HC].phy;
617 else if (args->args_count > 1) /* Prevent invalid args count */
618 return ERR_PTR(-ENODEV);
619
620 if (args->args[0] >= NUM_OF_PHYS)
621 return ERR_PTR(-ENODEV);
622
623 return ch->rphys[args->args[0]].phy;
624}
625
626static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
627{
628 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
629 int i;
630
631 /*
632 * If one of device nodes has other dr_mode except UNKNOWN,
633 * this function returns UNKNOWN. To achieve backward compatibility,
634 * this loop starts the index as 0.
635 */
636 for (i = 0; i < NUM_OF_PHYS; i++) {
637 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
638
639 if (mode != USB_DR_MODE_UNKNOWN) {
640 if (candidate == USB_DR_MODE_UNKNOWN)
641 candidate = mode;
642 else if (candidate != mode)
643 return USB_DR_MODE_UNKNOWN;
644 }
645 }
646
647 return candidate;
648}
649
650static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
651{
652 const struct rcar_gen3_phy_drv_data *phy_data;
653 struct device *dev = &pdev->dev;
654 struct rcar_gen3_chan *channel;
655 struct phy_provider *provider;
656 int ret = 0, i;
657
658 if (!dev->of_node) {
659 dev_err(dev, "This driver needs device tree\n");
660 return -EINVAL;
661 }
662
663 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
664 if (!channel)
665 return -ENOMEM;
666
667 channel->base = devm_platform_ioremap_resource(pdev, 0);
668 if (IS_ERR(channel->base))
669 return PTR_ERR(channel->base);
670
671 channel->obint_enable_bits = USB2_OBINT_BITS;
672 /* get irq number here and request_irq for OTG in phy_init */
673 channel->irq = platform_get_irq_optional(pdev, 0);
674 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
675 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
676 channel->is_otg_channel = true;
677 channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
678 "renesas,no-otg-pins");
679 channel->extcon = devm_extcon_dev_allocate(dev,
680 rcar_gen3_phy_cable);
681 if (IS_ERR(channel->extcon))
682 return PTR_ERR(channel->extcon);
683
684 ret = devm_extcon_dev_register(dev, channel->extcon);
685 if (ret < 0) {
686 dev_err(dev, "Failed to register extcon\n");
687 return ret;
688 }
689 }
690
691 /*
692 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
693 * And then, phy-core will manage runtime pm for this device.
694 */
695 pm_runtime_enable(dev);
696
697 phy_data = of_device_get_match_data(dev);
698 if (!phy_data) {
699 ret = -EINVAL;
700 goto error;
701 }
702
703 channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
704 if (phy_data->no_adp_ctrl)
705 channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
706
707 mutex_init(&channel->lock);
708 for (i = 0; i < NUM_OF_PHYS; i++) {
709 channel->rphys[i].phy = devm_phy_create(dev, NULL,
710 phy_data->phy_usb2_ops);
711 if (IS_ERR(channel->rphys[i].phy)) {
712 dev_err(dev, "Failed to create USB2 PHY\n");
713 ret = PTR_ERR(channel->rphys[i].phy);
714 goto error;
715 }
716 channel->rphys[i].ch = channel;
717 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
718 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
719 }
720
721 channel->vbus = devm_regulator_get_optional(dev, "vbus");
722 if (IS_ERR(channel->vbus)) {
723 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
724 ret = PTR_ERR(channel->vbus);
725 goto error;
726 }
727 channel->vbus = NULL;
728 }
729
730 platform_set_drvdata(pdev, channel);
731 channel->dev = dev;
732
733 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
734 if (IS_ERR(provider)) {
735 dev_err(dev, "Failed to register PHY provider\n");
736 ret = PTR_ERR(provider);
737 goto error;
738 } else if (channel->is_otg_channel) {
739 ret = device_create_file(dev, &dev_attr_role);
740 if (ret < 0)
741 goto error;
742 }
743
744 return 0;
745
746error:
747 pm_runtime_disable(dev);
748
749 return ret;
750}
751
752static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
753{
754 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
755
756 if (channel->is_otg_channel)
757 device_remove_file(&pdev->dev, &dev_attr_role);
758
759 pm_runtime_disable(&pdev->dev);
760};
761
762static struct platform_driver rcar_gen3_phy_usb2_driver = {
763 .driver = {
764 .name = "phy_rcar_gen3_usb2",
765 .of_match_table = rcar_gen3_phy_usb2_match_table,
766 },
767 .probe = rcar_gen3_phy_usb2_probe,
768 .remove_new = rcar_gen3_phy_usb2_remove,
769};
770module_platform_driver(rcar_gen3_phy_usb2_driver);
771
772MODULE_LICENSE("GPL v2");
773MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
774MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");