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1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * AM335x Starter Kit
11 * http://www.ti.com/tool/tmdssk3358
12 */
13
14/dts-v1/;
15
16#include "am33xx.dtsi"
17#include <dt-bindings/pwm/pwm.h>
18#include <dt-bindings/interrupt-controller/irq.h>
19
20/ {
21 model = "TI AM335x EVM-SK";
22 compatible = "ti,am335x-evmsk", "ti,am33xx";
23
24 cpus {
25 cpu@0 {
26 cpu0-supply = <&vdd1_reg>;
27 };
28 };
29
30 memory@80000000 {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>; /* 256 MB */
33 };
34
35 chosen {
36 stdout-path = &uart0;
37 };
38
39 vbat: fixedregulator0 {
40 compatible = "regulator-fixed";
41 regulator-name = "vbat";
42 regulator-min-microvolt = <5000000>;
43 regulator-max-microvolt = <5000000>;
44 regulator-boot-on;
45 };
46
47 lis3_reg: fixedregulator1 {
48 compatible = "regulator-fixed";
49 regulator-name = "lis3_reg";
50 regulator-boot-on;
51 };
52
53 wl12xx_vmmc: fixedregulator2 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&wl12xx_gpio>;
56 compatible = "regulator-fixed";
57 regulator-name = "vwl1271";
58 regulator-min-microvolt = <1800000>;
59 regulator-max-microvolt = <1800000>;
60 gpio = <&gpio1 29 0>;
61 startup-delay-us = <70000>;
62 enable-active-high;
63 };
64
65 vtt_fixed: fixedregulator3 {
66 compatible = "regulator-fixed";
67 regulator-name = "vtt";
68 regulator-min-microvolt = <1500000>;
69 regulator-max-microvolt = <1500000>;
70 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
71 regulator-always-on;
72 regulator-boot-on;
73 enable-active-high;
74 };
75
76 leds {
77 pinctrl-names = "default";
78 pinctrl-0 = <&user_leds_s0>;
79
80 compatible = "gpio-leds";
81
82 led1 {
83 label = "evmsk:green:usr0";
84 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
85 default-state = "off";
86 };
87
88 led2 {
89 label = "evmsk:green:usr1";
90 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
91 default-state = "off";
92 };
93
94 led3 {
95 label = "evmsk:green:mmc0";
96 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
97 linux,default-trigger = "mmc0";
98 default-state = "off";
99 };
100
101 led4 {
102 label = "evmsk:green:heartbeat";
103 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
104 linux,default-trigger = "heartbeat";
105 default-state = "off";
106 };
107 };
108
109 gpio_buttons: gpio_buttons0 {
110 compatible = "gpio-keys";
111 #address-cells = <1>;
112 #size-cells = <0>;
113
114 switch1 {
115 label = "button0";
116 linux,code = <0x100>;
117 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
118 };
119
120 switch2 {
121 label = "button1";
122 linux,code = <0x101>;
123 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
124 };
125
126 switch3 {
127 label = "button2";
128 linux,code = <0x102>;
129 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
130 wakeup-source;
131 };
132
133 switch4 {
134 label = "button3";
135 linux,code = <0x103>;
136 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
137 };
138 };
139
140 backlight {
141 compatible = "pwm-backlight";
142 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
143 brightness-levels = <0 58 61 66 75 90 125 170 255>;
144 default-brightness-level = <8>;
145 };
146
147 sound {
148 compatible = "simple-audio-card";
149 simple-audio-card,name = "AM335x-EVMSK";
150 simple-audio-card,widgets =
151 "Headphone", "Headphone Jack";
152 simple-audio-card,routing =
153 "Headphone Jack", "HPLOUT",
154 "Headphone Jack", "HPROUT";
155 simple-audio-card,format = "dsp_b";
156 simple-audio-card,bitclock-master = <&sound_master>;
157 simple-audio-card,frame-master = <&sound_master>;
158 simple-audio-card,bitclock-inversion;
159
160 simple-audio-card,cpu {
161 sound-dai = <&mcasp1>;
162 };
163
164 sound_master: simple-audio-card,codec {
165 sound-dai = <&tlv320aic3106>;
166 system-clock-frequency = <24000000>;
167 };
168 };
169
170 panel {
171 compatible = "ti,tilcdc,panel";
172 pinctrl-names = "default", "sleep";
173 pinctrl-0 = <&lcd_pins_default>;
174 pinctrl-1 = <&lcd_pins_sleep>;
175 status = "okay";
176 panel-info {
177 ac-bias = <255>;
178 ac-bias-intrpt = <0>;
179 dma-burst-sz = <16>;
180 bpp = <32>;
181 fdd = <0x80>;
182 sync-edge = <0>;
183 sync-ctrl = <1>;
184 raster-order = <0>;
185 fifo-th = <0>;
186 };
187 display-timings {
188 480x272 {
189 hactive = <480>;
190 vactive = <272>;
191 hback-porch = <43>;
192 hfront-porch = <8>;
193 hsync-len = <4>;
194 vback-porch = <12>;
195 vfront-porch = <4>;
196 vsync-len = <10>;
197 clock-frequency = <9000000>;
198 hsync-active = <0>;
199 vsync-active = <0>;
200 };
201 };
202 };
203};
204
205&am33xx_pinmux {
206 pinctrl-names = "default";
207 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
208
209 lcd_pins_default: lcd_pins_default {
210 pinctrl-single,pins = <
211 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
212 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
213 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
214 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
215 AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
216 AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
217 AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
218 AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
219 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
220 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
221 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
222 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
223 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
224 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
225 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
226 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
227 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
228 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
229 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
230 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
231 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
232 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
233 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
234 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
235 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
236 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
237 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
238 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
239 >;
240 };
241
242 lcd_pins_sleep: lcd_pins_sleep {
243 pinctrl-single,pins = <
244 AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */
245 AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */
246 AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */
247 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */
248 AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */
249 AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */
250 AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */
251 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */
252 AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
253 AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
254 AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
255 AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
256 AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
257 AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
258 AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
259 AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
260 AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
261 AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
262 AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
263 AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
264 AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
265 AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
266 AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
267 AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
268 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */
269 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
270 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
271 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
272 >;
273 };
274
275
276 user_leds_s0: user_leds_s0 {
277 pinctrl-single,pins = <
278 AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
279 AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
280 AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
281 AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
282 >;
283 };
284
285 gpio_keys_s0: gpio_keys_s0 {
286 pinctrl-single,pins = <
287 AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
288 AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
289 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
290 AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
291 >;
292 };
293
294 i2c0_pins: pinmux_i2c0_pins {
295 pinctrl-single,pins = <
296 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
297 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
298 >;
299 };
300
301 uart0_pins: pinmux_uart0_pins {
302 pinctrl-single,pins = <
303 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
304 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
305 >;
306 };
307
308 clkout2_pin: pinmux_clkout2_pin {
309 pinctrl-single,pins = <
310 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
311 >;
312 };
313
314 ecap2_pins: backlight_pins {
315 pinctrl-single,pins = <
316 AM33XX_IOPAD(0x99c, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
317 >;
318 };
319
320 cpsw_default: cpsw_default {
321 pinctrl-single,pins = <
322 /* Slave 1 */
323 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
324 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
325 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
326 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
327 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
328 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
329 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
330 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
331 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
332 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
333 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
334 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
335
336 /* Slave 2 */
337 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
338 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
339 AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
340 AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
341 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
342 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
343 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
344 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
345 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
346 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
347 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
348 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
349 >;
350 };
351
352 cpsw_sleep: cpsw_sleep {
353 pinctrl-single,pins = <
354 /* Slave 1 reset value */
355 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
356 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
357 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
358 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
359 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
360 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
361 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
362 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
363 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
364 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
365 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
366 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
367
368 /* Slave 2 reset value*/
369 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
370 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
371 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
372 AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
373 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
374 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
375 AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
376 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
377 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
378 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
379 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
380 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
381 >;
382 };
383
384 davinci_mdio_default: davinci_mdio_default {
385 pinctrl-single,pins = <
386 /* MDIO */
387 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
388 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
389 >;
390 };
391
392 davinci_mdio_sleep: davinci_mdio_sleep {
393 pinctrl-single,pins = <
394 /* MDIO reset value */
395 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
396 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
397 >;
398 };
399
400 mmc1_pins: pinmux_mmc1_pins {
401 pinctrl-single,pins = <
402 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
403 >;
404 };
405
406 mcasp1_pins: mcasp1_pins {
407 pinctrl-single,pins = <
408 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
409 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
410 AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
411 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
412 >;
413 };
414
415 mcasp1_pins_sleep: mcasp1_pins_sleep {
416 pinctrl-single,pins = <
417 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
418 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
419 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
420 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
421 >;
422 };
423
424 mmc2_pins: pinmux_mmc2_pins {
425 pinctrl-single,pins = <
426 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
427 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
428 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
429 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
430 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
431 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
432 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
433 >;
434 };
435
436 wl12xx_gpio: pinmux_wl12xx_gpio {
437 pinctrl-single,pins = <
438 AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
439 >;
440 };
441};
442
443&uart0 {
444 pinctrl-names = "default";
445 pinctrl-0 = <&uart0_pins>;
446
447 status = "okay";
448};
449
450&i2c0 {
451 pinctrl-names = "default";
452 pinctrl-0 = <&i2c0_pins>;
453
454 status = "okay";
455 clock-frequency = <400000>;
456
457 tps: tps@2d {
458 reg = <0x2d>;
459 };
460
461 lis331dlh: lis331dlh@18 {
462 compatible = "st,lis331dlh", "st,lis3lv02d";
463 reg = <0x18>;
464 Vdd-supply = <&lis3_reg>;
465 Vdd_IO-supply = <&lis3_reg>;
466
467 st,click-single-x;
468 st,click-single-y;
469 st,click-single-z;
470 st,click-thresh-x = <10>;
471 st,click-thresh-y = <10>;
472 st,click-thresh-z = <10>;
473 st,irq1-click;
474 st,irq2-click;
475 st,wakeup-x-lo;
476 st,wakeup-x-hi;
477 st,wakeup-y-lo;
478 st,wakeup-y-hi;
479 st,wakeup-z-lo;
480 st,wakeup-z-hi;
481 st,min-limit-x = <120>;
482 st,min-limit-y = <120>;
483 st,min-limit-z = <140>;
484 st,max-limit-x = <550>;
485 st,max-limit-y = <550>;
486 st,max-limit-z = <750>;
487 };
488
489 tlv320aic3106: tlv320aic3106@1b {
490 #sound-dai-cells = <0>;
491 compatible = "ti,tlv320aic3106";
492 reg = <0x1b>;
493 status = "okay";
494
495 /* Regulators */
496 AVDD-supply = <&vaux2_reg>;
497 IOVDD-supply = <&vaux2_reg>;
498 DRVDD-supply = <&vaux2_reg>;
499 DVDD-supply = <&vbat>;
500 };
501};
502
503&usb {
504 status = "okay";
505};
506
507&usb_ctrl_mod {
508 status = "okay";
509};
510
511&usb0_phy {
512 status = "okay";
513};
514
515&usb1_phy {
516 status = "okay";
517};
518
519&usb0 {
520 status = "okay";
521};
522
523&usb1 {
524 status = "okay";
525 dr_mode = "host";
526};
527
528&cppi41dma {
529 status = "okay";
530};
531
532&epwmss2 {
533 status = "okay";
534
535 ecap2: ecap@48304100 {
536 status = "okay";
537 pinctrl-names = "default";
538 pinctrl-0 = <&ecap2_pins>;
539 };
540};
541
542#include "tps65910.dtsi"
543
544&tps {
545 vcc1-supply = <&vbat>;
546 vcc2-supply = <&vbat>;
547 vcc3-supply = <&vbat>;
548 vcc4-supply = <&vbat>;
549 vcc5-supply = <&vbat>;
550 vcc6-supply = <&vbat>;
551 vcc7-supply = <&vbat>;
552 vccio-supply = <&vbat>;
553
554 regulators {
555 vrtc_reg: regulator@0 {
556 regulator-always-on;
557 };
558
559 vio_reg: regulator@1 {
560 regulator-always-on;
561 };
562
563 vdd1_reg: regulator@2 {
564 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
565 regulator-name = "vdd_mpu";
566 regulator-min-microvolt = <912500>;
567 regulator-max-microvolt = <1351500>;
568 regulator-boot-on;
569 regulator-always-on;
570 };
571
572 vdd2_reg: regulator@3 {
573 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
574 regulator-name = "vdd_core";
575 regulator-min-microvolt = <912500>;
576 regulator-max-microvolt = <1150000>;
577 regulator-boot-on;
578 regulator-always-on;
579 };
580
581 vdd3_reg: regulator@4 {
582 regulator-always-on;
583 };
584
585 vdig1_reg: regulator@5 {
586 regulator-always-on;
587 };
588
589 vdig2_reg: regulator@6 {
590 regulator-always-on;
591 };
592
593 vpll_reg: regulator@7 {
594 regulator-always-on;
595 };
596
597 vdac_reg: regulator@8 {
598 regulator-always-on;
599 };
600
601 vaux1_reg: regulator@9 {
602 regulator-always-on;
603 };
604
605 vaux2_reg: regulator@10 {
606 regulator-always-on;
607 };
608
609 vaux33_reg: regulator@11 {
610 regulator-always-on;
611 };
612
613 vmmc_reg: regulator@12 {
614 regulator-min-microvolt = <1800000>;
615 regulator-max-microvolt = <3300000>;
616 regulator-always-on;
617 };
618 };
619};
620
621&mac {
622 pinctrl-names = "default", "sleep";
623 pinctrl-0 = <&cpsw_default>;
624 pinctrl-1 = <&cpsw_sleep>;
625 dual_emac = <1>;
626 status = "okay";
627};
628
629&davinci_mdio {
630 pinctrl-names = "default", "sleep";
631 pinctrl-0 = <&davinci_mdio_default>;
632 pinctrl-1 = <&davinci_mdio_sleep>;
633 status = "okay";
634};
635
636&cpsw_emac0 {
637 phy_id = <&davinci_mdio>, <0>;
638 phy-mode = "rgmii-txid";
639 dual_emac_res_vlan = <1>;
640};
641
642&cpsw_emac1 {
643 phy_id = <&davinci_mdio>, <1>;
644 phy-mode = "rgmii-txid";
645 dual_emac_res_vlan = <2>;
646};
647
648&mmc1 {
649 status = "okay";
650 vmmc-supply = <&vmmc_reg>;
651 bus-width = <4>;
652 pinctrl-names = "default";
653 pinctrl-0 = <&mmc1_pins>;
654 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
655};
656
657&sham {
658 status = "okay";
659};
660
661&aes {
662 status = "okay";
663};
664
665&gpio0 {
666 ti,no-reset-on-init;
667};
668
669&mmc2 {
670 status = "okay";
671 vmmc-supply = <&wl12xx_vmmc>;
672 ti,non-removable;
673 bus-width = <4>;
674 cap-power-off-card;
675 keep-power-in-suspend;
676 pinctrl-names = "default";
677 pinctrl-0 = <&mmc2_pins>;
678
679 #address-cells = <1>;
680 #size-cells = <0>;
681 wlcore: wlcore@2 {
682 compatible = "ti,wl1271";
683 reg = <2>;
684 interrupt-parent = <&gpio0>;
685 interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
686 ref-clock-frequency = <38400000>;
687 };
688};
689
690&mcasp1 {
691 #sound-dai-cells = <0>;
692 pinctrl-names = "default", "sleep";
693 pinctrl-0 = <&mcasp1_pins>;
694 pinctrl-1 = <&mcasp1_pins_sleep>;
695
696 status = "okay";
697
698 op-mode = <0>; /* MCASP_IIS_MODE */
699 tdm-slots = <2>;
700 /* 4 serializers */
701 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
702 0 0 1 2
703 >;
704 tx-num-evt = <32>;
705 rx-num-evt = <32>;
706};
707
708&tscadc {
709 status = "okay";
710 tsc {
711 ti,wires = <4>;
712 ti,x-plate-resistance = <200>;
713 ti,coordinate-readouts = <5>;
714 ti,wire-config = <0x00 0x11 0x22 0x33>;
715 };
716};
717
718&lcdc {
719 status = "okay";
720
721 blue-and-red-wiring = "crossed";
722};
723
724&rtc {
725 clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
726 clock-names = "ext-clk", "int-clk";
727};