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v4.17
 1/*
 2 * Copyright (C) 2017 Glider bvba
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License as published by
 6 * the Free Software Foundation; either version 2 of the License, or
 7 * (at your option) any later version.
 8 */
 9#ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
10#define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
11
12#include <dt-bindings/clock/renesas-cpg-mssr.h>
13
14/* r8a77995 CPG Core Clocks */
15#define R8A77995_CLK_Z2			0
16#define R8A77995_CLK_ZG			1
17#define R8A77995_CLK_ZTR		2
18#define R8A77995_CLK_ZT			3
19#define R8A77995_CLK_ZX			4
20#define R8A77995_CLK_S0D1		5
21#define R8A77995_CLK_S1D1		6
22#define R8A77995_CLK_S1D2		7
23#define R8A77995_CLK_S1D4		8
24#define R8A77995_CLK_S2D1		9
25#define R8A77995_CLK_S2D2		10
26#define R8A77995_CLK_S2D4		11
27#define R8A77995_CLK_S3D1		12
28#define R8A77995_CLK_S3D2		13
29#define R8A77995_CLK_S3D4		14
30#define R8A77995_CLK_S1D4C		15
31#define R8A77995_CLK_S3D1C		16
32#define R8A77995_CLK_S3D2C		17
33#define R8A77995_CLK_S3D4C		18
34#define R8A77995_CLK_LB			19
35#define R8A77995_CLK_CL			20
36#define R8A77995_CLK_ZB3		21
37#define R8A77995_CLK_ZB3D2		22
38#define R8A77995_CLK_CR			23
39#define R8A77995_CLK_CRD2		24
40#define R8A77995_CLK_SD0H		25
41#define R8A77995_CLK_SD0		26
42#define R8A77995_CLK_SSP2		27
43#define R8A77995_CLK_SSP1		28
44#define R8A77995_CLK_RPC		29
45#define R8A77995_CLK_RPCD2		30
46#define R8A77995_CLK_ZA2		31
47#define R8A77995_CLK_ZA8		32
48#define R8A77995_CLK_Z2D		33
49#define R8A77995_CLK_CANFD		34
50#define R8A77995_CLK_MSO		35
51#define R8A77995_CLK_R			36
52#define R8A77995_CLK_OSC		37
53#define R8A77995_CLK_LV0		38
54#define R8A77995_CLK_LV1		39
55#define R8A77995_CLK_CP			40
 
56
57#endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */
v6.8
 1/* SPDX-License-Identifier: GPL-2.0+
 
 2 *
 3 * Copyright (C) 2017 Glider bvba
 
 
 
 4 */
 5#ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
 6#define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
 7
 8#include <dt-bindings/clock/renesas-cpg-mssr.h>
 9
10/* r8a77995 CPG Core Clocks */
11#define R8A77995_CLK_Z2			0
12#define R8A77995_CLK_ZG			1
13#define R8A77995_CLK_ZTR		2
14#define R8A77995_CLK_ZT			3
15#define R8A77995_CLK_ZX			4
16#define R8A77995_CLK_S0D1		5
17#define R8A77995_CLK_S1D1		6
18#define R8A77995_CLK_S1D2		7
19#define R8A77995_CLK_S1D4		8
20#define R8A77995_CLK_S2D1		9
21#define R8A77995_CLK_S2D2		10
22#define R8A77995_CLK_S2D4		11
23#define R8A77995_CLK_S3D1		12
24#define R8A77995_CLK_S3D2		13
25#define R8A77995_CLK_S3D4		14
26#define R8A77995_CLK_S1D4C		15
27#define R8A77995_CLK_S3D1C		16
28#define R8A77995_CLK_S3D2C		17
29#define R8A77995_CLK_S3D4C		18
30#define R8A77995_CLK_LB			19
31#define R8A77995_CLK_CL			20
32#define R8A77995_CLK_ZB3		21
33#define R8A77995_CLK_ZB3D2		22
34#define R8A77995_CLK_CR			23
35#define R8A77995_CLK_CRD2		24
36#define R8A77995_CLK_SD0H		25
37#define R8A77995_CLK_SD0		26
38/* CLK_SSP2 was removed */
39/* CLK_SSP1 was removed */
40#define R8A77995_CLK_RPC		29
41#define R8A77995_CLK_RPCD2		30
42#define R8A77995_CLK_ZA2		31
43#define R8A77995_CLK_ZA8		32
44#define R8A77995_CLK_Z2D		33
45#define R8A77995_CLK_CANFD		34
46#define R8A77995_CLK_MSO		35
47#define R8A77995_CLK_R			36
48#define R8A77995_CLK_OSC		37
49#define R8A77995_CLK_LV0		38
50#define R8A77995_CLK_LV1		39
51#define R8A77995_CLK_CP			40
52#define R8A77995_CLK_CPEX		41
53
54#endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */