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1// SPDX-License-Identifier: GPL-2.0
2#include <linux/io.h>
3#include <linux/slab.h>
4#include <linux/memblock.h>
5#include <linux/mem_encrypt.h>
6
7#include <asm/set_memory.h>
8#include <asm/pgtable.h>
9#include <asm/realmode.h>
10#include <asm/tlbflush.h>
11
12struct real_mode_header *real_mode_header;
13u32 *trampoline_cr4_features;
14
15/* Hold the pgd entry used on booting additional CPUs */
16pgd_t trampoline_pgd_entry;
17
18void __init set_real_mode_mem(phys_addr_t mem, size_t size)
19{
20 void *base = __va(mem);
21
22 real_mode_header = (struct real_mode_header *) base;
23 printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",
24 base, (unsigned long long)mem, size);
25}
26
27void __init reserve_real_mode(void)
28{
29 phys_addr_t mem;
30 size_t size = real_mode_size_needed();
31
32 if (!size)
33 return;
34
35 WARN_ON(slab_is_available());
36
37 /* Has to be under 1M so we can execute real-mode AP code. */
38 mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
39 if (!mem) {
40 pr_info("No sub-1M memory is available for the trampoline\n");
41 return;
42 }
43
44 memblock_reserve(mem, size);
45 set_real_mode_mem(mem, size);
46}
47
48static void __init setup_real_mode(void)
49{
50 u16 real_mode_seg;
51 const u32 *rel;
52 u32 count;
53 unsigned char *base;
54 unsigned long phys_base;
55 struct trampoline_header *trampoline_header;
56 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
57#ifdef CONFIG_X86_64
58 u64 *trampoline_pgd;
59 u64 efer;
60#endif
61
62 base = (unsigned char *)real_mode_header;
63
64 /*
65 * If SME is active, the trampoline area will need to be in
66 * decrypted memory in order to bring up other processors
67 * successfully. This is not needed for SEV.
68 */
69 if (sme_active())
70 set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT);
71
72 memcpy(base, real_mode_blob, size);
73
74 phys_base = __pa(base);
75 real_mode_seg = phys_base >> 4;
76
77 rel = (u32 *) real_mode_relocs;
78
79 /* 16-bit segment relocations. */
80 count = *rel++;
81 while (count--) {
82 u16 *seg = (u16 *) (base + *rel++);
83 *seg = real_mode_seg;
84 }
85
86 /* 32-bit linear relocations. */
87 count = *rel++;
88 while (count--) {
89 u32 *ptr = (u32 *) (base + *rel++);
90 *ptr += phys_base;
91 }
92
93 /* Must be perfomed *after* relocation. */
94 trampoline_header = (struct trampoline_header *)
95 __va(real_mode_header->trampoline_header);
96
97#ifdef CONFIG_X86_32
98 trampoline_header->start = __pa_symbol(startup_32_smp);
99 trampoline_header->gdt_limit = __BOOT_DS + 7;
100 trampoline_header->gdt_base = __pa_symbol(boot_gdt);
101#else
102 /*
103 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
104 * so we need to mask it out.
105 */
106 rdmsrl(MSR_EFER, efer);
107 trampoline_header->efer = efer & ~EFER_LMA;
108
109 trampoline_header->start = (u64) secondary_startup_64;
110 trampoline_cr4_features = &trampoline_header->cr4;
111 *trampoline_cr4_features = mmu_cr4_features;
112
113 trampoline_header->flags = 0;
114 if (sme_active())
115 trampoline_header->flags |= TH_FLAGS_SME_ACTIVE;
116
117 trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
118 trampoline_pgd[0] = trampoline_pgd_entry.pgd;
119 trampoline_pgd[511] = init_top_pgt[511].pgd;
120#endif
121}
122
123/*
124 * reserve_real_mode() gets called very early, to guarantee the
125 * availability of low memory. This is before the proper kernel page
126 * tables are set up, so we cannot set page permissions in that
127 * function. Also trampoline code will be executed by APs so we
128 * need to mark it executable at do_pre_smp_initcalls() at least,
129 * thus run it as a early_initcall().
130 */
131static void __init set_real_mode_permissions(void)
132{
133 unsigned char *base = (unsigned char *) real_mode_header;
134 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
135
136 size_t ro_size =
137 PAGE_ALIGN(real_mode_header->ro_end) -
138 __pa(base);
139
140 size_t text_size =
141 PAGE_ALIGN(real_mode_header->ro_end) -
142 real_mode_header->text_start;
143
144 unsigned long text_start =
145 (unsigned long) __va(real_mode_header->text_start);
146
147 set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
148 set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
149 set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
150}
151
152static int __init init_real_mode(void)
153{
154 if (!real_mode_header)
155 panic("Real mode trampoline was not allocated");
156
157 setup_real_mode();
158 set_real_mode_permissions();
159
160 return 0;
161}
162early_initcall(init_real_mode);
1// SPDX-License-Identifier: GPL-2.0
2#include <linux/io.h>
3#include <linux/slab.h>
4#include <linux/memblock.h>
5#include <linux/cc_platform.h>
6#include <linux/pgtable.h>
7
8#include <asm/set_memory.h>
9#include <asm/realmode.h>
10#include <asm/tlbflush.h>
11#include <asm/crash.h>
12#include <asm/sev.h>
13
14struct real_mode_header *real_mode_header;
15u32 *trampoline_cr4_features;
16
17/* Hold the pgd entry used on booting additional CPUs */
18pgd_t trampoline_pgd_entry;
19
20void load_trampoline_pgtable(void)
21{
22#ifdef CONFIG_X86_32
23 load_cr3(initial_page_table);
24#else
25 /*
26 * This function is called before exiting to real-mode and that will
27 * fail with CR4.PCIDE still set.
28 */
29 if (boot_cpu_has(X86_FEATURE_PCID))
30 cr4_clear_bits(X86_CR4_PCIDE);
31
32 write_cr3(real_mode_header->trampoline_pgd);
33#endif
34
35 /*
36 * The CR3 write above will not flush global TLB entries.
37 * Stale, global entries from previous page tables may still be
38 * present. Flush those stale entries.
39 *
40 * This ensures that memory accessed while running with
41 * trampoline_pgd is *actually* mapped into trampoline_pgd.
42 */
43 __flush_tlb_all();
44}
45
46void __init reserve_real_mode(void)
47{
48 phys_addr_t mem;
49 size_t size = real_mode_size_needed();
50
51 if (!size)
52 return;
53
54 WARN_ON(slab_is_available());
55
56 /* Has to be under 1M so we can execute real-mode AP code. */
57 mem = memblock_phys_alloc_range(size, PAGE_SIZE, 0, 1<<20);
58 if (!mem)
59 pr_info("No sub-1M memory is available for the trampoline\n");
60 else
61 set_real_mode_mem(mem);
62
63 /*
64 * Unconditionally reserve the entire first 1M, see comment in
65 * setup_arch().
66 */
67 memblock_reserve(0, SZ_1M);
68}
69
70static void __init sme_sev_setup_real_mode(struct trampoline_header *th)
71{
72#ifdef CONFIG_AMD_MEM_ENCRYPT
73 if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
74 th->flags |= TH_FLAGS_SME_ACTIVE;
75
76 if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) {
77 /*
78 * Skip the call to verify_cpu() in secondary_startup_64 as it
79 * will cause #VC exceptions when the AP can't handle them yet.
80 */
81 th->start = (u64) secondary_startup_64_no_verify;
82
83 if (sev_es_setup_ap_jump_table(real_mode_header))
84 panic("Failed to get/update SEV-ES AP Jump Table");
85 }
86#endif
87}
88
89static void __init setup_real_mode(void)
90{
91 u16 real_mode_seg;
92 const u32 *rel;
93 u32 count;
94 unsigned char *base;
95 unsigned long phys_base;
96 struct trampoline_header *trampoline_header;
97 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
98#ifdef CONFIG_X86_64
99 u64 *trampoline_pgd;
100 u64 efer;
101 int i;
102#endif
103
104 base = (unsigned char *)real_mode_header;
105
106 /*
107 * If SME is active, the trampoline area will need to be in
108 * decrypted memory in order to bring up other processors
109 * successfully. This is not needed for SEV.
110 */
111 if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
112 set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT);
113
114 memcpy(base, real_mode_blob, size);
115
116 phys_base = __pa(base);
117 real_mode_seg = phys_base >> 4;
118
119 rel = (u32 *) real_mode_relocs;
120
121 /* 16-bit segment relocations. */
122 count = *rel++;
123 while (count--) {
124 u16 *seg = (u16 *) (base + *rel++);
125 *seg = real_mode_seg;
126 }
127
128 /* 32-bit linear relocations. */
129 count = *rel++;
130 while (count--) {
131 u32 *ptr = (u32 *) (base + *rel++);
132 *ptr += phys_base;
133 }
134
135 /* Must be performed *after* relocation. */
136 trampoline_header = (struct trampoline_header *)
137 __va(real_mode_header->trampoline_header);
138
139#ifdef CONFIG_X86_32
140 trampoline_header->start = __pa_symbol(startup_32_smp);
141 trampoline_header->gdt_limit = __BOOT_DS + 7;
142 trampoline_header->gdt_base = __pa_symbol(boot_gdt);
143#else
144 /*
145 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
146 * so we need to mask it out.
147 */
148 rdmsrl(MSR_EFER, efer);
149 trampoline_header->efer = efer & ~EFER_LMA;
150
151 trampoline_header->start = (u64) secondary_startup_64;
152 trampoline_cr4_features = &trampoline_header->cr4;
153 *trampoline_cr4_features = mmu_cr4_features;
154
155 trampoline_header->flags = 0;
156
157 trampoline_lock = &trampoline_header->lock;
158 *trampoline_lock = 0;
159
160 trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
161
162 /* Map the real mode stub as virtual == physical */
163 trampoline_pgd[0] = trampoline_pgd_entry.pgd;
164
165 /*
166 * Include the entirety of the kernel mapping into the trampoline
167 * PGD. This way, all mappings present in the normal kernel page
168 * tables are usable while running on trampoline_pgd.
169 */
170 for (i = pgd_index(__PAGE_OFFSET); i < PTRS_PER_PGD; i++)
171 trampoline_pgd[i] = init_top_pgt[i].pgd;
172#endif
173
174 sme_sev_setup_real_mode(trampoline_header);
175}
176
177/*
178 * reserve_real_mode() gets called very early, to guarantee the
179 * availability of low memory. This is before the proper kernel page
180 * tables are set up, so we cannot set page permissions in that
181 * function. Also trampoline code will be executed by APs so we
182 * need to mark it executable at do_pre_smp_initcalls() at least,
183 * thus run it as a early_initcall().
184 */
185static void __init set_real_mode_permissions(void)
186{
187 unsigned char *base = (unsigned char *) real_mode_header;
188 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
189
190 size_t ro_size =
191 PAGE_ALIGN(real_mode_header->ro_end) -
192 __pa(base);
193
194 size_t text_size =
195 PAGE_ALIGN(real_mode_header->ro_end) -
196 real_mode_header->text_start;
197
198 unsigned long text_start =
199 (unsigned long) __va(real_mode_header->text_start);
200
201 set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
202 set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
203 set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
204}
205
206void __init init_real_mode(void)
207{
208 if (!real_mode_header)
209 panic("Real mode trampoline was not allocated");
210
211 setup_real_mode();
212 set_real_mode_permissions();
213}
214
215static int __init do_init_real_mode(void)
216{
217 x86_platform.realmode_init();
218 return 0;
219}
220early_initcall(do_init_real_mode);