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1/*
2 * SMP initialisation and IPI support
3 * Based on arch/arm64/kernel/smp.c
4 *
5 * Copyright (C) 2012 ARM Ltd.
6 * Copyright (C) 2015 Regents of the University of California
7 * Copyright (C) 2017 SiFive
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/mm.h>
23#include <linux/sched.h>
24#include <linux/kernel_stat.h>
25#include <linux/notifier.h>
26#include <linux/cpu.h>
27#include <linux/percpu.h>
28#include <linux/delay.h>
29#include <linux/err.h>
30#include <linux/irq.h>
31#include <linux/of.h>
32#include <linux/sched/task_stack.h>
33#include <asm/irq.h>
34#include <asm/mmu_context.h>
35#include <asm/tlbflush.h>
36#include <asm/sections.h>
37#include <asm/sbi.h>
38
39void *__cpu_up_stack_pointer[NR_CPUS];
40void *__cpu_up_task_pointer[NR_CPUS];
41
42void __init smp_prepare_boot_cpu(void)
43{
44}
45
46void __init smp_prepare_cpus(unsigned int max_cpus)
47{
48}
49
50void __init setup_smp(void)
51{
52 struct device_node *dn = NULL;
53 int hart, im_okay_therefore_i_am = 0;
54
55 while ((dn = of_find_node_by_type(dn, "cpu"))) {
56 hart = riscv_of_processor_hart(dn);
57 if (hart >= 0) {
58 set_cpu_possible(hart, true);
59 set_cpu_present(hart, true);
60 if (hart == smp_processor_id()) {
61 BUG_ON(im_okay_therefore_i_am);
62 im_okay_therefore_i_am = 1;
63 }
64 }
65 }
66
67 BUG_ON(!im_okay_therefore_i_am);
68}
69
70int __cpu_up(unsigned int cpu, struct task_struct *tidle)
71{
72 tidle->thread_info.cpu = cpu;
73
74 /*
75 * On RISC-V systems, all harts boot on their own accord. Our _start
76 * selects the first hart to boot the kernel and causes the remainder
77 * of the harts to spin in a loop waiting for their stack pointer to be
78 * setup by that main hart. Writing __cpu_up_stack_pointer signals to
79 * the spinning harts that they can continue the boot process.
80 */
81 smp_mb();
82 __cpu_up_stack_pointer[cpu] = task_stack_page(tidle) + THREAD_SIZE;
83 __cpu_up_task_pointer[cpu] = tidle;
84
85 while (!cpu_online(cpu))
86 cpu_relax();
87
88 return 0;
89}
90
91void __init smp_cpus_done(unsigned int max_cpus)
92{
93}
94
95/*
96 * C entry point for a secondary processor.
97 */
98asmlinkage void __init smp_callin(void)
99{
100 struct mm_struct *mm = &init_mm;
101
102 /* All kernel threads share the same mm context. */
103 atomic_inc(&mm->mm_count);
104 current->active_mm = mm;
105
106 trap_init();
107 init_clockevent();
108 notify_cpu_starting(smp_processor_id());
109 set_cpu_online(smp_processor_id(), 1);
110 local_flush_tlb_all();
111 local_irq_enable();
112 preempt_disable();
113 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
114}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/acpi.h>
12#include <linux/arch_topology.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/kernel_stat.h>
19#include <linux/notifier.h>
20#include <linux/cpu.h>
21#include <linux/percpu.h>
22#include <linux/delay.h>
23#include <linux/err.h>
24#include <linux/irq.h>
25#include <linux/of.h>
26#include <linux/sched/task_stack.h>
27#include <linux/sched/mm.h>
28
29#include <asm/cpufeature.h>
30#include <asm/cpu_ops.h>
31#include <asm/cpufeature.h>
32#include <asm/irq.h>
33#include <asm/mmu_context.h>
34#include <asm/numa.h>
35#include <asm/tlbflush.h>
36#include <asm/sections.h>
37#include <asm/smp.h>
38#include <uapi/asm/hwcap.h>
39#include <asm/vector.h>
40
41#include "head.h"
42
43static DECLARE_COMPLETION(cpu_running);
44
45void __init smp_prepare_boot_cpu(void)
46{
47}
48
49void __init smp_prepare_cpus(unsigned int max_cpus)
50{
51 int cpuid;
52 unsigned int curr_cpuid;
53
54 init_cpu_topology();
55
56 curr_cpuid = smp_processor_id();
57 store_cpu_topology(curr_cpuid);
58 numa_store_cpu_info(curr_cpuid);
59 numa_add_cpu(curr_cpuid);
60
61 /* This covers non-smp usecase mandated by "nosmp" option */
62 if (max_cpus == 0)
63 return;
64
65 for_each_possible_cpu(cpuid) {
66 if (cpuid == curr_cpuid)
67 continue;
68 set_cpu_present(cpuid, true);
69 numa_store_cpu_info(cpuid);
70 }
71}
72
73#ifdef CONFIG_ACPI
74static unsigned int cpu_count = 1;
75
76static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end)
77{
78 unsigned long hart;
79 static bool found_boot_cpu;
80 struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header;
81
82 /*
83 * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED
84 * bit in the flag is not enabled, it means OS should not try to enable
85 * the cpu to which RINTC belongs.
86 */
87 if (!(processor->flags & ACPI_MADT_ENABLED))
88 return 0;
89
90 if (BAD_MADT_ENTRY(processor, end))
91 return -EINVAL;
92
93 acpi_table_print_madt_entry(&header->common);
94
95 hart = processor->hart_id;
96 if (hart == INVALID_HARTID) {
97 pr_warn("Invalid hartid\n");
98 return 0;
99 }
100
101 if (hart == cpuid_to_hartid_map(0)) {
102 BUG_ON(found_boot_cpu);
103 found_boot_cpu = true;
104 early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count));
105 return 0;
106 }
107
108 if (cpu_count >= NR_CPUS) {
109 pr_warn("NR_CPUS is too small for the number of ACPI tables.\n");
110 return 0;
111 }
112
113 cpuid_to_hartid_map(cpu_count) = hart;
114 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count));
115 cpu_count++;
116
117 return 0;
118}
119
120static void __init acpi_parse_and_init_cpus(void)
121{
122 acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0);
123}
124#else
125#define acpi_parse_and_init_cpus(...) do { } while (0)
126#endif
127
128static void __init of_parse_and_init_cpus(void)
129{
130 struct device_node *dn;
131 unsigned long hart;
132 bool found_boot_cpu = false;
133 int cpuid = 1;
134 int rc;
135
136 for_each_of_cpu_node(dn) {
137 rc = riscv_early_of_processor_hartid(dn, &hart);
138 if (rc < 0)
139 continue;
140
141 if (hart == cpuid_to_hartid_map(0)) {
142 BUG_ON(found_boot_cpu);
143 found_boot_cpu = 1;
144 early_map_cpu_to_node(0, of_node_to_nid(dn));
145 continue;
146 }
147 if (cpuid >= NR_CPUS) {
148 pr_warn("Invalid cpuid [%d] for hartid [%lu]\n",
149 cpuid, hart);
150 continue;
151 }
152
153 cpuid_to_hartid_map(cpuid) = hart;
154 early_map_cpu_to_node(cpuid, of_node_to_nid(dn));
155 cpuid++;
156 }
157
158 BUG_ON(!found_boot_cpu);
159
160 if (cpuid > nr_cpu_ids)
161 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n",
162 cpuid, nr_cpu_ids);
163}
164
165void __init setup_smp(void)
166{
167 int cpuid;
168
169 cpu_set_ops();
170
171 if (acpi_disabled)
172 of_parse_and_init_cpus();
173 else
174 acpi_parse_and_init_cpus();
175
176 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++)
177 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID)
178 set_cpu_possible(cpuid, true);
179}
180
181static int start_secondary_cpu(int cpu, struct task_struct *tidle)
182{
183 if (cpu_ops->cpu_start)
184 return cpu_ops->cpu_start(cpu, tidle);
185
186 return -EOPNOTSUPP;
187}
188
189int __cpu_up(unsigned int cpu, struct task_struct *tidle)
190{
191 int ret = 0;
192 tidle->thread_info.cpu = cpu;
193
194 ret = start_secondary_cpu(cpu, tidle);
195 if (!ret) {
196 wait_for_completion_timeout(&cpu_running,
197 msecs_to_jiffies(1000));
198
199 if (!cpu_online(cpu)) {
200 pr_crit("CPU%u: failed to come online\n", cpu);
201 ret = -EIO;
202 }
203 } else {
204 pr_crit("CPU%u: failed to start\n", cpu);
205 }
206
207 return ret;
208}
209
210void __init smp_cpus_done(unsigned int max_cpus)
211{
212}
213
214/*
215 * C entry point for a secondary processor.
216 */
217asmlinkage __visible void smp_callin(void)
218{
219 struct mm_struct *mm = &init_mm;
220 unsigned int curr_cpuid = smp_processor_id();
221
222 /* All kernel threads share the same mm context. */
223 mmgrab(mm);
224 current->active_mm = mm;
225
226 store_cpu_topology(curr_cpuid);
227 notify_cpu_starting(curr_cpuid);
228
229 riscv_ipi_enable();
230
231 numa_add_cpu(curr_cpuid);
232 set_cpu_online(curr_cpuid, 1);
233
234 if (has_vector()) {
235 if (riscv_v_setup_vsize())
236 elf_hwcap &= ~COMPAT_HWCAP_ISA_V;
237 }
238
239 riscv_user_isa_enable();
240
241 /*
242 * Remote TLB flushes are ignored while the CPU is offline, so emit
243 * a local TLB flush right now just in case.
244 */
245 local_flush_tlb_all();
246 complete(&cpu_running);
247 /*
248 * Disable preemption before enabling interrupts, so we don't try to
249 * schedule a CPU that hasn't actually started yet.
250 */
251 local_irq_enable();
252 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
253}