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1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_BINFMT_ELF_STATE
6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_DISCARD_MEMBLOCK
8 select ARCH_HAS_ELF_RANDOMIZE
9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
10 select ARCH_SUPPORTS_UPROBES
11 select ARCH_USE_BUILTIN_BSWAP
12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
13 select ARCH_USE_QUEUED_RWLOCKS
14 select ARCH_USE_QUEUED_SPINLOCKS
15 select ARCH_WANT_IPC_PARSE_VERSION
16 select BUILDTIME_EXTABLE_SORT
17 select CLONE_BACKWARDS
18 select CPU_PM if CPU_IDLE
19 select GENERIC_ATOMIC64 if !64BIT
20 select GENERIC_CLOCKEVENTS
21 select GENERIC_CMOS_UPDATE
22 select GENERIC_CPU_AUTOPROBE
23 select GENERIC_IRQ_PROBE
24 select GENERIC_IRQ_SHOW
25 select GENERIC_PCI_IOMAP
26 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
27 select GENERIC_SMP_IDLE_THREAD
28 select GENERIC_TIME_VSYSCALL
29 select HANDLE_DOMAIN_IRQ
30 select HAVE_ARCH_JUMP_LABEL
31 select HAVE_ARCH_KGDB
32 select HAVE_ARCH_MMAP_RND_BITS if MMU
33 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
34 select HAVE_ARCH_SECCOMP_FILTER
35 select HAVE_ARCH_TRACEHOOK
36 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
37 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
38 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
39 select HAVE_CC_STACKPROTECTOR
40 select HAVE_CONTEXT_TRACKING
41 select HAVE_COPY_THREAD_TLS
42 select HAVE_C_RECORDMCOUNT
43 select HAVE_DEBUG_KMEMLEAK
44 select HAVE_DEBUG_STACKOVERFLOW
45 select HAVE_DMA_API_DEBUG
46 select HAVE_DMA_CONTIGUOUS
47 select HAVE_DYNAMIC_FTRACE
48 select HAVE_EXIT_THREAD
49 select HAVE_FTRACE_MCOUNT_RECORD
50 select HAVE_FUNCTION_GRAPH_TRACER
51 select HAVE_FUNCTION_TRACER
52 select HAVE_GENERIC_DMA_COHERENT
53 select HAVE_IDE
54 select HAVE_IRQ_EXIT_ON_IRQ_STACK
55 select HAVE_IRQ_TIME_ACCOUNTING
56 select HAVE_KPROBES
57 select HAVE_KRETPROBES
58 select HAVE_MEMBLOCK
59 select HAVE_MEMBLOCK_NODE_MAP
60 select HAVE_MOD_ARCH_SPECIFIC
61 select HAVE_NMI
62 select HAVE_OPROFILE
63 select HAVE_PERF_EVENTS
64 select HAVE_REGS_AND_STACK_ACCESS_API
65 select HAVE_SYSCALL_TRACEPOINTS
66 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
67 select IRQ_FORCED_THREADING
68 select MODULES_USE_ELF_RELA if MODULES && 64BIT
69 select MODULES_USE_ELF_REL if MODULES
70 select PERF_USE_VMALLOC
71 select RTC_LIB if !MACH_LOONGSON64
72 select SYSCTL_EXCEPTION_TRACE
73 select VIRT_TO_BUS
74
75menu "Machine selection"
76
77choice
78 prompt "System type"
79 default MIPS_GENERIC
80
81config MIPS_GENERIC
82 bool "Generic board-agnostic MIPS kernel"
83 select BOOT_RAW
84 select BUILTIN_DTB
85 select CEVT_R4K
86 select CLKSRC_MIPS_GIC
87 select COMMON_CLK
88 select CPU_MIPSR2_IRQ_VI
89 select CPU_MIPSR2_IRQ_EI
90 select CSRC_R4K
91 select DMA_PERDEV_COHERENT
92 select HW_HAS_PCI
93 select IRQ_MIPS_CPU
94 select LIBFDT
95 select MIPS_CPU_SCACHE
96 select MIPS_GIC
97 select MIPS_L1_CACHE_SHIFT_7
98 select NO_EXCEPT_FILL
99 select PCI_DRIVERS_GENERIC
100 select PINCTRL
101 select SMP_UP if SMP
102 select SWAP_IO_SPACE
103 select SYS_HAS_CPU_MIPS32_R1
104 select SYS_HAS_CPU_MIPS32_R2
105 select SYS_HAS_CPU_MIPS32_R6
106 select SYS_HAS_CPU_MIPS64_R1
107 select SYS_HAS_CPU_MIPS64_R2
108 select SYS_HAS_CPU_MIPS64_R6
109 select SYS_SUPPORTS_32BIT_KERNEL
110 select SYS_SUPPORTS_64BIT_KERNEL
111 select SYS_SUPPORTS_BIG_ENDIAN
112 select SYS_SUPPORTS_HIGHMEM
113 select SYS_SUPPORTS_LITTLE_ENDIAN
114 select SYS_SUPPORTS_MICROMIPS
115 select SYS_SUPPORTS_MIPS_CPS
116 select SYS_SUPPORTS_MIPS16
117 select SYS_SUPPORTS_MULTITHREADING
118 select SYS_SUPPORTS_RELOCATABLE
119 select SYS_SUPPORTS_SMARTMIPS
120 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
121 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
122 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
123 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
124 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
125 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
126 select USE_OF
127 help
128 Select this to build a kernel which aims to support multiple boards,
129 generally using a flattened device tree passed from the bootloader
130 using the boot protocol defined in the UHI (Unified Hosting
131 Interface) specification.
132
133config MIPS_ALCHEMY
134 bool "Alchemy processor based machines"
135 select ARCH_PHYS_ADDR_T_64BIT
136 select CEVT_R4K
137 select CSRC_R4K
138 select IRQ_MIPS_CPU
139 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
140 select SYS_HAS_CPU_MIPS32_R1
141 select SYS_SUPPORTS_32BIT_KERNEL
142 select SYS_SUPPORTS_APM_EMULATION
143 select GPIOLIB
144 select SYS_SUPPORTS_ZBOOT
145 select COMMON_CLK
146
147config AR7
148 bool "Texas Instruments AR7"
149 select BOOT_ELF32
150 select DMA_NONCOHERENT
151 select CEVT_R4K
152 select CSRC_R4K
153 select IRQ_MIPS_CPU
154 select NO_EXCEPT_FILL
155 select SWAP_IO_SPACE
156 select SYS_HAS_CPU_MIPS32_R1
157 select SYS_HAS_EARLY_PRINTK
158 select SYS_SUPPORTS_32BIT_KERNEL
159 select SYS_SUPPORTS_LITTLE_ENDIAN
160 select SYS_SUPPORTS_MIPS16
161 select SYS_SUPPORTS_ZBOOT_UART16550
162 select GPIOLIB
163 select VLYNQ
164 select HAVE_CLK
165 help
166 Support for the Texas Instruments AR7 System-on-a-Chip
167 family: TNETD7100, 7200 and 7300.
168
169config ATH25
170 bool "Atheros AR231x/AR531x SoC support"
171 select CEVT_R4K
172 select CSRC_R4K
173 select DMA_NONCOHERENT
174 select IRQ_MIPS_CPU
175 select IRQ_DOMAIN
176 select SYS_HAS_CPU_MIPS32_R1
177 select SYS_SUPPORTS_BIG_ENDIAN
178 select SYS_SUPPORTS_32BIT_KERNEL
179 select SYS_HAS_EARLY_PRINTK
180 help
181 Support for Atheros AR231x and Atheros AR531x based boards
182
183config ATH79
184 bool "Atheros AR71XX/AR724X/AR913X based boards"
185 select ARCH_HAS_RESET_CONTROLLER
186 select BOOT_RAW
187 select CEVT_R4K
188 select CSRC_R4K
189 select DMA_NONCOHERENT
190 select GPIOLIB
191 select HAVE_CLK
192 select COMMON_CLK
193 select CLKDEV_LOOKUP
194 select IRQ_MIPS_CPU
195 select MIPS_MACHINE
196 select SYS_HAS_CPU_MIPS32_R2
197 select SYS_HAS_EARLY_PRINTK
198 select SYS_SUPPORTS_32BIT_KERNEL
199 select SYS_SUPPORTS_BIG_ENDIAN
200 select SYS_SUPPORTS_MIPS16
201 select SYS_SUPPORTS_ZBOOT_UART_PROM
202 select USE_OF
203 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
204 help
205 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
206
207config BMIPS_GENERIC
208 bool "Broadcom Generic BMIPS kernel"
209 select BOOT_RAW
210 select NO_EXCEPT_FILL
211 select USE_OF
212 select CEVT_R4K
213 select CSRC_R4K
214 select SYNC_R4K
215 select COMMON_CLK
216 select BCM6345_L1_IRQ
217 select BCM7038_L1_IRQ
218 select BCM7120_L2_IRQ
219 select BRCMSTB_L2_IRQ
220 select IRQ_MIPS_CPU
221 select DMA_NONCOHERENT
222 select SYS_SUPPORTS_32BIT_KERNEL
223 select SYS_SUPPORTS_LITTLE_ENDIAN
224 select SYS_SUPPORTS_BIG_ENDIAN
225 select SYS_SUPPORTS_HIGHMEM
226 select SYS_HAS_CPU_BMIPS32_3300
227 select SYS_HAS_CPU_BMIPS4350
228 select SYS_HAS_CPU_BMIPS4380
229 select SYS_HAS_CPU_BMIPS5000
230 select SWAP_IO_SPACE
231 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
232 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
233 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
234 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
235 select HARDIRQS_SW_RESEND
236 help
237 Build a generic DT-based kernel image that boots on select
238 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
239 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
240 must be set appropriately for your board.
241
242config BCM47XX
243 bool "Broadcom BCM47XX based boards"
244 select BOOT_RAW
245 select CEVT_R4K
246 select CSRC_R4K
247 select DMA_NONCOHERENT
248 select HW_HAS_PCI
249 select IRQ_MIPS_CPU
250 select SYS_HAS_CPU_MIPS32_R1
251 select NO_EXCEPT_FILL
252 select SYS_SUPPORTS_32BIT_KERNEL
253 select SYS_SUPPORTS_LITTLE_ENDIAN
254 select SYS_SUPPORTS_MIPS16
255 select SYS_SUPPORTS_ZBOOT
256 select SYS_HAS_EARLY_PRINTK
257 select USE_GENERIC_EARLY_PRINTK_8250
258 select GPIOLIB
259 select LEDS_GPIO_REGISTER
260 select BCM47XX_NVRAM
261 select BCM47XX_SPROM
262 select BCM47XX_SSB if !BCM47XX_BCMA
263 help
264 Support for BCM47XX based boards
265
266config BCM63XX
267 bool "Broadcom BCM63XX based boards"
268 select BOOT_RAW
269 select CEVT_R4K
270 select CSRC_R4K
271 select SYNC_R4K
272 select DMA_NONCOHERENT
273 select IRQ_MIPS_CPU
274 select SYS_SUPPORTS_32BIT_KERNEL
275 select SYS_SUPPORTS_BIG_ENDIAN
276 select SYS_HAS_EARLY_PRINTK
277 select SWAP_IO_SPACE
278 select GPIOLIB
279 select HAVE_CLK
280 select MIPS_L1_CACHE_SHIFT_4
281 select CLKDEV_LOOKUP
282 help
283 Support for BCM63XX based boards
284
285config MIPS_COBALT
286 bool "Cobalt Server"
287 select CEVT_R4K
288 select CSRC_R4K
289 select CEVT_GT641XX
290 select DMA_NONCOHERENT
291 select HW_HAS_PCI
292 select I8253
293 select I8259
294 select IRQ_MIPS_CPU
295 select IRQ_GT641XX
296 select PCI_GT64XXX_PCI0
297 select PCI
298 select SYS_HAS_CPU_NEVADA
299 select SYS_HAS_EARLY_PRINTK
300 select SYS_SUPPORTS_32BIT_KERNEL
301 select SYS_SUPPORTS_64BIT_KERNEL
302 select SYS_SUPPORTS_LITTLE_ENDIAN
303 select USE_GENERIC_EARLY_PRINTK_8250
304
305config MACH_DECSTATION
306 bool "DECstations"
307 select BOOT_ELF32
308 select CEVT_DS1287
309 select CEVT_R4K if CPU_R4X00
310 select CSRC_IOASIC
311 select CSRC_R4K if CPU_R4X00
312 select CPU_DADDI_WORKAROUNDS if 64BIT
313 select CPU_R4000_WORKAROUNDS if 64BIT
314 select CPU_R4400_WORKAROUNDS if 64BIT
315 select DMA_NONCOHERENT
316 select NO_IOPORT_MAP
317 select IRQ_MIPS_CPU
318 select SYS_HAS_CPU_R3000
319 select SYS_HAS_CPU_R4X00
320 select SYS_SUPPORTS_32BIT_KERNEL
321 select SYS_SUPPORTS_64BIT_KERNEL
322 select SYS_SUPPORTS_LITTLE_ENDIAN
323 select SYS_SUPPORTS_128HZ
324 select SYS_SUPPORTS_256HZ
325 select SYS_SUPPORTS_1024HZ
326 select MIPS_L1_CACHE_SHIFT_4
327 help
328 This enables support for DEC's MIPS based workstations. For details
329 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
330 DECstation porting pages on <http://decstation.unix-ag.org/>.
331
332 If you have one of the following DECstation Models you definitely
333 want to choose R4xx0 for the CPU Type:
334
335 DECstation 5000/50
336 DECstation 5000/150
337 DECstation 5000/260
338 DECsystem 5900/260
339
340 otherwise choose R3000.
341
342config MACH_JAZZ
343 bool "Jazz family of machines"
344 select ARCH_MIGHT_HAVE_PC_PARPORT
345 select ARCH_MIGHT_HAVE_PC_SERIO
346 select FW_ARC
347 select FW_ARC32
348 select ARCH_MAY_HAVE_PC_FDC
349 select CEVT_R4K
350 select CSRC_R4K
351 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
352 select GENERIC_ISA_DMA
353 select HAVE_PCSPKR_PLATFORM
354 select IRQ_MIPS_CPU
355 select I8253
356 select I8259
357 select ISA
358 select SYS_HAS_CPU_R4X00
359 select SYS_SUPPORTS_32BIT_KERNEL
360 select SYS_SUPPORTS_64BIT_KERNEL
361 select SYS_SUPPORTS_100HZ
362 help
363 This a family of machines based on the MIPS R4030 chipset which was
364 used by several vendors to build RISC/os and Windows NT workstations.
365 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
366 Olivetti M700-10 workstations.
367
368config MACH_INGENIC
369 bool "Ingenic SoC based machines"
370 select SYS_SUPPORTS_32BIT_KERNEL
371 select SYS_SUPPORTS_LITTLE_ENDIAN
372 select SYS_SUPPORTS_ZBOOT_UART16550
373 select DMA_NONCOHERENT
374 select IRQ_MIPS_CPU
375 select PINCTRL
376 select GPIOLIB
377 select COMMON_CLK
378 select GENERIC_IRQ_CHIP
379 select BUILTIN_DTB
380 select USE_OF
381 select LIBFDT
382
383config LANTIQ
384 bool "Lantiq based platforms"
385 select DMA_NONCOHERENT
386 select IRQ_MIPS_CPU
387 select CEVT_R4K
388 select CSRC_R4K
389 select SYS_HAS_CPU_MIPS32_R1
390 select SYS_HAS_CPU_MIPS32_R2
391 select SYS_SUPPORTS_BIG_ENDIAN
392 select SYS_SUPPORTS_32BIT_KERNEL
393 select SYS_SUPPORTS_MIPS16
394 select SYS_SUPPORTS_MULTITHREADING
395 select SYS_SUPPORTS_VPE_LOADER
396 select SYS_HAS_EARLY_PRINTK
397 select GPIOLIB
398 select SWAP_IO_SPACE
399 select BOOT_RAW
400 select CLKDEV_LOOKUP
401 select USE_OF
402 select PINCTRL
403 select PINCTRL_LANTIQ
404 select ARCH_HAS_RESET_CONTROLLER
405 select RESET_CONTROLLER
406
407config LASAT
408 bool "LASAT Networks platforms"
409 select CEVT_R4K
410 select CRC32
411 select CSRC_R4K
412 select DMA_NONCOHERENT
413 select SYS_HAS_EARLY_PRINTK
414 select HW_HAS_PCI
415 select IRQ_MIPS_CPU
416 select PCI_GT64XXX_PCI0
417 select MIPS_NILE4
418 select R5000_CPU_SCACHE
419 select SYS_HAS_CPU_R5000
420 select SYS_SUPPORTS_32BIT_KERNEL
421 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
422 select SYS_SUPPORTS_LITTLE_ENDIAN
423
424config MACH_LOONGSON32
425 bool "Loongson-1 family of machines"
426 select SYS_SUPPORTS_ZBOOT
427 help
428 This enables support for the Loongson-1 family of machines.
429
430 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
431 the Institute of Computing Technology (ICT), Chinese Academy of
432 Sciences (CAS).
433
434config MACH_LOONGSON64
435 bool "Loongson-2/3 family of machines"
436 select ARCH_HAS_PHYS_TO_DMA
437 select SYS_SUPPORTS_ZBOOT
438 help
439 This enables the support of Loongson-2/3 family of machines.
440
441 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
442 family of multi-core CPUs. They are both 64-bit general-purpose
443 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
444 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
445 in the People's Republic of China. The chief architect is Professor
446 Weiwu Hu.
447
448config MACH_PISTACHIO
449 bool "IMG Pistachio SoC based boards"
450 select BOOT_ELF32
451 select BOOT_RAW
452 select CEVT_R4K
453 select CLKSRC_MIPS_GIC
454 select COMMON_CLK
455 select CSRC_R4K
456 select DMA_NONCOHERENT
457 select GPIOLIB
458 select IRQ_MIPS_CPU
459 select LIBFDT
460 select MFD_SYSCON
461 select MIPS_CPU_SCACHE
462 select MIPS_GIC
463 select PINCTRL
464 select REGULATOR
465 select SYS_HAS_CPU_MIPS32_R2
466 select SYS_SUPPORTS_32BIT_KERNEL
467 select SYS_SUPPORTS_LITTLE_ENDIAN
468 select SYS_SUPPORTS_MIPS_CPS
469 select SYS_SUPPORTS_MULTITHREADING
470 select SYS_SUPPORTS_RELOCATABLE
471 select SYS_SUPPORTS_ZBOOT
472 select SYS_HAS_EARLY_PRINTK
473 select USE_GENERIC_EARLY_PRINTK_8250
474 select USE_OF
475 help
476 This enables support for the IMG Pistachio SoC platform.
477
478config MIPS_MALTA
479 bool "MIPS Malta board"
480 select ARCH_MAY_HAVE_PC_FDC
481 select ARCH_MIGHT_HAVE_PC_PARPORT
482 select ARCH_MIGHT_HAVE_PC_SERIO
483 select BOOT_ELF32
484 select BOOT_RAW
485 select BUILTIN_DTB
486 select CEVT_R4K
487 select CSRC_R4K
488 select CLKSRC_MIPS_GIC
489 select COMMON_CLK
490 select DMA_MAYBE_COHERENT
491 select GENERIC_ISA_DMA
492 select HAVE_PCSPKR_PLATFORM
493 select IRQ_MIPS_CPU
494 select MIPS_GIC
495 select HW_HAS_PCI
496 select I8253
497 select I8259
498 select MIPS_BONITO64
499 select MIPS_CPU_SCACHE
500 select MIPS_L1_CACHE_SHIFT_6
501 select PCI_GT64XXX_PCI0
502 select MIPS_MSC
503 select SMP_UP if SMP
504 select SWAP_IO_SPACE
505 select SYS_HAS_CPU_MIPS32_R1
506 select SYS_HAS_CPU_MIPS32_R2
507 select SYS_HAS_CPU_MIPS32_R3_5
508 select SYS_HAS_CPU_MIPS32_R5
509 select SYS_HAS_CPU_MIPS32_R6
510 select SYS_HAS_CPU_MIPS64_R1
511 select SYS_HAS_CPU_MIPS64_R2
512 select SYS_HAS_CPU_MIPS64_R6
513 select SYS_HAS_CPU_NEVADA
514 select SYS_HAS_CPU_RM7000
515 select SYS_SUPPORTS_32BIT_KERNEL
516 select SYS_SUPPORTS_64BIT_KERNEL
517 select SYS_SUPPORTS_BIG_ENDIAN
518 select SYS_SUPPORTS_HIGHMEM
519 select SYS_SUPPORTS_LITTLE_ENDIAN
520 select SYS_SUPPORTS_MICROMIPS
521 select SYS_SUPPORTS_MIPS_CMP
522 select SYS_SUPPORTS_MIPS_CPS
523 select SYS_SUPPORTS_MIPS16
524 select SYS_SUPPORTS_MULTITHREADING
525 select SYS_SUPPORTS_SMARTMIPS
526 select SYS_SUPPORTS_VPE_LOADER
527 select SYS_SUPPORTS_ZBOOT
528 select SYS_SUPPORTS_RELOCATABLE
529 select USE_OF
530 select LIBFDT
531 select ZONE_DMA32 if 64BIT
532 select BUILTIN_DTB
533 select LIBFDT
534 help
535 This enables support for the MIPS Technologies Malta evaluation
536 board.
537
538config MACH_PIC32
539 bool "Microchip PIC32 Family"
540 help
541 This enables support for the Microchip PIC32 family of platforms.
542
543 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
544 microcontrollers.
545
546config NEC_MARKEINS
547 bool "NEC EMMA2RH Mark-eins board"
548 select SOC_EMMA2RH
549 select HW_HAS_PCI
550 help
551 This enables support for the NEC Electronics Mark-eins boards.
552
553config MACH_VR41XX
554 bool "NEC VR4100 series based machines"
555 select CEVT_R4K
556 select CSRC_R4K
557 select SYS_HAS_CPU_VR41XX
558 select SYS_SUPPORTS_MIPS16
559 select GPIOLIB
560
561config NXP_STB220
562 bool "NXP STB220 board"
563 select SOC_PNX833X
564 help
565 Support for NXP Semiconductors STB220 Development Board.
566
567config NXP_STB225
568 bool "NXP 225 board"
569 select SOC_PNX833X
570 select SOC_PNX8335
571 help
572 Support for NXP Semiconductors STB225 Development Board.
573
574config PMC_MSP
575 bool "PMC-Sierra MSP chipsets"
576 select CEVT_R4K
577 select CSRC_R4K
578 select DMA_NONCOHERENT
579 select SWAP_IO_SPACE
580 select NO_EXCEPT_FILL
581 select BOOT_RAW
582 select SYS_HAS_CPU_MIPS32_R1
583 select SYS_HAS_CPU_MIPS32_R2
584 select SYS_SUPPORTS_32BIT_KERNEL
585 select SYS_SUPPORTS_BIG_ENDIAN
586 select SYS_SUPPORTS_MIPS16
587 select IRQ_MIPS_CPU
588 select SERIAL_8250
589 select SERIAL_8250_CONSOLE
590 select USB_EHCI_BIG_ENDIAN_MMIO
591 select USB_EHCI_BIG_ENDIAN_DESC
592 help
593 This adds support for the PMC-Sierra family of Multi-Service
594 Processor System-On-A-Chips. These parts include a number
595 of integrated peripherals, interfaces and DSPs in addition to
596 a variety of MIPS cores.
597
598config RALINK
599 bool "Ralink based machines"
600 select CEVT_R4K
601 select CSRC_R4K
602 select BOOT_RAW
603 select DMA_NONCOHERENT
604 select IRQ_MIPS_CPU
605 select USE_OF
606 select SYS_HAS_CPU_MIPS32_R1
607 select SYS_HAS_CPU_MIPS32_R2
608 select SYS_SUPPORTS_32BIT_KERNEL
609 select SYS_SUPPORTS_LITTLE_ENDIAN
610 select SYS_SUPPORTS_MIPS16
611 select SYS_HAS_EARLY_PRINTK
612 select CLKDEV_LOOKUP
613 select ARCH_HAS_RESET_CONTROLLER
614 select RESET_CONTROLLER
615
616config SGI_IP22
617 bool "SGI IP22 (Indy/Indigo2)"
618 select FW_ARC
619 select FW_ARC32
620 select ARCH_MIGHT_HAVE_PC_SERIO
621 select BOOT_ELF32
622 select CEVT_R4K
623 select CSRC_R4K
624 select DEFAULT_SGI_PARTITION
625 select DMA_NONCOHERENT
626 select HW_HAS_EISA
627 select I8253
628 select I8259
629 select IP22_CPU_SCACHE
630 select IRQ_MIPS_CPU
631 select GENERIC_ISA_DMA_SUPPORT_BROKEN
632 select SGI_HAS_I8042
633 select SGI_HAS_INDYDOG
634 select SGI_HAS_HAL2
635 select SGI_HAS_SEEQ
636 select SGI_HAS_WD93
637 select SGI_HAS_ZILOG
638 select SWAP_IO_SPACE
639 select SYS_HAS_CPU_R4X00
640 select SYS_HAS_CPU_R5000
641 #
642 # Disable EARLY_PRINTK for now since it leads to overwritten prom
643 # memory during early boot on some machines.
644 #
645 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
646 # for a more details discussion
647 #
648 # select SYS_HAS_EARLY_PRINTK
649 select SYS_SUPPORTS_32BIT_KERNEL
650 select SYS_SUPPORTS_64BIT_KERNEL
651 select SYS_SUPPORTS_BIG_ENDIAN
652 select MIPS_L1_CACHE_SHIFT_7
653 help
654 This are the SGI Indy, Challenge S and Indigo2, as well as certain
655 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
656 that runs on these, say Y here.
657
658config SGI_IP27
659 bool "SGI IP27 (Origin200/2000)"
660 select FW_ARC
661 select FW_ARC64
662 select BOOT_ELF64
663 select DEFAULT_SGI_PARTITION
664 select DMA_COHERENT
665 select SYS_HAS_EARLY_PRINTK
666 select HW_HAS_PCI
667 select NR_CPUS_DEFAULT_64
668 select SYS_HAS_CPU_R10000
669 select SYS_SUPPORTS_64BIT_KERNEL
670 select SYS_SUPPORTS_BIG_ENDIAN
671 select SYS_SUPPORTS_NUMA
672 select SYS_SUPPORTS_SMP
673 select MIPS_L1_CACHE_SHIFT_7
674 help
675 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
676 workstations. To compile a Linux kernel that runs on these, say Y
677 here.
678
679config SGI_IP28
680 bool "SGI IP28 (Indigo2 R10k)"
681 select FW_ARC
682 select FW_ARC64
683 select ARCH_MIGHT_HAVE_PC_SERIO
684 select BOOT_ELF64
685 select CEVT_R4K
686 select CSRC_R4K
687 select DEFAULT_SGI_PARTITION
688 select DMA_NONCOHERENT
689 select GENERIC_ISA_DMA_SUPPORT_BROKEN
690 select IRQ_MIPS_CPU
691 select HW_HAS_EISA
692 select I8253
693 select I8259
694 select SGI_HAS_I8042
695 select SGI_HAS_INDYDOG
696 select SGI_HAS_HAL2
697 select SGI_HAS_SEEQ
698 select SGI_HAS_WD93
699 select SGI_HAS_ZILOG
700 select SWAP_IO_SPACE
701 select SYS_HAS_CPU_R10000
702 #
703 # Disable EARLY_PRINTK for now since it leads to overwritten prom
704 # memory during early boot on some machines.
705 #
706 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
707 # for a more details discussion
708 #
709 # select SYS_HAS_EARLY_PRINTK
710 select SYS_SUPPORTS_64BIT_KERNEL
711 select SYS_SUPPORTS_BIG_ENDIAN
712 select MIPS_L1_CACHE_SHIFT_7
713 help
714 This is the SGI Indigo2 with R10000 processor. To compile a Linux
715 kernel that runs on these, say Y here.
716
717config SGI_IP32
718 bool "SGI IP32 (O2)"
719 select FW_ARC
720 select FW_ARC32
721 select BOOT_ELF32
722 select CEVT_R4K
723 select CSRC_R4K
724 select DMA_NONCOHERENT
725 select HW_HAS_PCI
726 select IRQ_MIPS_CPU
727 select R5000_CPU_SCACHE
728 select RM7000_CPU_SCACHE
729 select SYS_HAS_CPU_R5000
730 select SYS_HAS_CPU_R10000 if BROKEN
731 select SYS_HAS_CPU_RM7000
732 select SYS_HAS_CPU_NEVADA
733 select SYS_SUPPORTS_64BIT_KERNEL
734 select SYS_SUPPORTS_BIG_ENDIAN
735 help
736 If you want this kernel to run on SGI O2 workstation, say Y here.
737
738config SIBYTE_CRHINE
739 bool "Sibyte BCM91120C-CRhine"
740 select BOOT_ELF32
741 select DMA_COHERENT
742 select SIBYTE_BCM1120
743 select SWAP_IO_SPACE
744 select SYS_HAS_CPU_SB1
745 select SYS_SUPPORTS_BIG_ENDIAN
746 select SYS_SUPPORTS_LITTLE_ENDIAN
747
748config SIBYTE_CARMEL
749 bool "Sibyte BCM91120x-Carmel"
750 select BOOT_ELF32
751 select DMA_COHERENT
752 select SIBYTE_BCM1120
753 select SWAP_IO_SPACE
754 select SYS_HAS_CPU_SB1
755 select SYS_SUPPORTS_BIG_ENDIAN
756 select SYS_SUPPORTS_LITTLE_ENDIAN
757
758config SIBYTE_CRHONE
759 bool "Sibyte BCM91125C-CRhone"
760 select BOOT_ELF32
761 select DMA_COHERENT
762 select SIBYTE_BCM1125
763 select SWAP_IO_SPACE
764 select SYS_HAS_CPU_SB1
765 select SYS_SUPPORTS_BIG_ENDIAN
766 select SYS_SUPPORTS_HIGHMEM
767 select SYS_SUPPORTS_LITTLE_ENDIAN
768
769config SIBYTE_RHONE
770 bool "Sibyte BCM91125E-Rhone"
771 select BOOT_ELF32
772 select DMA_COHERENT
773 select SIBYTE_BCM1125H
774 select SWAP_IO_SPACE
775 select SYS_HAS_CPU_SB1
776 select SYS_SUPPORTS_BIG_ENDIAN
777 select SYS_SUPPORTS_LITTLE_ENDIAN
778
779config SIBYTE_SWARM
780 bool "Sibyte BCM91250A-SWARM"
781 select BOOT_ELF32
782 select DMA_COHERENT
783 select HAVE_PATA_PLATFORM
784 select SIBYTE_SB1250
785 select SWAP_IO_SPACE
786 select SYS_HAS_CPU_SB1
787 select SYS_SUPPORTS_BIG_ENDIAN
788 select SYS_SUPPORTS_HIGHMEM
789 select SYS_SUPPORTS_LITTLE_ENDIAN
790 select ZONE_DMA32 if 64BIT
791
792config SIBYTE_LITTLESUR
793 bool "Sibyte BCM91250C2-LittleSur"
794 select BOOT_ELF32
795 select DMA_COHERENT
796 select HAVE_PATA_PLATFORM
797 select SIBYTE_SB1250
798 select SWAP_IO_SPACE
799 select SYS_HAS_CPU_SB1
800 select SYS_SUPPORTS_BIG_ENDIAN
801 select SYS_SUPPORTS_HIGHMEM
802 select SYS_SUPPORTS_LITTLE_ENDIAN
803
804config SIBYTE_SENTOSA
805 bool "Sibyte BCM91250E-Sentosa"
806 select BOOT_ELF32
807 select DMA_COHERENT
808 select SIBYTE_SB1250
809 select SWAP_IO_SPACE
810 select SYS_HAS_CPU_SB1
811 select SYS_SUPPORTS_BIG_ENDIAN
812 select SYS_SUPPORTS_LITTLE_ENDIAN
813
814config SIBYTE_BIGSUR
815 bool "Sibyte BCM91480B-BigSur"
816 select BOOT_ELF32
817 select DMA_COHERENT
818 select NR_CPUS_DEFAULT_4
819 select SIBYTE_BCM1x80
820 select SWAP_IO_SPACE
821 select SYS_HAS_CPU_SB1
822 select SYS_SUPPORTS_BIG_ENDIAN
823 select SYS_SUPPORTS_HIGHMEM
824 select SYS_SUPPORTS_LITTLE_ENDIAN
825 select ZONE_DMA32 if 64BIT
826
827config SNI_RM
828 bool "SNI RM200/300/400"
829 select FW_ARC if CPU_LITTLE_ENDIAN
830 select FW_ARC32 if CPU_LITTLE_ENDIAN
831 select FW_SNIPROM if CPU_BIG_ENDIAN
832 select ARCH_MAY_HAVE_PC_FDC
833 select ARCH_MIGHT_HAVE_PC_PARPORT
834 select ARCH_MIGHT_HAVE_PC_SERIO
835 select BOOT_ELF32
836 select CEVT_R4K
837 select CSRC_R4K
838 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
839 select DMA_NONCOHERENT
840 select GENERIC_ISA_DMA
841 select HAVE_PCSPKR_PLATFORM
842 select HW_HAS_EISA
843 select HW_HAS_PCI
844 select IRQ_MIPS_CPU
845 select I8253
846 select I8259
847 select ISA
848 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
849 select SYS_HAS_CPU_R4X00
850 select SYS_HAS_CPU_R5000
851 select SYS_HAS_CPU_R10000
852 select R5000_CPU_SCACHE
853 select SYS_HAS_EARLY_PRINTK
854 select SYS_SUPPORTS_32BIT_KERNEL
855 select SYS_SUPPORTS_64BIT_KERNEL
856 select SYS_SUPPORTS_BIG_ENDIAN
857 select SYS_SUPPORTS_HIGHMEM
858 select SYS_SUPPORTS_LITTLE_ENDIAN
859 help
860 The SNI RM200/300/400 are MIPS-based machines manufactured by
861 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
862 Technology and now in turn merged with Fujitsu. Say Y here to
863 support this machine type.
864
865config MACH_TX39XX
866 bool "Toshiba TX39 series based machines"
867
868config MACH_TX49XX
869 bool "Toshiba TX49 series based machines"
870
871config MIKROTIK_RB532
872 bool "Mikrotik RB532 boards"
873 select CEVT_R4K
874 select CSRC_R4K
875 select DMA_NONCOHERENT
876 select HW_HAS_PCI
877 select IRQ_MIPS_CPU
878 select SYS_HAS_CPU_MIPS32_R1
879 select SYS_SUPPORTS_32BIT_KERNEL
880 select SYS_SUPPORTS_LITTLE_ENDIAN
881 select SWAP_IO_SPACE
882 select BOOT_RAW
883 select GPIOLIB
884 select MIPS_L1_CACHE_SHIFT_4
885 help
886 Support the Mikrotik(tm) RouterBoard 532 series,
887 based on the IDT RC32434 SoC.
888
889config CAVIUM_OCTEON_SOC
890 bool "Cavium Networks Octeon SoC based boards"
891 select CEVT_R4K
892 select ARCH_HAS_PHYS_TO_DMA
893 select ARCH_PHYS_ADDR_T_64BIT
894 select DMA_COHERENT
895 select SYS_SUPPORTS_64BIT_KERNEL
896 select SYS_SUPPORTS_BIG_ENDIAN
897 select EDAC_SUPPORT
898 select EDAC_ATOMIC_SCRUB
899 select SYS_SUPPORTS_LITTLE_ENDIAN
900 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
901 select SYS_HAS_EARLY_PRINTK
902 select SYS_HAS_CPU_CAVIUM_OCTEON
903 select HW_HAS_PCI
904 select ZONE_DMA32
905 select HOLES_IN_ZONE
906 select GPIOLIB
907 select LIBFDT
908 select USE_OF
909 select ARCH_SPARSEMEM_ENABLE
910 select SYS_SUPPORTS_SMP
911 select NR_CPUS_DEFAULT_64
912 select MIPS_NR_CPU_NR_MAP_1024
913 select BUILTIN_DTB
914 select MTD_COMPLEX_MAPPINGS
915 select SYS_SUPPORTS_RELOCATABLE
916 help
917 This option supports all of the Octeon reference boards from Cavium
918 Networks. It builds a kernel that dynamically determines the Octeon
919 CPU type and supports all known board reference implementations.
920 Some of the supported boards are:
921 EBT3000
922 EBH3000
923 EBH3100
924 Thunder
925 Kodama
926 Hikari
927 Say Y here for most Octeon reference boards.
928
929config NLM_XLR_BOARD
930 bool "Netlogic XLR/XLS based systems"
931 select BOOT_ELF32
932 select NLM_COMMON
933 select SYS_HAS_CPU_XLR
934 select SYS_SUPPORTS_SMP
935 select HW_HAS_PCI
936 select SWAP_IO_SPACE
937 select SYS_SUPPORTS_32BIT_KERNEL
938 select SYS_SUPPORTS_64BIT_KERNEL
939 select ARCH_PHYS_ADDR_T_64BIT
940 select SYS_SUPPORTS_BIG_ENDIAN
941 select SYS_SUPPORTS_HIGHMEM
942 select DMA_COHERENT
943 select NR_CPUS_DEFAULT_32
944 select CEVT_R4K
945 select CSRC_R4K
946 select IRQ_MIPS_CPU
947 select ZONE_DMA32 if 64BIT
948 select SYNC_R4K
949 select SYS_HAS_EARLY_PRINTK
950 select SYS_SUPPORTS_ZBOOT
951 select SYS_SUPPORTS_ZBOOT_UART16550
952 help
953 Support for systems based on Netlogic XLR and XLS processors.
954 Say Y here if you have a XLR or XLS based board.
955
956config NLM_XLP_BOARD
957 bool "Netlogic XLP based systems"
958 select BOOT_ELF32
959 select NLM_COMMON
960 select SYS_HAS_CPU_XLP
961 select SYS_SUPPORTS_SMP
962 select HW_HAS_PCI
963 select SYS_SUPPORTS_32BIT_KERNEL
964 select SYS_SUPPORTS_64BIT_KERNEL
965 select ARCH_PHYS_ADDR_T_64BIT
966 select GPIOLIB
967 select SYS_SUPPORTS_BIG_ENDIAN
968 select SYS_SUPPORTS_LITTLE_ENDIAN
969 select SYS_SUPPORTS_HIGHMEM
970 select DMA_COHERENT
971 select NR_CPUS_DEFAULT_32
972 select CEVT_R4K
973 select CSRC_R4K
974 select IRQ_MIPS_CPU
975 select ZONE_DMA32 if 64BIT
976 select SYNC_R4K
977 select SYS_HAS_EARLY_PRINTK
978 select USE_OF
979 select SYS_SUPPORTS_ZBOOT
980 select SYS_SUPPORTS_ZBOOT_UART16550
981 help
982 This board is based on Netlogic XLP Processor.
983 Say Y here if you have a XLP based board.
984
985config MIPS_PARAVIRT
986 bool "Para-Virtualized guest system"
987 select CEVT_R4K
988 select CSRC_R4K
989 select DMA_COHERENT
990 select SYS_SUPPORTS_64BIT_KERNEL
991 select SYS_SUPPORTS_32BIT_KERNEL
992 select SYS_SUPPORTS_BIG_ENDIAN
993 select SYS_SUPPORTS_SMP
994 select NR_CPUS_DEFAULT_4
995 select SYS_HAS_EARLY_PRINTK
996 select SYS_HAS_CPU_MIPS32_R2
997 select SYS_HAS_CPU_MIPS64_R2
998 select SYS_HAS_CPU_CAVIUM_OCTEON
999 select HW_HAS_PCI
1000 select SWAP_IO_SPACE
1001 help
1002 This option supports guest running under ????
1003
1004endchoice
1005
1006source "arch/mips/alchemy/Kconfig"
1007source "arch/mips/ath25/Kconfig"
1008source "arch/mips/ath79/Kconfig"
1009source "arch/mips/bcm47xx/Kconfig"
1010source "arch/mips/bcm63xx/Kconfig"
1011source "arch/mips/bmips/Kconfig"
1012source "arch/mips/generic/Kconfig"
1013source "arch/mips/jazz/Kconfig"
1014source "arch/mips/jz4740/Kconfig"
1015source "arch/mips/lantiq/Kconfig"
1016source "arch/mips/lasat/Kconfig"
1017source "arch/mips/pic32/Kconfig"
1018source "arch/mips/pistachio/Kconfig"
1019source "arch/mips/pmcs-msp71xx/Kconfig"
1020source "arch/mips/ralink/Kconfig"
1021source "arch/mips/sgi-ip27/Kconfig"
1022source "arch/mips/sibyte/Kconfig"
1023source "arch/mips/txx9/Kconfig"
1024source "arch/mips/vr41xx/Kconfig"
1025source "arch/mips/cavium-octeon/Kconfig"
1026source "arch/mips/loongson32/Kconfig"
1027source "arch/mips/loongson64/Kconfig"
1028source "arch/mips/netlogic/Kconfig"
1029source "arch/mips/paravirt/Kconfig"
1030
1031endmenu
1032
1033config RWSEM_GENERIC_SPINLOCK
1034 bool
1035 default y
1036
1037config RWSEM_XCHGADD_ALGORITHM
1038 bool
1039
1040config GENERIC_HWEIGHT
1041 bool
1042 default y
1043
1044config GENERIC_CALIBRATE_DELAY
1045 bool
1046 default y
1047
1048config SCHED_OMIT_FRAME_POINTER
1049 bool
1050 default y
1051
1052#
1053# Select some configuration options automatically based on user selections.
1054#
1055config FW_ARC
1056 bool
1057
1058config ARCH_MAY_HAVE_PC_FDC
1059 bool
1060
1061config BOOT_RAW
1062 bool
1063
1064config CEVT_BCM1480
1065 bool
1066
1067config CEVT_DS1287
1068 bool
1069
1070config CEVT_GT641XX
1071 bool
1072
1073config CEVT_R4K
1074 bool
1075
1076config CEVT_SB1250
1077 bool
1078
1079config CEVT_TXX9
1080 bool
1081
1082config CSRC_BCM1480
1083 bool
1084
1085config CSRC_IOASIC
1086 bool
1087
1088config CSRC_R4K
1089 bool
1090
1091config CSRC_SB1250
1092 bool
1093
1094config MIPS_CLOCK_VSYSCALL
1095 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1096
1097config GPIO_TXX9
1098 select GPIOLIB
1099 bool
1100
1101config FW_CFE
1102 bool
1103
1104config ARCH_DMA_ADDR_T_64BIT
1105 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
1106
1107config ARCH_SUPPORTS_UPROBES
1108 bool
1109
1110config DMA_MAYBE_COHERENT
1111 select DMA_NONCOHERENT
1112 bool
1113
1114config DMA_PERDEV_COHERENT
1115 bool
1116 select DMA_MAYBE_COHERENT
1117
1118config DMA_COHERENT
1119 bool
1120
1121config DMA_NONCOHERENT
1122 bool
1123 select NEED_DMA_MAP_STATE
1124
1125config NEED_DMA_MAP_STATE
1126 bool
1127
1128config SYS_HAS_EARLY_PRINTK
1129 bool
1130
1131config SYS_SUPPORTS_HOTPLUG_CPU
1132 bool
1133
1134config MIPS_BONITO64
1135 bool
1136
1137config MIPS_MSC
1138 bool
1139
1140config MIPS_NILE4
1141 bool
1142
1143config SYNC_R4K
1144 bool
1145
1146config MIPS_MACHINE
1147 def_bool n
1148
1149config NO_IOPORT_MAP
1150 def_bool n
1151
1152config GENERIC_CSUM
1153 bool
1154
1155config GENERIC_ISA_DMA
1156 bool
1157 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1158 select ISA_DMA_API
1159
1160config GENERIC_ISA_DMA_SUPPORT_BROKEN
1161 bool
1162 select GENERIC_ISA_DMA
1163
1164config ISA_DMA_API
1165 bool
1166
1167config HOLES_IN_ZONE
1168 bool
1169
1170config SYS_SUPPORTS_RELOCATABLE
1171 bool
1172 help
1173 Selected if the platform supports relocating the kernel.
1174 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1175 to allow access to command line and entropy sources.
1176
1177config MIPS_CBPF_JIT
1178 def_bool y
1179 depends on BPF_JIT && HAVE_CBPF_JIT
1180
1181config MIPS_EBPF_JIT
1182 def_bool y
1183 depends on BPF_JIT && HAVE_EBPF_JIT
1184
1185
1186#
1187# Endianness selection. Sufficiently obscure so many users don't know what to
1188# answer,so we try hard to limit the available choices. Also the use of a
1189# choice statement should be more obvious to the user.
1190#
1191choice
1192 prompt "Endianness selection"
1193 help
1194 Some MIPS machines can be configured for either little or big endian
1195 byte order. These modes require different kernels and a different
1196 Linux distribution. In general there is one preferred byteorder for a
1197 particular system but some systems are just as commonly used in the
1198 one or the other endianness.
1199
1200config CPU_BIG_ENDIAN
1201 bool "Big endian"
1202 depends on SYS_SUPPORTS_BIG_ENDIAN
1203
1204config CPU_LITTLE_ENDIAN
1205 bool "Little endian"
1206 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1207
1208endchoice
1209
1210config EXPORT_UASM
1211 bool
1212
1213config SYS_SUPPORTS_APM_EMULATION
1214 bool
1215
1216config SYS_SUPPORTS_BIG_ENDIAN
1217 bool
1218
1219config SYS_SUPPORTS_LITTLE_ENDIAN
1220 bool
1221
1222config SYS_SUPPORTS_HUGETLBFS
1223 bool
1224 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
1225 default y
1226
1227config MIPS_HUGE_TLB_SUPPORT
1228 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1229
1230config IRQ_CPU_RM7K
1231 bool
1232
1233config IRQ_MSP_SLP
1234 bool
1235
1236config IRQ_MSP_CIC
1237 bool
1238
1239config IRQ_TXX9
1240 bool
1241
1242config IRQ_GT641XX
1243 bool
1244
1245config PCI_GT64XXX_PCI0
1246 bool
1247
1248config NO_EXCEPT_FILL
1249 bool
1250
1251config SOC_EMMA2RH
1252 bool
1253 select CEVT_R4K
1254 select CSRC_R4K
1255 select DMA_NONCOHERENT
1256 select IRQ_MIPS_CPU
1257 select SWAP_IO_SPACE
1258 select SYS_HAS_CPU_R5500
1259 select SYS_SUPPORTS_32BIT_KERNEL
1260 select SYS_SUPPORTS_64BIT_KERNEL
1261 select SYS_SUPPORTS_BIG_ENDIAN
1262
1263config SOC_PNX833X
1264 bool
1265 select CEVT_R4K
1266 select CSRC_R4K
1267 select IRQ_MIPS_CPU
1268 select DMA_NONCOHERENT
1269 select SYS_HAS_CPU_MIPS32_R2
1270 select SYS_SUPPORTS_32BIT_KERNEL
1271 select SYS_SUPPORTS_LITTLE_ENDIAN
1272 select SYS_SUPPORTS_BIG_ENDIAN
1273 select SYS_SUPPORTS_MIPS16
1274 select CPU_MIPSR2_IRQ_VI
1275
1276config SOC_PNX8335
1277 bool
1278 select SOC_PNX833X
1279
1280config MIPS_SPRAM
1281 bool
1282
1283config SWAP_IO_SPACE
1284 bool
1285
1286config SGI_HAS_INDYDOG
1287 bool
1288
1289config SGI_HAS_HAL2
1290 bool
1291
1292config SGI_HAS_SEEQ
1293 bool
1294
1295config SGI_HAS_WD93
1296 bool
1297
1298config SGI_HAS_ZILOG
1299 bool
1300
1301config SGI_HAS_I8042
1302 bool
1303
1304config DEFAULT_SGI_PARTITION
1305 bool
1306
1307config FW_ARC32
1308 bool
1309
1310config FW_SNIPROM
1311 bool
1312
1313config BOOT_ELF32
1314 bool
1315
1316config MIPS_L1_CACHE_SHIFT_4
1317 bool
1318
1319config MIPS_L1_CACHE_SHIFT_5
1320 bool
1321
1322config MIPS_L1_CACHE_SHIFT_6
1323 bool
1324
1325config MIPS_L1_CACHE_SHIFT_7
1326 bool
1327
1328config MIPS_L1_CACHE_SHIFT
1329 int
1330 default "7" if MIPS_L1_CACHE_SHIFT_7
1331 default "6" if MIPS_L1_CACHE_SHIFT_6
1332 default "5" if MIPS_L1_CACHE_SHIFT_5
1333 default "4" if MIPS_L1_CACHE_SHIFT_4
1334 default "5"
1335
1336config HAVE_STD_PC_SERIAL_PORT
1337 bool
1338
1339config ARC_CONSOLE
1340 bool "ARC console support"
1341 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1342
1343config ARC_MEMORY
1344 bool
1345 depends on MACH_JAZZ || SNI_RM || SGI_IP32
1346 default y
1347
1348config ARC_PROMLIB
1349 bool
1350 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1351 default y
1352
1353config FW_ARC64
1354 bool
1355
1356config BOOT_ELF64
1357 bool
1358
1359menu "CPU selection"
1360
1361choice
1362 prompt "CPU type"
1363 default CPU_R4X00
1364
1365config CPU_LOONGSON3
1366 bool "Loongson 3 CPU"
1367 depends on SYS_HAS_CPU_LOONGSON3
1368 select CPU_SUPPORTS_64BIT_KERNEL
1369 select CPU_SUPPORTS_HIGHMEM
1370 select CPU_SUPPORTS_HUGEPAGES
1371 select WEAK_ORDERING
1372 select WEAK_REORDERING_BEYOND_LLSC
1373 select MIPS_PGD_C0_CONTEXT
1374 select MIPS_L1_CACHE_SHIFT_6
1375 select GPIOLIB
1376 help
1377 The Loongson 3 processor implements the MIPS64R2 instruction
1378 set with many extensions.
1379
1380config LOONGSON3_ENHANCEMENT
1381 bool "New Loongson 3 CPU Enhancements"
1382 default n
1383 select CPU_MIPSR2
1384 select CPU_HAS_PREFETCH
1385 depends on CPU_LOONGSON3
1386 help
1387 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
1388 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1389 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
1390 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1391 Fast TLB refill support, etc.
1392
1393 This option enable those enhancements which are not probed at run
1394 time. If you want a generic kernel to run on all Loongson 3 machines,
1395 please say 'N' here. If you want a high-performance kernel to run on
1396 new Loongson 3 machines only, please say 'Y' here.
1397
1398config CPU_LOONGSON2E
1399 bool "Loongson 2E"
1400 depends on SYS_HAS_CPU_LOONGSON2E
1401 select CPU_LOONGSON2
1402 help
1403 The Loongson 2E processor implements the MIPS III instruction set
1404 with many extensions.
1405
1406 It has an internal FPGA northbridge, which is compatible to
1407 bonito64.
1408
1409config CPU_LOONGSON2F
1410 bool "Loongson 2F"
1411 depends on SYS_HAS_CPU_LOONGSON2F
1412 select CPU_LOONGSON2
1413 select GPIOLIB
1414 help
1415 The Loongson 2F processor implements the MIPS III instruction set
1416 with many extensions.
1417
1418 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1419 have a similar programming interface with FPGA northbridge used in
1420 Loongson2E.
1421
1422config CPU_LOONGSON1B
1423 bool "Loongson 1B"
1424 depends on SYS_HAS_CPU_LOONGSON1B
1425 select CPU_LOONGSON1
1426 select LEDS_GPIO_REGISTER
1427 help
1428 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1429 release 2 instruction set.
1430
1431config CPU_LOONGSON1C
1432 bool "Loongson 1C"
1433 depends on SYS_HAS_CPU_LOONGSON1C
1434 select CPU_LOONGSON1
1435 select LEDS_GPIO_REGISTER
1436 help
1437 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1438 release 2 instruction set.
1439
1440config CPU_MIPS32_R1
1441 bool "MIPS32 Release 1"
1442 depends on SYS_HAS_CPU_MIPS32_R1
1443 select CPU_HAS_PREFETCH
1444 select CPU_SUPPORTS_32BIT_KERNEL
1445 select CPU_SUPPORTS_HIGHMEM
1446 help
1447 Choose this option to build a kernel for release 1 or later of the
1448 MIPS32 architecture. Most modern embedded systems with a 32-bit
1449 MIPS processor are based on a MIPS32 processor. If you know the
1450 specific type of processor in your system, choose those that one
1451 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1452 Release 2 of the MIPS32 architecture is available since several
1453 years so chances are you even have a MIPS32 Release 2 processor
1454 in which case you should choose CPU_MIPS32_R2 instead for better
1455 performance.
1456
1457config CPU_MIPS32_R2
1458 bool "MIPS32 Release 2"
1459 depends on SYS_HAS_CPU_MIPS32_R2
1460 select CPU_HAS_PREFETCH
1461 select CPU_SUPPORTS_32BIT_KERNEL
1462 select CPU_SUPPORTS_HIGHMEM
1463 select CPU_SUPPORTS_MSA
1464 select HAVE_KVM
1465 help
1466 Choose this option to build a kernel for release 2 or later of the
1467 MIPS32 architecture. Most modern embedded systems with a 32-bit
1468 MIPS processor are based on a MIPS32 processor. If you know the
1469 specific type of processor in your system, choose those that one
1470 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1471
1472config CPU_MIPS32_R6
1473 bool "MIPS32 Release 6"
1474 depends on SYS_HAS_CPU_MIPS32_R6
1475 select CPU_HAS_PREFETCH
1476 select CPU_SUPPORTS_32BIT_KERNEL
1477 select CPU_SUPPORTS_HIGHMEM
1478 select CPU_SUPPORTS_MSA
1479 select GENERIC_CSUM
1480 select HAVE_KVM
1481 select MIPS_O32_FP64_SUPPORT
1482 help
1483 Choose this option to build a kernel for release 6 or later of the
1484 MIPS32 architecture. New MIPS processors, starting with the Warrior
1485 family, are based on a MIPS32r6 processor. If you own an older
1486 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1487
1488config CPU_MIPS64_R1
1489 bool "MIPS64 Release 1"
1490 depends on SYS_HAS_CPU_MIPS64_R1
1491 select CPU_HAS_PREFETCH
1492 select CPU_SUPPORTS_32BIT_KERNEL
1493 select CPU_SUPPORTS_64BIT_KERNEL
1494 select CPU_SUPPORTS_HIGHMEM
1495 select CPU_SUPPORTS_HUGEPAGES
1496 help
1497 Choose this option to build a kernel for release 1 or later of the
1498 MIPS64 architecture. Many modern embedded systems with a 64-bit
1499 MIPS processor are based on a MIPS64 processor. If you know the
1500 specific type of processor in your system, choose those that one
1501 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1502 Release 2 of the MIPS64 architecture is available since several
1503 years so chances are you even have a MIPS64 Release 2 processor
1504 in which case you should choose CPU_MIPS64_R2 instead for better
1505 performance.
1506
1507config CPU_MIPS64_R2
1508 bool "MIPS64 Release 2"
1509 depends on SYS_HAS_CPU_MIPS64_R2
1510 select CPU_HAS_PREFETCH
1511 select CPU_SUPPORTS_32BIT_KERNEL
1512 select CPU_SUPPORTS_64BIT_KERNEL
1513 select CPU_SUPPORTS_HIGHMEM
1514 select CPU_SUPPORTS_HUGEPAGES
1515 select CPU_SUPPORTS_MSA
1516 select HAVE_KVM
1517 help
1518 Choose this option to build a kernel for release 2 or later of the
1519 MIPS64 architecture. Many modern embedded systems with a 64-bit
1520 MIPS processor are based on a MIPS64 processor. If you know the
1521 specific type of processor in your system, choose those that one
1522 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1523
1524config CPU_MIPS64_R6
1525 bool "MIPS64 Release 6"
1526 depends on SYS_HAS_CPU_MIPS64_R6
1527 select CPU_HAS_PREFETCH
1528 select CPU_SUPPORTS_32BIT_KERNEL
1529 select CPU_SUPPORTS_64BIT_KERNEL
1530 select CPU_SUPPORTS_HIGHMEM
1531 select CPU_SUPPORTS_MSA
1532 select GENERIC_CSUM
1533 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1534 select HAVE_KVM
1535 help
1536 Choose this option to build a kernel for release 6 or later of the
1537 MIPS64 architecture. New MIPS processors, starting with the Warrior
1538 family, are based on a MIPS64r6 processor. If you own an older
1539 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1540
1541config CPU_R3000
1542 bool "R3000"
1543 depends on SYS_HAS_CPU_R3000
1544 select CPU_HAS_WB
1545 select CPU_SUPPORTS_32BIT_KERNEL
1546 select CPU_SUPPORTS_HIGHMEM
1547 help
1548 Please make sure to pick the right CPU type. Linux/MIPS is not
1549 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1550 *not* work on R4000 machines and vice versa. However, since most
1551 of the supported machines have an R4000 (or similar) CPU, R4x00
1552 might be a safe bet. If the resulting kernel does not work,
1553 try to recompile with R3000.
1554
1555config CPU_TX39XX
1556 bool "R39XX"
1557 depends on SYS_HAS_CPU_TX39XX
1558 select CPU_SUPPORTS_32BIT_KERNEL
1559
1560config CPU_VR41XX
1561 bool "R41xx"
1562 depends on SYS_HAS_CPU_VR41XX
1563 select CPU_SUPPORTS_32BIT_KERNEL
1564 select CPU_SUPPORTS_64BIT_KERNEL
1565 help
1566 The options selects support for the NEC VR4100 series of processors.
1567 Only choose this option if you have one of these processors as a
1568 kernel built with this option will not run on any other type of
1569 processor or vice versa.
1570
1571config CPU_R4300
1572 bool "R4300"
1573 depends on SYS_HAS_CPU_R4300
1574 select CPU_SUPPORTS_32BIT_KERNEL
1575 select CPU_SUPPORTS_64BIT_KERNEL
1576 help
1577 MIPS Technologies R4300-series processors.
1578
1579config CPU_R4X00
1580 bool "R4x00"
1581 depends on SYS_HAS_CPU_R4X00
1582 select CPU_SUPPORTS_32BIT_KERNEL
1583 select CPU_SUPPORTS_64BIT_KERNEL
1584 select CPU_SUPPORTS_HUGEPAGES
1585 help
1586 MIPS Technologies R4000-series processors other than 4300, including
1587 the R4000, R4400, R4600, and 4700.
1588
1589config CPU_TX49XX
1590 bool "R49XX"
1591 depends on SYS_HAS_CPU_TX49XX
1592 select CPU_HAS_PREFETCH
1593 select CPU_SUPPORTS_32BIT_KERNEL
1594 select CPU_SUPPORTS_64BIT_KERNEL
1595 select CPU_SUPPORTS_HUGEPAGES
1596
1597config CPU_R5000
1598 bool "R5000"
1599 depends on SYS_HAS_CPU_R5000
1600 select CPU_SUPPORTS_32BIT_KERNEL
1601 select CPU_SUPPORTS_64BIT_KERNEL
1602 select CPU_SUPPORTS_HUGEPAGES
1603 help
1604 MIPS Technologies R5000-series processors other than the Nevada.
1605
1606config CPU_R5432
1607 bool "R5432"
1608 depends on SYS_HAS_CPU_R5432
1609 select CPU_SUPPORTS_32BIT_KERNEL
1610 select CPU_SUPPORTS_64BIT_KERNEL
1611 select CPU_SUPPORTS_HUGEPAGES
1612
1613config CPU_R5500
1614 bool "R5500"
1615 depends on SYS_HAS_CPU_R5500
1616 select CPU_SUPPORTS_32BIT_KERNEL
1617 select CPU_SUPPORTS_64BIT_KERNEL
1618 select CPU_SUPPORTS_HUGEPAGES
1619 help
1620 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1621 instruction set.
1622
1623config CPU_NEVADA
1624 bool "RM52xx"
1625 depends on SYS_HAS_CPU_NEVADA
1626 select CPU_SUPPORTS_32BIT_KERNEL
1627 select CPU_SUPPORTS_64BIT_KERNEL
1628 select CPU_SUPPORTS_HUGEPAGES
1629 help
1630 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1631
1632config CPU_R8000
1633 bool "R8000"
1634 depends on SYS_HAS_CPU_R8000
1635 select CPU_HAS_PREFETCH
1636 select CPU_SUPPORTS_64BIT_KERNEL
1637 help
1638 MIPS Technologies R8000 processors. Note these processors are
1639 uncommon and the support for them is incomplete.
1640
1641config CPU_R10000
1642 bool "R10000"
1643 depends on SYS_HAS_CPU_R10000
1644 select CPU_HAS_PREFETCH
1645 select CPU_SUPPORTS_32BIT_KERNEL
1646 select CPU_SUPPORTS_64BIT_KERNEL
1647 select CPU_SUPPORTS_HIGHMEM
1648 select CPU_SUPPORTS_HUGEPAGES
1649 help
1650 MIPS Technologies R10000-series processors.
1651
1652config CPU_RM7000
1653 bool "RM7000"
1654 depends on SYS_HAS_CPU_RM7000
1655 select CPU_HAS_PREFETCH
1656 select CPU_SUPPORTS_32BIT_KERNEL
1657 select CPU_SUPPORTS_64BIT_KERNEL
1658 select CPU_SUPPORTS_HIGHMEM
1659 select CPU_SUPPORTS_HUGEPAGES
1660
1661config CPU_SB1
1662 bool "SB1"
1663 depends on SYS_HAS_CPU_SB1
1664 select CPU_SUPPORTS_32BIT_KERNEL
1665 select CPU_SUPPORTS_64BIT_KERNEL
1666 select CPU_SUPPORTS_HIGHMEM
1667 select CPU_SUPPORTS_HUGEPAGES
1668 select WEAK_ORDERING
1669
1670config CPU_CAVIUM_OCTEON
1671 bool "Cavium Octeon processor"
1672 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1673 select CPU_HAS_PREFETCH
1674 select CPU_SUPPORTS_64BIT_KERNEL
1675 select WEAK_ORDERING
1676 select CPU_SUPPORTS_HIGHMEM
1677 select CPU_SUPPORTS_HUGEPAGES
1678 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1679 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1680 select MIPS_L1_CACHE_SHIFT_7
1681 select HAVE_KVM
1682 help
1683 The Cavium Octeon processor is a highly integrated chip containing
1684 many ethernet hardware widgets for networking tasks. The processor
1685 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1686 Full details can be found at http://www.caviumnetworks.com.
1687
1688config CPU_BMIPS
1689 bool "Broadcom BMIPS"
1690 depends on SYS_HAS_CPU_BMIPS
1691 select CPU_MIPS32
1692 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1693 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1694 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1695 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1696 select CPU_SUPPORTS_32BIT_KERNEL
1697 select DMA_NONCOHERENT
1698 select IRQ_MIPS_CPU
1699 select SWAP_IO_SPACE
1700 select WEAK_ORDERING
1701 select CPU_SUPPORTS_HIGHMEM
1702 select CPU_HAS_PREFETCH
1703 select CPU_SUPPORTS_CPUFREQ
1704 select MIPS_EXTERNAL_TIMER
1705 help
1706 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1707
1708config CPU_XLR
1709 bool "Netlogic XLR SoC"
1710 depends on SYS_HAS_CPU_XLR
1711 select CPU_SUPPORTS_32BIT_KERNEL
1712 select CPU_SUPPORTS_64BIT_KERNEL
1713 select CPU_SUPPORTS_HIGHMEM
1714 select CPU_SUPPORTS_HUGEPAGES
1715 select WEAK_ORDERING
1716 select WEAK_REORDERING_BEYOND_LLSC
1717 help
1718 Netlogic Microsystems XLR/XLS processors.
1719
1720config CPU_XLP
1721 bool "Netlogic XLP SoC"
1722 depends on SYS_HAS_CPU_XLP
1723 select CPU_SUPPORTS_32BIT_KERNEL
1724 select CPU_SUPPORTS_64BIT_KERNEL
1725 select CPU_SUPPORTS_HIGHMEM
1726 select WEAK_ORDERING
1727 select WEAK_REORDERING_BEYOND_LLSC
1728 select CPU_HAS_PREFETCH
1729 select CPU_MIPSR2
1730 select CPU_SUPPORTS_HUGEPAGES
1731 select MIPS_ASID_BITS_VARIABLE
1732 help
1733 Netlogic Microsystems XLP processors.
1734endchoice
1735
1736config CPU_MIPS32_3_5_FEATURES
1737 bool "MIPS32 Release 3.5 Features"
1738 depends on SYS_HAS_CPU_MIPS32_R3_5
1739 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1740 help
1741 Choose this option to build a kernel for release 2 or later of the
1742 MIPS32 architecture including features from the 3.5 release such as
1743 support for Enhanced Virtual Addressing (EVA).
1744
1745config CPU_MIPS32_3_5_EVA
1746 bool "Enhanced Virtual Addressing (EVA)"
1747 depends on CPU_MIPS32_3_5_FEATURES
1748 select EVA
1749 default y
1750 help
1751 Choose this option if you want to enable the Enhanced Virtual
1752 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1753 One of its primary benefits is an increase in the maximum size
1754 of lowmem (up to 3GB). If unsure, say 'N' here.
1755
1756config CPU_MIPS32_R5_FEATURES
1757 bool "MIPS32 Release 5 Features"
1758 depends on SYS_HAS_CPU_MIPS32_R5
1759 depends on CPU_MIPS32_R2
1760 help
1761 Choose this option to build a kernel for release 2 or later of the
1762 MIPS32 architecture including features from release 5 such as
1763 support for Extended Physical Addressing (XPA).
1764
1765config CPU_MIPS32_R5_XPA
1766 bool "Extended Physical Addressing (XPA)"
1767 depends on CPU_MIPS32_R5_FEATURES
1768 depends on !EVA
1769 depends on !PAGE_SIZE_4KB
1770 depends on SYS_SUPPORTS_HIGHMEM
1771 select XPA
1772 select HIGHMEM
1773 select ARCH_PHYS_ADDR_T_64BIT
1774 default n
1775 help
1776 Choose this option if you want to enable the Extended Physical
1777 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1778 benefit is to increase physical addressing equal to or greater
1779 than 40 bits. Note that this has the side effect of turning on
1780 64-bit addressing which in turn makes the PTEs 64-bit in size.
1781 If unsure, say 'N' here.
1782
1783if CPU_LOONGSON2F
1784config CPU_NOP_WORKAROUNDS
1785 bool
1786
1787config CPU_JUMP_WORKAROUNDS
1788 bool
1789
1790config CPU_LOONGSON2F_WORKAROUNDS
1791 bool "Loongson 2F Workarounds"
1792 default y
1793 select CPU_NOP_WORKAROUNDS
1794 select CPU_JUMP_WORKAROUNDS
1795 help
1796 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1797 require workarounds. Without workarounds the system may hang
1798 unexpectedly. For more information please refer to the gas
1799 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1800
1801 Loongson 2F03 and later have fixed these issues and no workarounds
1802 are needed. The workarounds have no significant side effect on them
1803 but may decrease the performance of the system so this option should
1804 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1805 systems.
1806
1807 If unsure, please say Y.
1808endif # CPU_LOONGSON2F
1809
1810config SYS_SUPPORTS_ZBOOT
1811 bool
1812 select HAVE_KERNEL_GZIP
1813 select HAVE_KERNEL_BZIP2
1814 select HAVE_KERNEL_LZ4
1815 select HAVE_KERNEL_LZMA
1816 select HAVE_KERNEL_LZO
1817 select HAVE_KERNEL_XZ
1818
1819config SYS_SUPPORTS_ZBOOT_UART16550
1820 bool
1821 select SYS_SUPPORTS_ZBOOT
1822
1823config SYS_SUPPORTS_ZBOOT_UART_PROM
1824 bool
1825 select SYS_SUPPORTS_ZBOOT
1826
1827config CPU_LOONGSON2
1828 bool
1829 select CPU_SUPPORTS_32BIT_KERNEL
1830 select CPU_SUPPORTS_64BIT_KERNEL
1831 select CPU_SUPPORTS_HIGHMEM
1832 select CPU_SUPPORTS_HUGEPAGES
1833
1834config CPU_LOONGSON1
1835 bool
1836 select CPU_MIPS32
1837 select CPU_MIPSR2
1838 select CPU_HAS_PREFETCH
1839 select CPU_SUPPORTS_32BIT_KERNEL
1840 select CPU_SUPPORTS_HIGHMEM
1841 select CPU_SUPPORTS_CPUFREQ
1842
1843config CPU_BMIPS32_3300
1844 select SMP_UP if SMP
1845 bool
1846
1847config CPU_BMIPS4350
1848 bool
1849 select SYS_SUPPORTS_SMP
1850 select SYS_SUPPORTS_HOTPLUG_CPU
1851
1852config CPU_BMIPS4380
1853 bool
1854 select MIPS_L1_CACHE_SHIFT_6
1855 select SYS_SUPPORTS_SMP
1856 select SYS_SUPPORTS_HOTPLUG_CPU
1857 select CPU_HAS_RIXI
1858
1859config CPU_BMIPS5000
1860 bool
1861 select MIPS_CPU_SCACHE
1862 select MIPS_L1_CACHE_SHIFT_7
1863 select SYS_SUPPORTS_SMP
1864 select SYS_SUPPORTS_HOTPLUG_CPU
1865 select CPU_HAS_RIXI
1866
1867config SYS_HAS_CPU_LOONGSON3
1868 bool
1869 select CPU_SUPPORTS_CPUFREQ
1870 select CPU_HAS_RIXI
1871
1872config SYS_HAS_CPU_LOONGSON2E
1873 bool
1874
1875config SYS_HAS_CPU_LOONGSON2F
1876 bool
1877 select CPU_SUPPORTS_CPUFREQ
1878 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1879 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1880
1881config SYS_HAS_CPU_LOONGSON1B
1882 bool
1883
1884config SYS_HAS_CPU_LOONGSON1C
1885 bool
1886
1887config SYS_HAS_CPU_MIPS32_R1
1888 bool
1889
1890config SYS_HAS_CPU_MIPS32_R2
1891 bool
1892
1893config SYS_HAS_CPU_MIPS32_R3_5
1894 bool
1895
1896config SYS_HAS_CPU_MIPS32_R5
1897 bool
1898
1899config SYS_HAS_CPU_MIPS32_R6
1900 bool
1901
1902config SYS_HAS_CPU_MIPS64_R1
1903 bool
1904
1905config SYS_HAS_CPU_MIPS64_R2
1906 bool
1907
1908config SYS_HAS_CPU_MIPS64_R6
1909 bool
1910
1911config SYS_HAS_CPU_R3000
1912 bool
1913
1914config SYS_HAS_CPU_TX39XX
1915 bool
1916
1917config SYS_HAS_CPU_VR41XX
1918 bool
1919
1920config SYS_HAS_CPU_R4300
1921 bool
1922
1923config SYS_HAS_CPU_R4X00
1924 bool
1925
1926config SYS_HAS_CPU_TX49XX
1927 bool
1928
1929config SYS_HAS_CPU_R5000
1930 bool
1931
1932config SYS_HAS_CPU_R5432
1933 bool
1934
1935config SYS_HAS_CPU_R5500
1936 bool
1937
1938config SYS_HAS_CPU_NEVADA
1939 bool
1940
1941config SYS_HAS_CPU_R8000
1942 bool
1943
1944config SYS_HAS_CPU_R10000
1945 bool
1946
1947config SYS_HAS_CPU_RM7000
1948 bool
1949
1950config SYS_HAS_CPU_SB1
1951 bool
1952
1953config SYS_HAS_CPU_CAVIUM_OCTEON
1954 bool
1955
1956config SYS_HAS_CPU_BMIPS
1957 bool
1958
1959config SYS_HAS_CPU_BMIPS32_3300
1960 bool
1961 select SYS_HAS_CPU_BMIPS
1962
1963config SYS_HAS_CPU_BMIPS4350
1964 bool
1965 select SYS_HAS_CPU_BMIPS
1966
1967config SYS_HAS_CPU_BMIPS4380
1968 bool
1969 select SYS_HAS_CPU_BMIPS
1970
1971config SYS_HAS_CPU_BMIPS5000
1972 bool
1973 select SYS_HAS_CPU_BMIPS
1974
1975config SYS_HAS_CPU_XLR
1976 bool
1977
1978config SYS_HAS_CPU_XLP
1979 bool
1980
1981config MIPS_MALTA_PM
1982 depends on MIPS_MALTA
1983 depends on PCI
1984 bool
1985 default y
1986
1987#
1988# CPU may reorder R->R, R->W, W->R, W->W
1989# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1990#
1991config WEAK_ORDERING
1992 bool
1993
1994#
1995# CPU may reorder reads and writes beyond LL/SC
1996# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1997#
1998config WEAK_REORDERING_BEYOND_LLSC
1999 bool
2000endmenu
2001
2002#
2003# These two indicate any level of the MIPS32 and MIPS64 architecture
2004#
2005config CPU_MIPS32
2006 bool
2007 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
2008
2009config CPU_MIPS64
2010 bool
2011 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
2012
2013#
2014# These two indicate the revision of the architecture, either Release 1 or Release 2
2015#
2016config CPU_MIPSR1
2017 bool
2018 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2019
2020config CPU_MIPSR2
2021 bool
2022 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2023 select CPU_HAS_RIXI
2024 select MIPS_SPRAM
2025
2026config CPU_MIPSR6
2027 bool
2028 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2029 select CPU_HAS_RIXI
2030 select HAVE_ARCH_BITREVERSE
2031 select MIPS_ASID_BITS_VARIABLE
2032 select MIPS_CRC_SUPPORT
2033 select MIPS_SPRAM
2034
2035config EVA
2036 bool
2037
2038config XPA
2039 bool
2040
2041config SYS_SUPPORTS_32BIT_KERNEL
2042 bool
2043config SYS_SUPPORTS_64BIT_KERNEL
2044 bool
2045config CPU_SUPPORTS_32BIT_KERNEL
2046 bool
2047config CPU_SUPPORTS_64BIT_KERNEL
2048 bool
2049config CPU_SUPPORTS_CPUFREQ
2050 bool
2051config CPU_SUPPORTS_ADDRWINCFG
2052 bool
2053config CPU_SUPPORTS_HUGEPAGES
2054 bool
2055config CPU_SUPPORTS_UNCACHED_ACCELERATED
2056 bool
2057config MIPS_PGD_C0_CONTEXT
2058 bool
2059 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2060
2061#
2062# Set to y for ptrace access to watch registers.
2063#
2064config HARDWARE_WATCHPOINTS
2065 bool
2066 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2067
2068menu "Kernel type"
2069
2070choice
2071 prompt "Kernel code model"
2072 help
2073 You should only select this option if you have a workload that
2074 actually benefits from 64-bit processing or if your machine has
2075 large memory. You will only be presented a single option in this
2076 menu if your system does not support both 32-bit and 64-bit kernels.
2077
2078config 32BIT
2079 bool "32-bit kernel"
2080 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2081 select TRAD_SIGNALS
2082 help
2083 Select this option if you want to build a 32-bit kernel.
2084
2085config 64BIT
2086 bool "64-bit kernel"
2087 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2088 help
2089 Select this option if you want to build a 64-bit kernel.
2090
2091endchoice
2092
2093config KVM_GUEST
2094 bool "KVM Guest Kernel"
2095 depends on BROKEN_ON_SMP
2096 help
2097 Select this option if building a guest kernel for KVM (Trap & Emulate)
2098 mode.
2099
2100config KVM_GUEST_TIMER_FREQ
2101 int "Count/Compare Timer Frequency (MHz)"
2102 depends on KVM_GUEST
2103 default 100
2104 help
2105 Set this to non-zero if building a guest kernel for KVM to skip RTC
2106 emulation when determining guest CPU Frequency. Instead, the guest's
2107 timer frequency is specified directly.
2108
2109config MIPS_VA_BITS_48
2110 bool "48 bits virtual memory"
2111 depends on 64BIT
2112 help
2113 Support a maximum at least 48 bits of application virtual
2114 memory. Default is 40 bits or less, depending on the CPU.
2115 For page sizes 16k and above, this option results in a small
2116 memory overhead for page tables. For 4k page size, a fourth
2117 level of page tables is added which imposes both a memory
2118 overhead as well as slower TLB fault handling.
2119
2120 If unsure, say N.
2121
2122choice
2123 prompt "Kernel page size"
2124 default PAGE_SIZE_4KB
2125
2126config PAGE_SIZE_4KB
2127 bool "4kB"
2128 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
2129 help
2130 This option select the standard 4kB Linux page size. On some
2131 R3000-family processors this is the only available page size. Using
2132 4kB page size will minimize memory consumption and is therefore
2133 recommended for low memory systems.
2134
2135config PAGE_SIZE_8KB
2136 bool "8kB"
2137 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
2138 depends on !MIPS_VA_BITS_48
2139 help
2140 Using 8kB page size will result in higher performance kernel at
2141 the price of higher memory consumption. This option is available
2142 only on R8000 and cnMIPS processors. Note that you will need a
2143 suitable Linux distribution to support this.
2144
2145config PAGE_SIZE_16KB
2146 bool "16kB"
2147 depends on !CPU_R3000 && !CPU_TX39XX
2148 help
2149 Using 16kB page size will result in higher performance kernel at
2150 the price of higher memory consumption. This option is available on
2151 all non-R3000 family processors. Note that you will need a suitable
2152 Linux distribution to support this.
2153
2154config PAGE_SIZE_32KB
2155 bool "32kB"
2156 depends on CPU_CAVIUM_OCTEON
2157 depends on !MIPS_VA_BITS_48
2158 help
2159 Using 32kB page size will result in higher performance kernel at
2160 the price of higher memory consumption. This option is available
2161 only on cnMIPS cores. Note that you will need a suitable Linux
2162 distribution to support this.
2163
2164config PAGE_SIZE_64KB
2165 bool "64kB"
2166 depends on !CPU_R3000 && !CPU_TX39XX
2167 help
2168 Using 64kB page size will result in higher performance kernel at
2169 the price of higher memory consumption. This option is available on
2170 all non-R3000 family processor. Not that at the time of this
2171 writing this option is still high experimental.
2172
2173endchoice
2174
2175config FORCE_MAX_ZONEORDER
2176 int "Maximum zone order"
2177 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2178 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2179 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2180 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2181 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2182 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2183 range 11 64
2184 default "11"
2185 help
2186 The kernel memory allocator divides physically contiguous memory
2187 blocks into "zones", where each zone is a power of two number of
2188 pages. This option selects the largest power of two that the kernel
2189 keeps in the memory allocator. If you need to allocate very large
2190 blocks of physically contiguous memory, then you may need to
2191 increase this value.
2192
2193 This config option is actually maximum order plus one. For example,
2194 a value of 11 means that the largest free memory block is 2^10 pages.
2195
2196 The page size is not necessarily 4KB. Keep this in mind
2197 when choosing a value for this option.
2198
2199config BOARD_SCACHE
2200 bool
2201
2202config IP22_CPU_SCACHE
2203 bool
2204 select BOARD_SCACHE
2205
2206#
2207# Support for a MIPS32 / MIPS64 style S-caches
2208#
2209config MIPS_CPU_SCACHE
2210 bool
2211 select BOARD_SCACHE
2212
2213config R5000_CPU_SCACHE
2214 bool
2215 select BOARD_SCACHE
2216
2217config RM7000_CPU_SCACHE
2218 bool
2219 select BOARD_SCACHE
2220
2221config SIBYTE_DMA_PAGEOPS
2222 bool "Use DMA to clear/copy pages"
2223 depends on CPU_SB1
2224 help
2225 Instead of using the CPU to zero and copy pages, use a Data Mover
2226 channel. These DMA channels are otherwise unused by the standard
2227 SiByte Linux port. Seems to give a small performance benefit.
2228
2229config CPU_HAS_PREFETCH
2230 bool
2231
2232config CPU_GENERIC_DUMP_TLB
2233 bool
2234 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
2235
2236config CPU_R4K_FPU
2237 bool
2238 default y if !(CPU_R3000 || CPU_TX39XX)
2239
2240config CPU_R4K_CACHE_TLB
2241 bool
2242 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
2243
2244config MIPS_MT_SMP
2245 bool "MIPS MT SMP support (1 TC on each available VPE)"
2246 default y
2247 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2248 select CPU_MIPSR2_IRQ_VI
2249 select CPU_MIPSR2_IRQ_EI
2250 select SYNC_R4K
2251 select MIPS_MT
2252 select SMP
2253 select SMP_UP
2254 select SYS_SUPPORTS_SMP
2255 select SYS_SUPPORTS_SCHED_SMT
2256 select MIPS_PERF_SHARED_TC_COUNTERS
2257 help
2258 This is a kernel model which is known as SMVP. This is supported
2259 on cores with the MT ASE and uses the available VPEs to implement
2260 virtual processors which supports SMP. This is equivalent to the
2261 Intel Hyperthreading feature. For further information go to
2262 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2263
2264config MIPS_MT
2265 bool
2266
2267config SCHED_SMT
2268 bool "SMT (multithreading) scheduler support"
2269 depends on SYS_SUPPORTS_SCHED_SMT
2270 default n
2271 help
2272 SMT scheduler support improves the CPU scheduler's decision making
2273 when dealing with MIPS MT enabled cores at a cost of slightly
2274 increased overhead in some places. If unsure say N here.
2275
2276config SYS_SUPPORTS_SCHED_SMT
2277 bool
2278
2279config SYS_SUPPORTS_MULTITHREADING
2280 bool
2281
2282config MIPS_MT_FPAFF
2283 bool "Dynamic FPU affinity for FP-intensive threads"
2284 default y
2285 depends on MIPS_MT_SMP
2286
2287config MIPSR2_TO_R6_EMULATOR
2288 bool "MIPS R2-to-R6 emulator"
2289 depends on CPU_MIPSR6
2290 default y
2291 help
2292 Choose this option if you want to run non-R6 MIPS userland code.
2293 Even if you say 'Y' here, the emulator will still be disabled by
2294 default. You can enable it using the 'mipsr2emu' kernel option.
2295 The only reason this is a build-time option is to save ~14K from the
2296 final kernel image.
2297
2298config SYS_SUPPORTS_VPE_LOADER
2299 bool
2300 depends on SYS_SUPPORTS_MULTITHREADING
2301 help
2302 Indicates that the platform supports the VPE loader, and provides
2303 physical_memsize.
2304
2305config MIPS_VPE_LOADER
2306 bool "VPE loader support."
2307 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2308 select CPU_MIPSR2_IRQ_VI
2309 select CPU_MIPSR2_IRQ_EI
2310 select MIPS_MT
2311 help
2312 Includes a loader for loading an elf relocatable object
2313 onto another VPE and running it.
2314
2315config MIPS_VPE_LOADER_CMP
2316 bool
2317 default "y"
2318 depends on MIPS_VPE_LOADER && MIPS_CMP
2319
2320config MIPS_VPE_LOADER_MT
2321 bool
2322 default "y"
2323 depends on MIPS_VPE_LOADER && !MIPS_CMP
2324
2325config MIPS_VPE_LOADER_TOM
2326 bool "Load VPE program into memory hidden from linux"
2327 depends on MIPS_VPE_LOADER
2328 default y
2329 help
2330 The loader can use memory that is present but has been hidden from
2331 Linux using the kernel command line option "mem=xxMB". It's up to
2332 you to ensure the amount you put in the option and the space your
2333 program requires is less or equal to the amount physically present.
2334
2335config MIPS_VPE_APSP_API
2336 bool "Enable support for AP/SP API (RTLX)"
2337 depends on MIPS_VPE_LOADER
2338
2339config MIPS_VPE_APSP_API_CMP
2340 bool
2341 default "y"
2342 depends on MIPS_VPE_APSP_API && MIPS_CMP
2343
2344config MIPS_VPE_APSP_API_MT
2345 bool
2346 default "y"
2347 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2348
2349config MIPS_CMP
2350 bool "MIPS CMP framework support (DEPRECATED)"
2351 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2352 select SMP
2353 select SYNC_R4K
2354 select SYS_SUPPORTS_SMP
2355 select WEAK_ORDERING
2356 default n
2357 help
2358 Select this if you are using a bootloader which implements the "CMP
2359 framework" protocol (ie. YAMON) and want your kernel to make use of
2360 its ability to start secondary CPUs.
2361
2362 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2363 instead of this.
2364
2365config MIPS_CPS
2366 bool "MIPS Coherent Processing System support"
2367 depends on SYS_SUPPORTS_MIPS_CPS
2368 select MIPS_CM
2369 select MIPS_CPS_PM if HOTPLUG_CPU
2370 select SMP
2371 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2372 select SYS_SUPPORTS_HOTPLUG_CPU
2373 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2374 select SYS_SUPPORTS_SMP
2375 select WEAK_ORDERING
2376 help
2377 Select this if you wish to run an SMP kernel across multiple cores
2378 within a MIPS Coherent Processing System. When this option is
2379 enabled the kernel will probe for other cores and boot them with
2380 no external assistance. It is safe to enable this when hardware
2381 support is unavailable.
2382
2383config MIPS_CPS_PM
2384 depends on MIPS_CPS
2385 bool
2386
2387config MIPS_CM
2388 bool
2389 select MIPS_CPC
2390
2391config MIPS_CPC
2392 bool
2393
2394config SB1_PASS_2_WORKAROUNDS
2395 bool
2396 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2397 default y
2398
2399config SB1_PASS_2_1_WORKAROUNDS
2400 bool
2401 depends on CPU_SB1 && CPU_SB1_PASS_2
2402 default y
2403
2404
2405config ARCH_PHYS_ADDR_T_64BIT
2406 bool
2407
2408choice
2409 prompt "SmartMIPS or microMIPS ASE support"
2410
2411config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2412 bool "None"
2413 help
2414 Select this if you want neither microMIPS nor SmartMIPS support
2415
2416config CPU_HAS_SMARTMIPS
2417 depends on SYS_SUPPORTS_SMARTMIPS
2418 bool "SmartMIPS"
2419 help
2420 SmartMIPS is a extension of the MIPS32 architecture aimed at
2421 increased security at both hardware and software level for
2422 smartcards. Enabling this option will allow proper use of the
2423 SmartMIPS instructions by Linux applications. However a kernel with
2424 this option will not work on a MIPS core without SmartMIPS core. If
2425 you don't know you probably don't have SmartMIPS and should say N
2426 here.
2427
2428config CPU_MICROMIPS
2429 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2430 bool "microMIPS"
2431 help
2432 When this option is enabled the kernel will be built using the
2433 microMIPS ISA
2434
2435endchoice
2436
2437config CPU_HAS_MSA
2438 bool "Support for the MIPS SIMD Architecture"
2439 depends on CPU_SUPPORTS_MSA
2440 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2441 help
2442 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2443 and a set of SIMD instructions to operate on them. When this option
2444 is enabled the kernel will support allocating & switching MSA
2445 vector register contexts. If you know that your kernel will only be
2446 running on CPUs which do not support MSA or that your userland will
2447 not be making use of it then you may wish to say N here to reduce
2448 the size & complexity of your kernel.
2449
2450 If unsure, say Y.
2451
2452config CPU_HAS_WB
2453 bool
2454
2455config XKS01
2456 bool
2457
2458config CPU_HAS_RIXI
2459 bool
2460
2461#
2462# Vectored interrupt mode is an R2 feature
2463#
2464config CPU_MIPSR2_IRQ_VI
2465 bool
2466
2467#
2468# Extended interrupt mode is an R2 feature
2469#
2470config CPU_MIPSR2_IRQ_EI
2471 bool
2472
2473config CPU_HAS_SYNC
2474 bool
2475 depends on !CPU_R3000
2476 default y
2477
2478#
2479# CPU non-features
2480#
2481config CPU_DADDI_WORKAROUNDS
2482 bool
2483
2484config CPU_R4000_WORKAROUNDS
2485 bool
2486 select CPU_R4400_WORKAROUNDS
2487
2488config CPU_R4400_WORKAROUNDS
2489 bool
2490
2491config MIPS_ASID_SHIFT
2492 int
2493 default 6 if CPU_R3000 || CPU_TX39XX
2494 default 4 if CPU_R8000
2495 default 0
2496
2497config MIPS_ASID_BITS
2498 int
2499 default 0 if MIPS_ASID_BITS_VARIABLE
2500 default 6 if CPU_R3000 || CPU_TX39XX
2501 default 8
2502
2503config MIPS_ASID_BITS_VARIABLE
2504 bool
2505
2506config MIPS_CRC_SUPPORT
2507 bool
2508
2509#
2510# - Highmem only makes sense for the 32-bit kernel.
2511# - The current highmem code will only work properly on physically indexed
2512# caches such as R3000, SB1, R7000 or those that look like they're virtually
2513# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2514# moment we protect the user and offer the highmem option only on machines
2515# where it's known to be safe. This will not offer highmem on a few systems
2516# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2517# indexed CPUs but we're playing safe.
2518# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2519# know they might have memory configurations that could make use of highmem
2520# support.
2521#
2522config HIGHMEM
2523 bool "High Memory Support"
2524 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2525
2526config CPU_SUPPORTS_HIGHMEM
2527 bool
2528
2529config SYS_SUPPORTS_HIGHMEM
2530 bool
2531
2532config SYS_SUPPORTS_SMARTMIPS
2533 bool
2534
2535config SYS_SUPPORTS_MICROMIPS
2536 bool
2537
2538config SYS_SUPPORTS_MIPS16
2539 bool
2540 help
2541 This option must be set if a kernel might be executed on a MIPS16-
2542 enabled CPU even if MIPS16 is not actually being used. In other
2543 words, it makes the kernel MIPS16-tolerant.
2544
2545config CPU_SUPPORTS_MSA
2546 bool
2547
2548config ARCH_FLATMEM_ENABLE
2549 def_bool y
2550 depends on !NUMA && !CPU_LOONGSON2
2551
2552config ARCH_DISCONTIGMEM_ENABLE
2553 bool
2554 default y if SGI_IP27
2555 help
2556 Say Y to support efficient handling of discontiguous physical memory,
2557 for architectures which are either NUMA (Non-Uniform Memory Access)
2558 or have huge holes in the physical address space for other reasons.
2559 See <file:Documentation/vm/numa> for more.
2560
2561config ARCH_SPARSEMEM_ENABLE
2562 bool
2563 select SPARSEMEM_STATIC
2564
2565config NUMA
2566 bool "NUMA Support"
2567 depends on SYS_SUPPORTS_NUMA
2568 help
2569 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2570 Access). This option improves performance on systems with more
2571 than two nodes; on two node systems it is generally better to
2572 leave it disabled; on single node systems disable this option
2573 disabled.
2574
2575config SYS_SUPPORTS_NUMA
2576 bool
2577
2578config RELOCATABLE
2579 bool "Relocatable kernel"
2580 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
2581 help
2582 This builds a kernel image that retains relocation information
2583 so it can be loaded someplace besides the default 1MB.
2584 The relocations make the kernel binary about 15% larger,
2585 but are discarded at runtime
2586
2587config RELOCATION_TABLE_SIZE
2588 hex "Relocation table size"
2589 depends on RELOCATABLE
2590 range 0x0 0x01000000
2591 default "0x00100000"
2592 ---help---
2593 A table of relocation data will be appended to the kernel binary
2594 and parsed at boot to fix up the relocated kernel.
2595
2596 This option allows the amount of space reserved for the table to be
2597 adjusted, although the default of 1Mb should be ok in most cases.
2598
2599 The build will fail and a valid size suggested if this is too small.
2600
2601 If unsure, leave at the default value.
2602
2603config RANDOMIZE_BASE
2604 bool "Randomize the address of the kernel image"
2605 depends on RELOCATABLE
2606 ---help---
2607 Randomizes the physical and virtual address at which the
2608 kernel image is loaded, as a security feature that
2609 deters exploit attempts relying on knowledge of the location
2610 of kernel internals.
2611
2612 Entropy is generated using any coprocessor 0 registers available.
2613
2614 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2615
2616 If unsure, say N.
2617
2618config RANDOMIZE_BASE_MAX_OFFSET
2619 hex "Maximum kASLR offset" if EXPERT
2620 depends on RANDOMIZE_BASE
2621 range 0x0 0x40000000 if EVA || 64BIT
2622 range 0x0 0x08000000
2623 default "0x01000000"
2624 ---help---
2625 When kASLR is active, this provides the maximum offset that will
2626 be applied to the kernel image. It should be set according to the
2627 amount of physical RAM available in the target system minus
2628 PHYSICAL_START and must be a power of 2.
2629
2630 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2631 EVA or 64-bit. The default is 16Mb.
2632
2633config NODES_SHIFT
2634 int
2635 default "6"
2636 depends on NEED_MULTIPLE_NODES
2637
2638config HW_PERF_EVENTS
2639 bool "Enable hardware performance counter support for perf events"
2640 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
2641 default y
2642 help
2643 Enable hardware performance counter support for perf events. If
2644 disabled, perf events will use software events only.
2645
2646source "mm/Kconfig"
2647
2648config SMP
2649 bool "Multi-Processing support"
2650 depends on SYS_SUPPORTS_SMP
2651 help
2652 This enables support for systems with more than one CPU. If you have
2653 a system with only one CPU, say N. If you have a system with more
2654 than one CPU, say Y.
2655
2656 If you say N here, the kernel will run on uni- and multiprocessor
2657 machines, but will use only one CPU of a multiprocessor machine. If
2658 you say Y here, the kernel will run on many, but not all,
2659 uniprocessor machines. On a uniprocessor machine, the kernel
2660 will run faster if you say N here.
2661
2662 People using multiprocessor machines who say Y here should also say
2663 Y to "Enhanced Real Time Clock Support", below.
2664
2665 See also the SMP-HOWTO available at
2666 <http://www.tldp.org/docs.html#howto>.
2667
2668 If you don't know what to do here, say N.
2669
2670config HOTPLUG_CPU
2671 bool "Support for hot-pluggable CPUs"
2672 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2673 help
2674 Say Y here to allow turning CPUs off and on. CPUs can be
2675 controlled through /sys/devices/system/cpu.
2676 (Note: power management support will enable this option
2677 automatically on SMP systems. )
2678 Say N if you want to disable CPU hotplug.
2679
2680config SMP_UP
2681 bool
2682
2683config SYS_SUPPORTS_MIPS_CMP
2684 bool
2685
2686config SYS_SUPPORTS_MIPS_CPS
2687 bool
2688
2689config SYS_SUPPORTS_SMP
2690 bool
2691
2692config NR_CPUS_DEFAULT_4
2693 bool
2694
2695config NR_CPUS_DEFAULT_8
2696 bool
2697
2698config NR_CPUS_DEFAULT_16
2699 bool
2700
2701config NR_CPUS_DEFAULT_32
2702 bool
2703
2704config NR_CPUS_DEFAULT_64
2705 bool
2706
2707config NR_CPUS
2708 int "Maximum number of CPUs (2-256)"
2709 range 2 256
2710 depends on SMP
2711 default "4" if NR_CPUS_DEFAULT_4
2712 default "8" if NR_CPUS_DEFAULT_8
2713 default "16" if NR_CPUS_DEFAULT_16
2714 default "32" if NR_CPUS_DEFAULT_32
2715 default "64" if NR_CPUS_DEFAULT_64
2716 help
2717 This allows you to specify the maximum number of CPUs which this
2718 kernel will support. The maximum supported value is 32 for 32-bit
2719 kernel and 64 for 64-bit kernels; the minimum value which makes
2720 sense is 1 for Qemu (useful only for kernel debugging purposes)
2721 and 2 for all others.
2722
2723 This is purely to save memory - each supported CPU adds
2724 approximately eight kilobytes to the kernel image. For best
2725 performance should round up your number of processors to the next
2726 power of two.
2727
2728config MIPS_PERF_SHARED_TC_COUNTERS
2729 bool
2730
2731config MIPS_NR_CPU_NR_MAP_1024
2732 bool
2733
2734config MIPS_NR_CPU_NR_MAP
2735 int
2736 depends on SMP
2737 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2738 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2739
2740#
2741# Timer Interrupt Frequency Configuration
2742#
2743
2744choice
2745 prompt "Timer frequency"
2746 default HZ_250
2747 help
2748 Allows the configuration of the timer frequency.
2749
2750 config HZ_24
2751 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2752
2753 config HZ_48
2754 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2755
2756 config HZ_100
2757 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2758
2759 config HZ_128
2760 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2761
2762 config HZ_250
2763 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2764
2765 config HZ_256
2766 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2767
2768 config HZ_1000
2769 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2770
2771 config HZ_1024
2772 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2773
2774endchoice
2775
2776config SYS_SUPPORTS_24HZ
2777 bool
2778
2779config SYS_SUPPORTS_48HZ
2780 bool
2781
2782config SYS_SUPPORTS_100HZ
2783 bool
2784
2785config SYS_SUPPORTS_128HZ
2786 bool
2787
2788config SYS_SUPPORTS_250HZ
2789 bool
2790
2791config SYS_SUPPORTS_256HZ
2792 bool
2793
2794config SYS_SUPPORTS_1000HZ
2795 bool
2796
2797config SYS_SUPPORTS_1024HZ
2798 bool
2799
2800config SYS_SUPPORTS_ARBIT_HZ
2801 bool
2802 default y if !SYS_SUPPORTS_24HZ && \
2803 !SYS_SUPPORTS_48HZ && \
2804 !SYS_SUPPORTS_100HZ && \
2805 !SYS_SUPPORTS_128HZ && \
2806 !SYS_SUPPORTS_250HZ && \
2807 !SYS_SUPPORTS_256HZ && \
2808 !SYS_SUPPORTS_1000HZ && \
2809 !SYS_SUPPORTS_1024HZ
2810
2811config HZ
2812 int
2813 default 24 if HZ_24
2814 default 48 if HZ_48
2815 default 100 if HZ_100
2816 default 128 if HZ_128
2817 default 250 if HZ_250
2818 default 256 if HZ_256
2819 default 1000 if HZ_1000
2820 default 1024 if HZ_1024
2821
2822config SCHED_HRTICK
2823 def_bool HIGH_RES_TIMERS
2824
2825source "kernel/Kconfig.preempt"
2826
2827config KEXEC
2828 bool "Kexec system call"
2829 select KEXEC_CORE
2830 help
2831 kexec is a system call that implements the ability to shutdown your
2832 current kernel, and to start another kernel. It is like a reboot
2833 but it is independent of the system firmware. And like a reboot
2834 you can start any kernel with it, not just Linux.
2835
2836 The name comes from the similarity to the exec system call.
2837
2838 It is an ongoing process to be certain the hardware in a machine
2839 is properly shutdown, so do not be surprised if this code does not
2840 initially work for you. As of this writing the exact hardware
2841 interface is strongly in flux, so no good recommendation can be
2842 made.
2843
2844config CRASH_DUMP
2845 bool "Kernel crash dumps"
2846 help
2847 Generate crash dump after being started by kexec.
2848 This should be normally only set in special crash dump kernels
2849 which are loaded in the main kernel with kexec-tools into
2850 a specially reserved region and then later executed after
2851 a crash by kdump/kexec. The crash dump kernel must be compiled
2852 to a memory address not used by the main kernel or firmware using
2853 PHYSICAL_START.
2854
2855config PHYSICAL_START
2856 hex "Physical address where the kernel is loaded"
2857 default "0xffffffff84000000"
2858 depends on CRASH_DUMP
2859 help
2860 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2861 If you plan to use kernel for capturing the crash dump change
2862 this value to start of the reserved region (the "X" value as
2863 specified in the "crashkernel=YM@XM" command line boot parameter
2864 passed to the panic-ed kernel).
2865
2866config SECCOMP
2867 bool "Enable seccomp to safely compute untrusted bytecode"
2868 depends on PROC_FS
2869 default y
2870 help
2871 This kernel feature is useful for number crunching applications
2872 that may need to compute untrusted bytecode during their
2873 execution. By using pipes or other transports made available to
2874 the process as file descriptors supporting the read/write
2875 syscalls, it's possible to isolate those applications in
2876 their own address space using seccomp. Once seccomp is
2877 enabled via /proc/<pid>/seccomp, it cannot be disabled
2878 and the task is only allowed to execute a few safe syscalls
2879 defined by each seccomp mode.
2880
2881 If unsure, say Y. Only embedded should say N here.
2882
2883config MIPS_O32_FP64_SUPPORT
2884 bool "Support for O32 binaries using 64-bit FP"
2885 depends on 32BIT || MIPS32_O32
2886 help
2887 When this is enabled, the kernel will support use of 64-bit floating
2888 point registers with binaries using the O32 ABI along with the
2889 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2890 32-bit MIPS systems this support is at the cost of increasing the
2891 size and complexity of the compiled FPU emulator. Thus if you are
2892 running a MIPS32 system and know that none of your userland binaries
2893 will require 64-bit floating point, you may wish to reduce the size
2894 of your kernel & potentially improve FP emulation performance by
2895 saying N here.
2896
2897 Although binutils currently supports use of this flag the details
2898 concerning its effect upon the O32 ABI in userland are still being
2899 worked on. In order to avoid userland becoming dependant upon current
2900 behaviour before the details have been finalised, this option should
2901 be considered experimental and only enabled by those working upon
2902 said details.
2903
2904 If unsure, say N.
2905
2906config USE_OF
2907 bool
2908 select OF
2909 select OF_EARLY_FLATTREE
2910 select IRQ_DOMAIN
2911
2912config BUILTIN_DTB
2913 bool
2914
2915choice
2916 prompt "Kernel appended dtb support" if USE_OF
2917 default MIPS_NO_APPENDED_DTB
2918
2919 config MIPS_NO_APPENDED_DTB
2920 bool "None"
2921 help
2922 Do not enable appended dtb support.
2923
2924 config MIPS_ELF_APPENDED_DTB
2925 bool "vmlinux"
2926 help
2927 With this option, the boot code will look for a device tree binary
2928 DTB) included in the vmlinux ELF section .appended_dtb. By default
2929 it is empty and the DTB can be appended using binutils command
2930 objcopy:
2931
2932 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2933
2934 This is meant as a backward compatiblity convenience for those
2935 systems with a bootloader that can't be upgraded to accommodate
2936 the documented boot protocol using a device tree.
2937
2938 config MIPS_RAW_APPENDED_DTB
2939 bool "vmlinux.bin or vmlinuz.bin"
2940 help
2941 With this option, the boot code will look for a device tree binary
2942 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2943 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2944
2945 This is meant as a backward compatibility convenience for those
2946 systems with a bootloader that can't be upgraded to accommodate
2947 the documented boot protocol using a device tree.
2948
2949 Beware that there is very little in terms of protection against
2950 this option being confused by leftover garbage in memory that might
2951 look like a DTB header after a reboot if no actual DTB is appended
2952 to vmlinux.bin. Do not leave this option active in a production kernel
2953 if you don't intend to always append a DTB.
2954endchoice
2955
2956choice
2957 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2958 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2959 !MIPS_MALTA && \
2960 !CAVIUM_OCTEON_SOC
2961 default MIPS_CMDLINE_FROM_BOOTLOADER
2962
2963 config MIPS_CMDLINE_FROM_DTB
2964 depends on USE_OF
2965 bool "Dtb kernel arguments if available"
2966
2967 config MIPS_CMDLINE_DTB_EXTEND
2968 depends on USE_OF
2969 bool "Extend dtb kernel arguments with bootloader arguments"
2970
2971 config MIPS_CMDLINE_FROM_BOOTLOADER
2972 bool "Bootloader kernel arguments if available"
2973
2974 config MIPS_CMDLINE_BUILTIN_EXTEND
2975 depends on CMDLINE_BOOL
2976 bool "Extend builtin kernel arguments with bootloader arguments"
2977endchoice
2978
2979endmenu
2980
2981config LOCKDEP_SUPPORT
2982 bool
2983 default y
2984
2985config STACKTRACE_SUPPORT
2986 bool
2987 default y
2988
2989config HAVE_LATENCYTOP_SUPPORT
2990 bool
2991 default y
2992
2993config PGTABLE_LEVELS
2994 int
2995 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2996 default 3 if 64BIT && !PAGE_SIZE_64KB
2997 default 2
2998
2999source "init/Kconfig"
3000
3001source "kernel/Kconfig.freezer"
3002
3003menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3004
3005config HW_HAS_EISA
3006 bool
3007config HW_HAS_PCI
3008 bool
3009
3010config PCI
3011 bool "Support for PCI controller"
3012 depends on HW_HAS_PCI
3013 select PCI_DOMAINS
3014 help
3015 Find out whether you have a PCI motherboard. PCI is the name of a
3016 bus system, i.e. the way the CPU talks to the other stuff inside
3017 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
3018 say Y, otherwise N.
3019
3020config HT_PCI
3021 bool "Support for HT-linked PCI"
3022 default y
3023 depends on CPU_LOONGSON3
3024 select PCI
3025 select PCI_DOMAINS
3026 help
3027 Loongson family machines use Hyper-Transport bus for inter-core
3028 connection and device connection. The PCI bus is a subordinate
3029 linked at HT. Choose Y for Loongson-3 based machines.
3030
3031config PCI_DOMAINS
3032 bool
3033
3034config PCI_DOMAINS_GENERIC
3035 bool
3036
3037config PCI_DRIVERS_GENERIC
3038 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
3039 bool
3040
3041config PCI_DRIVERS_LEGACY
3042 def_bool !PCI_DRIVERS_GENERIC
3043 select NO_GENERIC_PCI_IOPORT_MAP
3044
3045source "drivers/pci/Kconfig"
3046
3047#
3048# ISA support is now enabled via select. Too many systems still have the one
3049# or other ISA chip on the board that users don't know about so don't expect
3050# users to choose the right thing ...
3051#
3052config ISA
3053 bool
3054
3055config EISA
3056 bool "EISA support"
3057 depends on HW_HAS_EISA
3058 select ISA
3059 select GENERIC_ISA_DMA
3060 ---help---
3061 The Extended Industry Standard Architecture (EISA) bus was
3062 developed as an open alternative to the IBM MicroChannel bus.
3063
3064 The EISA bus provided some of the features of the IBM MicroChannel
3065 bus while maintaining backward compatibility with cards made for
3066 the older ISA bus. The EISA bus saw limited use between 1988 and
3067 1995 when it was made obsolete by the PCI bus.
3068
3069 Say Y here if you are building a kernel for an EISA-based machine.
3070
3071 Otherwise, say N.
3072
3073source "drivers/eisa/Kconfig"
3074
3075config TC
3076 bool "TURBOchannel support"
3077 depends on MACH_DECSTATION
3078 help
3079 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3080 processors. TURBOchannel programming specifications are available
3081 at:
3082 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3083 and:
3084 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3085 Linux driver support status is documented at:
3086 <http://www.linux-mips.org/wiki/DECstation>
3087
3088config MMU
3089 bool
3090 default y
3091
3092config ARCH_MMAP_RND_BITS_MIN
3093 default 12 if 64BIT
3094 default 8
3095
3096config ARCH_MMAP_RND_BITS_MAX
3097 default 18 if 64BIT
3098 default 15
3099
3100config ARCH_MMAP_RND_COMPAT_BITS_MIN
3101 default 8
3102
3103config ARCH_MMAP_RND_COMPAT_BITS_MAX
3104 default 15
3105
3106config I8253
3107 bool
3108 select CLKSRC_I8253
3109 select CLKEVT_I8253
3110 select MIPS_EXTERNAL_TIMER
3111
3112config ZONE_DMA
3113 bool
3114
3115config ZONE_DMA32
3116 bool
3117
3118source "drivers/pcmcia/Kconfig"
3119
3120config RAPIDIO
3121 tristate "RapidIO support"
3122 depends on PCI
3123 default n
3124 help
3125 If you say Y here, the kernel will include drivers and
3126 infrastructure code to support RapidIO interconnect devices.
3127
3128source "drivers/rapidio/Kconfig"
3129
3130endmenu
3131
3132menu "Executable file formats"
3133
3134source "fs/Kconfig.binfmt"
3135
3136config TRAD_SIGNALS
3137 bool
3138
3139config MIPS32_COMPAT
3140 bool
3141
3142config COMPAT
3143 bool
3144
3145config SYSVIPC_COMPAT
3146 bool
3147
3148config MIPS32_O32
3149 bool "Kernel support for o32 binaries"
3150 depends on 64BIT
3151 select ARCH_WANT_OLD_COMPAT_IPC
3152 select COMPAT
3153 select MIPS32_COMPAT
3154 select SYSVIPC_COMPAT if SYSVIPC
3155 help
3156 Select this option if you want to run o32 binaries. These are pure
3157 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3158 existing binaries are in this format.
3159
3160 If unsure, say Y.
3161
3162config MIPS32_N32
3163 bool "Kernel support for n32 binaries"
3164 depends on 64BIT
3165 select COMPAT
3166 select MIPS32_COMPAT
3167 select SYSVIPC_COMPAT if SYSVIPC
3168 help
3169 Select this option if you want to run n32 binaries. These are
3170 64-bit binaries using 32-bit quantities for addressing and certain
3171 data that would normally be 64-bit. They are used in special
3172 cases.
3173
3174 If unsure, say N.
3175
3176config BINFMT_ELF32
3177 bool
3178 default y if MIPS32_O32 || MIPS32_N32
3179 select ELFCORE
3180
3181endmenu
3182
3183menu "Power management options"
3184
3185config ARCH_HIBERNATION_POSSIBLE
3186 def_bool y
3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3188
3189config ARCH_SUSPEND_POSSIBLE
3190 def_bool y
3191 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3192
3193source "kernel/power/Kconfig"
3194
3195endmenu
3196
3197config MIPS_EXTERNAL_TIMER
3198 bool
3199
3200menu "CPU Power Management"
3201
3202if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3203source "drivers/cpufreq/Kconfig"
3204endif
3205
3206source "drivers/cpuidle/Kconfig"
3207
3208endmenu
3209
3210source "net/Kconfig"
3211
3212source "drivers/Kconfig"
3213
3214source "drivers/firmware/Kconfig"
3215
3216source "fs/Kconfig"
3217
3218source "arch/mips/Kconfig.debug"
3219
3220source "security/Kconfig"
3221
3222source "crypto/Kconfig"
3223
3224source "lib/Kconfig"
3225
3226source "arch/mips/kvm/Kconfig"
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CPU_FINALIZE_INIT
8 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
9 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
10 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_KCOV
12 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
13 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
14 select ARCH_HAS_STRNCPY_FROM_USER
15 select ARCH_HAS_STRNLEN_USER
16 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
17 select ARCH_HAS_UBSAN_SANITIZE_ALL
18 select ARCH_HAS_GCOV_PROFILE_ALL
19 select ARCH_KEEP_MEMBLOCK
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_GETTIMEOFDAY
37 select GENERIC_IOMAP
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_IDLE_POLL_SETUP
49 select GENERIC_TIME_VSYSCALL
50 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
51 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
52 select HAVE_ARCH_COMPILER_H
53 select HAVE_ARCH_JUMP_LABEL
54 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
55 select HAVE_ARCH_MMAP_RND_BITS if MMU
56 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
57 select HAVE_ARCH_SECCOMP_FILTER
58 select HAVE_ARCH_TRACEHOOK
59 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
60 select HAVE_ASM_MODVERSIONS
61 select HAVE_CONTEXT_TRACKING_USER
62 select HAVE_TIF_NOHZ
63 select HAVE_C_RECORDMCOUNT
64 select HAVE_DEBUG_KMEMLEAK
65 select HAVE_DEBUG_STACKOVERFLOW
66 select HAVE_DMA_CONTIGUOUS
67 select HAVE_DYNAMIC_FTRACE
68 select HAVE_EBPF_JIT if !CPU_MICROMIPS
69 select HAVE_EXIT_THREAD
70 select HAVE_FAST_GUP
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
79 select HAVE_KPROBES
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
83 select HAVE_NMI
84 select HAVE_PERF_EVENTS
85 select HAVE_PERF_REGS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
88 select HAVE_RSEQ
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
94 select ISA if EISA
95 select LOCK_MM_AND_FIND_VMA
96 select MODULES_USE_ELF_REL if MODULES
97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
98 select PERF_USE_VMALLOC
99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select RTC_LIB
101 select SYSCTL_EXCEPTION_TRACE
102 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
104 select HAVE_ARCH_KCSAN if 64BIT
105
106config MIPS_FIXUP_BIGPHYS_ADDR
107 bool
108
109config MIPS_GENERIC
110 bool
111
112config MACH_INGENIC
113 bool
114 select SYS_SUPPORTS_32BIT_KERNEL
115 select SYS_SUPPORTS_LITTLE_ENDIAN
116 select SYS_SUPPORTS_ZBOOT
117 select DMA_NONCOHERENT
118 select IRQ_MIPS_CPU
119 select PINCTRL
120 select GPIOLIB
121 select COMMON_CLK
122 select GENERIC_IRQ_CHIP
123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
124 select USE_OF
125 select CPU_SUPPORTS_CPUFREQ
126 select MIPS_EXTERNAL_TIMER
127
128menu "Machine selection"
129
130choice
131 prompt "System type"
132 default MIPS_GENERIC_KERNEL
133
134config MIPS_GENERIC_KERNEL
135 bool "Generic board-agnostic MIPS kernel"
136 select MIPS_GENERIC
137 select BOOT_RAW
138 select BUILTIN_DTB
139 select CEVT_R4K
140 select CLKSRC_MIPS_GIC
141 select COMMON_CLK
142 select CPU_MIPSR2_IRQ_EI
143 select CPU_MIPSR2_IRQ_VI
144 select CSRC_R4K
145 select DMA_NONCOHERENT
146 select HAVE_PCI
147 select IRQ_MIPS_CPU
148 select MIPS_AUTO_PFN_OFFSET
149 select MIPS_CPU_SCACHE
150 select MIPS_GIC
151 select MIPS_L1_CACHE_SHIFT_7
152 select NO_EXCEPT_FILL
153 select PCI_DRIVERS_GENERIC
154 select SMP_UP if SMP
155 select SWAP_IO_SPACE
156 select SYS_HAS_CPU_MIPS32_R1
157 select SYS_HAS_CPU_MIPS32_R2
158 select SYS_HAS_CPU_MIPS32_R5
159 select SYS_HAS_CPU_MIPS32_R6
160 select SYS_HAS_CPU_MIPS64_R1
161 select SYS_HAS_CPU_MIPS64_R2
162 select SYS_HAS_CPU_MIPS64_R5
163 select SYS_HAS_CPU_MIPS64_R6
164 select SYS_SUPPORTS_32BIT_KERNEL
165 select SYS_SUPPORTS_64BIT_KERNEL
166 select SYS_SUPPORTS_BIG_ENDIAN
167 select SYS_SUPPORTS_HIGHMEM
168 select SYS_SUPPORTS_LITTLE_ENDIAN
169 select SYS_SUPPORTS_MICROMIPS
170 select SYS_SUPPORTS_MIPS16
171 select SYS_SUPPORTS_MIPS_CPS
172 select SYS_SUPPORTS_MULTITHREADING
173 select SYS_SUPPORTS_RELOCATABLE
174 select SYS_SUPPORTS_SMARTMIPS
175 select SYS_SUPPORTS_ZBOOT
176 select UHI_BOOT
177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183 select USE_OF
184 help
185 Select this to build a kernel which aims to support multiple boards,
186 generally using a flattened device tree passed from the bootloader
187 using the boot protocol defined in the UHI (Unified Hosting
188 Interface) specification.
189
190config MIPS_ALCHEMY
191 bool "Alchemy processor based machines"
192 select PHYS_ADDR_T_64BIT
193 select CEVT_R4K
194 select CSRC_R4K
195 select IRQ_MIPS_CPU
196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198 select SYS_HAS_CPU_MIPS32_R1
199 select SYS_SUPPORTS_32BIT_KERNEL
200 select SYS_SUPPORTS_APM_EMULATION
201 select GPIOLIB
202 select SYS_SUPPORTS_ZBOOT
203 select COMMON_CLK
204
205config ATH25
206 bool "Atheros AR231x/AR531x SoC support"
207 select CEVT_R4K
208 select CSRC_R4K
209 select DMA_NONCOHERENT
210 select IRQ_MIPS_CPU
211 select IRQ_DOMAIN
212 select SYS_HAS_CPU_MIPS32_R1
213 select SYS_SUPPORTS_BIG_ENDIAN
214 select SYS_SUPPORTS_32BIT_KERNEL
215 select SYS_HAS_EARLY_PRINTK
216 help
217 Support for Atheros AR231x and Atheros AR531x based boards
218
219config ATH79
220 bool "Atheros AR71XX/AR724X/AR913X based boards"
221 select ARCH_HAS_RESET_CONTROLLER
222 select BOOT_RAW
223 select CEVT_R4K
224 select CSRC_R4K
225 select DMA_NONCOHERENT
226 select GPIOLIB
227 select PINCTRL
228 select COMMON_CLK
229 select IRQ_MIPS_CPU
230 select SYS_HAS_CPU_MIPS32_R2
231 select SYS_HAS_EARLY_PRINTK
232 select SYS_SUPPORTS_32BIT_KERNEL
233 select SYS_SUPPORTS_BIG_ENDIAN
234 select SYS_SUPPORTS_MIPS16
235 select SYS_SUPPORTS_ZBOOT_UART_PROM
236 select USE_OF
237 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
238 help
239 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
240
241config BMIPS_GENERIC
242 bool "Broadcom Generic BMIPS kernel"
243 select ARCH_HAS_RESET_CONTROLLER
244 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
245 select BOOT_RAW
246 select NO_EXCEPT_FILL
247 select USE_OF
248 select CEVT_R4K
249 select CSRC_R4K
250 select SYNC_R4K
251 select COMMON_CLK
252 select BCM6345_L1_IRQ
253 select BCM7038_L1_IRQ
254 select BCM7120_L2_IRQ
255 select BRCMSTB_L2_IRQ
256 select IRQ_MIPS_CPU
257 select DMA_NONCOHERENT
258 select SYS_SUPPORTS_32BIT_KERNEL
259 select SYS_SUPPORTS_LITTLE_ENDIAN
260 select SYS_SUPPORTS_BIG_ENDIAN
261 select SYS_SUPPORTS_HIGHMEM
262 select SYS_HAS_CPU_BMIPS32_3300
263 select SYS_HAS_CPU_BMIPS4350
264 select SYS_HAS_CPU_BMIPS4380
265 select SYS_HAS_CPU_BMIPS5000
266 select SWAP_IO_SPACE
267 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
268 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
269 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
270 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
271 select HARDIRQS_SW_RESEND
272 select HAVE_PCI
273 select PCI_DRIVERS_GENERIC
274 select FW_CFE
275 help
276 Build a generic DT-based kernel image that boots on select
277 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
278 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
279 must be set appropriately for your board.
280
281config BCM47XX
282 bool "Broadcom BCM47XX based boards"
283 select BOOT_RAW
284 select CEVT_R4K
285 select CSRC_R4K
286 select DMA_NONCOHERENT
287 select HAVE_PCI
288 select IRQ_MIPS_CPU
289 select SYS_HAS_CPU_MIPS32_R1
290 select NO_EXCEPT_FILL
291 select SYS_SUPPORTS_32BIT_KERNEL
292 select SYS_SUPPORTS_LITTLE_ENDIAN
293 select SYS_SUPPORTS_MIPS16
294 select SYS_SUPPORTS_ZBOOT
295 select SYS_HAS_EARLY_PRINTK
296 select USE_GENERIC_EARLY_PRINTK_8250
297 select GPIOLIB
298 select LEDS_GPIO_REGISTER
299 select BCM47XX_NVRAM
300 select BCM47XX_SPROM
301 select BCM47XX_SSB if !BCM47XX_BCMA
302 help
303 Support for BCM47XX based boards
304
305config BCM63XX
306 bool "Broadcom BCM63XX based boards"
307 select BOOT_RAW
308 select CEVT_R4K
309 select CSRC_R4K
310 select SYNC_R4K
311 select DMA_NONCOHERENT
312 select IRQ_MIPS_CPU
313 select SYS_SUPPORTS_32BIT_KERNEL
314 select SYS_SUPPORTS_BIG_ENDIAN
315 select SYS_HAS_EARLY_PRINTK
316 select SYS_HAS_CPU_BMIPS32_3300
317 select SYS_HAS_CPU_BMIPS4350
318 select SYS_HAS_CPU_BMIPS4380
319 select SWAP_IO_SPACE
320 select GPIOLIB
321 select MIPS_L1_CACHE_SHIFT_4
322 select HAVE_LEGACY_CLK
323 help
324 Support for BCM63XX based boards
325
326config MIPS_COBALT
327 bool "Cobalt Server"
328 select CEVT_R4K
329 select CSRC_R4K
330 select CEVT_GT641XX
331 select DMA_NONCOHERENT
332 select FORCE_PCI
333 select I8253
334 select I8259
335 select IRQ_MIPS_CPU
336 select IRQ_GT641XX
337 select PCI_GT64XXX_PCI0
338 select SYS_HAS_CPU_NEVADA
339 select SYS_HAS_EARLY_PRINTK
340 select SYS_SUPPORTS_32BIT_KERNEL
341 select SYS_SUPPORTS_64BIT_KERNEL
342 select SYS_SUPPORTS_LITTLE_ENDIAN
343 select USE_GENERIC_EARLY_PRINTK_8250
344
345config MACH_DECSTATION
346 bool "DECstations"
347 select BOOT_ELF32
348 select CEVT_DS1287
349 select CEVT_R4K if CPU_R4X00
350 select CSRC_IOASIC
351 select CSRC_R4K if CPU_R4X00
352 select CPU_DADDI_WORKAROUNDS if 64BIT
353 select CPU_R4000_WORKAROUNDS if 64BIT
354 select CPU_R4400_WORKAROUNDS if 64BIT
355 select DMA_NONCOHERENT
356 select NO_IOPORT_MAP
357 select IRQ_MIPS_CPU
358 select SYS_HAS_CPU_R3000
359 select SYS_HAS_CPU_R4X00
360 select SYS_SUPPORTS_32BIT_KERNEL
361 select SYS_SUPPORTS_64BIT_KERNEL
362 select SYS_SUPPORTS_LITTLE_ENDIAN
363 select SYS_SUPPORTS_128HZ
364 select SYS_SUPPORTS_256HZ
365 select SYS_SUPPORTS_1024HZ
366 select MIPS_L1_CACHE_SHIFT_4
367 help
368 This enables support for DEC's MIPS based workstations. For details
369 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
370 DECstation porting pages on <http://decstation.unix-ag.org/>.
371
372 If you have one of the following DECstation Models you definitely
373 want to choose R4xx0 for the CPU Type:
374
375 DECstation 5000/50
376 DECstation 5000/150
377 DECstation 5000/260
378 DECsystem 5900/260
379
380 otherwise choose R3000.
381
382config MACH_JAZZ
383 bool "Jazz family of machines"
384 select ARC_MEMORY
385 select ARC_PROMLIB
386 select ARCH_MIGHT_HAVE_PC_PARPORT
387 select ARCH_MIGHT_HAVE_PC_SERIO
388 select DMA_OPS
389 select FW_ARC
390 select FW_ARC32
391 select ARCH_MAY_HAVE_PC_FDC
392 select CEVT_R4K
393 select CSRC_R4K
394 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
395 select GENERIC_ISA_DMA
396 select HAVE_PCSPKR_PLATFORM
397 select IRQ_MIPS_CPU
398 select I8253
399 select I8259
400 select ISA
401 select SYS_HAS_CPU_R4X00
402 select SYS_SUPPORTS_32BIT_KERNEL
403 select SYS_SUPPORTS_64BIT_KERNEL
404 select SYS_SUPPORTS_100HZ
405 select SYS_SUPPORTS_LITTLE_ENDIAN
406 help
407 This a family of machines based on the MIPS R4030 chipset which was
408 used by several vendors to build RISC/os and Windows NT workstations.
409 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
410 Olivetti M700-10 workstations.
411
412config MACH_INGENIC_SOC
413 bool "Ingenic SoC based machines"
414 select MIPS_GENERIC
415 select MACH_INGENIC
416 select SYS_SUPPORTS_ZBOOT_UART16550
417 select CPU_SUPPORTS_CPUFREQ
418 select MIPS_EXTERNAL_TIMER
419
420config LANTIQ
421 bool "Lantiq based platforms"
422 select DMA_NONCOHERENT
423 select IRQ_MIPS_CPU
424 select CEVT_R4K
425 select CSRC_R4K
426 select NO_EXCEPT_FILL
427 select SYS_HAS_CPU_MIPS32_R1
428 select SYS_HAS_CPU_MIPS32_R2
429 select SYS_SUPPORTS_BIG_ENDIAN
430 select SYS_SUPPORTS_32BIT_KERNEL
431 select SYS_SUPPORTS_MIPS16
432 select SYS_SUPPORTS_MULTITHREADING
433 select SYS_SUPPORTS_VPE_LOADER
434 select SYS_HAS_EARLY_PRINTK
435 select GPIOLIB
436 select SWAP_IO_SPACE
437 select BOOT_RAW
438 select HAVE_LEGACY_CLK
439 select USE_OF
440 select PINCTRL
441 select PINCTRL_LANTIQ
442 select ARCH_HAS_RESET_CONTROLLER
443 select RESET_CONTROLLER
444
445config MACH_LOONGSON32
446 bool "Loongson 32-bit family of machines"
447 select SYS_SUPPORTS_ZBOOT
448 help
449 This enables support for the Loongson-1 family of machines.
450
451 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
452 the Institute of Computing Technology (ICT), Chinese Academy of
453 Sciences (CAS).
454
455config MACH_LOONGSON2EF
456 bool "Loongson-2E/F family of machines"
457 select SYS_SUPPORTS_ZBOOT
458 help
459 This enables the support of early Loongson-2E/F family of machines.
460
461config MACH_LOONGSON64
462 bool "Loongson 64-bit family of machines"
463 select ARCH_DMA_DEFAULT_COHERENT
464 select ARCH_SPARSEMEM_ENABLE
465 select ARCH_MIGHT_HAVE_PC_PARPORT
466 select ARCH_MIGHT_HAVE_PC_SERIO
467 select GENERIC_ISA_DMA_SUPPORT_BROKEN
468 select BOOT_ELF32
469 select BOARD_SCACHE
470 select CSRC_R4K
471 select CEVT_R4K
472 select FORCE_PCI
473 select ISA
474 select I8259
475 select IRQ_MIPS_CPU
476 select NO_EXCEPT_FILL
477 select NR_CPUS_DEFAULT_64
478 select USE_GENERIC_EARLY_PRINTK_8250
479 select PCI_DRIVERS_GENERIC
480 select SYS_HAS_CPU_LOONGSON64
481 select SYS_HAS_EARLY_PRINTK
482 select SYS_SUPPORTS_SMP
483 select SYS_SUPPORTS_HOTPLUG_CPU
484 select SYS_SUPPORTS_NUMA
485 select SYS_SUPPORTS_64BIT_KERNEL
486 select SYS_SUPPORTS_HIGHMEM
487 select SYS_SUPPORTS_LITTLE_ENDIAN
488 select SYS_SUPPORTS_ZBOOT
489 select SYS_SUPPORTS_RELOCATABLE
490 select ZONE_DMA32
491 select COMMON_CLK
492 select USE_OF
493 select BUILTIN_DTB
494 select PCI_HOST_GENERIC
495 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
496 help
497 This enables the support of Loongson-2/3 family of machines.
498
499 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
500 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
501 and Loongson-2F which will be removed), developed by the Institute
502 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
503
504config MIPS_MALTA
505 bool "MIPS Malta board"
506 select ARCH_MAY_HAVE_PC_FDC
507 select ARCH_MIGHT_HAVE_PC_PARPORT
508 select ARCH_MIGHT_HAVE_PC_SERIO
509 select BOOT_ELF32
510 select BOOT_RAW
511 select BUILTIN_DTB
512 select CEVT_R4K
513 select CLKSRC_MIPS_GIC
514 select COMMON_CLK
515 select CSRC_R4K
516 select DMA_NONCOHERENT
517 select GENERIC_ISA_DMA
518 select HAVE_PCSPKR_PLATFORM
519 select HAVE_PCI
520 select I8253
521 select I8259
522 select IRQ_MIPS_CPU
523 select MIPS_BONITO64
524 select MIPS_CPU_SCACHE
525 select MIPS_GIC
526 select MIPS_L1_CACHE_SHIFT_6
527 select MIPS_MSC
528 select PCI_GT64XXX_PCI0
529 select SMP_UP if SMP
530 select SWAP_IO_SPACE
531 select SYS_HAS_CPU_MIPS32_R1
532 select SYS_HAS_CPU_MIPS32_R2
533 select SYS_HAS_CPU_MIPS32_R3_5
534 select SYS_HAS_CPU_MIPS32_R5
535 select SYS_HAS_CPU_MIPS32_R6
536 select SYS_HAS_CPU_MIPS64_R1
537 select SYS_HAS_CPU_MIPS64_R2
538 select SYS_HAS_CPU_MIPS64_R6
539 select SYS_HAS_CPU_NEVADA
540 select SYS_HAS_CPU_RM7000
541 select SYS_SUPPORTS_32BIT_KERNEL
542 select SYS_SUPPORTS_64BIT_KERNEL
543 select SYS_SUPPORTS_BIG_ENDIAN
544 select SYS_SUPPORTS_HIGHMEM
545 select SYS_SUPPORTS_LITTLE_ENDIAN
546 select SYS_SUPPORTS_MICROMIPS
547 select SYS_SUPPORTS_MIPS16
548 select SYS_SUPPORTS_MIPS_CPS
549 select SYS_SUPPORTS_MULTITHREADING
550 select SYS_SUPPORTS_RELOCATABLE
551 select SYS_SUPPORTS_SMARTMIPS
552 select SYS_SUPPORTS_VPE_LOADER
553 select SYS_SUPPORTS_ZBOOT
554 select USE_OF
555 select WAR_ICACHE_REFILLS
556 select ZONE_DMA32 if 64BIT
557 help
558 This enables support for the MIPS Technologies Malta evaluation
559 board.
560
561config MACH_PIC32
562 bool "Microchip PIC32 Family"
563 help
564 This enables support for the Microchip PIC32 family of platforms.
565
566 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
567 microcontrollers.
568
569config MACH_NINTENDO64
570 bool "Nintendo 64 console"
571 select CEVT_R4K
572 select CSRC_R4K
573 select SYS_HAS_CPU_R4300
574 select SYS_SUPPORTS_BIG_ENDIAN
575 select SYS_SUPPORTS_ZBOOT
576 select SYS_SUPPORTS_32BIT_KERNEL
577 select SYS_SUPPORTS_64BIT_KERNEL
578 select DMA_NONCOHERENT
579 select IRQ_MIPS_CPU
580
581config RALINK
582 bool "Ralink based machines"
583 select CEVT_R4K
584 select COMMON_CLK
585 select CSRC_R4K
586 select BOOT_RAW
587 select DMA_NONCOHERENT
588 select IRQ_MIPS_CPU
589 select USE_OF
590 select SYS_HAS_CPU_MIPS32_R2
591 select SYS_SUPPORTS_32BIT_KERNEL
592 select SYS_SUPPORTS_LITTLE_ENDIAN
593 select SYS_SUPPORTS_MIPS16
594 select SYS_SUPPORTS_ZBOOT
595 select SYS_HAS_EARLY_PRINTK
596 select ARCH_HAS_RESET_CONTROLLER
597 select RESET_CONTROLLER
598
599config MACH_REALTEK_RTL
600 bool "Realtek RTL838x/RTL839x based machines"
601 select MIPS_GENERIC
602 select DMA_NONCOHERENT
603 select IRQ_MIPS_CPU
604 select CSRC_R4K
605 select CEVT_R4K
606 select SYS_HAS_CPU_MIPS32_R1
607 select SYS_HAS_CPU_MIPS32_R2
608 select SYS_SUPPORTS_BIG_ENDIAN
609 select SYS_SUPPORTS_32BIT_KERNEL
610 select SYS_SUPPORTS_MIPS16
611 select SYS_SUPPORTS_MULTITHREADING
612 select SYS_SUPPORTS_VPE_LOADER
613 select BOOT_RAW
614 select PINCTRL
615 select USE_OF
616
617config SGI_IP22
618 bool "SGI IP22 (Indy/Indigo2)"
619 select ARC_MEMORY
620 select ARC_PROMLIB
621 select FW_ARC
622 select FW_ARC32
623 select ARCH_MIGHT_HAVE_PC_SERIO
624 select BOOT_ELF32
625 select CEVT_R4K
626 select CSRC_R4K
627 select DEFAULT_SGI_PARTITION
628 select DMA_NONCOHERENT
629 select HAVE_EISA
630 select I8253
631 select I8259
632 select IP22_CPU_SCACHE
633 select IRQ_MIPS_CPU
634 select GENERIC_ISA_DMA_SUPPORT_BROKEN
635 select SGI_HAS_I8042
636 select SGI_HAS_INDYDOG
637 select SGI_HAS_HAL2
638 select SGI_HAS_SEEQ
639 select SGI_HAS_WD93
640 select SGI_HAS_ZILOG
641 select SWAP_IO_SPACE
642 select SYS_HAS_CPU_R4X00
643 select SYS_HAS_CPU_R5000
644 select SYS_HAS_EARLY_PRINTK
645 select SYS_SUPPORTS_32BIT_KERNEL
646 select SYS_SUPPORTS_64BIT_KERNEL
647 select SYS_SUPPORTS_BIG_ENDIAN
648 select WAR_R4600_V1_INDEX_ICACHEOP
649 select WAR_R4600_V1_HIT_CACHEOP
650 select WAR_R4600_V2_HIT_CACHEOP
651 select MIPS_L1_CACHE_SHIFT_7
652 help
653 This are the SGI Indy, Challenge S and Indigo2, as well as certain
654 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
655 that runs on these, say Y here.
656
657config SGI_IP27
658 bool "SGI IP27 (Origin200/2000)"
659 select ARCH_HAS_PHYS_TO_DMA
660 select ARCH_SPARSEMEM_ENABLE
661 select FW_ARC
662 select FW_ARC64
663 select ARC_CMDLINE_ONLY
664 select BOOT_ELF64
665 select DEFAULT_SGI_PARTITION
666 select FORCE_PCI
667 select SYS_HAS_EARLY_PRINTK
668 select HAVE_PCI
669 select IRQ_MIPS_CPU
670 select IRQ_DOMAIN_HIERARCHY
671 select NR_CPUS_DEFAULT_64
672 select PCI_DRIVERS_GENERIC
673 select PCI_XTALK_BRIDGE
674 select SYS_HAS_CPU_R10000
675 select SYS_SUPPORTS_64BIT_KERNEL
676 select SYS_SUPPORTS_BIG_ENDIAN
677 select SYS_SUPPORTS_NUMA
678 select SYS_SUPPORTS_SMP
679 select WAR_R10000_LLSC
680 select MIPS_L1_CACHE_SHIFT_7
681 select NUMA
682 select HAVE_ARCH_NODEDATA_EXTENSION
683 help
684 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
685 workstations. To compile a Linux kernel that runs on these, say Y
686 here.
687
688config SGI_IP28
689 bool "SGI IP28 (Indigo2 R10k)"
690 select ARC_MEMORY
691 select ARC_PROMLIB
692 select FW_ARC
693 select FW_ARC64
694 select ARCH_MIGHT_HAVE_PC_SERIO
695 select BOOT_ELF64
696 select CEVT_R4K
697 select CSRC_R4K
698 select DEFAULT_SGI_PARTITION
699 select DMA_NONCOHERENT
700 select GENERIC_ISA_DMA_SUPPORT_BROKEN
701 select IRQ_MIPS_CPU
702 select HAVE_EISA
703 select I8253
704 select I8259
705 select SGI_HAS_I8042
706 select SGI_HAS_INDYDOG
707 select SGI_HAS_HAL2
708 select SGI_HAS_SEEQ
709 select SGI_HAS_WD93
710 select SGI_HAS_ZILOG
711 select SWAP_IO_SPACE
712 select SYS_HAS_CPU_R10000
713 select SYS_HAS_EARLY_PRINTK
714 select SYS_SUPPORTS_64BIT_KERNEL
715 select SYS_SUPPORTS_BIG_ENDIAN
716 select WAR_R10000_LLSC
717 select MIPS_L1_CACHE_SHIFT_7
718 help
719 This is the SGI Indigo2 with R10000 processor. To compile a Linux
720 kernel that runs on these, say Y here.
721
722config SGI_IP30
723 bool "SGI IP30 (Octane/Octane2)"
724 select ARCH_HAS_PHYS_TO_DMA
725 select FW_ARC
726 select FW_ARC64
727 select BOOT_ELF64
728 select CEVT_R4K
729 select CSRC_R4K
730 select FORCE_PCI
731 select SYNC_R4K if SMP
732 select ZONE_DMA32
733 select HAVE_PCI
734 select IRQ_MIPS_CPU
735 select IRQ_DOMAIN_HIERARCHY
736 select PCI_DRIVERS_GENERIC
737 select PCI_XTALK_BRIDGE
738 select SYS_HAS_EARLY_PRINTK
739 select SYS_HAS_CPU_R10000
740 select SYS_SUPPORTS_64BIT_KERNEL
741 select SYS_SUPPORTS_BIG_ENDIAN
742 select SYS_SUPPORTS_SMP
743 select WAR_R10000_LLSC
744 select MIPS_L1_CACHE_SHIFT_7
745 select ARC_MEMORY
746 help
747 These are the SGI Octane and Octane2 graphics workstations. To
748 compile a Linux kernel that runs on these, say Y here.
749
750config SGI_IP32
751 bool "SGI IP32 (O2)"
752 select ARC_MEMORY
753 select ARC_PROMLIB
754 select ARCH_HAS_PHYS_TO_DMA
755 select FW_ARC
756 select FW_ARC32
757 select BOOT_ELF32
758 select CEVT_R4K
759 select CSRC_R4K
760 select DMA_NONCOHERENT
761 select HAVE_PCI
762 select IRQ_MIPS_CPU
763 select R5000_CPU_SCACHE
764 select RM7000_CPU_SCACHE
765 select SYS_HAS_CPU_R5000
766 select SYS_HAS_CPU_R10000 if BROKEN
767 select SYS_HAS_CPU_RM7000
768 select SYS_HAS_CPU_NEVADA
769 select SYS_SUPPORTS_64BIT_KERNEL
770 select SYS_SUPPORTS_BIG_ENDIAN
771 select WAR_ICACHE_REFILLS
772 help
773 If you want this kernel to run on SGI O2 workstation, say Y here.
774
775config SIBYTE_CRHONE
776 bool "Sibyte BCM91125C-CRhone"
777 select BOOT_ELF32
778 select SIBYTE_BCM1125
779 select SWAP_IO_SPACE
780 select SYS_HAS_CPU_SB1
781 select SYS_SUPPORTS_BIG_ENDIAN
782 select SYS_SUPPORTS_HIGHMEM
783 select SYS_SUPPORTS_LITTLE_ENDIAN
784
785config SIBYTE_RHONE
786 bool "Sibyte BCM91125E-Rhone"
787 select BOOT_ELF32
788 select SIBYTE_SB1250
789 select SWAP_IO_SPACE
790 select SYS_HAS_CPU_SB1
791 select SYS_SUPPORTS_BIG_ENDIAN
792 select SYS_SUPPORTS_LITTLE_ENDIAN
793
794config SIBYTE_SWARM
795 bool "Sibyte BCM91250A-SWARM"
796 select BOOT_ELF32
797 select HAVE_PATA_PLATFORM
798 select SIBYTE_SB1250
799 select SWAP_IO_SPACE
800 select SYS_HAS_CPU_SB1
801 select SYS_SUPPORTS_BIG_ENDIAN
802 select SYS_SUPPORTS_HIGHMEM
803 select SYS_SUPPORTS_LITTLE_ENDIAN
804 select ZONE_DMA32 if 64BIT
805 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
806
807config SIBYTE_LITTLESUR
808 bool "Sibyte BCM91250C2-LittleSur"
809 select BOOT_ELF32
810 select HAVE_PATA_PLATFORM
811 select SIBYTE_SB1250
812 select SWAP_IO_SPACE
813 select SYS_HAS_CPU_SB1
814 select SYS_SUPPORTS_BIG_ENDIAN
815 select SYS_SUPPORTS_HIGHMEM
816 select SYS_SUPPORTS_LITTLE_ENDIAN
817 select ZONE_DMA32 if 64BIT
818
819config SIBYTE_SENTOSA
820 bool "Sibyte BCM91250E-Sentosa"
821 select BOOT_ELF32
822 select SIBYTE_SB1250
823 select SWAP_IO_SPACE
824 select SYS_HAS_CPU_SB1
825 select SYS_SUPPORTS_BIG_ENDIAN
826 select SYS_SUPPORTS_LITTLE_ENDIAN
827 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
828
829config SIBYTE_BIGSUR
830 bool "Sibyte BCM91480B-BigSur"
831 select BOOT_ELF32
832 select NR_CPUS_DEFAULT_4
833 select SIBYTE_BCM1x80
834 select SWAP_IO_SPACE
835 select SYS_HAS_CPU_SB1
836 select SYS_SUPPORTS_BIG_ENDIAN
837 select SYS_SUPPORTS_HIGHMEM
838 select SYS_SUPPORTS_LITTLE_ENDIAN
839 select ZONE_DMA32 if 64BIT
840 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
841
842config SNI_RM
843 bool "SNI RM200/300/400"
844 select ARC_MEMORY
845 select ARC_PROMLIB
846 select FW_ARC if CPU_LITTLE_ENDIAN
847 select FW_ARC32 if CPU_LITTLE_ENDIAN
848 select FW_SNIPROM if CPU_BIG_ENDIAN
849 select ARCH_MAY_HAVE_PC_FDC
850 select ARCH_MIGHT_HAVE_PC_PARPORT
851 select ARCH_MIGHT_HAVE_PC_SERIO
852 select BOOT_ELF32
853 select CEVT_R4K
854 select CSRC_R4K
855 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
856 select DMA_NONCOHERENT
857 select GENERIC_ISA_DMA
858 select HAVE_EISA
859 select HAVE_PCSPKR_PLATFORM
860 select HAVE_PCI
861 select IRQ_MIPS_CPU
862 select I8253
863 select I8259
864 select ISA
865 select MIPS_L1_CACHE_SHIFT_6
866 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
867 select SYS_HAS_CPU_R4X00
868 select SYS_HAS_CPU_R5000
869 select SYS_HAS_CPU_R10000
870 select R5000_CPU_SCACHE
871 select SYS_HAS_EARLY_PRINTK
872 select SYS_SUPPORTS_32BIT_KERNEL
873 select SYS_SUPPORTS_64BIT_KERNEL
874 select SYS_SUPPORTS_BIG_ENDIAN
875 select SYS_SUPPORTS_HIGHMEM
876 select SYS_SUPPORTS_LITTLE_ENDIAN
877 select WAR_R4600_V2_HIT_CACHEOP
878 help
879 The SNI RM200/300/400 are MIPS-based machines manufactured by
880 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
881 Technology and now in turn merged with Fujitsu. Say Y here to
882 support this machine type.
883
884config MACH_TX49XX
885 bool "Toshiba TX49 series based machines"
886 select WAR_TX49XX_ICACHE_INDEX_INV
887
888config MIKROTIK_RB532
889 bool "Mikrotik RB532 boards"
890 select CEVT_R4K
891 select CSRC_R4K
892 select DMA_NONCOHERENT
893 select HAVE_PCI
894 select IRQ_MIPS_CPU
895 select SYS_HAS_CPU_MIPS32_R1
896 select SYS_SUPPORTS_32BIT_KERNEL
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWAP_IO_SPACE
899 select BOOT_RAW
900 select GPIOLIB
901 select MIPS_L1_CACHE_SHIFT_4
902 help
903 Support the Mikrotik(tm) RouterBoard 532 series,
904 based on the IDT RC32434 SoC.
905
906config CAVIUM_OCTEON_SOC
907 bool "Cavium Networks Octeon SoC based boards"
908 select CEVT_R4K
909 select ARCH_HAS_PHYS_TO_DMA
910 select HAVE_RAPIDIO
911 select PHYS_ADDR_T_64BIT
912 select SYS_SUPPORTS_64BIT_KERNEL
913 select SYS_SUPPORTS_BIG_ENDIAN
914 select EDAC_SUPPORT
915 select EDAC_ATOMIC_SCRUB
916 select SYS_SUPPORTS_LITTLE_ENDIAN
917 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
918 select SYS_HAS_EARLY_PRINTK
919 select SYS_HAS_CPU_CAVIUM_OCTEON
920 select HAVE_PCI
921 select HAVE_PLAT_DELAY
922 select HAVE_PLAT_FW_INIT_CMDLINE
923 select HAVE_PLAT_MEMCPY
924 select ZONE_DMA32
925 select GPIOLIB
926 select USE_OF
927 select ARCH_SPARSEMEM_ENABLE
928 select SYS_SUPPORTS_SMP
929 select NR_CPUS_DEFAULT_64
930 select MIPS_NR_CPU_NR_MAP_1024
931 select BUILTIN_DTB
932 select MTD
933 select MTD_COMPLEX_MAPPINGS
934 select SWIOTLB
935 select SYS_SUPPORTS_RELOCATABLE
936 help
937 This option supports all of the Octeon reference boards from Cavium
938 Networks. It builds a kernel that dynamically determines the Octeon
939 CPU type and supports all known board reference implementations.
940 Some of the supported boards are:
941 EBT3000
942 EBH3000
943 EBH3100
944 Thunder
945 Kodama
946 Hikari
947 Say Y here for most Octeon reference boards.
948
949endchoice
950
951source "arch/mips/alchemy/Kconfig"
952source "arch/mips/ath25/Kconfig"
953source "arch/mips/ath79/Kconfig"
954source "arch/mips/bcm47xx/Kconfig"
955source "arch/mips/bcm63xx/Kconfig"
956source "arch/mips/bmips/Kconfig"
957source "arch/mips/generic/Kconfig"
958source "arch/mips/ingenic/Kconfig"
959source "arch/mips/jazz/Kconfig"
960source "arch/mips/lantiq/Kconfig"
961source "arch/mips/pic32/Kconfig"
962source "arch/mips/ralink/Kconfig"
963source "arch/mips/sgi-ip27/Kconfig"
964source "arch/mips/sibyte/Kconfig"
965source "arch/mips/txx9/Kconfig"
966source "arch/mips/cavium-octeon/Kconfig"
967source "arch/mips/loongson2ef/Kconfig"
968source "arch/mips/loongson32/Kconfig"
969source "arch/mips/loongson64/Kconfig"
970
971endmenu
972
973config GENERIC_HWEIGHT
974 bool
975 default y
976
977config GENERIC_CALIBRATE_DELAY
978 bool
979 default y
980
981config SCHED_OMIT_FRAME_POINTER
982 bool
983 default y
984
985#
986# Select some configuration options automatically based on user selections.
987#
988config FW_ARC
989 bool
990
991config ARCH_MAY_HAVE_PC_FDC
992 bool
993
994config BOOT_RAW
995 bool
996
997config CEVT_BCM1480
998 bool
999
1000config CEVT_DS1287
1001 bool
1002
1003config CEVT_GT641XX
1004 bool
1005
1006config CEVT_R4K
1007 bool
1008
1009config CEVT_SB1250
1010 bool
1011
1012config CEVT_TXX9
1013 bool
1014
1015config CSRC_BCM1480
1016 bool
1017
1018config CSRC_IOASIC
1019 bool
1020
1021config CSRC_R4K
1022 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1023 bool
1024
1025config CSRC_SB1250
1026 bool
1027
1028config MIPS_CLOCK_VSYSCALL
1029 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1030
1031config GPIO_TXX9
1032 select GPIOLIB
1033 bool
1034
1035config FW_CFE
1036 bool
1037
1038config ARCH_SUPPORTS_UPROBES
1039 def_bool y
1040
1041config DMA_NONCOHERENT
1042 bool
1043 #
1044 # MIPS allows mixing "slightly different" Cacheability and Coherency
1045 # Attribute bits. It is believed that the uncached access through
1046 # KSEG1 and the implementation specific "uncached accelerated" used
1047 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1048 # significant advantages.
1049 #
1050 select ARCH_HAS_SETUP_DMA_OPS
1051 select ARCH_HAS_DMA_WRITE_COMBINE
1052 select ARCH_HAS_DMA_PREP_COHERENT
1053 select ARCH_HAS_SYNC_DMA_FOR_CPU
1054 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1055 select ARCH_HAS_DMA_SET_UNCACHED
1056 select DMA_NONCOHERENT_MMAP
1057 select NEED_DMA_MAP_STATE
1058
1059config SYS_HAS_EARLY_PRINTK
1060 bool
1061
1062config SYS_SUPPORTS_HOTPLUG_CPU
1063 bool
1064
1065config MIPS_BONITO64
1066 bool
1067
1068config MIPS_MSC
1069 bool
1070
1071config SYNC_R4K
1072 bool
1073
1074config NO_IOPORT_MAP
1075 def_bool n
1076
1077config GENERIC_CSUM
1078 def_bool CPU_NO_LOAD_STORE_LR
1079
1080config GENERIC_ISA_DMA
1081 bool
1082 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1083 select ISA_DMA_API
1084
1085config GENERIC_ISA_DMA_SUPPORT_BROKEN
1086 bool
1087 select GENERIC_ISA_DMA
1088
1089config HAVE_PLAT_DELAY
1090 bool
1091
1092config HAVE_PLAT_FW_INIT_CMDLINE
1093 bool
1094
1095config HAVE_PLAT_MEMCPY
1096 bool
1097
1098config ISA_DMA_API
1099 bool
1100
1101config SYS_SUPPORTS_RELOCATABLE
1102 bool
1103 help
1104 Selected if the platform supports relocating the kernel.
1105 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1106 to allow access to command line and entropy sources.
1107
1108#
1109# Endianness selection. Sufficiently obscure so many users don't know what to
1110# answer,so we try hard to limit the available choices. Also the use of a
1111# choice statement should be more obvious to the user.
1112#
1113choice
1114 prompt "Endianness selection"
1115 help
1116 Some MIPS machines can be configured for either little or big endian
1117 byte order. These modes require different kernels and a different
1118 Linux distribution. In general there is one preferred byteorder for a
1119 particular system but some systems are just as commonly used in the
1120 one or the other endianness.
1121
1122config CPU_BIG_ENDIAN
1123 bool "Big endian"
1124 depends on SYS_SUPPORTS_BIG_ENDIAN
1125
1126config CPU_LITTLE_ENDIAN
1127 bool "Little endian"
1128 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1129
1130endchoice
1131
1132config EXPORT_UASM
1133 bool
1134
1135config SYS_SUPPORTS_APM_EMULATION
1136 bool
1137
1138config SYS_SUPPORTS_BIG_ENDIAN
1139 bool
1140
1141config SYS_SUPPORTS_LITTLE_ENDIAN
1142 bool
1143
1144config MIPS_HUGE_TLB_SUPPORT
1145 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1146
1147config IRQ_TXX9
1148 bool
1149
1150config IRQ_GT641XX
1151 bool
1152
1153config PCI_GT64XXX_PCI0
1154 bool
1155
1156config PCI_XTALK_BRIDGE
1157 bool
1158
1159config NO_EXCEPT_FILL
1160 bool
1161
1162config MIPS_SPRAM
1163 bool
1164
1165config SWAP_IO_SPACE
1166 bool
1167
1168config SGI_HAS_INDYDOG
1169 bool
1170
1171config SGI_HAS_HAL2
1172 bool
1173
1174config SGI_HAS_SEEQ
1175 bool
1176
1177config SGI_HAS_WD93
1178 bool
1179
1180config SGI_HAS_ZILOG
1181 bool
1182
1183config SGI_HAS_I8042
1184 bool
1185
1186config DEFAULT_SGI_PARTITION
1187 bool
1188
1189config FW_ARC32
1190 bool
1191
1192config FW_SNIPROM
1193 bool
1194
1195config BOOT_ELF32
1196 bool
1197
1198config MIPS_L1_CACHE_SHIFT_4
1199 bool
1200
1201config MIPS_L1_CACHE_SHIFT_5
1202 bool
1203
1204config MIPS_L1_CACHE_SHIFT_6
1205 bool
1206
1207config MIPS_L1_CACHE_SHIFT_7
1208 bool
1209
1210config MIPS_L1_CACHE_SHIFT
1211 int
1212 default "7" if MIPS_L1_CACHE_SHIFT_7
1213 default "6" if MIPS_L1_CACHE_SHIFT_6
1214 default "5" if MIPS_L1_CACHE_SHIFT_5
1215 default "4" if MIPS_L1_CACHE_SHIFT_4
1216 default "5"
1217
1218config ARC_CMDLINE_ONLY
1219 bool
1220
1221config ARC_CONSOLE
1222 bool "ARC console support"
1223 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1224
1225config ARC_MEMORY
1226 bool
1227
1228config ARC_PROMLIB
1229 bool
1230
1231config FW_ARC64
1232 bool
1233
1234config BOOT_ELF64
1235 bool
1236
1237menu "CPU selection"
1238
1239choice
1240 prompt "CPU type"
1241 default CPU_R4X00
1242
1243config CPU_LOONGSON64
1244 bool "Loongson 64-bit CPU"
1245 depends on SYS_HAS_CPU_LOONGSON64
1246 select ARCH_HAS_PHYS_TO_DMA
1247 select CPU_MIPSR2
1248 select CPU_HAS_PREFETCH
1249 select CPU_SUPPORTS_64BIT_KERNEL
1250 select CPU_SUPPORTS_HIGHMEM
1251 select CPU_SUPPORTS_HUGEPAGES
1252 select CPU_SUPPORTS_MSA
1253 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1254 select CPU_MIPSR2_IRQ_VI
1255 select DMA_NONCOHERENT
1256 select WEAK_ORDERING
1257 select WEAK_REORDERING_BEYOND_LLSC
1258 select MIPS_ASID_BITS_VARIABLE
1259 select MIPS_PGD_C0_CONTEXT
1260 select MIPS_L1_CACHE_SHIFT_6
1261 select MIPS_FP_SUPPORT
1262 select GPIOLIB
1263 select SWIOTLB
1264 select HAVE_KVM
1265 help
1266 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1267 cores implements the MIPS64R2 instruction set with many extensions,
1268 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1269 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1270 Loongson-2E/2F is not covered here and will be removed in future.
1271
1272config LOONGSON3_ENHANCEMENT
1273 bool "New Loongson-3 CPU Enhancements"
1274 default n
1275 depends on CPU_LOONGSON64
1276 help
1277 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1278 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1279 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1280 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1281 Fast TLB refill support, etc.
1282
1283 This option enable those enhancements which are not probed at run
1284 time. If you want a generic kernel to run on all Loongson 3 machines,
1285 please say 'N' here. If you want a high-performance kernel to run on
1286 new Loongson-3 machines only, please say 'Y' here.
1287
1288config CPU_LOONGSON3_WORKAROUNDS
1289 bool "Loongson-3 LLSC Workarounds"
1290 default y if SMP
1291 depends on CPU_LOONGSON64
1292 help
1293 Loongson-3 processors have the llsc issues which require workarounds.
1294 Without workarounds the system may hang unexpectedly.
1295
1296 Say Y, unless you know what you are doing.
1297
1298config CPU_LOONGSON3_CPUCFG_EMULATION
1299 bool "Emulate the CPUCFG instruction on older Loongson cores"
1300 default y
1301 depends on CPU_LOONGSON64
1302 help
1303 Loongson-3A R4 and newer have the CPUCFG instruction available for
1304 userland to query CPU capabilities, much like CPUID on x86. This
1305 option provides emulation of the instruction on older Loongson
1306 cores, back to Loongson-3A1000.
1307
1308 If unsure, please say Y.
1309
1310config CPU_LOONGSON2E
1311 bool "Loongson 2E"
1312 depends on SYS_HAS_CPU_LOONGSON2E
1313 select CPU_LOONGSON2EF
1314 help
1315 The Loongson 2E processor implements the MIPS III instruction set
1316 with many extensions.
1317
1318 It has an internal FPGA northbridge, which is compatible to
1319 bonito64.
1320
1321config CPU_LOONGSON2F
1322 bool "Loongson 2F"
1323 depends on SYS_HAS_CPU_LOONGSON2F
1324 select CPU_LOONGSON2EF
1325 help
1326 The Loongson 2F processor implements the MIPS III instruction set
1327 with many extensions.
1328
1329 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1330 have a similar programming interface with FPGA northbridge used in
1331 Loongson2E.
1332
1333config CPU_LOONGSON1B
1334 bool "Loongson 1B"
1335 depends on SYS_HAS_CPU_LOONGSON1B
1336 select CPU_LOONGSON32
1337 select LEDS_GPIO_REGISTER
1338 help
1339 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1340 Release 1 instruction set and part of the MIPS32 Release 2
1341 instruction set.
1342
1343config CPU_LOONGSON1C
1344 bool "Loongson 1C"
1345 depends on SYS_HAS_CPU_LOONGSON1C
1346 select CPU_LOONGSON32
1347 select LEDS_GPIO_REGISTER
1348 help
1349 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1350 Release 1 instruction set and part of the MIPS32 Release 2
1351 instruction set.
1352
1353config CPU_MIPS32_R1
1354 bool "MIPS32 Release 1"
1355 depends on SYS_HAS_CPU_MIPS32_R1
1356 select CPU_HAS_PREFETCH
1357 select CPU_SUPPORTS_32BIT_KERNEL
1358 select CPU_SUPPORTS_HIGHMEM
1359 help
1360 Choose this option to build a kernel for release 1 or later of the
1361 MIPS32 architecture. Most modern embedded systems with a 32-bit
1362 MIPS processor are based on a MIPS32 processor. If you know the
1363 specific type of processor in your system, choose those that one
1364 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1365 Release 2 of the MIPS32 architecture is available since several
1366 years so chances are you even have a MIPS32 Release 2 processor
1367 in which case you should choose CPU_MIPS32_R2 instead for better
1368 performance.
1369
1370config CPU_MIPS32_R2
1371 bool "MIPS32 Release 2"
1372 depends on SYS_HAS_CPU_MIPS32_R2
1373 select CPU_HAS_PREFETCH
1374 select CPU_SUPPORTS_32BIT_KERNEL
1375 select CPU_SUPPORTS_HIGHMEM
1376 select CPU_SUPPORTS_MSA
1377 select HAVE_KVM
1378 help
1379 Choose this option to build a kernel for release 2 or later of the
1380 MIPS32 architecture. Most modern embedded systems with a 32-bit
1381 MIPS processor are based on a MIPS32 processor. If you know the
1382 specific type of processor in your system, choose those that one
1383 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1384
1385config CPU_MIPS32_R5
1386 bool "MIPS32 Release 5"
1387 depends on SYS_HAS_CPU_MIPS32_R5
1388 select CPU_HAS_PREFETCH
1389 select CPU_SUPPORTS_32BIT_KERNEL
1390 select CPU_SUPPORTS_HIGHMEM
1391 select CPU_SUPPORTS_MSA
1392 select HAVE_KVM
1393 select MIPS_O32_FP64_SUPPORT
1394 help
1395 Choose this option to build a kernel for release 5 or later of the
1396 MIPS32 architecture. New MIPS processors, starting with the Warrior
1397 family, are based on a MIPS32r5 processor. If you own an older
1398 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1399
1400config CPU_MIPS32_R6
1401 bool "MIPS32 Release 6"
1402 depends on SYS_HAS_CPU_MIPS32_R6
1403 select CPU_HAS_PREFETCH
1404 select CPU_NO_LOAD_STORE_LR
1405 select CPU_SUPPORTS_32BIT_KERNEL
1406 select CPU_SUPPORTS_HIGHMEM
1407 select CPU_SUPPORTS_MSA
1408 select HAVE_KVM
1409 select MIPS_O32_FP64_SUPPORT
1410 help
1411 Choose this option to build a kernel for release 6 or later of the
1412 MIPS32 architecture. New MIPS processors, starting with the Warrior
1413 family, are based on a MIPS32r6 processor. If you own an older
1414 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1415
1416config CPU_MIPS64_R1
1417 bool "MIPS64 Release 1"
1418 depends on SYS_HAS_CPU_MIPS64_R1
1419 select CPU_HAS_PREFETCH
1420 select CPU_SUPPORTS_32BIT_KERNEL
1421 select CPU_SUPPORTS_64BIT_KERNEL
1422 select CPU_SUPPORTS_HIGHMEM
1423 select CPU_SUPPORTS_HUGEPAGES
1424 help
1425 Choose this option to build a kernel for release 1 or later of the
1426 MIPS64 architecture. Many modern embedded systems with a 64-bit
1427 MIPS processor are based on a MIPS64 processor. If you know the
1428 specific type of processor in your system, choose those that one
1429 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1430 Release 2 of the MIPS64 architecture is available since several
1431 years so chances are you even have a MIPS64 Release 2 processor
1432 in which case you should choose CPU_MIPS64_R2 instead for better
1433 performance.
1434
1435config CPU_MIPS64_R2
1436 bool "MIPS64 Release 2"
1437 depends on SYS_HAS_CPU_MIPS64_R2
1438 select CPU_HAS_PREFETCH
1439 select CPU_SUPPORTS_32BIT_KERNEL
1440 select CPU_SUPPORTS_64BIT_KERNEL
1441 select CPU_SUPPORTS_HIGHMEM
1442 select CPU_SUPPORTS_HUGEPAGES
1443 select CPU_SUPPORTS_MSA
1444 select HAVE_KVM
1445 help
1446 Choose this option to build a kernel for release 2 or later of the
1447 MIPS64 architecture. Many modern embedded systems with a 64-bit
1448 MIPS processor are based on a MIPS64 processor. If you know the
1449 specific type of processor in your system, choose those that one
1450 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1451
1452config CPU_MIPS64_R5
1453 bool "MIPS64 Release 5"
1454 depends on SYS_HAS_CPU_MIPS64_R5
1455 select CPU_HAS_PREFETCH
1456 select CPU_SUPPORTS_32BIT_KERNEL
1457 select CPU_SUPPORTS_64BIT_KERNEL
1458 select CPU_SUPPORTS_HIGHMEM
1459 select CPU_SUPPORTS_HUGEPAGES
1460 select CPU_SUPPORTS_MSA
1461 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1462 select HAVE_KVM
1463 help
1464 Choose this option to build a kernel for release 5 or later of the
1465 MIPS64 architecture. This is a intermediate MIPS architecture
1466 release partly implementing release 6 features. Though there is no
1467 any hardware known to be based on this release.
1468
1469config CPU_MIPS64_R6
1470 bool "MIPS64 Release 6"
1471 depends on SYS_HAS_CPU_MIPS64_R6
1472 select CPU_HAS_PREFETCH
1473 select CPU_NO_LOAD_STORE_LR
1474 select CPU_SUPPORTS_32BIT_KERNEL
1475 select CPU_SUPPORTS_64BIT_KERNEL
1476 select CPU_SUPPORTS_HIGHMEM
1477 select CPU_SUPPORTS_HUGEPAGES
1478 select CPU_SUPPORTS_MSA
1479 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1480 select HAVE_KVM
1481 help
1482 Choose this option to build a kernel for release 6 or later of the
1483 MIPS64 architecture. New MIPS processors, starting with the Warrior
1484 family, are based on a MIPS64r6 processor. If you own an older
1485 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1486
1487config CPU_P5600
1488 bool "MIPS Warrior P5600"
1489 depends on SYS_HAS_CPU_P5600
1490 select CPU_HAS_PREFETCH
1491 select CPU_SUPPORTS_32BIT_KERNEL
1492 select CPU_SUPPORTS_HIGHMEM
1493 select CPU_SUPPORTS_MSA
1494 select CPU_SUPPORTS_CPUFREQ
1495 select CPU_MIPSR2_IRQ_VI
1496 select CPU_MIPSR2_IRQ_EI
1497 select HAVE_KVM
1498 select MIPS_O32_FP64_SUPPORT
1499 help
1500 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1501 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1502 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1503 level features like up to six P5600 calculation cores, CM2 with L2
1504 cache, IOCU/IOMMU (though might be unused depending on the system-
1505 specific IP core configuration), GIC, CPC, virtualisation module,
1506 eJTAG and PDtrace.
1507
1508config CPU_R3000
1509 bool "R3000"
1510 depends on SYS_HAS_CPU_R3000
1511 select CPU_HAS_WB
1512 select CPU_R3K_TLB
1513 select CPU_SUPPORTS_32BIT_KERNEL
1514 select CPU_SUPPORTS_HIGHMEM
1515 help
1516 Please make sure to pick the right CPU type. Linux/MIPS is not
1517 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1518 *not* work on R4000 machines and vice versa. However, since most
1519 of the supported machines have an R4000 (or similar) CPU, R4x00
1520 might be a safe bet. If the resulting kernel does not work,
1521 try to recompile with R3000.
1522
1523config CPU_R4300
1524 bool "R4300"
1525 depends on SYS_HAS_CPU_R4300
1526 select CPU_SUPPORTS_32BIT_KERNEL
1527 select CPU_SUPPORTS_64BIT_KERNEL
1528 help
1529 MIPS Technologies R4300-series processors.
1530
1531config CPU_R4X00
1532 bool "R4x00"
1533 depends on SYS_HAS_CPU_R4X00
1534 select CPU_SUPPORTS_32BIT_KERNEL
1535 select CPU_SUPPORTS_64BIT_KERNEL
1536 select CPU_SUPPORTS_HUGEPAGES
1537 help
1538 MIPS Technologies R4000-series processors other than 4300, including
1539 the R4000, R4400, R4600, and 4700.
1540
1541config CPU_TX49XX
1542 bool "R49XX"
1543 depends on SYS_HAS_CPU_TX49XX
1544 select CPU_HAS_PREFETCH
1545 select CPU_SUPPORTS_32BIT_KERNEL
1546 select CPU_SUPPORTS_64BIT_KERNEL
1547 select CPU_SUPPORTS_HUGEPAGES
1548
1549config CPU_R5000
1550 bool "R5000"
1551 depends on SYS_HAS_CPU_R5000
1552 select CPU_SUPPORTS_32BIT_KERNEL
1553 select CPU_SUPPORTS_64BIT_KERNEL
1554 select CPU_SUPPORTS_HUGEPAGES
1555 help
1556 MIPS Technologies R5000-series processors other than the Nevada.
1557
1558config CPU_R5500
1559 bool "R5500"
1560 depends on SYS_HAS_CPU_R5500
1561 select CPU_SUPPORTS_32BIT_KERNEL
1562 select CPU_SUPPORTS_64BIT_KERNEL
1563 select CPU_SUPPORTS_HUGEPAGES
1564 help
1565 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1566 instruction set.
1567
1568config CPU_NEVADA
1569 bool "RM52xx"
1570 depends on SYS_HAS_CPU_NEVADA
1571 select CPU_SUPPORTS_32BIT_KERNEL
1572 select CPU_SUPPORTS_64BIT_KERNEL
1573 select CPU_SUPPORTS_HUGEPAGES
1574 help
1575 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1576
1577config CPU_R10000
1578 bool "R10000"
1579 depends on SYS_HAS_CPU_R10000
1580 select CPU_HAS_PREFETCH
1581 select CPU_SUPPORTS_32BIT_KERNEL
1582 select CPU_SUPPORTS_64BIT_KERNEL
1583 select CPU_SUPPORTS_HIGHMEM
1584 select CPU_SUPPORTS_HUGEPAGES
1585 help
1586 MIPS Technologies R10000-series processors.
1587
1588config CPU_RM7000
1589 bool "RM7000"
1590 depends on SYS_HAS_CPU_RM7000
1591 select CPU_HAS_PREFETCH
1592 select CPU_SUPPORTS_32BIT_KERNEL
1593 select CPU_SUPPORTS_64BIT_KERNEL
1594 select CPU_SUPPORTS_HIGHMEM
1595 select CPU_SUPPORTS_HUGEPAGES
1596
1597config CPU_SB1
1598 bool "SB1"
1599 depends on SYS_HAS_CPU_SB1
1600 select CPU_SUPPORTS_32BIT_KERNEL
1601 select CPU_SUPPORTS_64BIT_KERNEL
1602 select CPU_SUPPORTS_HIGHMEM
1603 select CPU_SUPPORTS_HUGEPAGES
1604 select WEAK_ORDERING
1605
1606config CPU_CAVIUM_OCTEON
1607 bool "Cavium Octeon processor"
1608 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1609 select CPU_HAS_PREFETCH
1610 select CPU_SUPPORTS_64BIT_KERNEL
1611 select WEAK_ORDERING
1612 select CPU_SUPPORTS_HIGHMEM
1613 select CPU_SUPPORTS_HUGEPAGES
1614 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1615 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1616 select MIPS_L1_CACHE_SHIFT_7
1617 select HAVE_KVM
1618 help
1619 The Cavium Octeon processor is a highly integrated chip containing
1620 many ethernet hardware widgets for networking tasks. The processor
1621 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1622 Full details can be found at http://www.caviumnetworks.com.
1623
1624config CPU_BMIPS
1625 bool "Broadcom BMIPS"
1626 depends on SYS_HAS_CPU_BMIPS
1627 select CPU_MIPS32
1628 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1629 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1630 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1631 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1632 select CPU_SUPPORTS_32BIT_KERNEL
1633 select DMA_NONCOHERENT
1634 select IRQ_MIPS_CPU
1635 select SWAP_IO_SPACE
1636 select WEAK_ORDERING
1637 select CPU_SUPPORTS_HIGHMEM
1638 select CPU_HAS_PREFETCH
1639 select CPU_SUPPORTS_CPUFREQ
1640 select MIPS_EXTERNAL_TIMER
1641 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1642 help
1643 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1644
1645endchoice
1646
1647config CPU_MIPS32_3_5_FEATURES
1648 bool "MIPS32 Release 3.5 Features"
1649 depends on SYS_HAS_CPU_MIPS32_R3_5
1650 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1651 CPU_P5600
1652 help
1653 Choose this option to build a kernel for release 2 or later of the
1654 MIPS32 architecture including features from the 3.5 release such as
1655 support for Enhanced Virtual Addressing (EVA).
1656
1657config CPU_MIPS32_3_5_EVA
1658 bool "Enhanced Virtual Addressing (EVA)"
1659 depends on CPU_MIPS32_3_5_FEATURES
1660 select EVA
1661 default y
1662 help
1663 Choose this option if you want to enable the Enhanced Virtual
1664 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1665 One of its primary benefits is an increase in the maximum size
1666 of lowmem (up to 3GB). If unsure, say 'N' here.
1667
1668config CPU_MIPS32_R5_FEATURES
1669 bool "MIPS32 Release 5 Features"
1670 depends on SYS_HAS_CPU_MIPS32_R5
1671 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1672 help
1673 Choose this option to build a kernel for release 2 or later of the
1674 MIPS32 architecture including features from release 5 such as
1675 support for Extended Physical Addressing (XPA).
1676
1677config CPU_MIPS32_R5_XPA
1678 bool "Extended Physical Addressing (XPA)"
1679 depends on CPU_MIPS32_R5_FEATURES
1680 depends on !EVA
1681 depends on !PAGE_SIZE_4KB
1682 depends on SYS_SUPPORTS_HIGHMEM
1683 select XPA
1684 select HIGHMEM
1685 select PHYS_ADDR_T_64BIT
1686 default n
1687 help
1688 Choose this option if you want to enable the Extended Physical
1689 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1690 benefit is to increase physical addressing equal to or greater
1691 than 40 bits. Note that this has the side effect of turning on
1692 64-bit addressing which in turn makes the PTEs 64-bit in size.
1693 If unsure, say 'N' here.
1694
1695if CPU_LOONGSON2F
1696config CPU_NOP_WORKAROUNDS
1697 bool
1698
1699config CPU_JUMP_WORKAROUNDS
1700 bool
1701
1702config CPU_LOONGSON2F_WORKAROUNDS
1703 bool "Loongson 2F Workarounds"
1704 default y
1705 select CPU_NOP_WORKAROUNDS
1706 select CPU_JUMP_WORKAROUNDS
1707 help
1708 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1709 require workarounds. Without workarounds the system may hang
1710 unexpectedly. For more information please refer to the gas
1711 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1712
1713 Loongson 2F03 and later have fixed these issues and no workarounds
1714 are needed. The workarounds have no significant side effect on them
1715 but may decrease the performance of the system so this option should
1716 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1717 systems.
1718
1719 If unsure, please say Y.
1720endif # CPU_LOONGSON2F
1721
1722config SYS_SUPPORTS_ZBOOT
1723 bool
1724 select HAVE_KERNEL_GZIP
1725 select HAVE_KERNEL_BZIP2
1726 select HAVE_KERNEL_LZ4
1727 select HAVE_KERNEL_LZMA
1728 select HAVE_KERNEL_LZO
1729 select HAVE_KERNEL_XZ
1730 select HAVE_KERNEL_ZSTD
1731
1732config SYS_SUPPORTS_ZBOOT_UART16550
1733 bool
1734 select SYS_SUPPORTS_ZBOOT
1735
1736config SYS_SUPPORTS_ZBOOT_UART_PROM
1737 bool
1738 select SYS_SUPPORTS_ZBOOT
1739
1740config CPU_LOONGSON2EF
1741 bool
1742 select CPU_SUPPORTS_32BIT_KERNEL
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select CPU_SUPPORTS_HIGHMEM
1745 select CPU_SUPPORTS_HUGEPAGES
1746
1747config CPU_LOONGSON32
1748 bool
1749 select CPU_MIPS32
1750 select CPU_MIPSR2
1751 select CPU_HAS_PREFETCH
1752 select CPU_SUPPORTS_32BIT_KERNEL
1753 select CPU_SUPPORTS_HIGHMEM
1754 select CPU_SUPPORTS_CPUFREQ
1755
1756config CPU_BMIPS32_3300
1757 select SMP_UP if SMP
1758 bool
1759
1760config CPU_BMIPS4350
1761 bool
1762 select SYS_SUPPORTS_SMP
1763 select SYS_SUPPORTS_HOTPLUG_CPU
1764
1765config CPU_BMIPS4380
1766 bool
1767 select MIPS_L1_CACHE_SHIFT_6
1768 select SYS_SUPPORTS_SMP
1769 select SYS_SUPPORTS_HOTPLUG_CPU
1770 select CPU_HAS_RIXI
1771
1772config CPU_BMIPS5000
1773 bool
1774 select MIPS_CPU_SCACHE
1775 select MIPS_L1_CACHE_SHIFT_7
1776 select SYS_SUPPORTS_SMP
1777 select SYS_SUPPORTS_HOTPLUG_CPU
1778 select CPU_HAS_RIXI
1779
1780config SYS_HAS_CPU_LOONGSON64
1781 bool
1782 select CPU_SUPPORTS_CPUFREQ
1783 select CPU_HAS_RIXI
1784
1785config SYS_HAS_CPU_LOONGSON2E
1786 bool
1787
1788config SYS_HAS_CPU_LOONGSON2F
1789 bool
1790 select CPU_SUPPORTS_CPUFREQ
1791 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1792
1793config SYS_HAS_CPU_LOONGSON1B
1794 bool
1795
1796config SYS_HAS_CPU_LOONGSON1C
1797 bool
1798
1799config SYS_HAS_CPU_MIPS32_R1
1800 bool
1801
1802config SYS_HAS_CPU_MIPS32_R2
1803 bool
1804
1805config SYS_HAS_CPU_MIPS32_R3_5
1806 bool
1807
1808config SYS_HAS_CPU_MIPS32_R5
1809 bool
1810
1811config SYS_HAS_CPU_MIPS32_R6
1812 bool
1813
1814config SYS_HAS_CPU_MIPS64_R1
1815 bool
1816
1817config SYS_HAS_CPU_MIPS64_R2
1818 bool
1819
1820config SYS_HAS_CPU_MIPS64_R5
1821 bool
1822
1823config SYS_HAS_CPU_MIPS64_R6
1824 bool
1825
1826config SYS_HAS_CPU_P5600
1827 bool
1828
1829config SYS_HAS_CPU_R3000
1830 bool
1831
1832config SYS_HAS_CPU_R4300
1833 bool
1834
1835config SYS_HAS_CPU_R4X00
1836 bool
1837
1838config SYS_HAS_CPU_TX49XX
1839 bool
1840
1841config SYS_HAS_CPU_R5000
1842 bool
1843
1844config SYS_HAS_CPU_R5500
1845 bool
1846
1847config SYS_HAS_CPU_NEVADA
1848 bool
1849
1850config SYS_HAS_CPU_R10000
1851 bool
1852
1853config SYS_HAS_CPU_RM7000
1854 bool
1855
1856config SYS_HAS_CPU_SB1
1857 bool
1858
1859config SYS_HAS_CPU_CAVIUM_OCTEON
1860 bool
1861
1862config SYS_HAS_CPU_BMIPS
1863 bool
1864
1865config SYS_HAS_CPU_BMIPS32_3300
1866 bool
1867 select SYS_HAS_CPU_BMIPS
1868
1869config SYS_HAS_CPU_BMIPS4350
1870 bool
1871 select SYS_HAS_CPU_BMIPS
1872
1873config SYS_HAS_CPU_BMIPS4380
1874 bool
1875 select SYS_HAS_CPU_BMIPS
1876
1877config SYS_HAS_CPU_BMIPS5000
1878 bool
1879 select SYS_HAS_CPU_BMIPS
1880
1881#
1882# CPU may reorder R->R, R->W, W->R, W->W
1883# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1884#
1885config WEAK_ORDERING
1886 bool
1887
1888#
1889# CPU may reorder reads and writes beyond LL/SC
1890# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1891#
1892config WEAK_REORDERING_BEYOND_LLSC
1893 bool
1894endmenu
1895
1896#
1897# These two indicate any level of the MIPS32 and MIPS64 architecture
1898#
1899config CPU_MIPS32
1900 bool
1901 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1902 CPU_MIPS32_R6 || CPU_P5600
1903
1904config CPU_MIPS64
1905 bool
1906 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1907 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1908
1909#
1910# These indicate the revision of the architecture
1911#
1912config CPU_MIPSR1
1913 bool
1914 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1915
1916config CPU_MIPSR2
1917 bool
1918 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1919 select CPU_HAS_RIXI
1920 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1921 select MIPS_SPRAM
1922
1923config CPU_MIPSR5
1924 bool
1925 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1926 select CPU_HAS_RIXI
1927 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1928 select MIPS_SPRAM
1929
1930config CPU_MIPSR6
1931 bool
1932 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1933 select CPU_HAS_RIXI
1934 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1935 select HAVE_ARCH_BITREVERSE
1936 select MIPS_ASID_BITS_VARIABLE
1937 select MIPS_CRC_SUPPORT
1938 select MIPS_SPRAM
1939
1940config TARGET_ISA_REV
1941 int
1942 default 1 if CPU_MIPSR1
1943 default 2 if CPU_MIPSR2
1944 default 5 if CPU_MIPSR5
1945 default 6 if CPU_MIPSR6
1946 default 0
1947 help
1948 Reflects the ISA revision being targeted by the kernel build. This
1949 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1950
1951config EVA
1952 bool
1953
1954config XPA
1955 bool
1956
1957config SYS_SUPPORTS_32BIT_KERNEL
1958 bool
1959config SYS_SUPPORTS_64BIT_KERNEL
1960 bool
1961config CPU_SUPPORTS_32BIT_KERNEL
1962 bool
1963config CPU_SUPPORTS_64BIT_KERNEL
1964 bool
1965config CPU_SUPPORTS_CPUFREQ
1966 bool
1967config CPU_SUPPORTS_ADDRWINCFG
1968 bool
1969config CPU_SUPPORTS_HUGEPAGES
1970 bool
1971 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
1972config MIPS_PGD_C0_CONTEXT
1973 bool
1974 depends on 64BIT
1975 default y if (CPU_MIPSR2 || CPU_MIPSR6)
1976
1977#
1978# Set to y for ptrace access to watch registers.
1979#
1980config HARDWARE_WATCHPOINTS
1981 bool
1982 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1983
1984menu "Kernel type"
1985
1986choice
1987 prompt "Kernel code model"
1988 help
1989 You should only select this option if you have a workload that
1990 actually benefits from 64-bit processing or if your machine has
1991 large memory. You will only be presented a single option in this
1992 menu if your system does not support both 32-bit and 64-bit kernels.
1993
1994config 32BIT
1995 bool "32-bit kernel"
1996 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1997 select TRAD_SIGNALS
1998 help
1999 Select this option if you want to build a 32-bit kernel.
2000
2001config 64BIT
2002 bool "64-bit kernel"
2003 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2004 help
2005 Select this option if you want to build a 64-bit kernel.
2006
2007endchoice
2008
2009config MIPS_VA_BITS_48
2010 bool "48 bits virtual memory"
2011 depends on 64BIT
2012 help
2013 Support a maximum at least 48 bits of application virtual
2014 memory. Default is 40 bits or less, depending on the CPU.
2015 For page sizes 16k and above, this option results in a small
2016 memory overhead for page tables. For 4k page size, a fourth
2017 level of page tables is added which imposes both a memory
2018 overhead as well as slower TLB fault handling.
2019
2020 If unsure, say N.
2021
2022config ZBOOT_LOAD_ADDRESS
2023 hex "Compressed kernel load address"
2024 default 0xffffffff80400000 if BCM47XX
2025 default 0x0
2026 depends on SYS_SUPPORTS_ZBOOT
2027 help
2028 The address to load compressed kernel, aka vmlinuz.
2029
2030 This is only used if non-zero.
2031
2032choice
2033 prompt "Kernel page size"
2034 default PAGE_SIZE_4KB
2035
2036config PAGE_SIZE_4KB
2037 bool "4kB"
2038 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2039 help
2040 This option select the standard 4kB Linux page size. On some
2041 R3000-family processors this is the only available page size. Using
2042 4kB page size will minimize memory consumption and is therefore
2043 recommended for low memory systems.
2044
2045config PAGE_SIZE_8KB
2046 bool "8kB"
2047 depends on CPU_CAVIUM_OCTEON
2048 depends on !MIPS_VA_BITS_48
2049 help
2050 Using 8kB page size will result in higher performance kernel at
2051 the price of higher memory consumption. This option is available
2052 only on cnMIPS processors. Note that you will need a suitable Linux
2053 distribution to support this.
2054
2055config PAGE_SIZE_16KB
2056 bool "16kB"
2057 depends on !CPU_R3000
2058 help
2059 Using 16kB page size will result in higher performance kernel at
2060 the price of higher memory consumption. This option is available on
2061 all non-R3000 family processors. Note that you will need a suitable
2062 Linux distribution to support this.
2063
2064config PAGE_SIZE_32KB
2065 bool "32kB"
2066 depends on CPU_CAVIUM_OCTEON
2067 depends on !MIPS_VA_BITS_48
2068 help
2069 Using 32kB page size will result in higher performance kernel at
2070 the price of higher memory consumption. This option is available
2071 only on cnMIPS cores. Note that you will need a suitable Linux
2072 distribution to support this.
2073
2074config PAGE_SIZE_64KB
2075 bool "64kB"
2076 depends on !CPU_R3000
2077 help
2078 Using 64kB page size will result in higher performance kernel at
2079 the price of higher memory consumption. This option is available on
2080 all non-R3000 family processor. Not that at the time of this
2081 writing this option is still high experimental.
2082
2083endchoice
2084
2085config ARCH_FORCE_MAX_ORDER
2086 int "Maximum zone order"
2087 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2088 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2089 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2090 default "10"
2091 help
2092 The kernel memory allocator divides physically contiguous memory
2093 blocks into "zones", where each zone is a power of two number of
2094 pages. This option selects the largest power of two that the kernel
2095 keeps in the memory allocator. If you need to allocate very large
2096 blocks of physically contiguous memory, then you may need to
2097 increase this value.
2098
2099 The page size is not necessarily 4KB. Keep this in mind
2100 when choosing a value for this option.
2101
2102config BOARD_SCACHE
2103 bool
2104
2105config IP22_CPU_SCACHE
2106 bool
2107 select BOARD_SCACHE
2108
2109#
2110# Support for a MIPS32 / MIPS64 style S-caches
2111#
2112config MIPS_CPU_SCACHE
2113 bool
2114 select BOARD_SCACHE
2115
2116config R5000_CPU_SCACHE
2117 bool
2118 select BOARD_SCACHE
2119
2120config RM7000_CPU_SCACHE
2121 bool
2122 select BOARD_SCACHE
2123
2124config SIBYTE_DMA_PAGEOPS
2125 bool "Use DMA to clear/copy pages"
2126 depends on CPU_SB1
2127 help
2128 Instead of using the CPU to zero and copy pages, use a Data Mover
2129 channel. These DMA channels are otherwise unused by the standard
2130 SiByte Linux port. Seems to give a small performance benefit.
2131
2132config CPU_HAS_PREFETCH
2133 bool
2134
2135config CPU_GENERIC_DUMP_TLB
2136 bool
2137 default y if !CPU_R3000
2138
2139config MIPS_FP_SUPPORT
2140 bool "Floating Point support" if EXPERT
2141 default y
2142 help
2143 Select y to include support for floating point in the kernel
2144 including initialization of FPU hardware, FP context save & restore
2145 and emulation of an FPU where necessary. Without this support any
2146 userland program attempting to use floating point instructions will
2147 receive a SIGILL.
2148
2149 If you know that your userland will not attempt to use floating point
2150 instructions then you can say n here to shrink the kernel a little.
2151
2152 If unsure, say y.
2153
2154config CPU_R2300_FPU
2155 bool
2156 depends on MIPS_FP_SUPPORT
2157 default y if CPU_R3000
2158
2159config CPU_R3K_TLB
2160 bool
2161
2162config CPU_R4K_FPU
2163 bool
2164 depends on MIPS_FP_SUPPORT
2165 default y if !CPU_R2300_FPU
2166
2167config CPU_R4K_CACHE_TLB
2168 bool
2169 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2170
2171config MIPS_MT_SMP
2172 bool "MIPS MT SMP support (1 TC on each available VPE)"
2173 default y
2174 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2175 select CPU_MIPSR2_IRQ_VI
2176 select CPU_MIPSR2_IRQ_EI
2177 select SYNC_R4K
2178 select MIPS_MT
2179 select SMP
2180 select SMP_UP
2181 select SYS_SUPPORTS_SMP
2182 select SYS_SUPPORTS_SCHED_SMT
2183 select MIPS_PERF_SHARED_TC_COUNTERS
2184 help
2185 This is a kernel model which is known as SMVP. This is supported
2186 on cores with the MT ASE and uses the available VPEs to implement
2187 virtual processors which supports SMP. This is equivalent to the
2188 Intel Hyperthreading feature. For further information go to
2189 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2190
2191config MIPS_MT
2192 bool
2193
2194config SCHED_SMT
2195 bool "SMT (multithreading) scheduler support"
2196 depends on SYS_SUPPORTS_SCHED_SMT
2197 default n
2198 help
2199 SMT scheduler support improves the CPU scheduler's decision making
2200 when dealing with MIPS MT enabled cores at a cost of slightly
2201 increased overhead in some places. If unsure say N here.
2202
2203config SYS_SUPPORTS_SCHED_SMT
2204 bool
2205
2206config SYS_SUPPORTS_MULTITHREADING
2207 bool
2208
2209config MIPS_MT_FPAFF
2210 bool "Dynamic FPU affinity for FP-intensive threads"
2211 default y
2212 depends on MIPS_MT_SMP
2213
2214config MIPSR2_TO_R6_EMULATOR
2215 bool "MIPS R2-to-R6 emulator"
2216 depends on CPU_MIPSR6
2217 depends on MIPS_FP_SUPPORT
2218 default y
2219 help
2220 Choose this option if you want to run non-R6 MIPS userland code.
2221 Even if you say 'Y' here, the emulator will still be disabled by
2222 default. You can enable it using the 'mipsr2emu' kernel option.
2223 The only reason this is a build-time option is to save ~14K from the
2224 final kernel image.
2225
2226config SYS_SUPPORTS_VPE_LOADER
2227 bool
2228 depends on SYS_SUPPORTS_MULTITHREADING
2229 help
2230 Indicates that the platform supports the VPE loader, and provides
2231 physical_memsize.
2232
2233config MIPS_VPE_LOADER
2234 bool "VPE loader support."
2235 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2236 select CPU_MIPSR2_IRQ_VI
2237 select CPU_MIPSR2_IRQ_EI
2238 select MIPS_MT
2239 help
2240 Includes a loader for loading an elf relocatable object
2241 onto another VPE and running it.
2242
2243config MIPS_VPE_LOADER_MT
2244 bool
2245 default "y"
2246 depends on MIPS_VPE_LOADER
2247
2248config MIPS_VPE_LOADER_TOM
2249 bool "Load VPE program into memory hidden from linux"
2250 depends on MIPS_VPE_LOADER
2251 default y
2252 help
2253 The loader can use memory that is present but has been hidden from
2254 Linux using the kernel command line option "mem=xxMB". It's up to
2255 you to ensure the amount you put in the option and the space your
2256 program requires is less or equal to the amount physically present.
2257
2258config MIPS_VPE_APSP_API
2259 bool "Enable support for AP/SP API (RTLX)"
2260 depends on MIPS_VPE_LOADER
2261
2262config MIPS_VPE_APSP_API_MT
2263 bool
2264 default "y"
2265 depends on MIPS_VPE_APSP_API
2266
2267config MIPS_CPS
2268 bool "MIPS Coherent Processing System support"
2269 depends on SYS_SUPPORTS_MIPS_CPS
2270 select MIPS_CM
2271 select MIPS_CPS_PM if HOTPLUG_CPU
2272 select SMP
2273 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
2274 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2275 select SYS_SUPPORTS_HOTPLUG_CPU
2276 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2277 select SYS_SUPPORTS_SMP
2278 select WEAK_ORDERING
2279 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2280 help
2281 Select this if you wish to run an SMP kernel across multiple cores
2282 within a MIPS Coherent Processing System. When this option is
2283 enabled the kernel will probe for other cores and boot them with
2284 no external assistance. It is safe to enable this when hardware
2285 support is unavailable.
2286
2287config MIPS_CPS_PM
2288 depends on MIPS_CPS
2289 bool
2290
2291config MIPS_CM
2292 bool
2293 select MIPS_CPC
2294
2295config MIPS_CPC
2296 bool
2297
2298config SB1_PASS_2_WORKAROUNDS
2299 bool
2300 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2301 default y
2302
2303config SB1_PASS_2_1_WORKAROUNDS
2304 bool
2305 depends on CPU_SB1 && CPU_SB1_PASS_2
2306 default y
2307
2308choice
2309 prompt "SmartMIPS or microMIPS ASE support"
2310
2311config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2312 bool "None"
2313 help
2314 Select this if you want neither microMIPS nor SmartMIPS support
2315
2316config CPU_HAS_SMARTMIPS
2317 depends on SYS_SUPPORTS_SMARTMIPS
2318 bool "SmartMIPS"
2319 help
2320 SmartMIPS is a extension of the MIPS32 architecture aimed at
2321 increased security at both hardware and software level for
2322 smartcards. Enabling this option will allow proper use of the
2323 SmartMIPS instructions by Linux applications. However a kernel with
2324 this option will not work on a MIPS core without SmartMIPS core. If
2325 you don't know you probably don't have SmartMIPS and should say N
2326 here.
2327
2328config CPU_MICROMIPS
2329 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2330 bool "microMIPS"
2331 help
2332 When this option is enabled the kernel will be built using the
2333 microMIPS ISA
2334
2335endchoice
2336
2337config CPU_HAS_MSA
2338 bool "Support for the MIPS SIMD Architecture"
2339 depends on CPU_SUPPORTS_MSA
2340 depends on MIPS_FP_SUPPORT
2341 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2342 help
2343 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2344 and a set of SIMD instructions to operate on them. When this option
2345 is enabled the kernel will support allocating & switching MSA
2346 vector register contexts. If you know that your kernel will only be
2347 running on CPUs which do not support MSA or that your userland will
2348 not be making use of it then you may wish to say N here to reduce
2349 the size & complexity of your kernel.
2350
2351 If unsure, say Y.
2352
2353config CPU_HAS_WB
2354 bool
2355
2356config XKS01
2357 bool
2358
2359config CPU_HAS_DIEI
2360 depends on !CPU_DIEI_BROKEN
2361 bool
2362
2363config CPU_DIEI_BROKEN
2364 bool
2365
2366config CPU_HAS_RIXI
2367 bool
2368
2369config CPU_NO_LOAD_STORE_LR
2370 bool
2371 help
2372 CPU lacks support for unaligned load and store instructions:
2373 LWL, LWR, SWL, SWR (Load/store word left/right).
2374 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2375 systems).
2376
2377#
2378# Vectored interrupt mode is an R2 feature
2379#
2380config CPU_MIPSR2_IRQ_VI
2381 bool
2382
2383#
2384# Extended interrupt mode is an R2 feature
2385#
2386config CPU_MIPSR2_IRQ_EI
2387 bool
2388
2389config CPU_HAS_SYNC
2390 bool
2391 depends on !CPU_R3000
2392 default y
2393
2394#
2395# CPU non-features
2396#
2397
2398# Work around the "daddi" and "daddiu" CPU errata:
2399#
2400# - The `daddi' instruction fails to trap on overflow.
2401# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2402# erratum #23
2403#
2404# - The `daddiu' instruction can produce an incorrect result.
2405# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2406# erratum #41
2407# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2408# #15
2409# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2410# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2411config CPU_DADDI_WORKAROUNDS
2412 bool
2413
2414# Work around certain R4000 CPU errata (as implemented by GCC):
2415#
2416# - A double-word or a variable shift may give an incorrect result
2417# if executed immediately after starting an integer division:
2418# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2419# erratum #28
2420# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2421# #19
2422#
2423# - A double-word or a variable shift may give an incorrect result
2424# if executed while an integer multiplication is in progress:
2425# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2426# errata #16 & #28
2427#
2428# - An integer division may give an incorrect result if started in
2429# a delay slot of a taken branch or a jump:
2430# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2431# erratum #52
2432config CPU_R4000_WORKAROUNDS
2433 bool
2434 select CPU_R4400_WORKAROUNDS
2435
2436# Work around certain R4400 CPU errata (as implemented by GCC):
2437#
2438# - A double-word or a variable shift may give an incorrect result
2439# if executed immediately after starting an integer division:
2440# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2441# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2442config CPU_R4400_WORKAROUNDS
2443 bool
2444
2445config CPU_R4X00_BUGS64
2446 bool
2447 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2448
2449config MIPS_ASID_SHIFT
2450 int
2451 default 6 if CPU_R3000
2452 default 0
2453
2454config MIPS_ASID_BITS
2455 int
2456 default 0 if MIPS_ASID_BITS_VARIABLE
2457 default 6 if CPU_R3000
2458 default 8
2459
2460config MIPS_ASID_BITS_VARIABLE
2461 bool
2462
2463config MIPS_CRC_SUPPORT
2464 bool
2465
2466# R4600 erratum. Due to the lack of errata information the exact
2467# technical details aren't known. I've experimentally found that disabling
2468# interrupts during indexed I-cache flushes seems to be sufficient to deal
2469# with the issue.
2470config WAR_R4600_V1_INDEX_ICACHEOP
2471 bool
2472
2473# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2474#
2475# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2476# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2477# executed if there is no other dcache activity. If the dcache is
2478# accessed for another instruction immediately preceding when these
2479# cache instructions are executing, it is possible that the dcache
2480# tag match outputs used by these cache instructions will be
2481# incorrect. These cache instructions should be preceded by at least
2482# four instructions that are not any kind of load or store
2483# instruction.
2484#
2485# This is not allowed: lw
2486# nop
2487# nop
2488# nop
2489# cache Hit_Writeback_Invalidate_D
2490#
2491# This is allowed: lw
2492# nop
2493# nop
2494# nop
2495# nop
2496# cache Hit_Writeback_Invalidate_D
2497config WAR_R4600_V1_HIT_CACHEOP
2498 bool
2499
2500# Writeback and invalidate the primary cache dcache before DMA.
2501#
2502# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2503# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2504# operate correctly if the internal data cache refill buffer is empty. These
2505# CACHE instructions should be separated from any potential data cache miss
2506# by a load instruction to an uncached address to empty the response buffer."
2507# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2508# in .pdf format.)
2509config WAR_R4600_V2_HIT_CACHEOP
2510 bool
2511
2512# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2513# the line which this instruction itself exists, the following
2514# operation is not guaranteed."
2515#
2516# Workaround: do two phase flushing for Index_Invalidate_I
2517config WAR_TX49XX_ICACHE_INDEX_INV
2518 bool
2519
2520# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2521# opposes it being called that) where invalid instructions in the same
2522# I-cache line worth of instructions being fetched may case spurious
2523# exceptions.
2524config WAR_ICACHE_REFILLS
2525 bool
2526
2527# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2528# may cause ll / sc and lld / scd sequences to execute non-atomically.
2529config WAR_R10000_LLSC
2530 bool
2531
2532# 34K core erratum: "Problems Executing the TLBR Instruction"
2533config WAR_MIPS34K_MISSED_ITLB
2534 bool
2535
2536#
2537# - Highmem only makes sense for the 32-bit kernel.
2538# - The current highmem code will only work properly on physically indexed
2539# caches such as R3000, SB1, R7000 or those that look like they're virtually
2540# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2541# moment we protect the user and offer the highmem option only on machines
2542# where it's known to be safe. This will not offer highmem on a few systems
2543# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2544# indexed CPUs but we're playing safe.
2545# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2546# know they might have memory configurations that could make use of highmem
2547# support.
2548#
2549config HIGHMEM
2550 bool "High Memory Support"
2551 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2552 select KMAP_LOCAL
2553
2554config CPU_SUPPORTS_HIGHMEM
2555 bool
2556
2557config SYS_SUPPORTS_HIGHMEM
2558 bool
2559
2560config SYS_SUPPORTS_SMARTMIPS
2561 bool
2562
2563config SYS_SUPPORTS_MICROMIPS
2564 bool
2565
2566config SYS_SUPPORTS_MIPS16
2567 bool
2568 help
2569 This option must be set if a kernel might be executed on a MIPS16-
2570 enabled CPU even if MIPS16 is not actually being used. In other
2571 words, it makes the kernel MIPS16-tolerant.
2572
2573config CPU_SUPPORTS_MSA
2574 bool
2575
2576config ARCH_FLATMEM_ENABLE
2577 def_bool y
2578 depends on !NUMA && !CPU_LOONGSON2EF
2579
2580config ARCH_SPARSEMEM_ENABLE
2581 bool
2582
2583config NUMA
2584 bool "NUMA Support"
2585 depends on SYS_SUPPORTS_NUMA
2586 select SMP
2587 select HAVE_SETUP_PER_CPU_AREA
2588 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2589 help
2590 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2591 Access). This option improves performance on systems with more
2592 than two nodes; on two node systems it is generally better to
2593 leave it disabled; on single node systems leave this option
2594 disabled.
2595
2596config SYS_SUPPORTS_NUMA
2597 bool
2598
2599config HAVE_ARCH_NODEDATA_EXTENSION
2600 bool
2601
2602config RELOCATABLE
2603 bool "Relocatable kernel"
2604 depends on SYS_SUPPORTS_RELOCATABLE
2605 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2606 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2607 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2608 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2609 CPU_LOONGSON64
2610 help
2611 This builds a kernel image that retains relocation information
2612 so it can be loaded someplace besides the default 1MB.
2613 The relocations make the kernel binary about 15% larger,
2614 but are discarded at runtime
2615
2616config RELOCATION_TABLE_SIZE
2617 hex "Relocation table size"
2618 depends on RELOCATABLE
2619 range 0x0 0x01000000
2620 default "0x00200000" if CPU_LOONGSON64
2621 default "0x00100000"
2622 help
2623 A table of relocation data will be appended to the kernel binary
2624 and parsed at boot to fix up the relocated kernel.
2625
2626 This option allows the amount of space reserved for the table to be
2627 adjusted, although the default of 1Mb should be ok in most cases.
2628
2629 The build will fail and a valid size suggested if this is too small.
2630
2631 If unsure, leave at the default value.
2632
2633config RANDOMIZE_BASE
2634 bool "Randomize the address of the kernel image"
2635 depends on RELOCATABLE
2636 help
2637 Randomizes the physical and virtual address at which the
2638 kernel image is loaded, as a security feature that
2639 deters exploit attempts relying on knowledge of the location
2640 of kernel internals.
2641
2642 Entropy is generated using any coprocessor 0 registers available.
2643
2644 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2645
2646 If unsure, say N.
2647
2648config RANDOMIZE_BASE_MAX_OFFSET
2649 hex "Maximum kASLR offset" if EXPERT
2650 depends on RANDOMIZE_BASE
2651 range 0x0 0x40000000 if EVA || 64BIT
2652 range 0x0 0x08000000
2653 default "0x01000000"
2654 help
2655 When kASLR is active, this provides the maximum offset that will
2656 be applied to the kernel image. It should be set according to the
2657 amount of physical RAM available in the target system minus
2658 PHYSICAL_START and must be a power of 2.
2659
2660 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2661 EVA or 64-bit. The default is 16Mb.
2662
2663config NODES_SHIFT
2664 int
2665 default "6"
2666 depends on NUMA
2667
2668config HW_PERF_EVENTS
2669 bool "Enable hardware performance counter support for perf events"
2670 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2671 default y
2672 help
2673 Enable hardware performance counter support for perf events. If
2674 disabled, perf events will use software events only.
2675
2676config DMI
2677 bool "Enable DMI scanning"
2678 depends on MACH_LOONGSON64
2679 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2680 default y
2681 help
2682 Enabled scanning of DMI to identify machine quirks. Say Y
2683 here unless you have verified that your setup is not
2684 affected by entries in the DMI blacklist. Required by PNP
2685 BIOS code.
2686
2687config SMP
2688 bool "Multi-Processing support"
2689 depends on SYS_SUPPORTS_SMP
2690 help
2691 This enables support for systems with more than one CPU. If you have
2692 a system with only one CPU, say N. If you have a system with more
2693 than one CPU, say Y.
2694
2695 If you say N here, the kernel will run on uni- and multiprocessor
2696 machines, but will use only one CPU of a multiprocessor machine. If
2697 you say Y here, the kernel will run on many, but not all,
2698 uniprocessor machines. On a uniprocessor machine, the kernel
2699 will run faster if you say N here.
2700
2701 People using multiprocessor machines who say Y here should also say
2702 Y to "Enhanced Real Time Clock Support", below.
2703
2704 See also the SMP-HOWTO available at
2705 <https://www.tldp.org/docs.html#howto>.
2706
2707 If you don't know what to do here, say N.
2708
2709config HOTPLUG_CPU
2710 bool "Support for hot-pluggable CPUs"
2711 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2712 help
2713 Say Y here to allow turning CPUs off and on. CPUs can be
2714 controlled through /sys/devices/system/cpu.
2715 (Note: power management support will enable this option
2716 automatically on SMP systems. )
2717 Say N if you want to disable CPU hotplug.
2718
2719config SMP_UP
2720 bool
2721
2722config SYS_SUPPORTS_MIPS_CPS
2723 bool
2724
2725config SYS_SUPPORTS_SMP
2726 bool
2727
2728config NR_CPUS_DEFAULT_4
2729 bool
2730
2731config NR_CPUS_DEFAULT_8
2732 bool
2733
2734config NR_CPUS_DEFAULT_16
2735 bool
2736
2737config NR_CPUS_DEFAULT_32
2738 bool
2739
2740config NR_CPUS_DEFAULT_64
2741 bool
2742
2743config NR_CPUS
2744 int "Maximum number of CPUs (2-256)"
2745 range 2 256
2746 depends on SMP
2747 default "4" if NR_CPUS_DEFAULT_4
2748 default "8" if NR_CPUS_DEFAULT_8
2749 default "16" if NR_CPUS_DEFAULT_16
2750 default "32" if NR_CPUS_DEFAULT_32
2751 default "64" if NR_CPUS_DEFAULT_64
2752 help
2753 This allows you to specify the maximum number of CPUs which this
2754 kernel will support. The maximum supported value is 32 for 32-bit
2755 kernel and 64 for 64-bit kernels; the minimum value which makes
2756 sense is 1 for Qemu (useful only for kernel debugging purposes)
2757 and 2 for all others.
2758
2759 This is purely to save memory - each supported CPU adds
2760 approximately eight kilobytes to the kernel image. For best
2761 performance should round up your number of processors to the next
2762 power of two.
2763
2764config MIPS_PERF_SHARED_TC_COUNTERS
2765 bool
2766
2767config MIPS_NR_CPU_NR_MAP_1024
2768 bool
2769
2770config MIPS_NR_CPU_NR_MAP
2771 int
2772 depends on SMP
2773 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2774 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2775
2776#
2777# Timer Interrupt Frequency Configuration
2778#
2779
2780choice
2781 prompt "Timer frequency"
2782 default HZ_250
2783 help
2784 Allows the configuration of the timer frequency.
2785
2786 config HZ_24
2787 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2788
2789 config HZ_48
2790 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2791
2792 config HZ_100
2793 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2794
2795 config HZ_128
2796 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2797
2798 config HZ_250
2799 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2800
2801 config HZ_256
2802 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2803
2804 config HZ_1000
2805 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2806
2807 config HZ_1024
2808 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2809
2810endchoice
2811
2812config SYS_SUPPORTS_24HZ
2813 bool
2814
2815config SYS_SUPPORTS_48HZ
2816 bool
2817
2818config SYS_SUPPORTS_100HZ
2819 bool
2820
2821config SYS_SUPPORTS_128HZ
2822 bool
2823
2824config SYS_SUPPORTS_250HZ
2825 bool
2826
2827config SYS_SUPPORTS_256HZ
2828 bool
2829
2830config SYS_SUPPORTS_1000HZ
2831 bool
2832
2833config SYS_SUPPORTS_1024HZ
2834 bool
2835
2836config SYS_SUPPORTS_ARBIT_HZ
2837 bool
2838 default y if !SYS_SUPPORTS_24HZ && \
2839 !SYS_SUPPORTS_48HZ && \
2840 !SYS_SUPPORTS_100HZ && \
2841 !SYS_SUPPORTS_128HZ && \
2842 !SYS_SUPPORTS_250HZ && \
2843 !SYS_SUPPORTS_256HZ && \
2844 !SYS_SUPPORTS_1000HZ && \
2845 !SYS_SUPPORTS_1024HZ
2846
2847config HZ
2848 int
2849 default 24 if HZ_24
2850 default 48 if HZ_48
2851 default 100 if HZ_100
2852 default 128 if HZ_128
2853 default 250 if HZ_250
2854 default 256 if HZ_256
2855 default 1000 if HZ_1000
2856 default 1024 if HZ_1024
2857
2858config SCHED_HRTICK
2859 def_bool HIGH_RES_TIMERS
2860
2861config ARCH_SUPPORTS_KEXEC
2862 def_bool y
2863
2864config ARCH_SUPPORTS_CRASH_DUMP
2865 def_bool y
2866
2867config PHYSICAL_START
2868 hex "Physical address where the kernel is loaded"
2869 default "0xffffffff84000000"
2870 depends on CRASH_DUMP
2871 help
2872 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2873 If you plan to use kernel for capturing the crash dump change
2874 this value to start of the reserved region (the "X" value as
2875 specified in the "crashkernel=YM@XM" command line boot parameter
2876 passed to the panic-ed kernel).
2877
2878config MIPS_O32_FP64_SUPPORT
2879 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2880 depends on 32BIT || MIPS32_O32
2881 help
2882 When this is enabled, the kernel will support use of 64-bit floating
2883 point registers with binaries using the O32 ABI along with the
2884 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2885 32-bit MIPS systems this support is at the cost of increasing the
2886 size and complexity of the compiled FPU emulator. Thus if you are
2887 running a MIPS32 system and know that none of your userland binaries
2888 will require 64-bit floating point, you may wish to reduce the size
2889 of your kernel & potentially improve FP emulation performance by
2890 saying N here.
2891
2892 Although binutils currently supports use of this flag the details
2893 concerning its effect upon the O32 ABI in userland are still being
2894 worked on. In order to avoid userland becoming dependent upon current
2895 behaviour before the details have been finalised, this option should
2896 be considered experimental and only enabled by those working upon
2897 said details.
2898
2899 If unsure, say N.
2900
2901config USE_OF
2902 bool
2903 select OF
2904 select OF_EARLY_FLATTREE
2905 select IRQ_DOMAIN
2906
2907config UHI_BOOT
2908 bool
2909
2910config BUILTIN_DTB
2911 bool
2912
2913choice
2914 prompt "Kernel appended dtb support" if USE_OF
2915 default MIPS_NO_APPENDED_DTB
2916
2917 config MIPS_NO_APPENDED_DTB
2918 bool "None"
2919 help
2920 Do not enable appended dtb support.
2921
2922 config MIPS_ELF_APPENDED_DTB
2923 bool "vmlinux"
2924 help
2925 With this option, the boot code will look for a device tree binary
2926 DTB) included in the vmlinux ELF section .appended_dtb. By default
2927 it is empty and the DTB can be appended using binutils command
2928 objcopy:
2929
2930 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2931
2932 This is meant as a backward compatibility convenience for those
2933 systems with a bootloader that can't be upgraded to accommodate
2934 the documented boot protocol using a device tree.
2935
2936 config MIPS_RAW_APPENDED_DTB
2937 bool "vmlinux.bin or vmlinuz.bin"
2938 help
2939 With this option, the boot code will look for a device tree binary
2940 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2941 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2942
2943 This is meant as a backward compatibility convenience for those
2944 systems with a bootloader that can't be upgraded to accommodate
2945 the documented boot protocol using a device tree.
2946
2947 Beware that there is very little in terms of protection against
2948 this option being confused by leftover garbage in memory that might
2949 look like a DTB header after a reboot if no actual DTB is appended
2950 to vmlinux.bin. Do not leave this option active in a production kernel
2951 if you don't intend to always append a DTB.
2952endchoice
2953
2954choice
2955 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2956 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2957 !MACH_LOONGSON64 && !MIPS_MALTA && \
2958 !CAVIUM_OCTEON_SOC
2959 default MIPS_CMDLINE_FROM_BOOTLOADER
2960
2961 config MIPS_CMDLINE_FROM_DTB
2962 depends on USE_OF
2963 bool "Dtb kernel arguments if available"
2964
2965 config MIPS_CMDLINE_DTB_EXTEND
2966 depends on USE_OF
2967 bool "Extend dtb kernel arguments with bootloader arguments"
2968
2969 config MIPS_CMDLINE_FROM_BOOTLOADER
2970 bool "Bootloader kernel arguments if available"
2971
2972 config MIPS_CMDLINE_BUILTIN_EXTEND
2973 depends on CMDLINE_BOOL
2974 bool "Extend builtin kernel arguments with bootloader arguments"
2975endchoice
2976
2977endmenu
2978
2979config LOCKDEP_SUPPORT
2980 bool
2981 default y
2982
2983config STACKTRACE_SUPPORT
2984 bool
2985 default y
2986
2987config PGTABLE_LEVELS
2988 int
2989 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2990 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
2991 default 2
2992
2993config MIPS_AUTO_PFN_OFFSET
2994 bool
2995
2996menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2997
2998config PCI_DRIVERS_GENERIC
2999 select PCI_DOMAINS_GENERIC if PCI
3000 bool
3001
3002config PCI_DRIVERS_LEGACY
3003 def_bool !PCI_DRIVERS_GENERIC
3004 select NO_GENERIC_PCI_IOPORT_MAP
3005 select PCI_DOMAINS if PCI
3006
3007#
3008# ISA support is now enabled via select. Too many systems still have the one
3009# or other ISA chip on the board that users don't know about so don't expect
3010# users to choose the right thing ...
3011#
3012config ISA
3013 bool
3014
3015config TC
3016 bool "TURBOchannel support"
3017 depends on MACH_DECSTATION
3018 help
3019 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3020 processors. TURBOchannel programming specifications are available
3021 at:
3022 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3023 and:
3024 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3025 Linux driver support status is documented at:
3026 <http://www.linux-mips.org/wiki/DECstation>
3027
3028config MMU
3029 bool
3030 default y
3031
3032config ARCH_MMAP_RND_BITS_MIN
3033 default 12 if 64BIT
3034 default 8
3035
3036config ARCH_MMAP_RND_BITS_MAX
3037 default 18 if 64BIT
3038 default 15
3039
3040config ARCH_MMAP_RND_COMPAT_BITS_MIN
3041 default 8
3042
3043config ARCH_MMAP_RND_COMPAT_BITS_MAX
3044 default 15
3045
3046config I8253
3047 bool
3048 select CLKSRC_I8253
3049 select CLKEVT_I8253
3050 select MIPS_EXTERNAL_TIMER
3051endmenu
3052
3053config TRAD_SIGNALS
3054 bool
3055
3056config MIPS32_COMPAT
3057 bool
3058
3059config COMPAT
3060 bool
3061
3062config MIPS32_O32
3063 bool "Kernel support for o32 binaries"
3064 depends on 64BIT
3065 select ARCH_WANT_OLD_COMPAT_IPC
3066 select COMPAT
3067 select MIPS32_COMPAT
3068 help
3069 Select this option if you want to run o32 binaries. These are pure
3070 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3071 existing binaries are in this format.
3072
3073 If unsure, say Y.
3074
3075config MIPS32_N32
3076 bool "Kernel support for n32 binaries"
3077 depends on 64BIT
3078 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3079 select COMPAT
3080 select MIPS32_COMPAT
3081 help
3082 Select this option if you want to run n32 binaries. These are
3083 64-bit binaries using 32-bit quantities for addressing and certain
3084 data that would normally be 64-bit. They are used in special
3085 cases.
3086
3087 If unsure, say N.
3088
3089config CC_HAS_MNO_BRANCH_LIKELY
3090 def_bool y
3091 depends on $(cc-option,-mno-branch-likely)
3092
3093# https://github.com/llvm/llvm-project/issues/61045
3094config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3095 def_bool y if CC_IS_CLANG
3096
3097menu "Power management options"
3098
3099config ARCH_HIBERNATION_POSSIBLE
3100 def_bool y
3101 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3102
3103config ARCH_SUSPEND_POSSIBLE
3104 def_bool y
3105 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3106
3107source "kernel/power/Kconfig"
3108
3109endmenu
3110
3111config MIPS_EXTERNAL_TIMER
3112 bool
3113
3114menu "CPU Power Management"
3115
3116if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3117source "drivers/cpufreq/Kconfig"
3118endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3119
3120source "drivers/cpuidle/Kconfig"
3121
3122endmenu
3123
3124source "arch/mips/kvm/Kconfig"
3125
3126source "arch/mips/vdso/Kconfig"