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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
6 *
7 * Copyright (C) 1999 Harald Koerfgen
8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10 * Copyright (C) 2000-2002 Toshiba Corporation
11 *
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
13 */
14
15#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
16#define SUPPORT_SYSRQ
17#endif
18
19#include <linux/module.h>
20#include <linux/ioport.h>
21#include <linux/init.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/platform_device.h>
25#include <linux/pci.h>
26#include <linux/serial_core.h>
27#include <linux/serial.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30
31#include <asm/io.h>
32
33static char *serial_version = "1.11";
34static char *serial_name = "TX39/49 Serial driver";
35
36#define PASS_LIMIT 256
37
38#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
39/* "ttyS" is used for standard serial driver */
40#define TXX9_TTY_NAME "ttyTX"
41#define TXX9_TTY_MINOR_START 196
42#define TXX9_TTY_MAJOR 204
43#else
44/* acts like standard serial driver */
45#define TXX9_TTY_NAME "ttyS"
46#define TXX9_TTY_MINOR_START 64
47#define TXX9_TTY_MAJOR TTY_MAJOR
48#endif
49
50/* flag aliases */
51#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
52#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
53
54#ifdef CONFIG_PCI
55/* support for Toshiba TC86C001 SIO */
56#define ENABLE_SERIAL_TXX9_PCI
57#endif
58
59/*
60 * Number of serial ports
61 */
62#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
63
64struct uart_txx9_port {
65 struct uart_port port;
66 /* No additional info for now */
67};
68
69#define TXX9_REGION_SIZE 0x24
70
71/* TXX9 Serial Registers */
72#define TXX9_SILCR 0x00
73#define TXX9_SIDICR 0x04
74#define TXX9_SIDISR 0x08
75#define TXX9_SICISR 0x0c
76#define TXX9_SIFCR 0x10
77#define TXX9_SIFLCR 0x14
78#define TXX9_SIBGR 0x18
79#define TXX9_SITFIFO 0x1c
80#define TXX9_SIRFIFO 0x20
81
82/* SILCR : Line Control */
83#define TXX9_SILCR_SCS_MASK 0x00000060
84#define TXX9_SILCR_SCS_IMCLK 0x00000000
85#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
86#define TXX9_SILCR_SCS_SCLK 0x00000040
87#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
88#define TXX9_SILCR_UEPS 0x00000010
89#define TXX9_SILCR_UPEN 0x00000008
90#define TXX9_SILCR_USBL_MASK 0x00000004
91#define TXX9_SILCR_USBL_1BIT 0x00000000
92#define TXX9_SILCR_USBL_2BIT 0x00000004
93#define TXX9_SILCR_UMODE_MASK 0x00000003
94#define TXX9_SILCR_UMODE_8BIT 0x00000000
95#define TXX9_SILCR_UMODE_7BIT 0x00000001
96
97/* SIDICR : DMA/Int. Control */
98#define TXX9_SIDICR_TDE 0x00008000
99#define TXX9_SIDICR_RDE 0x00004000
100#define TXX9_SIDICR_TIE 0x00002000
101#define TXX9_SIDICR_RIE 0x00001000
102#define TXX9_SIDICR_SPIE 0x00000800
103#define TXX9_SIDICR_CTSAC 0x00000600
104#define TXX9_SIDICR_STIE_MASK 0x0000003f
105#define TXX9_SIDICR_STIE_OERS 0x00000020
106#define TXX9_SIDICR_STIE_CTSS 0x00000010
107#define TXX9_SIDICR_STIE_RBRKD 0x00000008
108#define TXX9_SIDICR_STIE_TRDY 0x00000004
109#define TXX9_SIDICR_STIE_TXALS 0x00000002
110#define TXX9_SIDICR_STIE_UBRKD 0x00000001
111
112/* SIDISR : DMA/Int. Status */
113#define TXX9_SIDISR_UBRK 0x00008000
114#define TXX9_SIDISR_UVALID 0x00004000
115#define TXX9_SIDISR_UFER 0x00002000
116#define TXX9_SIDISR_UPER 0x00001000
117#define TXX9_SIDISR_UOER 0x00000800
118#define TXX9_SIDISR_ERI 0x00000400
119#define TXX9_SIDISR_TOUT 0x00000200
120#define TXX9_SIDISR_TDIS 0x00000100
121#define TXX9_SIDISR_RDIS 0x00000080
122#define TXX9_SIDISR_STIS 0x00000040
123#define TXX9_SIDISR_RFDN_MASK 0x0000001f
124
125/* SICISR : Change Int. Status */
126#define TXX9_SICISR_OERS 0x00000020
127#define TXX9_SICISR_CTSS 0x00000010
128#define TXX9_SICISR_RBRKD 0x00000008
129#define TXX9_SICISR_TRDY 0x00000004
130#define TXX9_SICISR_TXALS 0x00000002
131#define TXX9_SICISR_UBRKD 0x00000001
132
133/* SIFCR : FIFO Control */
134#define TXX9_SIFCR_SWRST 0x00008000
135#define TXX9_SIFCR_RDIL_MASK 0x00000180
136#define TXX9_SIFCR_RDIL_1 0x00000000
137#define TXX9_SIFCR_RDIL_4 0x00000080
138#define TXX9_SIFCR_RDIL_8 0x00000100
139#define TXX9_SIFCR_RDIL_12 0x00000180
140#define TXX9_SIFCR_RDIL_MAX 0x00000180
141#define TXX9_SIFCR_TDIL_MASK 0x00000018
142#define TXX9_SIFCR_TDIL_1 0x00000000
143#define TXX9_SIFCR_TDIL_4 0x00000001
144#define TXX9_SIFCR_TDIL_8 0x00000010
145#define TXX9_SIFCR_TDIL_MAX 0x00000010
146#define TXX9_SIFCR_TFRST 0x00000004
147#define TXX9_SIFCR_RFRST 0x00000002
148#define TXX9_SIFCR_FRSTE 0x00000001
149#define TXX9_SIO_TX_FIFO 8
150#define TXX9_SIO_RX_FIFO 16
151
152/* SIFLCR : Flow Control */
153#define TXX9_SIFLCR_RCS 0x00001000
154#define TXX9_SIFLCR_TES 0x00000800
155#define TXX9_SIFLCR_RTSSC 0x00000200
156#define TXX9_SIFLCR_RSDE 0x00000100
157#define TXX9_SIFLCR_TSDE 0x00000080
158#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
159#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
160#define TXX9_SIFLCR_TBRK 0x00000001
161
162/* SIBGR : Baudrate Control */
163#define TXX9_SIBGR_BCLK_MASK 0x00000300
164#define TXX9_SIBGR_BCLK_T0 0x00000000
165#define TXX9_SIBGR_BCLK_T2 0x00000100
166#define TXX9_SIBGR_BCLK_T4 0x00000200
167#define TXX9_SIBGR_BCLK_T6 0x00000300
168#define TXX9_SIBGR_BRD_MASK 0x000000ff
169
170static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
171{
172 switch (up->port.iotype) {
173 default:
174 return __raw_readl(up->port.membase + offset);
175 case UPIO_PORT:
176 return inl(up->port.iobase + offset);
177 }
178}
179
180static inline void
181sio_out(struct uart_txx9_port *up, int offset, int value)
182{
183 switch (up->port.iotype) {
184 default:
185 __raw_writel(value, up->port.membase + offset);
186 break;
187 case UPIO_PORT:
188 outl(value, up->port.iobase + offset);
189 break;
190 }
191}
192
193static inline void
194sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
195{
196 sio_out(up, offset, sio_in(up, offset) & ~value);
197}
198static inline void
199sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
200{
201 sio_out(up, offset, sio_in(up, offset) | value);
202}
203
204static inline void
205sio_quot_set(struct uart_txx9_port *up, int quot)
206{
207 quot >>= 1;
208 if (quot < 256)
209 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
210 else if (quot < (256 << 2))
211 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
212 else if (quot < (256 << 4))
213 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
214 else if (quot < (256 << 6))
215 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
216 else
217 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
218}
219
220static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
221{
222 return container_of(port, struct uart_txx9_port, port);
223}
224
225static void serial_txx9_stop_tx(struct uart_port *port)
226{
227 struct uart_txx9_port *up = to_uart_txx9_port(port);
228 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
229}
230
231static void serial_txx9_start_tx(struct uart_port *port)
232{
233 struct uart_txx9_port *up = to_uart_txx9_port(port);
234 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
235}
236
237static void serial_txx9_stop_rx(struct uart_port *port)
238{
239 struct uart_txx9_port *up = to_uart_txx9_port(port);
240 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
241}
242
243static void serial_txx9_initialize(struct uart_port *port)
244{
245 struct uart_txx9_port *up = to_uart_txx9_port(port);
246 unsigned int tmout = 10000;
247
248 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
249 /* TX4925 BUG WORKAROUND. Accessing SIOC register
250 * immediately after soft reset causes bus error. */
251 mmiowb();
252 udelay(1);
253 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
254 udelay(1);
255 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
256 sio_set(up, TXX9_SIFCR,
257 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
258 /* initial settings */
259 sio_out(up, TXX9_SILCR,
260 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
261 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
262 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
263 sio_quot_set(up, uart_get_divisor(port, 9600));
264 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
265 sio_out(up, TXX9_SIDICR, 0);
266}
267
268static inline void
269receive_chars(struct uart_txx9_port *up, unsigned int *status)
270{
271 unsigned char ch;
272 unsigned int disr = *status;
273 int max_count = 256;
274 char flag;
275 unsigned int next_ignore_status_mask;
276
277 do {
278 ch = sio_in(up, TXX9_SIRFIFO);
279 flag = TTY_NORMAL;
280 up->port.icount.rx++;
281
282 /* mask out RFDN_MASK bit added by previous overrun */
283 next_ignore_status_mask =
284 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
285 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
286 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
287 /*
288 * For statistics only
289 */
290 if (disr & TXX9_SIDISR_UBRK) {
291 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
292 up->port.icount.brk++;
293 /*
294 * We do the SysRQ and SAK checking
295 * here because otherwise the break
296 * may get masked by ignore_status_mask
297 * or read_status_mask.
298 */
299 if (uart_handle_break(&up->port))
300 goto ignore_char;
301 } else if (disr & TXX9_SIDISR_UPER)
302 up->port.icount.parity++;
303 else if (disr & TXX9_SIDISR_UFER)
304 up->port.icount.frame++;
305 if (disr & TXX9_SIDISR_UOER) {
306 up->port.icount.overrun++;
307 /*
308 * The receiver read buffer still hold
309 * a char which caused overrun.
310 * Ignore next char by adding RFDN_MASK
311 * to ignore_status_mask temporarily.
312 */
313 next_ignore_status_mask |=
314 TXX9_SIDISR_RFDN_MASK;
315 }
316
317 /*
318 * Mask off conditions which should be ingored.
319 */
320 disr &= up->port.read_status_mask;
321
322 if (disr & TXX9_SIDISR_UBRK) {
323 flag = TTY_BREAK;
324 } else if (disr & TXX9_SIDISR_UPER)
325 flag = TTY_PARITY;
326 else if (disr & TXX9_SIDISR_UFER)
327 flag = TTY_FRAME;
328 }
329 if (uart_handle_sysrq_char(&up->port, ch))
330 goto ignore_char;
331
332 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
333
334 ignore_char:
335 up->port.ignore_status_mask = next_ignore_status_mask;
336 disr = sio_in(up, TXX9_SIDISR);
337 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
338 spin_unlock(&up->port.lock);
339 tty_flip_buffer_push(&up->port.state->port);
340 spin_lock(&up->port.lock);
341 *status = disr;
342}
343
344static inline void transmit_chars(struct uart_txx9_port *up)
345{
346 struct circ_buf *xmit = &up->port.state->xmit;
347 int count;
348
349 if (up->port.x_char) {
350 sio_out(up, TXX9_SITFIFO, up->port.x_char);
351 up->port.icount.tx++;
352 up->port.x_char = 0;
353 return;
354 }
355 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
356 serial_txx9_stop_tx(&up->port);
357 return;
358 }
359
360 count = TXX9_SIO_TX_FIFO;
361 do {
362 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
363 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
364 up->port.icount.tx++;
365 if (uart_circ_empty(xmit))
366 break;
367 } while (--count > 0);
368
369 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
370 uart_write_wakeup(&up->port);
371
372 if (uart_circ_empty(xmit))
373 serial_txx9_stop_tx(&up->port);
374}
375
376static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
377{
378 int pass_counter = 0;
379 struct uart_txx9_port *up = dev_id;
380 unsigned int status;
381
382 while (1) {
383 spin_lock(&up->port.lock);
384 status = sio_in(up, TXX9_SIDISR);
385 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
386 status &= ~TXX9_SIDISR_TDIS;
387 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
388 TXX9_SIDISR_TOUT))) {
389 spin_unlock(&up->port.lock);
390 break;
391 }
392
393 if (status & TXX9_SIDISR_RDIS)
394 receive_chars(up, &status);
395 if (status & TXX9_SIDISR_TDIS)
396 transmit_chars(up);
397 /* Clear TX/RX Int. Status */
398 sio_mask(up, TXX9_SIDISR,
399 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
400 TXX9_SIDISR_TOUT);
401 spin_unlock(&up->port.lock);
402
403 if (pass_counter++ > PASS_LIMIT)
404 break;
405 }
406
407 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
408}
409
410static unsigned int serial_txx9_tx_empty(struct uart_port *port)
411{
412 struct uart_txx9_port *up = to_uart_txx9_port(port);
413 unsigned long flags;
414 unsigned int ret;
415
416 spin_lock_irqsave(&up->port.lock, flags);
417 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
418 spin_unlock_irqrestore(&up->port.lock, flags);
419
420 return ret;
421}
422
423static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
424{
425 struct uart_txx9_port *up = to_uart_txx9_port(port);
426 unsigned int ret;
427
428 /* no modem control lines */
429 ret = TIOCM_CAR | TIOCM_DSR;
430 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
431 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
432
433 return ret;
434}
435
436static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
437{
438 struct uart_txx9_port *up = to_uart_txx9_port(port);
439
440 if (mctrl & TIOCM_RTS)
441 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
442 else
443 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
444}
445
446static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
447{
448 struct uart_txx9_port *up = to_uart_txx9_port(port);
449 unsigned long flags;
450
451 spin_lock_irqsave(&up->port.lock, flags);
452 if (break_state == -1)
453 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
454 else
455 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
456 spin_unlock_irqrestore(&up->port.lock, flags);
457}
458
459#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
460/*
461 * Wait for transmitter & holding register to empty
462 */
463static void wait_for_xmitr(struct uart_txx9_port *up)
464{
465 unsigned int tmout = 10000;
466
467 /* Wait up to 10ms for the character(s) to be sent. */
468 while (--tmout &&
469 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
470 udelay(1);
471
472 /* Wait up to 1s for flow control if necessary */
473 if (up->port.flags & UPF_CONS_FLOW) {
474 tmout = 1000000;
475 while (--tmout &&
476 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
477 udelay(1);
478 }
479}
480#endif
481
482#ifdef CONFIG_CONSOLE_POLL
483/*
484 * Console polling routines for writing and reading from the uart while
485 * in an interrupt or debug context.
486 */
487
488static int serial_txx9_get_poll_char(struct uart_port *port)
489{
490 unsigned int ier;
491 unsigned char c;
492 struct uart_txx9_port *up = to_uart_txx9_port(port);
493
494 /*
495 * First save the IER then disable the interrupts
496 */
497 ier = sio_in(up, TXX9_SIDICR);
498 sio_out(up, TXX9_SIDICR, 0);
499
500 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
501 ;
502
503 c = sio_in(up, TXX9_SIRFIFO);
504
505 /*
506 * Finally, clear RX interrupt status
507 * and restore the IER
508 */
509 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
510 sio_out(up, TXX9_SIDICR, ier);
511 return c;
512}
513
514
515static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
516{
517 unsigned int ier;
518 struct uart_txx9_port *up = to_uart_txx9_port(port);
519
520 /*
521 * First save the IER then disable the interrupts
522 */
523 ier = sio_in(up, TXX9_SIDICR);
524 sio_out(up, TXX9_SIDICR, 0);
525
526 wait_for_xmitr(up);
527 /*
528 * Send the character out.
529 */
530 sio_out(up, TXX9_SITFIFO, c);
531
532 /*
533 * Finally, wait for transmitter to become empty
534 * and restore the IER
535 */
536 wait_for_xmitr(up);
537 sio_out(up, TXX9_SIDICR, ier);
538}
539
540#endif /* CONFIG_CONSOLE_POLL */
541
542static int serial_txx9_startup(struct uart_port *port)
543{
544 struct uart_txx9_port *up = to_uart_txx9_port(port);
545 unsigned long flags;
546 int retval;
547
548 /*
549 * Clear the FIFO buffers and disable them.
550 * (they will be reenabled in set_termios())
551 */
552 sio_set(up, TXX9_SIFCR,
553 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
554 /* clear reset */
555 sio_mask(up, TXX9_SIFCR,
556 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
557 sio_out(up, TXX9_SIDICR, 0);
558
559 /*
560 * Clear the interrupt registers.
561 */
562 sio_out(up, TXX9_SIDISR, 0);
563
564 retval = request_irq(up->port.irq, serial_txx9_interrupt,
565 IRQF_SHARED, "serial_txx9", up);
566 if (retval)
567 return retval;
568
569 /*
570 * Now, initialize the UART
571 */
572 spin_lock_irqsave(&up->port.lock, flags);
573 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
574 spin_unlock_irqrestore(&up->port.lock, flags);
575
576 /* Enable RX/TX */
577 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
578
579 /*
580 * Finally, enable interrupts.
581 */
582 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
583
584 return 0;
585}
586
587static void serial_txx9_shutdown(struct uart_port *port)
588{
589 struct uart_txx9_port *up = to_uart_txx9_port(port);
590 unsigned long flags;
591
592 /*
593 * Disable interrupts from this port
594 */
595 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
596
597 spin_lock_irqsave(&up->port.lock, flags);
598 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
599 spin_unlock_irqrestore(&up->port.lock, flags);
600
601 /*
602 * Disable break condition
603 */
604 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
605
606#ifdef CONFIG_SERIAL_TXX9_CONSOLE
607 if (up->port.cons && up->port.line == up->port.cons->index) {
608 free_irq(up->port.irq, up);
609 return;
610 }
611#endif
612 /* reset FIFOs */
613 sio_set(up, TXX9_SIFCR,
614 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
615 /* clear reset */
616 sio_mask(up, TXX9_SIFCR,
617 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
618
619 /* Disable RX/TX */
620 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
621
622 free_irq(up->port.irq, up);
623}
624
625static void
626serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
627 struct ktermios *old)
628{
629 struct uart_txx9_port *up = to_uart_txx9_port(port);
630 unsigned int cval, fcr = 0;
631 unsigned long flags;
632 unsigned int baud, quot;
633
634 /*
635 * We don't support modem control lines.
636 */
637 termios->c_cflag &= ~(HUPCL | CMSPAR);
638 termios->c_cflag |= CLOCAL;
639
640 cval = sio_in(up, TXX9_SILCR);
641 /* byte size and parity */
642 cval &= ~TXX9_SILCR_UMODE_MASK;
643 switch (termios->c_cflag & CSIZE) {
644 case CS7:
645 cval |= TXX9_SILCR_UMODE_7BIT;
646 break;
647 default:
648 case CS5: /* not supported */
649 case CS6: /* not supported */
650 case CS8:
651 cval |= TXX9_SILCR_UMODE_8BIT;
652 break;
653 }
654
655 cval &= ~TXX9_SILCR_USBL_MASK;
656 if (termios->c_cflag & CSTOPB)
657 cval |= TXX9_SILCR_USBL_2BIT;
658 else
659 cval |= TXX9_SILCR_USBL_1BIT;
660 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
661 if (termios->c_cflag & PARENB)
662 cval |= TXX9_SILCR_UPEN;
663 if (!(termios->c_cflag & PARODD))
664 cval |= TXX9_SILCR_UEPS;
665
666 /*
667 * Ask the core to calculate the divisor for us.
668 */
669 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
670 quot = uart_get_divisor(port, baud);
671
672 /* Set up FIFOs */
673 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
674 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
675
676 /*
677 * Ok, we're now changing the port state. Do it with
678 * interrupts disabled.
679 */
680 spin_lock_irqsave(&up->port.lock, flags);
681
682 /*
683 * Update the per-port timeout.
684 */
685 uart_update_timeout(port, termios->c_cflag, baud);
686
687 up->port.read_status_mask = TXX9_SIDISR_UOER |
688 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
689 if (termios->c_iflag & INPCK)
690 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
691 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
692 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
693
694 /*
695 * Characteres to ignore
696 */
697 up->port.ignore_status_mask = 0;
698 if (termios->c_iflag & IGNPAR)
699 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
700 if (termios->c_iflag & IGNBRK) {
701 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
702 /*
703 * If we're ignoring parity and break indicators,
704 * ignore overruns too (for real raw support).
705 */
706 if (termios->c_iflag & IGNPAR)
707 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
708 }
709
710 /*
711 * ignore all characters if CREAD is not set
712 */
713 if ((termios->c_cflag & CREAD) == 0)
714 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
715
716 /* CTS flow control flag */
717 if ((termios->c_cflag & CRTSCTS) &&
718 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
719 sio_set(up, TXX9_SIFLCR,
720 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
721 } else {
722 sio_mask(up, TXX9_SIFLCR,
723 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
724 }
725
726 sio_out(up, TXX9_SILCR, cval);
727 sio_quot_set(up, quot);
728 sio_out(up, TXX9_SIFCR, fcr);
729
730 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
731 spin_unlock_irqrestore(&up->port.lock, flags);
732}
733
734static void
735serial_txx9_pm(struct uart_port *port, unsigned int state,
736 unsigned int oldstate)
737{
738 /*
739 * If oldstate was -1 this is called from
740 * uart_configure_port(). In this case do not initialize the
741 * port now, because the port was already initialized (for
742 * non-console port) or should not be initialized here (for
743 * console port). If we initialized the port here we lose
744 * serial console settings.
745 */
746 if (state == 0 && oldstate != -1)
747 serial_txx9_initialize(port);
748}
749
750static int serial_txx9_request_resource(struct uart_txx9_port *up)
751{
752 unsigned int size = TXX9_REGION_SIZE;
753 int ret = 0;
754
755 switch (up->port.iotype) {
756 default:
757 if (!up->port.mapbase)
758 break;
759
760 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
761 ret = -EBUSY;
762 break;
763 }
764
765 if (up->port.flags & UPF_IOREMAP) {
766 up->port.membase = ioremap(up->port.mapbase, size);
767 if (!up->port.membase) {
768 release_mem_region(up->port.mapbase, size);
769 ret = -ENOMEM;
770 }
771 }
772 break;
773
774 case UPIO_PORT:
775 if (!request_region(up->port.iobase, size, "serial_txx9"))
776 ret = -EBUSY;
777 break;
778 }
779 return ret;
780}
781
782static void serial_txx9_release_resource(struct uart_txx9_port *up)
783{
784 unsigned int size = TXX9_REGION_SIZE;
785
786 switch (up->port.iotype) {
787 default:
788 if (!up->port.mapbase)
789 break;
790
791 if (up->port.flags & UPF_IOREMAP) {
792 iounmap(up->port.membase);
793 up->port.membase = NULL;
794 }
795
796 release_mem_region(up->port.mapbase, size);
797 break;
798
799 case UPIO_PORT:
800 release_region(up->port.iobase, size);
801 break;
802 }
803}
804
805static void serial_txx9_release_port(struct uart_port *port)
806{
807 struct uart_txx9_port *up = to_uart_txx9_port(port);
808 serial_txx9_release_resource(up);
809}
810
811static int serial_txx9_request_port(struct uart_port *port)
812{
813 struct uart_txx9_port *up = to_uart_txx9_port(port);
814 return serial_txx9_request_resource(up);
815}
816
817static void serial_txx9_config_port(struct uart_port *port, int uflags)
818{
819 struct uart_txx9_port *up = to_uart_txx9_port(port);
820 int ret;
821
822 /*
823 * Find the region that we can probe for. This in turn
824 * tells us whether we can probe for the type of port.
825 */
826 ret = serial_txx9_request_resource(up);
827 if (ret < 0)
828 return;
829 port->type = PORT_TXX9;
830 up->port.fifosize = TXX9_SIO_TX_FIFO;
831
832#ifdef CONFIG_SERIAL_TXX9_CONSOLE
833 if (up->port.line == up->port.cons->index)
834 return;
835#endif
836 serial_txx9_initialize(port);
837}
838
839static const char *
840serial_txx9_type(struct uart_port *port)
841{
842 return "txx9";
843}
844
845static const struct uart_ops serial_txx9_pops = {
846 .tx_empty = serial_txx9_tx_empty,
847 .set_mctrl = serial_txx9_set_mctrl,
848 .get_mctrl = serial_txx9_get_mctrl,
849 .stop_tx = serial_txx9_stop_tx,
850 .start_tx = serial_txx9_start_tx,
851 .stop_rx = serial_txx9_stop_rx,
852 .break_ctl = serial_txx9_break_ctl,
853 .startup = serial_txx9_startup,
854 .shutdown = serial_txx9_shutdown,
855 .set_termios = serial_txx9_set_termios,
856 .pm = serial_txx9_pm,
857 .type = serial_txx9_type,
858 .release_port = serial_txx9_release_port,
859 .request_port = serial_txx9_request_port,
860 .config_port = serial_txx9_config_port,
861#ifdef CONFIG_CONSOLE_POLL
862 .poll_get_char = serial_txx9_get_poll_char,
863 .poll_put_char = serial_txx9_put_poll_char,
864#endif
865};
866
867static struct uart_txx9_port serial_txx9_ports[UART_NR];
868
869static void __init serial_txx9_register_ports(struct uart_driver *drv,
870 struct device *dev)
871{
872 int i;
873
874 for (i = 0; i < UART_NR; i++) {
875 struct uart_txx9_port *up = &serial_txx9_ports[i];
876
877 up->port.line = i;
878 up->port.ops = &serial_txx9_pops;
879 up->port.dev = dev;
880 if (up->port.iobase || up->port.mapbase)
881 uart_add_one_port(drv, &up->port);
882 }
883}
884
885#ifdef CONFIG_SERIAL_TXX9_CONSOLE
886
887static void serial_txx9_console_putchar(struct uart_port *port, int ch)
888{
889 struct uart_txx9_port *up = to_uart_txx9_port(port);
890
891 wait_for_xmitr(up);
892 sio_out(up, TXX9_SITFIFO, ch);
893}
894
895/*
896 * Print a string to the serial port trying not to disturb
897 * any possible real use of the port...
898 *
899 * The console_lock must be held when we get here.
900 */
901static void
902serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
903{
904 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
905 unsigned int ier, flcr;
906
907 /*
908 * First save the UER then disable the interrupts
909 */
910 ier = sio_in(up, TXX9_SIDICR);
911 sio_out(up, TXX9_SIDICR, 0);
912 /*
913 * Disable flow-control if enabled (and unnecessary)
914 */
915 flcr = sio_in(up, TXX9_SIFLCR);
916 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
917 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
918
919 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
920
921 /*
922 * Finally, wait for transmitter to become empty
923 * and restore the IER
924 */
925 wait_for_xmitr(up);
926 sio_out(up, TXX9_SIFLCR, flcr);
927 sio_out(up, TXX9_SIDICR, ier);
928}
929
930static int __init serial_txx9_console_setup(struct console *co, char *options)
931{
932 struct uart_port *port;
933 struct uart_txx9_port *up;
934 int baud = 9600;
935 int bits = 8;
936 int parity = 'n';
937 int flow = 'n';
938
939 /*
940 * Check whether an invalid uart number has been specified, and
941 * if so, search for the first available port that does have
942 * console support.
943 */
944 if (co->index >= UART_NR)
945 co->index = 0;
946 up = &serial_txx9_ports[co->index];
947 port = &up->port;
948 if (!port->ops)
949 return -ENODEV;
950
951 serial_txx9_initialize(&up->port);
952
953 if (options)
954 uart_parse_options(options, &baud, &parity, &bits, &flow);
955
956 return uart_set_options(port, co, baud, parity, bits, flow);
957}
958
959static struct uart_driver serial_txx9_reg;
960static struct console serial_txx9_console = {
961 .name = TXX9_TTY_NAME,
962 .write = serial_txx9_console_write,
963 .device = uart_console_device,
964 .setup = serial_txx9_console_setup,
965 .flags = CON_PRINTBUFFER,
966 .index = -1,
967 .data = &serial_txx9_reg,
968};
969
970static int __init serial_txx9_console_init(void)
971{
972 register_console(&serial_txx9_console);
973 return 0;
974}
975console_initcall(serial_txx9_console_init);
976
977#define SERIAL_TXX9_CONSOLE &serial_txx9_console
978#else
979#define SERIAL_TXX9_CONSOLE NULL
980#endif
981
982static struct uart_driver serial_txx9_reg = {
983 .owner = THIS_MODULE,
984 .driver_name = "serial_txx9",
985 .dev_name = TXX9_TTY_NAME,
986 .major = TXX9_TTY_MAJOR,
987 .minor = TXX9_TTY_MINOR_START,
988 .nr = UART_NR,
989 .cons = SERIAL_TXX9_CONSOLE,
990};
991
992int __init early_serial_txx9_setup(struct uart_port *port)
993{
994 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
995 return -ENODEV;
996
997 serial_txx9_ports[port->line].port = *port;
998 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
999 serial_txx9_ports[port->line].port.flags |=
1000 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1001 return 0;
1002}
1003
1004static DEFINE_MUTEX(serial_txx9_mutex);
1005
1006/**
1007 * serial_txx9_register_port - register a serial port
1008 * @port: serial port template
1009 *
1010 * Configure the serial port specified by the request.
1011 *
1012 * The port is then probed and if necessary the IRQ is autodetected
1013 * If this fails an error is returned.
1014 *
1015 * On success the port is ready to use and the line number is returned.
1016 */
1017static int serial_txx9_register_port(struct uart_port *port)
1018{
1019 int i;
1020 struct uart_txx9_port *uart;
1021 int ret = -ENOSPC;
1022
1023 mutex_lock(&serial_txx9_mutex);
1024 for (i = 0; i < UART_NR; i++) {
1025 uart = &serial_txx9_ports[i];
1026 if (uart_match_port(&uart->port, port)) {
1027 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1028 break;
1029 }
1030 }
1031 if (i == UART_NR) {
1032 /* Find unused port */
1033 for (i = 0; i < UART_NR; i++) {
1034 uart = &serial_txx9_ports[i];
1035 if (!(uart->port.iobase || uart->port.mapbase))
1036 break;
1037 }
1038 }
1039 if (i < UART_NR) {
1040 uart->port.iobase = port->iobase;
1041 uart->port.membase = port->membase;
1042 uart->port.irq = port->irq;
1043 uart->port.uartclk = port->uartclk;
1044 uart->port.iotype = port->iotype;
1045 uart->port.flags = port->flags
1046 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1047 uart->port.mapbase = port->mapbase;
1048 if (port->dev)
1049 uart->port.dev = port->dev;
1050 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1051 if (ret == 0)
1052 ret = uart->port.line;
1053 }
1054 mutex_unlock(&serial_txx9_mutex);
1055 return ret;
1056}
1057
1058/**
1059 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1060 * @line: serial line number
1061 *
1062 * Remove one serial port. This may not be called from interrupt
1063 * context. We hand the port back to the our control.
1064 */
1065static void serial_txx9_unregister_port(int line)
1066{
1067 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1068
1069 mutex_lock(&serial_txx9_mutex);
1070 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1071 uart->port.flags = 0;
1072 uart->port.type = PORT_UNKNOWN;
1073 uart->port.iobase = 0;
1074 uart->port.mapbase = 0;
1075 uart->port.membase = NULL;
1076 uart->port.dev = NULL;
1077 mutex_unlock(&serial_txx9_mutex);
1078}
1079
1080/*
1081 * Register a set of serial devices attached to a platform device.
1082 */
1083static int serial_txx9_probe(struct platform_device *dev)
1084{
1085 struct uart_port *p = dev_get_platdata(&dev->dev);
1086 struct uart_port port;
1087 int ret, i;
1088
1089 memset(&port, 0, sizeof(struct uart_port));
1090 for (i = 0; p && p->uartclk != 0; p++, i++) {
1091 port.iobase = p->iobase;
1092 port.membase = p->membase;
1093 port.irq = p->irq;
1094 port.uartclk = p->uartclk;
1095 port.iotype = p->iotype;
1096 port.flags = p->flags;
1097 port.mapbase = p->mapbase;
1098 port.dev = &dev->dev;
1099 ret = serial_txx9_register_port(&port);
1100 if (ret < 0) {
1101 dev_err(&dev->dev, "unable to register port at index %d "
1102 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1103 p->iobase, (unsigned long long)p->mapbase,
1104 p->irq, ret);
1105 }
1106 }
1107 return 0;
1108}
1109
1110/*
1111 * Remove serial ports registered against a platform device.
1112 */
1113static int serial_txx9_remove(struct platform_device *dev)
1114{
1115 int i;
1116
1117 for (i = 0; i < UART_NR; i++) {
1118 struct uart_txx9_port *up = &serial_txx9_ports[i];
1119
1120 if (up->port.dev == &dev->dev)
1121 serial_txx9_unregister_port(i);
1122 }
1123 return 0;
1124}
1125
1126#ifdef CONFIG_PM
1127static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1128{
1129 int i;
1130
1131 for (i = 0; i < UART_NR; i++) {
1132 struct uart_txx9_port *up = &serial_txx9_ports[i];
1133
1134 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1135 uart_suspend_port(&serial_txx9_reg, &up->port);
1136 }
1137
1138 return 0;
1139}
1140
1141static int serial_txx9_resume(struct platform_device *dev)
1142{
1143 int i;
1144
1145 for (i = 0; i < UART_NR; i++) {
1146 struct uart_txx9_port *up = &serial_txx9_ports[i];
1147
1148 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1149 uart_resume_port(&serial_txx9_reg, &up->port);
1150 }
1151
1152 return 0;
1153}
1154#endif
1155
1156static struct platform_driver serial_txx9_plat_driver = {
1157 .probe = serial_txx9_probe,
1158 .remove = serial_txx9_remove,
1159#ifdef CONFIG_PM
1160 .suspend = serial_txx9_suspend,
1161 .resume = serial_txx9_resume,
1162#endif
1163 .driver = {
1164 .name = "serial_txx9",
1165 },
1166};
1167
1168#ifdef ENABLE_SERIAL_TXX9_PCI
1169/*
1170 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1171 * to the arrangement of serial ports on a PCI card.
1172 */
1173static int
1174pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1175{
1176 struct uart_port port;
1177 int line;
1178 int rc;
1179
1180 rc = pci_enable_device(dev);
1181 if (rc)
1182 return rc;
1183
1184 memset(&port, 0, sizeof(port));
1185 port.ops = &serial_txx9_pops;
1186 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1187 port.uartclk = 66670000;
1188 port.irq = dev->irq;
1189 port.iotype = UPIO_PORT;
1190 port.iobase = pci_resource_start(dev, 1);
1191 port.dev = &dev->dev;
1192 line = serial_txx9_register_port(&port);
1193 if (line < 0) {
1194 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1195 pci_disable_device(dev);
1196 return line;
1197 }
1198 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1199
1200 return 0;
1201}
1202
1203static void pciserial_txx9_remove_one(struct pci_dev *dev)
1204{
1205 struct uart_txx9_port *up = pci_get_drvdata(dev);
1206
1207 if (up) {
1208 serial_txx9_unregister_port(up->port.line);
1209 pci_disable_device(dev);
1210 }
1211}
1212
1213#ifdef CONFIG_PM
1214static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1215{
1216 struct uart_txx9_port *up = pci_get_drvdata(dev);
1217
1218 if (up)
1219 uart_suspend_port(&serial_txx9_reg, &up->port);
1220 pci_save_state(dev);
1221 pci_set_power_state(dev, pci_choose_state(dev, state));
1222 return 0;
1223}
1224
1225static int pciserial_txx9_resume_one(struct pci_dev *dev)
1226{
1227 struct uart_txx9_port *up = pci_get_drvdata(dev);
1228
1229 pci_set_power_state(dev, PCI_D0);
1230 pci_restore_state(dev);
1231 if (up)
1232 uart_resume_port(&serial_txx9_reg, &up->port);
1233 return 0;
1234}
1235#endif
1236
1237static const struct pci_device_id serial_txx9_pci_tbl[] = {
1238 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1239 { 0, }
1240};
1241
1242static struct pci_driver serial_txx9_pci_driver = {
1243 .name = "serial_txx9",
1244 .probe = pciserial_txx9_init_one,
1245 .remove = pciserial_txx9_remove_one,
1246#ifdef CONFIG_PM
1247 .suspend = pciserial_txx9_suspend_one,
1248 .resume = pciserial_txx9_resume_one,
1249#endif
1250 .id_table = serial_txx9_pci_tbl,
1251};
1252
1253MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1254#endif /* ENABLE_SERIAL_TXX9_PCI */
1255
1256static struct platform_device *serial_txx9_plat_devs;
1257
1258static int __init serial_txx9_init(void)
1259{
1260 int ret;
1261
1262 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1263
1264 ret = uart_register_driver(&serial_txx9_reg);
1265 if (ret)
1266 goto out;
1267
1268 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1269 if (!serial_txx9_plat_devs) {
1270 ret = -ENOMEM;
1271 goto unreg_uart_drv;
1272 }
1273
1274 ret = platform_device_add(serial_txx9_plat_devs);
1275 if (ret)
1276 goto put_dev;
1277
1278 serial_txx9_register_ports(&serial_txx9_reg,
1279 &serial_txx9_plat_devs->dev);
1280
1281 ret = platform_driver_register(&serial_txx9_plat_driver);
1282 if (ret)
1283 goto del_dev;
1284
1285#ifdef ENABLE_SERIAL_TXX9_PCI
1286 ret = pci_register_driver(&serial_txx9_pci_driver);
1287#endif
1288 if (ret == 0)
1289 goto out;
1290
1291 del_dev:
1292 platform_device_del(serial_txx9_plat_devs);
1293 put_dev:
1294 platform_device_put(serial_txx9_plat_devs);
1295 unreg_uart_drv:
1296 uart_unregister_driver(&serial_txx9_reg);
1297 out:
1298 return ret;
1299}
1300
1301static void __exit serial_txx9_exit(void)
1302{
1303 int i;
1304
1305#ifdef ENABLE_SERIAL_TXX9_PCI
1306 pci_unregister_driver(&serial_txx9_pci_driver);
1307#endif
1308 platform_driver_unregister(&serial_txx9_plat_driver);
1309 platform_device_unregister(serial_txx9_plat_devs);
1310 for (i = 0; i < UART_NR; i++) {
1311 struct uart_txx9_port *up = &serial_txx9_ports[i];
1312 if (up->port.iobase || up->port.mapbase)
1313 uart_remove_one_port(&serial_txx9_reg, &up->port);
1314 }
1315
1316 uart_unregister_driver(&serial_txx9_reg);
1317}
1318
1319module_init(serial_txx9_init);
1320module_exit(serial_txx9_exit);
1321
1322MODULE_LICENSE("GPL");
1323MODULE_DESCRIPTION("TX39/49 serial driver");
1324
1325MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
6 *
7 * Copyright (C) 1999 Harald Koerfgen
8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10 * Copyright (C) 2000-2002 Toshiba Corporation
11 *
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
13 */
14
15#include <linux/module.h>
16#include <linux/ioport.h>
17#include <linux/init.h>
18#include <linux/console.h>
19#include <linux/delay.h>
20#include <linux/platform_device.h>
21#include <linux/pci.h>
22#include <linux/serial_core.h>
23#include <linux/serial.h>
24#include <linux/tty.h>
25#include <linux/tty_flip.h>
26
27#include <linux/io.h>
28
29#define PASS_LIMIT 256
30
31#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
32/* "ttyS" is used for standard serial driver */
33#define TXX9_TTY_NAME "ttyTX"
34#define TXX9_TTY_MINOR_START 196
35#define TXX9_TTY_MAJOR 204
36#else
37/* acts like standard serial driver */
38#define TXX9_TTY_NAME "ttyS"
39#define TXX9_TTY_MINOR_START 64
40#define TXX9_TTY_MAJOR TTY_MAJOR
41#endif
42
43/* flag aliases */
44#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
45#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
46
47#ifdef CONFIG_PCI
48/* support for Toshiba TC86C001 SIO */
49#define ENABLE_SERIAL_TXX9_PCI
50#endif
51
52/*
53 * Number of serial ports
54 */
55#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
56
57#define TXX9_REGION_SIZE 0x24
58
59/* TXX9 Serial Registers */
60#define TXX9_SILCR 0x00
61#define TXX9_SIDICR 0x04
62#define TXX9_SIDISR 0x08
63#define TXX9_SICISR 0x0c
64#define TXX9_SIFCR 0x10
65#define TXX9_SIFLCR 0x14
66#define TXX9_SIBGR 0x18
67#define TXX9_SITFIFO 0x1c
68#define TXX9_SIRFIFO 0x20
69
70/* SILCR : Line Control */
71#define TXX9_SILCR_SCS_MASK 0x00000060
72#define TXX9_SILCR_SCS_IMCLK 0x00000000
73#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
74#define TXX9_SILCR_SCS_SCLK 0x00000040
75#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
76#define TXX9_SILCR_UEPS 0x00000010
77#define TXX9_SILCR_UPEN 0x00000008
78#define TXX9_SILCR_USBL_MASK 0x00000004
79#define TXX9_SILCR_USBL_1BIT 0x00000000
80#define TXX9_SILCR_USBL_2BIT 0x00000004
81#define TXX9_SILCR_UMODE_MASK 0x00000003
82#define TXX9_SILCR_UMODE_8BIT 0x00000000
83#define TXX9_SILCR_UMODE_7BIT 0x00000001
84
85/* SIDICR : DMA/Int. Control */
86#define TXX9_SIDICR_TDE 0x00008000
87#define TXX9_SIDICR_RDE 0x00004000
88#define TXX9_SIDICR_TIE 0x00002000
89#define TXX9_SIDICR_RIE 0x00001000
90#define TXX9_SIDICR_SPIE 0x00000800
91#define TXX9_SIDICR_CTSAC 0x00000600
92#define TXX9_SIDICR_STIE_MASK 0x0000003f
93#define TXX9_SIDICR_STIE_OERS 0x00000020
94#define TXX9_SIDICR_STIE_CTSS 0x00000010
95#define TXX9_SIDICR_STIE_RBRKD 0x00000008
96#define TXX9_SIDICR_STIE_TRDY 0x00000004
97#define TXX9_SIDICR_STIE_TXALS 0x00000002
98#define TXX9_SIDICR_STIE_UBRKD 0x00000001
99
100/* SIDISR : DMA/Int. Status */
101#define TXX9_SIDISR_UBRK 0x00008000
102#define TXX9_SIDISR_UVALID 0x00004000
103#define TXX9_SIDISR_UFER 0x00002000
104#define TXX9_SIDISR_UPER 0x00001000
105#define TXX9_SIDISR_UOER 0x00000800
106#define TXX9_SIDISR_ERI 0x00000400
107#define TXX9_SIDISR_TOUT 0x00000200
108#define TXX9_SIDISR_TDIS 0x00000100
109#define TXX9_SIDISR_RDIS 0x00000080
110#define TXX9_SIDISR_STIS 0x00000040
111#define TXX9_SIDISR_RFDN_MASK 0x0000001f
112
113/* SICISR : Change Int. Status */
114#define TXX9_SICISR_OERS 0x00000020
115#define TXX9_SICISR_CTSS 0x00000010
116#define TXX9_SICISR_RBRKD 0x00000008
117#define TXX9_SICISR_TRDY 0x00000004
118#define TXX9_SICISR_TXALS 0x00000002
119#define TXX9_SICISR_UBRKD 0x00000001
120
121/* SIFCR : FIFO Control */
122#define TXX9_SIFCR_SWRST 0x00008000
123#define TXX9_SIFCR_RDIL_MASK 0x00000180
124#define TXX9_SIFCR_RDIL_1 0x00000000
125#define TXX9_SIFCR_RDIL_4 0x00000080
126#define TXX9_SIFCR_RDIL_8 0x00000100
127#define TXX9_SIFCR_RDIL_12 0x00000180
128#define TXX9_SIFCR_RDIL_MAX 0x00000180
129#define TXX9_SIFCR_TDIL_MASK 0x00000018
130#define TXX9_SIFCR_TDIL_1 0x00000000
131#define TXX9_SIFCR_TDIL_4 0x00000001
132#define TXX9_SIFCR_TDIL_8 0x00000010
133#define TXX9_SIFCR_TDIL_MAX 0x00000010
134#define TXX9_SIFCR_TFRST 0x00000004
135#define TXX9_SIFCR_RFRST 0x00000002
136#define TXX9_SIFCR_FRSTE 0x00000001
137#define TXX9_SIO_TX_FIFO 8
138#define TXX9_SIO_RX_FIFO 16
139
140/* SIFLCR : Flow Control */
141#define TXX9_SIFLCR_RCS 0x00001000
142#define TXX9_SIFLCR_TES 0x00000800
143#define TXX9_SIFLCR_RTSSC 0x00000200
144#define TXX9_SIFLCR_RSDE 0x00000100
145#define TXX9_SIFLCR_TSDE 0x00000080
146#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
147#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
148#define TXX9_SIFLCR_TBRK 0x00000001
149
150/* SIBGR : Baudrate Control */
151#define TXX9_SIBGR_BCLK_MASK 0x00000300
152#define TXX9_SIBGR_BCLK_T0 0x00000000
153#define TXX9_SIBGR_BCLK_T2 0x00000100
154#define TXX9_SIBGR_BCLK_T4 0x00000200
155#define TXX9_SIBGR_BCLK_T6 0x00000300
156#define TXX9_SIBGR_BRD_MASK 0x000000ff
157
158static inline unsigned int sio_in(struct uart_port *up, int offset)
159{
160 switch (up->iotype) {
161 default:
162 return __raw_readl(up->membase + offset);
163 case UPIO_PORT:
164 return inl(up->iobase + offset);
165 }
166}
167
168static inline void
169sio_out(struct uart_port *up, int offset, int value)
170{
171 switch (up->iotype) {
172 default:
173 __raw_writel(value, up->membase + offset);
174 break;
175 case UPIO_PORT:
176 outl(value, up->iobase + offset);
177 break;
178 }
179}
180
181static inline void
182sio_mask(struct uart_port *up, int offset, unsigned int value)
183{
184 sio_out(up, offset, sio_in(up, offset) & ~value);
185}
186static inline void
187sio_set(struct uart_port *up, int offset, unsigned int value)
188{
189 sio_out(up, offset, sio_in(up, offset) | value);
190}
191
192static inline void
193sio_quot_set(struct uart_port *up, int quot)
194{
195 quot >>= 1;
196 if (quot < 256)
197 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
198 else if (quot < (256 << 2))
199 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
200 else if (quot < (256 << 4))
201 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
202 else if (quot < (256 << 6))
203 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
204 else
205 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
206}
207
208static void serial_txx9_stop_tx(struct uart_port *up)
209{
210 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
211}
212
213static void serial_txx9_start_tx(struct uart_port *up)
214{
215 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
216}
217
218static void serial_txx9_stop_rx(struct uart_port *up)
219{
220 up->read_status_mask &= ~TXX9_SIDISR_RDIS;
221}
222
223static void serial_txx9_initialize(struct uart_port *up)
224{
225 unsigned int tmout = 10000;
226
227 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
228 /* TX4925 BUG WORKAROUND. Accessing SIOC register
229 * immediately after soft reset causes bus error. */
230 udelay(1);
231 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
232 udelay(1);
233 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
234 sio_set(up, TXX9_SIFCR,
235 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
236 /* initial settings */
237 sio_out(up, TXX9_SILCR,
238 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
239 ((up->flags & UPF_TXX9_USE_SCLK) ?
240 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
241 sio_quot_set(up, uart_get_divisor(up, 9600));
242 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
243 sio_out(up, TXX9_SIDICR, 0);
244}
245
246static inline void
247receive_chars(struct uart_port *up, unsigned int *status)
248{
249 unsigned char ch;
250 unsigned int disr = *status;
251 int max_count = 256;
252 char flag;
253 unsigned int next_ignore_status_mask;
254
255 do {
256 ch = sio_in(up, TXX9_SIRFIFO);
257 flag = TTY_NORMAL;
258 up->icount.rx++;
259
260 /* mask out RFDN_MASK bit added by previous overrun */
261 next_ignore_status_mask =
262 up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
263 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
264 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
265 /*
266 * For statistics only
267 */
268 if (disr & TXX9_SIDISR_UBRK) {
269 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
270 up->icount.brk++;
271 /*
272 * We do the SysRQ and SAK checking
273 * here because otherwise the break
274 * may get masked by ignore_status_mask
275 * or read_status_mask.
276 */
277 if (uart_handle_break(up))
278 goto ignore_char;
279 } else if (disr & TXX9_SIDISR_UPER)
280 up->icount.parity++;
281 else if (disr & TXX9_SIDISR_UFER)
282 up->icount.frame++;
283 if (disr & TXX9_SIDISR_UOER) {
284 up->icount.overrun++;
285 /*
286 * The receiver read buffer still hold
287 * a char which caused overrun.
288 * Ignore next char by adding RFDN_MASK
289 * to ignore_status_mask temporarily.
290 */
291 next_ignore_status_mask |=
292 TXX9_SIDISR_RFDN_MASK;
293 }
294
295 /*
296 * Mask off conditions which should be ingored.
297 */
298 disr &= up->read_status_mask;
299
300 if (disr & TXX9_SIDISR_UBRK) {
301 flag = TTY_BREAK;
302 } else if (disr & TXX9_SIDISR_UPER)
303 flag = TTY_PARITY;
304 else if (disr & TXX9_SIDISR_UFER)
305 flag = TTY_FRAME;
306 }
307 if (uart_handle_sysrq_char(up, ch))
308 goto ignore_char;
309
310 uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
311
312 ignore_char:
313 up->ignore_status_mask = next_ignore_status_mask;
314 disr = sio_in(up, TXX9_SIDISR);
315 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
316
317 tty_flip_buffer_push(&up->state->port);
318
319 *status = disr;
320}
321
322static inline void transmit_chars(struct uart_port *up)
323{
324 u8 ch;
325
326 uart_port_tx_limited(up, ch, TXX9_SIO_TX_FIFO,
327 true,
328 sio_out(up, TXX9_SITFIFO, ch),
329 ({}));
330}
331
332static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
333{
334 int pass_counter = 0;
335 struct uart_port *up = dev_id;
336 unsigned int status;
337
338 while (1) {
339 spin_lock(&up->lock);
340 status = sio_in(up, TXX9_SIDISR);
341 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
342 status &= ~TXX9_SIDISR_TDIS;
343 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
344 TXX9_SIDISR_TOUT))) {
345 spin_unlock(&up->lock);
346 break;
347 }
348
349 if (status & TXX9_SIDISR_RDIS)
350 receive_chars(up, &status);
351 if (status & TXX9_SIDISR_TDIS)
352 transmit_chars(up);
353 /* Clear TX/RX Int. Status */
354 sio_mask(up, TXX9_SIDISR,
355 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
356 TXX9_SIDISR_TOUT);
357 spin_unlock(&up->lock);
358
359 if (pass_counter++ > PASS_LIMIT)
360 break;
361 }
362
363 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
364}
365
366static unsigned int serial_txx9_tx_empty(struct uart_port *up)
367{
368 unsigned long flags;
369 unsigned int ret;
370
371 spin_lock_irqsave(&up->lock, flags);
372 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
373 spin_unlock_irqrestore(&up->lock, flags);
374
375 return ret;
376}
377
378static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
379{
380 unsigned int ret;
381
382 /* no modem control lines */
383 ret = TIOCM_CAR | TIOCM_DSR;
384 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
385 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
386
387 return ret;
388}
389
390static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
391{
392
393 if (mctrl & TIOCM_RTS)
394 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
395 else
396 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
397}
398
399static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
400{
401 unsigned long flags;
402
403 spin_lock_irqsave(&up->lock, flags);
404 if (break_state == -1)
405 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
406 else
407 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
408 spin_unlock_irqrestore(&up->lock, flags);
409}
410
411#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
412/*
413 * Wait for transmitter & holding register to empty
414 */
415static void wait_for_xmitr(struct uart_port *up)
416{
417 unsigned int tmout = 10000;
418
419 /* Wait up to 10ms for the character(s) to be sent. */
420 while (--tmout &&
421 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
422 udelay(1);
423
424 /* Wait up to 1s for flow control if necessary */
425 if (up->flags & UPF_CONS_FLOW) {
426 tmout = 1000000;
427 while (--tmout &&
428 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
429 udelay(1);
430 }
431}
432#endif
433
434#ifdef CONFIG_CONSOLE_POLL
435/*
436 * Console polling routines for writing and reading from the uart while
437 * in an interrupt or debug context.
438 */
439
440static int serial_txx9_get_poll_char(struct uart_port *up)
441{
442 unsigned int ier;
443 unsigned char c;
444
445 /*
446 * First save the IER then disable the interrupts
447 */
448 ier = sio_in(up, TXX9_SIDICR);
449 sio_out(up, TXX9_SIDICR, 0);
450
451 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
452 ;
453
454 c = sio_in(up, TXX9_SIRFIFO);
455
456 /*
457 * Finally, clear RX interrupt status
458 * and restore the IER
459 */
460 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
461 sio_out(up, TXX9_SIDICR, ier);
462 return c;
463}
464
465
466static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
467{
468 unsigned int ier;
469
470 /*
471 * First save the IER then disable the interrupts
472 */
473 ier = sio_in(up, TXX9_SIDICR);
474 sio_out(up, TXX9_SIDICR, 0);
475
476 wait_for_xmitr(up);
477 /*
478 * Send the character out.
479 */
480 sio_out(up, TXX9_SITFIFO, c);
481
482 /*
483 * Finally, wait for transmitter to become empty
484 * and restore the IER
485 */
486 wait_for_xmitr(up);
487 sio_out(up, TXX9_SIDICR, ier);
488}
489
490#endif /* CONFIG_CONSOLE_POLL */
491
492static int serial_txx9_startup(struct uart_port *up)
493{
494 unsigned long flags;
495 int retval;
496
497 /*
498 * Clear the FIFO buffers and disable them.
499 * (they will be reenabled in set_termios())
500 */
501 sio_set(up, TXX9_SIFCR,
502 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
503 /* clear reset */
504 sio_mask(up, TXX9_SIFCR,
505 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
506 sio_out(up, TXX9_SIDICR, 0);
507
508 /*
509 * Clear the interrupt registers.
510 */
511 sio_out(up, TXX9_SIDISR, 0);
512
513 retval = request_irq(up->irq, serial_txx9_interrupt,
514 IRQF_SHARED, "serial_txx9", up);
515 if (retval)
516 return retval;
517
518 /*
519 * Now, initialize the UART
520 */
521 spin_lock_irqsave(&up->lock, flags);
522 serial_txx9_set_mctrl(up, up->mctrl);
523 spin_unlock_irqrestore(&up->lock, flags);
524
525 /* Enable RX/TX */
526 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
527
528 /*
529 * Finally, enable interrupts.
530 */
531 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
532
533 return 0;
534}
535
536static void serial_txx9_shutdown(struct uart_port *up)
537{
538 unsigned long flags;
539
540 /*
541 * Disable interrupts from this port
542 */
543 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
544
545 spin_lock_irqsave(&up->lock, flags);
546 serial_txx9_set_mctrl(up, up->mctrl);
547 spin_unlock_irqrestore(&up->lock, flags);
548
549 /*
550 * Disable break condition
551 */
552 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
553
554#ifdef CONFIG_SERIAL_TXX9_CONSOLE
555 if (up->cons && up->line == up->cons->index) {
556 free_irq(up->irq, up);
557 return;
558 }
559#endif
560 /* reset FIFOs */
561 sio_set(up, TXX9_SIFCR,
562 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
563 /* clear reset */
564 sio_mask(up, TXX9_SIFCR,
565 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
566
567 /* Disable RX/TX */
568 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
569
570 free_irq(up->irq, up);
571}
572
573static void
574serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
575 const struct ktermios *old)
576{
577 unsigned int cval, fcr = 0;
578 unsigned long flags;
579 unsigned int baud, quot;
580
581 /*
582 * We don't support modem control lines.
583 */
584 termios->c_cflag &= ~(HUPCL | CMSPAR);
585 termios->c_cflag |= CLOCAL;
586
587 cval = sio_in(up, TXX9_SILCR);
588 /* byte size and parity */
589 cval &= ~TXX9_SILCR_UMODE_MASK;
590 switch (termios->c_cflag & CSIZE) {
591 case CS7:
592 cval |= TXX9_SILCR_UMODE_7BIT;
593 break;
594 default:
595 case CS5: /* not supported */
596 case CS6: /* not supported */
597 case CS8:
598 cval |= TXX9_SILCR_UMODE_8BIT;
599 termios->c_cflag &= ~CSIZE;
600 termios->c_cflag |= CS8;
601 break;
602 }
603
604 cval &= ~TXX9_SILCR_USBL_MASK;
605 if (termios->c_cflag & CSTOPB)
606 cval |= TXX9_SILCR_USBL_2BIT;
607 else
608 cval |= TXX9_SILCR_USBL_1BIT;
609 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
610 if (termios->c_cflag & PARENB)
611 cval |= TXX9_SILCR_UPEN;
612 if (!(termios->c_cflag & PARODD))
613 cval |= TXX9_SILCR_UEPS;
614
615 /*
616 * Ask the core to calculate the divisor for us.
617 */
618 baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
619 quot = uart_get_divisor(up, baud);
620
621 /* Set up FIFOs */
622 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
623 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
624
625 /*
626 * Ok, we're now changing the port state. Do it with
627 * interrupts disabled.
628 */
629 spin_lock_irqsave(&up->lock, flags);
630
631 /*
632 * Update the per-port timeout.
633 */
634 uart_update_timeout(up, termios->c_cflag, baud);
635
636 up->read_status_mask = TXX9_SIDISR_UOER |
637 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
638 if (termios->c_iflag & INPCK)
639 up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
640 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
641 up->read_status_mask |= TXX9_SIDISR_UBRK;
642
643 /*
644 * Characteres to ignore
645 */
646 up->ignore_status_mask = 0;
647 if (termios->c_iflag & IGNPAR)
648 up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
649 if (termios->c_iflag & IGNBRK) {
650 up->ignore_status_mask |= TXX9_SIDISR_UBRK;
651 /*
652 * If we're ignoring parity and break indicators,
653 * ignore overruns too (for real raw support).
654 */
655 if (termios->c_iflag & IGNPAR)
656 up->ignore_status_mask |= TXX9_SIDISR_UOER;
657 }
658
659 /*
660 * ignore all characters if CREAD is not set
661 */
662 if ((termios->c_cflag & CREAD) == 0)
663 up->ignore_status_mask |= TXX9_SIDISR_RDIS;
664
665 /* CTS flow control flag */
666 if ((termios->c_cflag & CRTSCTS) &&
667 (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
668 sio_set(up, TXX9_SIFLCR,
669 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
670 } else {
671 sio_mask(up, TXX9_SIFLCR,
672 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
673 }
674
675 sio_out(up, TXX9_SILCR, cval);
676 sio_quot_set(up, quot);
677 sio_out(up, TXX9_SIFCR, fcr);
678
679 serial_txx9_set_mctrl(up, up->mctrl);
680 spin_unlock_irqrestore(&up->lock, flags);
681}
682
683static void
684serial_txx9_pm(struct uart_port *port, unsigned int state,
685 unsigned int oldstate)
686{
687 /*
688 * If oldstate was -1 this is called from
689 * uart_configure_port(). In this case do not initialize the
690 * port now, because the port was already initialized (for
691 * non-console port) or should not be initialized here (for
692 * console port). If we initialized the port here we lose
693 * serial console settings.
694 */
695 if (state == 0 && oldstate != -1)
696 serial_txx9_initialize(port);
697}
698
699static int serial_txx9_request_resource(struct uart_port *up)
700{
701 unsigned int size = TXX9_REGION_SIZE;
702 int ret = 0;
703
704 switch (up->iotype) {
705 default:
706 if (!up->mapbase)
707 break;
708
709 if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
710 ret = -EBUSY;
711 break;
712 }
713
714 if (up->flags & UPF_IOREMAP) {
715 up->membase = ioremap(up->mapbase, size);
716 if (!up->membase) {
717 release_mem_region(up->mapbase, size);
718 ret = -ENOMEM;
719 }
720 }
721 break;
722
723 case UPIO_PORT:
724 if (!request_region(up->iobase, size, "serial_txx9"))
725 ret = -EBUSY;
726 break;
727 }
728 return ret;
729}
730
731static void serial_txx9_release_resource(struct uart_port *up)
732{
733 unsigned int size = TXX9_REGION_SIZE;
734
735 switch (up->iotype) {
736 default:
737 if (!up->mapbase)
738 break;
739
740 if (up->flags & UPF_IOREMAP) {
741 iounmap(up->membase);
742 up->membase = NULL;
743 }
744
745 release_mem_region(up->mapbase, size);
746 break;
747
748 case UPIO_PORT:
749 release_region(up->iobase, size);
750 break;
751 }
752}
753
754static void serial_txx9_release_port(struct uart_port *up)
755{
756 serial_txx9_release_resource(up);
757}
758
759static int serial_txx9_request_port(struct uart_port *up)
760{
761 return serial_txx9_request_resource(up);
762}
763
764static void serial_txx9_config_port(struct uart_port *up, int uflags)
765{
766 int ret;
767
768 /*
769 * Find the region that we can probe for. This in turn
770 * tells us whether we can probe for the type of port.
771 */
772 ret = serial_txx9_request_resource(up);
773 if (ret < 0)
774 return;
775 up->type = PORT_TXX9;
776 up->fifosize = TXX9_SIO_TX_FIFO;
777
778#ifdef CONFIG_SERIAL_TXX9_CONSOLE
779 if (up->line == up->cons->index)
780 return;
781#endif
782 serial_txx9_initialize(up);
783}
784
785static const char *
786serial_txx9_type(struct uart_port *port)
787{
788 return "txx9";
789}
790
791static const struct uart_ops serial_txx9_pops = {
792 .tx_empty = serial_txx9_tx_empty,
793 .set_mctrl = serial_txx9_set_mctrl,
794 .get_mctrl = serial_txx9_get_mctrl,
795 .stop_tx = serial_txx9_stop_tx,
796 .start_tx = serial_txx9_start_tx,
797 .stop_rx = serial_txx9_stop_rx,
798 .break_ctl = serial_txx9_break_ctl,
799 .startup = serial_txx9_startup,
800 .shutdown = serial_txx9_shutdown,
801 .set_termios = serial_txx9_set_termios,
802 .pm = serial_txx9_pm,
803 .type = serial_txx9_type,
804 .release_port = serial_txx9_release_port,
805 .request_port = serial_txx9_request_port,
806 .config_port = serial_txx9_config_port,
807#ifdef CONFIG_CONSOLE_POLL
808 .poll_get_char = serial_txx9_get_poll_char,
809 .poll_put_char = serial_txx9_put_poll_char,
810#endif
811};
812
813static struct uart_port serial_txx9_ports[UART_NR];
814
815static void __init serial_txx9_register_ports(struct uart_driver *drv,
816 struct device *dev)
817{
818 int i;
819
820 for (i = 0; i < UART_NR; i++) {
821 struct uart_port *up = &serial_txx9_ports[i];
822
823 up->line = i;
824 up->ops = &serial_txx9_pops;
825 up->dev = dev;
826 if (up->iobase || up->mapbase)
827 uart_add_one_port(drv, up);
828 }
829}
830
831#ifdef CONFIG_SERIAL_TXX9_CONSOLE
832
833static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
834{
835 wait_for_xmitr(up);
836 sio_out(up, TXX9_SITFIFO, ch);
837}
838
839/*
840 * Print a string to the serial port trying not to disturb
841 * any possible real use of the port...
842 *
843 * The console_lock must be held when we get here.
844 */
845static void
846serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
847{
848 struct uart_port *up = &serial_txx9_ports[co->index];
849 unsigned int ier, flcr;
850
851 /*
852 * First save the UER then disable the interrupts
853 */
854 ier = sio_in(up, TXX9_SIDICR);
855 sio_out(up, TXX9_SIDICR, 0);
856 /*
857 * Disable flow-control if enabled (and unnecessary)
858 */
859 flcr = sio_in(up, TXX9_SIFLCR);
860 if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
861 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
862
863 uart_console_write(up, s, count, serial_txx9_console_putchar);
864
865 /*
866 * Finally, wait for transmitter to become empty
867 * and restore the IER
868 */
869 wait_for_xmitr(up);
870 sio_out(up, TXX9_SIFLCR, flcr);
871 sio_out(up, TXX9_SIDICR, ier);
872}
873
874static int __init serial_txx9_console_setup(struct console *co, char *options)
875{
876 struct uart_port *up;
877 int baud = 9600;
878 int bits = 8;
879 int parity = 'n';
880 int flow = 'n';
881
882 /*
883 * Check whether an invalid uart number has been specified, and
884 * if so, search for the first available port that does have
885 * console support.
886 */
887 if (co->index >= UART_NR)
888 co->index = 0;
889 up = &serial_txx9_ports[co->index];
890 if (!up->ops)
891 return -ENODEV;
892
893 serial_txx9_initialize(up);
894
895 if (options)
896 uart_parse_options(options, &baud, &parity, &bits, &flow);
897
898 return uart_set_options(up, co, baud, parity, bits, flow);
899}
900
901static struct uart_driver serial_txx9_reg;
902static struct console serial_txx9_console = {
903 .name = TXX9_TTY_NAME,
904 .write = serial_txx9_console_write,
905 .device = uart_console_device,
906 .setup = serial_txx9_console_setup,
907 .flags = CON_PRINTBUFFER,
908 .index = -1,
909 .data = &serial_txx9_reg,
910};
911
912static int __init serial_txx9_console_init(void)
913{
914 register_console(&serial_txx9_console);
915 return 0;
916}
917console_initcall(serial_txx9_console_init);
918
919#define SERIAL_TXX9_CONSOLE &serial_txx9_console
920#else
921#define SERIAL_TXX9_CONSOLE NULL
922#endif
923
924static struct uart_driver serial_txx9_reg = {
925 .owner = THIS_MODULE,
926 .driver_name = "serial_txx9",
927 .dev_name = TXX9_TTY_NAME,
928 .major = TXX9_TTY_MAJOR,
929 .minor = TXX9_TTY_MINOR_START,
930 .nr = UART_NR,
931 .cons = SERIAL_TXX9_CONSOLE,
932};
933
934int __init early_serial_txx9_setup(struct uart_port *port)
935{
936 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
937 return -ENODEV;
938
939 serial_txx9_ports[port->line] = *port;
940 serial_txx9_ports[port->line].ops = &serial_txx9_pops;
941 serial_txx9_ports[port->line].flags |=
942 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
943 return 0;
944}
945
946static DEFINE_MUTEX(serial_txx9_mutex);
947
948/**
949 * serial_txx9_register_port - register a serial port
950 * @port: serial port template
951 *
952 * Configure the serial port specified by the request.
953 *
954 * The port is then probed and if necessary the IRQ is autodetected
955 * If this fails an error is returned.
956 *
957 * On success the port is ready to use and the line number is returned.
958 */
959static int serial_txx9_register_port(struct uart_port *port)
960{
961 int i;
962 struct uart_port *uart;
963 int ret = -ENOSPC;
964
965 mutex_lock(&serial_txx9_mutex);
966 for (i = 0; i < UART_NR; i++) {
967 uart = &serial_txx9_ports[i];
968 if (uart_match_port(uart, port)) {
969 uart_remove_one_port(&serial_txx9_reg, uart);
970 break;
971 }
972 }
973 if (i == UART_NR) {
974 /* Find unused port */
975 for (i = 0; i < UART_NR; i++) {
976 uart = &serial_txx9_ports[i];
977 if (!(uart->iobase || uart->mapbase))
978 break;
979 }
980 }
981 if (i < UART_NR) {
982 uart->iobase = port->iobase;
983 uart->membase = port->membase;
984 uart->irq = port->irq;
985 uart->uartclk = port->uartclk;
986 uart->iotype = port->iotype;
987 uart->flags = port->flags
988 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
989 uart->mapbase = port->mapbase;
990 if (port->dev)
991 uart->dev = port->dev;
992 ret = uart_add_one_port(&serial_txx9_reg, uart);
993 if (ret == 0)
994 ret = uart->line;
995 }
996 mutex_unlock(&serial_txx9_mutex);
997 return ret;
998}
999
1000/**
1001 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1002 * @line: serial line number
1003 *
1004 * Remove one serial port. This may not be called from interrupt
1005 * context. We hand the port back to the our control.
1006 */
1007static void serial_txx9_unregister_port(int line)
1008{
1009 struct uart_port *uart = &serial_txx9_ports[line];
1010
1011 mutex_lock(&serial_txx9_mutex);
1012 uart_remove_one_port(&serial_txx9_reg, uart);
1013 uart->flags = 0;
1014 uart->type = PORT_UNKNOWN;
1015 uart->iobase = 0;
1016 uart->mapbase = 0;
1017 uart->membase = NULL;
1018 uart->dev = NULL;
1019 mutex_unlock(&serial_txx9_mutex);
1020}
1021
1022/*
1023 * Register a set of serial devices attached to a platform device.
1024 */
1025static int serial_txx9_probe(struct platform_device *dev)
1026{
1027 struct uart_port *p = dev_get_platdata(&dev->dev);
1028 struct uart_port port;
1029 int ret, i;
1030
1031 memset(&port, 0, sizeof(struct uart_port));
1032 for (i = 0; p && p->uartclk != 0; p++, i++) {
1033 port.iobase = p->iobase;
1034 port.membase = p->membase;
1035 port.irq = p->irq;
1036 port.uartclk = p->uartclk;
1037 port.iotype = p->iotype;
1038 port.flags = p->flags;
1039 port.mapbase = p->mapbase;
1040 port.dev = &dev->dev;
1041 port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1042 ret = serial_txx9_register_port(&port);
1043 if (ret < 0) {
1044 dev_err(&dev->dev, "unable to register port at index %d "
1045 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1046 p->iobase, (unsigned long long)p->mapbase,
1047 p->irq, ret);
1048 }
1049 }
1050 return 0;
1051}
1052
1053/*
1054 * Remove serial ports registered against a platform device.
1055 */
1056static int serial_txx9_remove(struct platform_device *dev)
1057{
1058 int i;
1059
1060 for (i = 0; i < UART_NR; i++) {
1061 struct uart_port *up = &serial_txx9_ports[i];
1062
1063 if (up->dev == &dev->dev)
1064 serial_txx9_unregister_port(i);
1065 }
1066 return 0;
1067}
1068
1069#ifdef CONFIG_PM
1070static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1071{
1072 int i;
1073
1074 for (i = 0; i < UART_NR; i++) {
1075 struct uart_port *up = &serial_txx9_ports[i];
1076
1077 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1078 uart_suspend_port(&serial_txx9_reg, up);
1079 }
1080
1081 return 0;
1082}
1083
1084static int serial_txx9_resume(struct platform_device *dev)
1085{
1086 int i;
1087
1088 for (i = 0; i < UART_NR; i++) {
1089 struct uart_port *up = &serial_txx9_ports[i];
1090
1091 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1092 uart_resume_port(&serial_txx9_reg, up);
1093 }
1094
1095 return 0;
1096}
1097#endif
1098
1099static struct platform_driver serial_txx9_plat_driver = {
1100 .probe = serial_txx9_probe,
1101 .remove = serial_txx9_remove,
1102#ifdef CONFIG_PM
1103 .suspend = serial_txx9_suspend,
1104 .resume = serial_txx9_resume,
1105#endif
1106 .driver = {
1107 .name = "serial_txx9",
1108 },
1109};
1110
1111#ifdef ENABLE_SERIAL_TXX9_PCI
1112/*
1113 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1114 * to the arrangement of serial ports on a PCI card.
1115 */
1116static int
1117pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1118{
1119 struct uart_port port;
1120 int line;
1121 int rc;
1122
1123 rc = pci_enable_device(dev);
1124 if (rc)
1125 return rc;
1126
1127 memset(&port, 0, sizeof(port));
1128 port.ops = &serial_txx9_pops;
1129 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1130 port.uartclk = 66670000;
1131 port.irq = dev->irq;
1132 port.iotype = UPIO_PORT;
1133 port.iobase = pci_resource_start(dev, 1);
1134 port.dev = &dev->dev;
1135 line = serial_txx9_register_port(&port);
1136 if (line < 0) {
1137 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1138 pci_disable_device(dev);
1139 return line;
1140 }
1141 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1142
1143 return 0;
1144}
1145
1146static void pciserial_txx9_remove_one(struct pci_dev *dev)
1147{
1148 struct uart_port *up = pci_get_drvdata(dev);
1149
1150 if (up) {
1151 serial_txx9_unregister_port(up->line);
1152 pci_disable_device(dev);
1153 }
1154}
1155
1156#ifdef CONFIG_PM
1157static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1158{
1159 struct uart_port *up = pci_get_drvdata(dev);
1160
1161 if (up)
1162 uart_suspend_port(&serial_txx9_reg, up);
1163 pci_save_state(dev);
1164 pci_set_power_state(dev, pci_choose_state(dev, state));
1165 return 0;
1166}
1167
1168static int pciserial_txx9_resume_one(struct pci_dev *dev)
1169{
1170 struct uart_port *up = pci_get_drvdata(dev);
1171
1172 pci_set_power_state(dev, PCI_D0);
1173 pci_restore_state(dev);
1174 if (up)
1175 uart_resume_port(&serial_txx9_reg, up);
1176 return 0;
1177}
1178#endif
1179
1180static const struct pci_device_id serial_txx9_pci_tbl[] = {
1181 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1182 { 0, }
1183};
1184
1185static struct pci_driver serial_txx9_pci_driver = {
1186 .name = "serial_txx9",
1187 .probe = pciserial_txx9_init_one,
1188 .remove = pciserial_txx9_remove_one,
1189#ifdef CONFIG_PM
1190 .suspend = pciserial_txx9_suspend_one,
1191 .resume = pciserial_txx9_resume_one,
1192#endif
1193 .id_table = serial_txx9_pci_tbl,
1194};
1195
1196MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1197#endif /* ENABLE_SERIAL_TXX9_PCI */
1198
1199static struct platform_device *serial_txx9_plat_devs;
1200
1201static int __init serial_txx9_init(void)
1202{
1203 int ret;
1204
1205 ret = uart_register_driver(&serial_txx9_reg);
1206 if (ret)
1207 goto out;
1208
1209 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1210 if (!serial_txx9_plat_devs) {
1211 ret = -ENOMEM;
1212 goto unreg_uart_drv;
1213 }
1214
1215 ret = platform_device_add(serial_txx9_plat_devs);
1216 if (ret)
1217 goto put_dev;
1218
1219 serial_txx9_register_ports(&serial_txx9_reg,
1220 &serial_txx9_plat_devs->dev);
1221
1222 ret = platform_driver_register(&serial_txx9_plat_driver);
1223 if (ret)
1224 goto del_dev;
1225
1226#ifdef ENABLE_SERIAL_TXX9_PCI
1227 ret = pci_register_driver(&serial_txx9_pci_driver);
1228 if (ret) {
1229 platform_driver_unregister(&serial_txx9_plat_driver);
1230 }
1231#endif
1232 if (ret == 0)
1233 goto out;
1234
1235 del_dev:
1236 platform_device_del(serial_txx9_plat_devs);
1237 put_dev:
1238 platform_device_put(serial_txx9_plat_devs);
1239 unreg_uart_drv:
1240 uart_unregister_driver(&serial_txx9_reg);
1241 out:
1242 return ret;
1243}
1244
1245static void __exit serial_txx9_exit(void)
1246{
1247 int i;
1248
1249#ifdef ENABLE_SERIAL_TXX9_PCI
1250 pci_unregister_driver(&serial_txx9_pci_driver);
1251#endif
1252 platform_driver_unregister(&serial_txx9_plat_driver);
1253 platform_device_unregister(serial_txx9_plat_devs);
1254 for (i = 0; i < UART_NR; i++) {
1255 struct uart_port *up = &serial_txx9_ports[i];
1256 if (up->iobase || up->mapbase)
1257 uart_remove_one_port(&serial_txx9_reg, up);
1258 }
1259
1260 uart_unregister_driver(&serial_txx9_reg);
1261}
1262
1263module_init(serial_txx9_init);
1264module_exit(serial_txx9_exit);
1265
1266MODULE_LICENSE("GPL");
1267MODULE_DESCRIPTION("TX39/49 serial driver");
1268
1269MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);