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1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * PCI Express Hot Plug Controller Driver
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7 * Copyright (C) 2001 IBM Corp.
8 * Copyright (C) 2003-2004 Intel Corporation
9 *
10 * All rights reserved.
11 *
12 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
13 *
14 */
15#ifndef _PCIEHP_H
16#define _PCIEHP_H
17
18#include <linux/types.h>
19#include <linux/pci.h>
20#include <linux/pci_hotplug.h>
21#include <linux/delay.h>
22#include <linux/sched/signal.h> /* signal_pending() */
23#include <linux/mutex.h>
24#include <linux/workqueue.h>
25
26#include "../pcie/portdrv.h"
27
28#define MY_NAME "pciehp"
29
30extern bool pciehp_poll_mode;
31extern int pciehp_poll_time;
32extern bool pciehp_debug;
33
34#define dbg(format, arg...) \
35do { \
36 if (pciehp_debug) \
37 printk(KERN_DEBUG "%s: " format, MY_NAME, ## arg); \
38} while (0)
39#define err(format, arg...) \
40 printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
41#define info(format, arg...) \
42 printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
43#define warn(format, arg...) \
44 printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
45
46#define ctrl_dbg(ctrl, format, arg...) \
47 do { \
48 if (pciehp_debug) \
49 dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
50 format, ## arg); \
51 } while (0)
52#define ctrl_err(ctrl, format, arg...) \
53 dev_err(&ctrl->pcie->device, format, ## arg)
54#define ctrl_info(ctrl, format, arg...) \
55 dev_info(&ctrl->pcie->device, format, ## arg)
56#define ctrl_warn(ctrl, format, arg...) \
57 dev_warn(&ctrl->pcie->device, format, ## arg)
58
59#define SLOT_NAME_SIZE 10
60struct slot {
61 u8 state;
62 struct controller *ctrl;
63 struct hotplug_slot *hotplug_slot;
64 struct delayed_work work; /* work for button event */
65 struct mutex lock;
66 struct mutex hotplug_lock;
67 struct workqueue_struct *wq;
68};
69
70struct event_info {
71 u32 event_type;
72 struct slot *p_slot;
73 struct work_struct work;
74};
75
76struct controller {
77 struct mutex ctrl_lock; /* controller lock */
78 struct pcie_device *pcie; /* PCI Express port service */
79 struct slot *slot;
80 wait_queue_head_t queue; /* sleep & wake process */
81 u32 slot_cap;
82 u16 slot_ctrl;
83 struct timer_list poll_timer;
84 unsigned long cmd_started; /* jiffies */
85 unsigned int cmd_busy:1;
86 unsigned int link_active_reporting:1;
87 unsigned int notification_enabled:1;
88 unsigned int power_fault_detected;
89};
90
91#define INT_PRESENCE_ON 1
92#define INT_PRESENCE_OFF 2
93#define INT_POWER_FAULT 3
94#define INT_BUTTON_PRESS 4
95#define INT_LINK_UP 5
96#define INT_LINK_DOWN 6
97
98#define STATIC_STATE 0
99#define BLINKINGON_STATE 1
100#define BLINKINGOFF_STATE 2
101#define POWERON_STATE 3
102#define POWEROFF_STATE 4
103
104#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
105#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
106#define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
107#define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
108#define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
109#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
110#define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
111#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
112#define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
113
114int pciehp_sysfs_enable_slot(struct slot *slot);
115int pciehp_sysfs_disable_slot(struct slot *slot);
116void pciehp_queue_interrupt_event(struct slot *slot, u32 event_type);
117int pciehp_configure_device(struct slot *p_slot);
118int pciehp_unconfigure_device(struct slot *p_slot);
119void pciehp_queue_pushbutton_work(struct work_struct *work);
120struct controller *pcie_init(struct pcie_device *dev);
121int pcie_init_notification(struct controller *ctrl);
122int pciehp_enable_slot(struct slot *p_slot);
123int pciehp_disable_slot(struct slot *p_slot);
124void pcie_enable_notification(struct controller *ctrl);
125int pciehp_power_on_slot(struct slot *slot);
126void pciehp_power_off_slot(struct slot *slot);
127void pciehp_get_power_status(struct slot *slot, u8 *status);
128void pciehp_get_attention_status(struct slot *slot, u8 *status);
129
130void pciehp_set_attention_status(struct slot *slot, u8 status);
131void pciehp_get_latch_status(struct slot *slot, u8 *status);
132void pciehp_get_adapter_status(struct slot *slot, u8 *status);
133int pciehp_query_power_fault(struct slot *slot);
134void pciehp_green_led_on(struct slot *slot);
135void pciehp_green_led_off(struct slot *slot);
136void pciehp_green_led_blink(struct slot *slot);
137int pciehp_check_link_status(struct controller *ctrl);
138bool pciehp_check_link_active(struct controller *ctrl);
139void pciehp_release_ctrl(struct controller *ctrl);
140int pciehp_reset_slot(struct slot *slot, int probe);
141
142int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
143int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
144
145static inline const char *slot_name(struct slot *slot)
146{
147 return hotplug_slot_name(slot->hotplug_slot);
148}
149
150#endif /* _PCIEHP_H */
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * PCI Express Hot Plug Controller Driver
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7 * Copyright (C) 2001 IBM Corp.
8 * Copyright (C) 2003-2004 Intel Corporation
9 *
10 * All rights reserved.
11 *
12 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
13 *
14 */
15#ifndef _PCIEHP_H
16#define _PCIEHP_H
17
18#include <linux/types.h>
19#include <linux/pci.h>
20#include <linux/pci_hotplug.h>
21#include <linux/delay.h>
22#include <linux/mutex.h>
23#include <linux/rwsem.h>
24#include <linux/workqueue.h>
25
26#include "../pcie/portdrv.h"
27
28extern bool pciehp_poll_mode;
29extern int pciehp_poll_time;
30
31/*
32 * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to
33 * enable debug messages.
34 */
35#define ctrl_dbg(ctrl, format, arg...) \
36 pci_dbg(ctrl->pcie->port, format, ## arg)
37#define ctrl_err(ctrl, format, arg...) \
38 pci_err(ctrl->pcie->port, format, ## arg)
39#define ctrl_info(ctrl, format, arg...) \
40 pci_info(ctrl->pcie->port, format, ## arg)
41#define ctrl_warn(ctrl, format, arg...) \
42 pci_warn(ctrl->pcie->port, format, ## arg)
43
44#define SLOT_NAME_SIZE 10
45
46/**
47 * struct controller - PCIe hotplug controller
48 * @pcie: pointer to the controller's PCIe port service device
49 * @slot_cap: cached copy of the Slot Capabilities register
50 * @inband_presence_disabled: In-Band Presence Detect Disable supported by
51 * controller and disabled per spec recommendation (PCIe r5.0, appendix I
52 * implementation note)
53 * @slot_ctrl: cached copy of the Slot Control register
54 * @ctrl_lock: serializes writes to the Slot Control register
55 * @cmd_started: jiffies when the Slot Control register was last written;
56 * the next write is allowed 1 second later, absent a Command Completed
57 * interrupt (PCIe r4.0, sec 6.7.3.2)
58 * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
59 * on reception of a Command Completed event
60 * @queue: wait queue to wake up on reception of a Command Completed event,
61 * used for synchronous writes to the Slot Control register
62 * @pending_events: used by the IRQ handler to save events retrieved from the
63 * Slot Status register for later consumption by the IRQ thread
64 * @notification_enabled: whether the IRQ was requested successfully
65 * @power_fault_detected: whether a power fault was detected by the hardware
66 * that has not yet been cleared by the user
67 * @poll_thread: thread to poll for slot events if no IRQ is available,
68 * enabled with pciehp_poll_mode module parameter
69 * @state: current state machine position
70 * @state_lock: protects reads and writes of @state;
71 * protects scheduling, execution and cancellation of @button_work
72 * @button_work: work item to turn the slot on or off after 5 seconds
73 * in response to an Attention Button press
74 * @hotplug_slot: structure registered with the PCI hotplug core
75 * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
76 * Link Status register and to the Presence Detect State bit in the Slot
77 * Status register during a slot reset which may cause them to flap
78 * @depth: Number of additional hotplug ports in the path to the root bus,
79 * used as lock subclass for @reset_lock
80 * @ist_running: flag to keep user request waiting while IRQ thread is running
81 * @request_result: result of last user request submitted to the IRQ thread
82 * @requester: wait queue to wake up on completion of user request,
83 * used for synchronous slot enable/disable request via sysfs
84 *
85 * PCIe hotplug has a 1:1 relationship between controller and slot, hence
86 * unlike other drivers, the two aren't represented by separate structures.
87 */
88struct controller {
89 struct pcie_device *pcie;
90
91 u32 slot_cap; /* capabilities and quirks */
92 unsigned int inband_presence_disabled:1;
93
94 u16 slot_ctrl; /* control register access */
95 struct mutex ctrl_lock;
96 unsigned long cmd_started;
97 unsigned int cmd_busy:1;
98 wait_queue_head_t queue;
99
100 atomic_t pending_events; /* event handling */
101 unsigned int notification_enabled:1;
102 unsigned int power_fault_detected;
103 struct task_struct *poll_thread;
104
105 u8 state; /* state machine */
106 struct mutex state_lock;
107 struct delayed_work button_work;
108
109 struct hotplug_slot hotplug_slot; /* hotplug core interface */
110 struct rw_semaphore reset_lock;
111 unsigned int depth;
112 unsigned int ist_running;
113 int request_result;
114 wait_queue_head_t requester;
115};
116
117/**
118 * DOC: Slot state
119 *
120 * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
121 * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
122 * Power Indicator is blinking
123 * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
124 * Power Indicator is blinking
125 * @POWERON_STATE: slot is currently powering on
126 * @POWEROFF_STATE: slot is currently powering off
127 * @ON_STATE: slot is powered on, subordinate devices have been enumerated
128 */
129#define OFF_STATE 0
130#define BLINKINGON_STATE 1
131#define BLINKINGOFF_STATE 2
132#define POWERON_STATE 3
133#define POWEROFF_STATE 4
134#define ON_STATE 5
135
136/**
137 * DOC: Flags to request an action from the IRQ thread
138 *
139 * These are stored together with events read from the Slot Status register,
140 * hence must be greater than its 16-bit width.
141 *
142 * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or
143 * an Attention Button press after the 5 second delay
144 * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the
145 * hotplug port was inaccessible when the interrupt occurred, requiring
146 * that the IRQ handler is rerun by the IRQ thread after it has made the
147 * hotplug port accessible by runtime resuming its parents to D0
148 */
149#define DISABLE_SLOT (1 << 16)
150#define RERUN_ISR (1 << 17)
151
152#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
153#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
154#define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
155#define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
156#define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
157#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
158#define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
159
160void pciehp_request(struct controller *ctrl, int action);
161void pciehp_handle_button_press(struct controller *ctrl);
162void pciehp_handle_disable_request(struct controller *ctrl);
163void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events);
164int pciehp_configure_device(struct controller *ctrl);
165void pciehp_unconfigure_device(struct controller *ctrl, bool presence);
166void pciehp_queue_pushbutton_work(struct work_struct *work);
167struct controller *pcie_init(struct pcie_device *dev);
168int pcie_init_notification(struct controller *ctrl);
169void pcie_shutdown_notification(struct controller *ctrl);
170void pcie_clear_hotplug_events(struct controller *ctrl);
171void pcie_enable_interrupt(struct controller *ctrl);
172void pcie_disable_interrupt(struct controller *ctrl);
173int pciehp_power_on_slot(struct controller *ctrl);
174void pciehp_power_off_slot(struct controller *ctrl);
175void pciehp_get_power_status(struct controller *ctrl, u8 *status);
176
177#define INDICATOR_NOOP -1 /* Leave indicator unchanged */
178void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
179
180void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
181int pciehp_query_power_fault(struct controller *ctrl);
182int pciehp_card_present(struct controller *ctrl);
183int pciehp_card_present_or_link_active(struct controller *ctrl);
184int pciehp_check_link_status(struct controller *ctrl);
185int pciehp_check_link_active(struct controller *ctrl);
186void pciehp_release_ctrl(struct controller *ctrl);
187
188int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot);
189int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot);
190int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, bool probe);
191int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status);
192int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
193int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
194
195int pciehp_slot_reset(struct pcie_device *dev);
196
197static inline const char *slot_name(struct controller *ctrl)
198{
199 return hotplug_slot_name(&ctrl->hotplug_slot);
200}
201
202static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot)
203{
204 return container_of(hotplug_slot, struct controller, hotplug_slot);
205}
206
207#endif /* _PCIEHP_H */