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1/*
2 * i.MX IPUv3 DP Overlay Planes
3 *
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <drm/drmP.h>
17#include <drm/drm_atomic.h>
18#include <drm/drm_atomic_helper.h>
19#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_gem_cma_helper.h>
21#include <drm/drm_gem_framebuffer_helper.h>
22#include <drm/drm_plane_helper.h>
23
24#include "video/imx-ipu-v3.h"
25#include "imx-drm.h"
26#include "ipuv3-plane.h"
27
28struct ipu_plane_state {
29 struct drm_plane_state base;
30 bool use_pre;
31};
32
33static inline struct ipu_plane_state *
34to_ipu_plane_state(struct drm_plane_state *p)
35{
36 return container_of(p, struct ipu_plane_state, base);
37}
38
39static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
40{
41 return container_of(p, struct ipu_plane, base);
42}
43
44static const uint32_t ipu_plane_formats[] = {
45 DRM_FORMAT_ARGB1555,
46 DRM_FORMAT_XRGB1555,
47 DRM_FORMAT_ABGR1555,
48 DRM_FORMAT_XBGR1555,
49 DRM_FORMAT_RGBA5551,
50 DRM_FORMAT_BGRA5551,
51 DRM_FORMAT_ARGB4444,
52 DRM_FORMAT_ARGB8888,
53 DRM_FORMAT_XRGB8888,
54 DRM_FORMAT_ABGR8888,
55 DRM_FORMAT_XBGR8888,
56 DRM_FORMAT_RGBA8888,
57 DRM_FORMAT_RGBX8888,
58 DRM_FORMAT_BGRA8888,
59 DRM_FORMAT_BGRX8888,
60 DRM_FORMAT_UYVY,
61 DRM_FORMAT_VYUY,
62 DRM_FORMAT_YUYV,
63 DRM_FORMAT_YVYU,
64 DRM_FORMAT_YUV420,
65 DRM_FORMAT_YVU420,
66 DRM_FORMAT_YUV422,
67 DRM_FORMAT_YVU422,
68 DRM_FORMAT_YUV444,
69 DRM_FORMAT_YVU444,
70 DRM_FORMAT_NV12,
71 DRM_FORMAT_NV16,
72 DRM_FORMAT_RGB565,
73 DRM_FORMAT_RGB565_A8,
74 DRM_FORMAT_BGR565_A8,
75 DRM_FORMAT_RGB888_A8,
76 DRM_FORMAT_BGR888_A8,
77 DRM_FORMAT_RGBX8888_A8,
78 DRM_FORMAT_BGRX8888_A8,
79};
80
81static const uint64_t ipu_format_modifiers[] = {
82 DRM_FORMAT_MOD_LINEAR,
83 DRM_FORMAT_MOD_INVALID
84};
85
86static const uint64_t pre_format_modifiers[] = {
87 DRM_FORMAT_MOD_LINEAR,
88 DRM_FORMAT_MOD_VIVANTE_TILED,
89 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
90 DRM_FORMAT_MOD_INVALID
91};
92
93int ipu_plane_irq(struct ipu_plane *ipu_plane)
94{
95 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
96 IPU_IRQ_EOF);
97}
98
99static inline unsigned long
100drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
101{
102 struct drm_framebuffer *fb = state->fb;
103 struct drm_gem_cma_object *cma_obj;
104 int x = state->src.x1 >> 16;
105 int y = state->src.y1 >> 16;
106
107 cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
108 BUG_ON(!cma_obj);
109
110 return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
111 fb->format->cpp[plane] * x;
112}
113
114static inline unsigned long
115drm_plane_state_to_ubo(struct drm_plane_state *state)
116{
117 struct drm_framebuffer *fb = state->fb;
118 struct drm_gem_cma_object *cma_obj;
119 unsigned long eba = drm_plane_state_to_eba(state, 0);
120 int x = state->src.x1 >> 16;
121 int y = state->src.y1 >> 16;
122
123 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
124 BUG_ON(!cma_obj);
125
126 x /= drm_format_horz_chroma_subsampling(fb->format->format);
127 y /= drm_format_vert_chroma_subsampling(fb->format->format);
128
129 return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
130 fb->format->cpp[1] * x - eba;
131}
132
133static inline unsigned long
134drm_plane_state_to_vbo(struct drm_plane_state *state)
135{
136 struct drm_framebuffer *fb = state->fb;
137 struct drm_gem_cma_object *cma_obj;
138 unsigned long eba = drm_plane_state_to_eba(state, 0);
139 int x = state->src.x1 >> 16;
140 int y = state->src.y1 >> 16;
141
142 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
143 BUG_ON(!cma_obj);
144
145 x /= drm_format_horz_chroma_subsampling(fb->format->format);
146 y /= drm_format_vert_chroma_subsampling(fb->format->format);
147
148 return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
149 fb->format->cpp[2] * x - eba;
150}
151
152void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
153{
154 if (!IS_ERR_OR_NULL(ipu_plane->dp))
155 ipu_dp_put(ipu_plane->dp);
156 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
157 ipu_dmfc_put(ipu_plane->dmfc);
158 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
159 ipu_idmac_put(ipu_plane->ipu_ch);
160 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
161 ipu_idmac_put(ipu_plane->alpha_ch);
162}
163
164int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
165{
166 int ret;
167 int alpha_ch;
168
169 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
170 if (IS_ERR(ipu_plane->ipu_ch)) {
171 ret = PTR_ERR(ipu_plane->ipu_ch);
172 DRM_ERROR("failed to get idmac channel: %d\n", ret);
173 return ret;
174 }
175
176 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
177 if (alpha_ch >= 0) {
178 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
179 if (IS_ERR(ipu_plane->alpha_ch)) {
180 ret = PTR_ERR(ipu_plane->alpha_ch);
181 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
182 alpha_ch, ret);
183 return ret;
184 }
185 }
186
187 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
188 if (IS_ERR(ipu_plane->dmfc)) {
189 ret = PTR_ERR(ipu_plane->dmfc);
190 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
191 goto err_out;
192 }
193
194 if (ipu_plane->dp_flow >= 0) {
195 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
196 if (IS_ERR(ipu_plane->dp)) {
197 ret = PTR_ERR(ipu_plane->dp);
198 DRM_ERROR("failed to get dp flow: %d\n", ret);
199 goto err_out;
200 }
201 }
202
203 return 0;
204err_out:
205 ipu_plane_put_resources(ipu_plane);
206
207 return ret;
208}
209
210static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
211{
212 switch (ipu_plane->base.state->fb->format->format) {
213 case DRM_FORMAT_RGB565_A8:
214 case DRM_FORMAT_BGR565_A8:
215 case DRM_FORMAT_RGB888_A8:
216 case DRM_FORMAT_BGR888_A8:
217 case DRM_FORMAT_RGBX8888_A8:
218 case DRM_FORMAT_BGRX8888_A8:
219 return true;
220 default:
221 return false;
222 }
223}
224
225static void ipu_plane_enable(struct ipu_plane *ipu_plane)
226{
227 if (ipu_plane->dp)
228 ipu_dp_enable(ipu_plane->ipu);
229 ipu_dmfc_enable_channel(ipu_plane->dmfc);
230 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
231 if (ipu_plane_separate_alpha(ipu_plane))
232 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
233 if (ipu_plane->dp)
234 ipu_dp_enable_channel(ipu_plane->dp);
235}
236
237void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
238{
239 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
240
241 ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
242
243 if (ipu_plane->dp && disable_dp_channel)
244 ipu_dp_disable_channel(ipu_plane->dp, false);
245 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
246 if (ipu_plane->alpha_ch)
247 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
248 ipu_dmfc_disable_channel(ipu_plane->dmfc);
249 if (ipu_plane->dp)
250 ipu_dp_disable(ipu_plane->ipu);
251 if (ipu_prg_present(ipu_plane->ipu))
252 ipu_prg_channel_disable(ipu_plane->ipu_ch);
253}
254
255void ipu_plane_disable_deferred(struct drm_plane *plane)
256{
257 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
258
259 if (ipu_plane->disabling) {
260 ipu_plane->disabling = false;
261 ipu_plane_disable(ipu_plane, false);
262 }
263}
264EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
265
266static void ipu_plane_destroy(struct drm_plane *plane)
267{
268 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
269
270 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
271
272 drm_plane_cleanup(plane);
273 kfree(ipu_plane);
274}
275
276static void ipu_plane_state_reset(struct drm_plane *plane)
277{
278 struct ipu_plane_state *ipu_state;
279
280 if (plane->state) {
281 ipu_state = to_ipu_plane_state(plane->state);
282 __drm_atomic_helper_plane_destroy_state(plane->state);
283 kfree(ipu_state);
284 }
285
286 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
287
288 if (ipu_state) {
289 ipu_state->base.plane = plane;
290 ipu_state->base.rotation = DRM_MODE_ROTATE_0;
291 }
292
293 plane->state = &ipu_state->base;
294}
295
296static struct drm_plane_state *
297ipu_plane_duplicate_state(struct drm_plane *plane)
298{
299 struct ipu_plane_state *state;
300
301 if (WARN_ON(!plane->state))
302 return NULL;
303
304 state = kmalloc(sizeof(*state), GFP_KERNEL);
305 if (state)
306 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
307
308 return &state->base;
309}
310
311static void ipu_plane_destroy_state(struct drm_plane *plane,
312 struct drm_plane_state *state)
313{
314 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
315
316 __drm_atomic_helper_plane_destroy_state(state);
317 kfree(ipu_state);
318}
319
320static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
321 uint32_t format, uint64_t modifier)
322{
323 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
324
325 /* linear is supported for all planes and formats */
326 if (modifier == DRM_FORMAT_MOD_LINEAR)
327 return true;
328
329 /* without a PRG there are no supported modifiers */
330 if (!ipu_prg_present(ipu))
331 return false;
332
333 return ipu_prg_format_supported(ipu, format, modifier);
334}
335
336static const struct drm_plane_funcs ipu_plane_funcs = {
337 .update_plane = drm_atomic_helper_update_plane,
338 .disable_plane = drm_atomic_helper_disable_plane,
339 .destroy = ipu_plane_destroy,
340 .reset = ipu_plane_state_reset,
341 .atomic_duplicate_state = ipu_plane_duplicate_state,
342 .atomic_destroy_state = ipu_plane_destroy_state,
343 .format_mod_supported = ipu_plane_format_mod_supported,
344};
345
346static int ipu_plane_atomic_check(struct drm_plane *plane,
347 struct drm_plane_state *state)
348{
349 struct drm_plane_state *old_state = plane->state;
350 struct drm_crtc_state *crtc_state;
351 struct device *dev = plane->dev->dev;
352 struct drm_framebuffer *fb = state->fb;
353 struct drm_framebuffer *old_fb = old_state->fb;
354 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
355 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
356 int hsub, vsub;
357 int ret;
358
359 /* Ok to disable */
360 if (!fb)
361 return 0;
362
363 if (!state->crtc)
364 return -EINVAL;
365
366 crtc_state =
367 drm_atomic_get_existing_crtc_state(state->state, state->crtc);
368 if (WARN_ON(!crtc_state))
369 return -EINVAL;
370
371 ret = drm_atomic_helper_check_plane_state(state, crtc_state,
372 DRM_PLANE_HELPER_NO_SCALING,
373 DRM_PLANE_HELPER_NO_SCALING,
374 can_position, true);
375 if (ret)
376 return ret;
377
378 /* CRTC should be enabled */
379 if (!crtc_state->enable)
380 return -EINVAL;
381
382 switch (plane->type) {
383 case DRM_PLANE_TYPE_PRIMARY:
384 /* full plane minimum width is 13 pixels */
385 if (drm_rect_width(&state->dst) < 13)
386 return -EINVAL;
387 break;
388 case DRM_PLANE_TYPE_OVERLAY:
389 break;
390 default:
391 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
392 return -EINVAL;
393 }
394
395 if (drm_rect_height(&state->dst) < 2)
396 return -EINVAL;
397
398 /*
399 * We support resizing active plane or changing its format by
400 * forcing CRTC mode change in plane's ->atomic_check callback
401 * and disabling all affected active planes in CRTC's ->atomic_disable
402 * callback. The planes will be reenabled in plane's ->atomic_update
403 * callback.
404 */
405 if (old_fb &&
406 (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
407 drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
408 fb->format != old_fb->format))
409 crtc_state->mode_changed = true;
410
411 eba = drm_plane_state_to_eba(state, 0);
412
413 if (eba & 0x7)
414 return -EINVAL;
415
416 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
417 return -EINVAL;
418
419 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
420 crtc_state->mode_changed = true;
421
422 switch (fb->format->format) {
423 case DRM_FORMAT_YUV420:
424 case DRM_FORMAT_YVU420:
425 case DRM_FORMAT_YUV422:
426 case DRM_FORMAT_YVU422:
427 case DRM_FORMAT_YUV444:
428 case DRM_FORMAT_YVU444:
429 /*
430 * Multiplanar formats have to meet the following restrictions:
431 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
432 * - EBA, UBO and VBO are a multiple of 8
433 * - UBO and VBO are unsigned and not larger than 0xfffff8
434 * - Only EBA may be changed while scanout is active
435 * - The strides of U and V planes must be identical.
436 */
437 vbo = drm_plane_state_to_vbo(state);
438
439 if (vbo & 0x7 || vbo > 0xfffff8)
440 return -EINVAL;
441
442 if (old_fb && (fb->format == old_fb->format)) {
443 old_vbo = drm_plane_state_to_vbo(old_state);
444 if (vbo != old_vbo)
445 crtc_state->mode_changed = true;
446 }
447
448 if (fb->pitches[1] != fb->pitches[2])
449 return -EINVAL;
450
451 /* fall-through */
452 case DRM_FORMAT_NV12:
453 case DRM_FORMAT_NV16:
454 ubo = drm_plane_state_to_ubo(state);
455
456 if (ubo & 0x7 || ubo > 0xfffff8)
457 return -EINVAL;
458
459 if (old_fb && (fb->format == old_fb->format)) {
460 old_ubo = drm_plane_state_to_ubo(old_state);
461 if (ubo != old_ubo)
462 crtc_state->mode_changed = true;
463 }
464
465 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
466 return -EINVAL;
467
468 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
469 crtc_state->mode_changed = true;
470
471 /*
472 * The x/y offsets must be even in case of horizontal/vertical
473 * chroma subsampling.
474 */
475 hsub = drm_format_horz_chroma_subsampling(fb->format->format);
476 vsub = drm_format_vert_chroma_subsampling(fb->format->format);
477 if (((state->src.x1 >> 16) & (hsub - 1)) ||
478 ((state->src.y1 >> 16) & (vsub - 1)))
479 return -EINVAL;
480 break;
481 case DRM_FORMAT_RGB565_A8:
482 case DRM_FORMAT_BGR565_A8:
483 case DRM_FORMAT_RGB888_A8:
484 case DRM_FORMAT_BGR888_A8:
485 case DRM_FORMAT_RGBX8888_A8:
486 case DRM_FORMAT_BGRX8888_A8:
487 alpha_eba = drm_plane_state_to_eba(state, 1);
488 if (alpha_eba & 0x7)
489 return -EINVAL;
490
491 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
492 return -EINVAL;
493
494 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
495 crtc_state->mode_changed = true;
496 break;
497 }
498
499 return 0;
500}
501
502static void ipu_plane_atomic_disable(struct drm_plane *plane,
503 struct drm_plane_state *old_state)
504{
505 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
506
507 if (ipu_plane->dp)
508 ipu_dp_disable_channel(ipu_plane->dp, true);
509 ipu_plane->disabling = true;
510}
511
512static int ipu_chan_assign_axi_id(int ipu_chan)
513{
514 switch (ipu_chan) {
515 case IPUV3_CHANNEL_MEM_BG_SYNC:
516 return 1;
517 case IPUV3_CHANNEL_MEM_FG_SYNC:
518 return 2;
519 case IPUV3_CHANNEL_MEM_DC_SYNC:
520 return 3;
521 default:
522 return 0;
523 }
524}
525
526static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
527 u8 *burstsize, u8 *num_bursts)
528{
529 const unsigned int width_bytes = width * cpp;
530 unsigned int npb, bursts;
531
532 /* Maximum number of pixels per burst without overshooting stride */
533 for (npb = 64 / cpp; npb > 0; --npb) {
534 if (round_up(width_bytes, npb * cpp) <= stride)
535 break;
536 }
537 *burstsize = npb;
538
539 /* Maximum number of consecutive bursts without overshooting stride */
540 for (bursts = 8; bursts > 1; bursts /= 2) {
541 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
542 break;
543 }
544 *num_bursts = bursts;
545}
546
547static void ipu_plane_atomic_update(struct drm_plane *plane,
548 struct drm_plane_state *old_state)
549{
550 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
551 struct drm_plane_state *state = plane->state;
552 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
553 struct drm_crtc_state *crtc_state = state->crtc->state;
554 struct drm_framebuffer *fb = state->fb;
555 struct drm_rect *dst = &state->dst;
556 unsigned long eba, ubo, vbo;
557 unsigned long alpha_eba = 0;
558 enum ipu_color_space ics;
559 unsigned int axi_id = 0;
560 const struct drm_format_info *info;
561 u8 burstsize, num_bursts;
562 u32 width, height;
563 int active;
564
565 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
566 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
567
568 eba = drm_plane_state_to_eba(state, 0);
569
570 /*
571 * Configure PRG channel and attached PRE, this changes the EBA to an
572 * internal SRAM location.
573 */
574 if (ipu_state->use_pre) {
575 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
576 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
577 drm_rect_width(&state->src) >> 16,
578 drm_rect_height(&state->src) >> 16,
579 fb->pitches[0], fb->format->format,
580 fb->modifier, &eba);
581 }
582
583 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
584 /* nothing to do if PRE is used */
585 if (ipu_state->use_pre)
586 return;
587 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
588 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
589 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
590 if (ipu_plane_separate_alpha(ipu_plane)) {
591 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
592 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
593 alpha_eba);
594 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
595 }
596 return;
597 }
598
599 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
600 switch (ipu_plane->dp_flow) {
601 case IPU_DP_FLOW_SYNC_BG:
602 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
603 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
604 break;
605 case IPU_DP_FLOW_SYNC_FG:
606 ipu_dp_setup_channel(ipu_plane->dp, ics,
607 IPUV3_COLORSPACE_UNKNOWN);
608 /* Enable local alpha on partial plane */
609 switch (fb->format->format) {
610 case DRM_FORMAT_ARGB1555:
611 case DRM_FORMAT_ABGR1555:
612 case DRM_FORMAT_RGBA5551:
613 case DRM_FORMAT_BGRA5551:
614 case DRM_FORMAT_ARGB4444:
615 case DRM_FORMAT_ARGB8888:
616 case DRM_FORMAT_ABGR8888:
617 case DRM_FORMAT_RGBA8888:
618 case DRM_FORMAT_BGRA8888:
619 case DRM_FORMAT_RGB565_A8:
620 case DRM_FORMAT_BGR565_A8:
621 case DRM_FORMAT_RGB888_A8:
622 case DRM_FORMAT_BGR888_A8:
623 case DRM_FORMAT_RGBX8888_A8:
624 case DRM_FORMAT_BGRX8888_A8:
625 ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
626 break;
627 default:
628 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
629 break;
630 }
631 }
632
633 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
634
635 width = drm_rect_width(&state->src) >> 16;
636 height = drm_rect_height(&state->src) >> 16;
637 info = drm_format_info(fb->format->format);
638 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
639 &burstsize, &num_bursts);
640
641 ipu_cpmem_zero(ipu_plane->ipu_ch);
642 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
643 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
644 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
645 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
646 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
647 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
648 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
649
650 switch (fb->format->format) {
651 case DRM_FORMAT_YUV420:
652 case DRM_FORMAT_YVU420:
653 case DRM_FORMAT_YUV422:
654 case DRM_FORMAT_YVU422:
655 case DRM_FORMAT_YUV444:
656 case DRM_FORMAT_YVU444:
657 ubo = drm_plane_state_to_ubo(state);
658 vbo = drm_plane_state_to_vbo(state);
659 if (fb->format->format == DRM_FORMAT_YVU420 ||
660 fb->format->format == DRM_FORMAT_YVU422 ||
661 fb->format->format == DRM_FORMAT_YVU444)
662 swap(ubo, vbo);
663
664 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
665 fb->pitches[1], ubo, vbo);
666
667 dev_dbg(ipu_plane->base.dev->dev,
668 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
669 state->src.x1 >> 16, state->src.y1 >> 16);
670 break;
671 case DRM_FORMAT_NV12:
672 case DRM_FORMAT_NV16:
673 ubo = drm_plane_state_to_ubo(state);
674
675 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
676 fb->pitches[1], ubo, ubo);
677
678 dev_dbg(ipu_plane->base.dev->dev,
679 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
680 state->src.x1 >> 16, state->src.y1 >> 16);
681 break;
682 case DRM_FORMAT_RGB565_A8:
683 case DRM_FORMAT_BGR565_A8:
684 case DRM_FORMAT_RGB888_A8:
685 case DRM_FORMAT_BGR888_A8:
686 case DRM_FORMAT_RGBX8888_A8:
687 case DRM_FORMAT_BGRX8888_A8:
688 alpha_eba = drm_plane_state_to_eba(state, 1);
689 num_bursts = 0;
690
691 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
692 eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
693
694 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
695
696 ipu_cpmem_zero(ipu_plane->alpha_ch);
697 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
698 drm_rect_width(&state->src) >> 16,
699 drm_rect_height(&state->src) >> 16);
700 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
701 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
702 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
703 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
704 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
705 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
706 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
707 break;
708 default:
709 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
710 eba, state->src.x1 >> 16, state->src.y1 >> 16);
711 break;
712 }
713 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
714 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
715 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
716 ipu_plane_enable(ipu_plane);
717}
718
719static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
720 .prepare_fb = drm_gem_fb_prepare_fb,
721 .atomic_check = ipu_plane_atomic_check,
722 .atomic_disable = ipu_plane_atomic_disable,
723 .atomic_update = ipu_plane_atomic_update,
724};
725
726int ipu_planes_assign_pre(struct drm_device *dev,
727 struct drm_atomic_state *state)
728{
729 struct drm_crtc_state *old_crtc_state, *crtc_state;
730 struct drm_plane_state *plane_state;
731 struct ipu_plane_state *ipu_state;
732 struct ipu_plane *ipu_plane;
733 struct drm_plane *plane;
734 struct drm_crtc *crtc;
735 int available_pres = ipu_prg_max_active_channels();
736 int ret, i;
737
738 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
739 ret = drm_atomic_add_affected_planes(state, crtc);
740 if (ret)
741 return ret;
742 }
743
744 /*
745 * We are going over the planes in 2 passes: first we assign PREs to
746 * planes with a tiling modifier, which need the PREs to resolve into
747 * linear. Any failure to assign a PRE there is fatal. In the second
748 * pass we try to assign PREs to linear FBs, to improve memory access
749 * patterns for them. Failure at this point is non-fatal, as we can
750 * scan out linear FBs without a PRE.
751 */
752 for_each_new_plane_in_state(state, plane, plane_state, i) {
753 ipu_state = to_ipu_plane_state(plane_state);
754 ipu_plane = to_ipu_plane(plane);
755
756 if (!plane_state->fb) {
757 ipu_state->use_pre = false;
758 continue;
759 }
760
761 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
762 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
763 continue;
764
765 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
766 return -EINVAL;
767
768 if (!ipu_prg_format_supported(ipu_plane->ipu,
769 plane_state->fb->format->format,
770 plane_state->fb->modifier))
771 return -EINVAL;
772
773 ipu_state->use_pre = true;
774 available_pres--;
775 }
776
777 for_each_new_plane_in_state(state, plane, plane_state, i) {
778 ipu_state = to_ipu_plane_state(plane_state);
779 ipu_plane = to_ipu_plane(plane);
780
781 if (!plane_state->fb) {
782 ipu_state->use_pre = false;
783 continue;
784 }
785
786 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
787 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
788 continue;
789
790 /* make sure that modifier is initialized */
791 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
792
793 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
794 ipu_prg_format_supported(ipu_plane->ipu,
795 plane_state->fb->format->format,
796 plane_state->fb->modifier)) {
797 ipu_state->use_pre = true;
798 available_pres--;
799 } else {
800 ipu_state->use_pre = false;
801 }
802 }
803
804 return 0;
805}
806EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
807
808struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
809 int dma, int dp, unsigned int possible_crtcs,
810 enum drm_plane_type type)
811{
812 struct ipu_plane *ipu_plane;
813 const uint64_t *modifiers = ipu_format_modifiers;
814 int ret;
815
816 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
817 dma, dp, possible_crtcs);
818
819 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
820 if (!ipu_plane) {
821 DRM_ERROR("failed to allocate plane\n");
822 return ERR_PTR(-ENOMEM);
823 }
824
825 ipu_plane->ipu = ipu;
826 ipu_plane->dma = dma;
827 ipu_plane->dp_flow = dp;
828
829 if (ipu_prg_present(ipu))
830 modifiers = pre_format_modifiers;
831
832 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
833 &ipu_plane_funcs, ipu_plane_formats,
834 ARRAY_SIZE(ipu_plane_formats),
835 modifiers, type, NULL);
836 if (ret) {
837 DRM_ERROR("failed to initialize plane\n");
838 kfree(ipu_plane);
839 return ERR_PTR(ret);
840 }
841
842 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
843
844 return ipu_plane;
845}
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * i.MX IPUv3 DP Overlay Planes
4 *
5 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 */
7
8#include <drm/drm_atomic.h>
9#include <drm/drm_atomic_helper.h>
10#include <drm/drm_blend.h>
11#include <drm/drm_fb_dma_helper.h>
12#include <drm/drm_fourcc.h>
13#include <drm/drm_framebuffer.h>
14#include <drm/drm_gem_atomic_helper.h>
15#include <drm/drm_gem_dma_helper.h>
16#include <drm/drm_managed.h>
17
18#include <video/imx-ipu-v3.h>
19
20#include "imx-drm.h"
21#include "ipuv3-plane.h"
22
23struct ipu_plane_state {
24 struct drm_plane_state base;
25 bool use_pre;
26};
27
28static inline struct ipu_plane_state *
29to_ipu_plane_state(struct drm_plane_state *p)
30{
31 return container_of(p, struct ipu_plane_state, base);
32}
33
34static unsigned int ipu_src_rect_width(const struct drm_plane_state *state)
35{
36 return ALIGN(drm_rect_width(&state->src) >> 16, 8);
37}
38
39static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
40{
41 return container_of(p, struct ipu_plane, base);
42}
43
44static const uint32_t ipu_plane_all_formats[] = {
45 DRM_FORMAT_ARGB1555,
46 DRM_FORMAT_XRGB1555,
47 DRM_FORMAT_ABGR1555,
48 DRM_FORMAT_XBGR1555,
49 DRM_FORMAT_RGBA5551,
50 DRM_FORMAT_BGRA5551,
51 DRM_FORMAT_ARGB4444,
52 DRM_FORMAT_ARGB8888,
53 DRM_FORMAT_XRGB8888,
54 DRM_FORMAT_ABGR8888,
55 DRM_FORMAT_XBGR8888,
56 DRM_FORMAT_RGBA8888,
57 DRM_FORMAT_RGBX8888,
58 DRM_FORMAT_BGRA8888,
59 DRM_FORMAT_BGRX8888,
60 DRM_FORMAT_UYVY,
61 DRM_FORMAT_VYUY,
62 DRM_FORMAT_YUYV,
63 DRM_FORMAT_YVYU,
64 DRM_FORMAT_YUV420,
65 DRM_FORMAT_YVU420,
66 DRM_FORMAT_YUV422,
67 DRM_FORMAT_YVU422,
68 DRM_FORMAT_YUV444,
69 DRM_FORMAT_YVU444,
70 DRM_FORMAT_NV12,
71 DRM_FORMAT_NV16,
72 DRM_FORMAT_RGB565,
73 DRM_FORMAT_RGB565_A8,
74 DRM_FORMAT_BGR565_A8,
75 DRM_FORMAT_RGB888_A8,
76 DRM_FORMAT_BGR888_A8,
77 DRM_FORMAT_RGBX8888_A8,
78 DRM_FORMAT_BGRX8888_A8,
79};
80
81static const uint32_t ipu_plane_rgb_formats[] = {
82 DRM_FORMAT_ARGB1555,
83 DRM_FORMAT_XRGB1555,
84 DRM_FORMAT_ABGR1555,
85 DRM_FORMAT_XBGR1555,
86 DRM_FORMAT_RGBA5551,
87 DRM_FORMAT_BGRA5551,
88 DRM_FORMAT_ARGB4444,
89 DRM_FORMAT_ARGB8888,
90 DRM_FORMAT_XRGB8888,
91 DRM_FORMAT_ABGR8888,
92 DRM_FORMAT_XBGR8888,
93 DRM_FORMAT_RGBA8888,
94 DRM_FORMAT_RGBX8888,
95 DRM_FORMAT_BGRA8888,
96 DRM_FORMAT_BGRX8888,
97 DRM_FORMAT_RGB565,
98 DRM_FORMAT_RGB565_A8,
99 DRM_FORMAT_BGR565_A8,
100 DRM_FORMAT_RGB888_A8,
101 DRM_FORMAT_BGR888_A8,
102 DRM_FORMAT_RGBX8888_A8,
103 DRM_FORMAT_BGRX8888_A8,
104};
105
106static const uint64_t ipu_format_modifiers[] = {
107 DRM_FORMAT_MOD_LINEAR,
108 DRM_FORMAT_MOD_INVALID
109};
110
111static const uint64_t pre_format_modifiers[] = {
112 DRM_FORMAT_MOD_LINEAR,
113 DRM_FORMAT_MOD_VIVANTE_TILED,
114 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
115 DRM_FORMAT_MOD_INVALID
116};
117
118int ipu_plane_irq(struct ipu_plane *ipu_plane)
119{
120 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
121 IPU_IRQ_EOF);
122}
123
124static inline unsigned long
125drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
126{
127 struct drm_framebuffer *fb = state->fb;
128 struct drm_gem_dma_object *dma_obj;
129 int x = state->src.x1 >> 16;
130 int y = state->src.y1 >> 16;
131
132 dma_obj = drm_fb_dma_get_gem_obj(fb, plane);
133 BUG_ON(!dma_obj);
134
135 return dma_obj->dma_addr + fb->offsets[plane] + fb->pitches[plane] * y +
136 fb->format->cpp[plane] * x;
137}
138
139static inline unsigned long
140drm_plane_state_to_ubo(struct drm_plane_state *state)
141{
142 struct drm_framebuffer *fb = state->fb;
143 struct drm_gem_dma_object *dma_obj;
144 unsigned long eba = drm_plane_state_to_eba(state, 0);
145 int x = state->src.x1 >> 16;
146 int y = state->src.y1 >> 16;
147
148 dma_obj = drm_fb_dma_get_gem_obj(fb, 1);
149 BUG_ON(!dma_obj);
150
151 x /= fb->format->hsub;
152 y /= fb->format->vsub;
153
154 return dma_obj->dma_addr + fb->offsets[1] + fb->pitches[1] * y +
155 fb->format->cpp[1] * x - eba;
156}
157
158static inline unsigned long
159drm_plane_state_to_vbo(struct drm_plane_state *state)
160{
161 struct drm_framebuffer *fb = state->fb;
162 struct drm_gem_dma_object *dma_obj;
163 unsigned long eba = drm_plane_state_to_eba(state, 0);
164 int x = state->src.x1 >> 16;
165 int y = state->src.y1 >> 16;
166
167 dma_obj = drm_fb_dma_get_gem_obj(fb, 2);
168 BUG_ON(!dma_obj);
169
170 x /= fb->format->hsub;
171 y /= fb->format->vsub;
172
173 return dma_obj->dma_addr + fb->offsets[2] + fb->pitches[2] * y +
174 fb->format->cpp[2] * x - eba;
175}
176
177static void ipu_plane_put_resources(struct drm_device *dev, void *ptr)
178{
179 struct ipu_plane *ipu_plane = ptr;
180
181 if (!IS_ERR_OR_NULL(ipu_plane->dp))
182 ipu_dp_put(ipu_plane->dp);
183 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
184 ipu_dmfc_put(ipu_plane->dmfc);
185 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
186 ipu_idmac_put(ipu_plane->ipu_ch);
187 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
188 ipu_idmac_put(ipu_plane->alpha_ch);
189}
190
191static int ipu_plane_get_resources(struct drm_device *dev,
192 struct ipu_plane *ipu_plane)
193{
194 int ret;
195 int alpha_ch;
196
197 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
198 if (IS_ERR(ipu_plane->ipu_ch)) {
199 ret = PTR_ERR(ipu_plane->ipu_ch);
200 DRM_ERROR("failed to get idmac channel: %d\n", ret);
201 return ret;
202 }
203
204 ret = drmm_add_action_or_reset(dev, ipu_plane_put_resources, ipu_plane);
205 if (ret)
206 return ret;
207
208 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
209 if (alpha_ch >= 0) {
210 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
211 if (IS_ERR(ipu_plane->alpha_ch)) {
212 ret = PTR_ERR(ipu_plane->alpha_ch);
213 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
214 alpha_ch, ret);
215 return ret;
216 }
217 }
218
219 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
220 if (IS_ERR(ipu_plane->dmfc)) {
221 ret = PTR_ERR(ipu_plane->dmfc);
222 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
223 return ret;
224 }
225
226 if (ipu_plane->dp_flow >= 0) {
227 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
228 if (IS_ERR(ipu_plane->dp)) {
229 ret = PTR_ERR(ipu_plane->dp);
230 DRM_ERROR("failed to get dp flow: %d\n", ret);
231 return ret;
232 }
233 }
234
235 return 0;
236}
237
238static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
239{
240 switch (ipu_plane->base.state->fb->format->format) {
241 case DRM_FORMAT_RGB565_A8:
242 case DRM_FORMAT_BGR565_A8:
243 case DRM_FORMAT_RGB888_A8:
244 case DRM_FORMAT_BGR888_A8:
245 case DRM_FORMAT_RGBX8888_A8:
246 case DRM_FORMAT_BGRX8888_A8:
247 return true;
248 default:
249 return false;
250 }
251}
252
253static void ipu_plane_enable(struct ipu_plane *ipu_plane)
254{
255 if (ipu_plane->dp)
256 ipu_dp_enable(ipu_plane->ipu);
257 ipu_dmfc_enable_channel(ipu_plane->dmfc);
258 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
259 if (ipu_plane_separate_alpha(ipu_plane))
260 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
261 if (ipu_plane->dp)
262 ipu_dp_enable_channel(ipu_plane->dp);
263}
264
265void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
266{
267 int ret;
268
269 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
270
271 ret = ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
272 if (ret == -ETIMEDOUT) {
273 DRM_ERROR("[PLANE:%d] IDMAC timeout\n",
274 ipu_plane->base.base.id);
275 }
276
277 if (ipu_plane->dp && disable_dp_channel)
278 ipu_dp_disable_channel(ipu_plane->dp, false);
279 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
280 if (ipu_plane->alpha_ch)
281 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
282 ipu_dmfc_disable_channel(ipu_plane->dmfc);
283 if (ipu_plane->dp)
284 ipu_dp_disable(ipu_plane->ipu);
285 if (ipu_prg_present(ipu_plane->ipu))
286 ipu_prg_channel_disable(ipu_plane->ipu_ch);
287}
288
289void ipu_plane_disable_deferred(struct drm_plane *plane)
290{
291 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
292
293 if (ipu_plane->disabling) {
294 ipu_plane->disabling = false;
295 ipu_plane_disable(ipu_plane, false);
296 }
297}
298
299static void ipu_plane_state_reset(struct drm_plane *plane)
300{
301 struct ipu_plane_state *ipu_state;
302
303 if (plane->state) {
304 ipu_state = to_ipu_plane_state(plane->state);
305 __drm_atomic_helper_plane_destroy_state(plane->state);
306 kfree(ipu_state);
307 plane->state = NULL;
308 }
309
310 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
311
312 if (ipu_state)
313 __drm_atomic_helper_plane_reset(plane, &ipu_state->base);
314}
315
316static struct drm_plane_state *
317ipu_plane_duplicate_state(struct drm_plane *plane)
318{
319 struct ipu_plane_state *state;
320
321 if (WARN_ON(!plane->state))
322 return NULL;
323
324 state = kmalloc(sizeof(*state), GFP_KERNEL);
325 if (state)
326 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
327
328 return &state->base;
329}
330
331static void ipu_plane_destroy_state(struct drm_plane *plane,
332 struct drm_plane_state *state)
333{
334 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
335
336 __drm_atomic_helper_plane_destroy_state(state);
337 kfree(ipu_state);
338}
339
340static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
341 uint32_t format, uint64_t modifier)
342{
343 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
344
345 /* linear is supported for all planes and formats */
346 if (modifier == DRM_FORMAT_MOD_LINEAR)
347 return true;
348
349 /*
350 * Without a PRG the possible modifiers list only includes the linear
351 * modifier, so we always take the early return from this function and
352 * only end up here if the PRG is present.
353 */
354 return ipu_prg_format_supported(ipu, format, modifier);
355}
356
357static const struct drm_plane_funcs ipu_plane_funcs = {
358 .update_plane = drm_atomic_helper_update_plane,
359 .disable_plane = drm_atomic_helper_disable_plane,
360 .reset = ipu_plane_state_reset,
361 .atomic_duplicate_state = ipu_plane_duplicate_state,
362 .atomic_destroy_state = ipu_plane_destroy_state,
363 .format_mod_supported = ipu_plane_format_mod_supported,
364};
365
366static int ipu_plane_atomic_check(struct drm_plane *plane,
367 struct drm_atomic_state *state)
368{
369 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
370 plane);
371 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
372 plane);
373 struct drm_crtc_state *crtc_state;
374 struct device *dev = plane->dev->dev;
375 struct drm_framebuffer *fb = new_state->fb;
376 struct drm_framebuffer *old_fb = old_state->fb;
377 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
378 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
379 int ret;
380
381 /* Ok to disable */
382 if (!fb)
383 return 0;
384
385 if (WARN_ON(!new_state->crtc))
386 return -EINVAL;
387
388 crtc_state =
389 drm_atomic_get_existing_crtc_state(state,
390 new_state->crtc);
391 if (WARN_ON(!crtc_state))
392 return -EINVAL;
393
394 ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
395 DRM_PLANE_NO_SCALING,
396 DRM_PLANE_NO_SCALING,
397 can_position, true);
398 if (ret)
399 return ret;
400
401 /* nothing to check when disabling or disabled */
402 if (!crtc_state->enable)
403 return 0;
404
405 switch (plane->type) {
406 case DRM_PLANE_TYPE_PRIMARY:
407 /* full plane minimum width is 13 pixels */
408 if (drm_rect_width(&new_state->dst) < 13)
409 return -EINVAL;
410 break;
411 case DRM_PLANE_TYPE_OVERLAY:
412 break;
413 default:
414 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
415 return -EINVAL;
416 }
417
418 if (drm_rect_height(&new_state->dst) < 2)
419 return -EINVAL;
420
421 /*
422 * We support resizing active plane or changing its format by
423 * forcing CRTC mode change in plane's ->atomic_check callback
424 * and disabling all affected active planes in CRTC's ->atomic_disable
425 * callback. The planes will be reenabled in plane's ->atomic_update
426 * callback.
427 */
428 if (old_fb &&
429 (drm_rect_width(&new_state->dst) != drm_rect_width(&old_state->dst) ||
430 drm_rect_height(&new_state->dst) != drm_rect_height(&old_state->dst) ||
431 fb->format != old_fb->format))
432 crtc_state->mode_changed = true;
433
434 eba = drm_plane_state_to_eba(new_state, 0);
435
436 if (eba & 0x7)
437 return -EINVAL;
438
439 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
440 return -EINVAL;
441
442 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
443 crtc_state->mode_changed = true;
444
445 if (ALIGN(fb->width, 8) * fb->format->cpp[0] >
446 fb->pitches[0] + fb->offsets[0]) {
447 dev_warn(dev, "pitch is not big enough for 8 pixels alignment");
448 return -EINVAL;
449 }
450
451 switch (fb->format->format) {
452 case DRM_FORMAT_YUV420:
453 case DRM_FORMAT_YVU420:
454 case DRM_FORMAT_YUV422:
455 case DRM_FORMAT_YVU422:
456 case DRM_FORMAT_YUV444:
457 case DRM_FORMAT_YVU444:
458 /*
459 * Multiplanar formats have to meet the following restrictions:
460 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
461 * - EBA, UBO and VBO are a multiple of 8
462 * - UBO and VBO are unsigned and not larger than 0xfffff8
463 * - Only EBA may be changed while scanout is active
464 * - The strides of U and V planes must be identical.
465 */
466 vbo = drm_plane_state_to_vbo(new_state);
467
468 if (vbo & 0x7 || vbo > 0xfffff8)
469 return -EINVAL;
470
471 if (old_fb && (fb->format == old_fb->format)) {
472 old_vbo = drm_plane_state_to_vbo(old_state);
473 if (vbo != old_vbo)
474 crtc_state->mode_changed = true;
475 }
476
477 if (fb->pitches[1] != fb->pitches[2])
478 return -EINVAL;
479
480 fallthrough;
481 case DRM_FORMAT_NV12:
482 case DRM_FORMAT_NV16:
483 ubo = drm_plane_state_to_ubo(new_state);
484
485 if (ubo & 0x7 || ubo > 0xfffff8)
486 return -EINVAL;
487
488 if (old_fb && (fb->format == old_fb->format)) {
489 old_ubo = drm_plane_state_to_ubo(old_state);
490 if (ubo != old_ubo)
491 crtc_state->mode_changed = true;
492 }
493
494 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
495 return -EINVAL;
496
497 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
498 crtc_state->mode_changed = true;
499
500 /*
501 * The x/y offsets must be even in case of horizontal/vertical
502 * chroma subsampling.
503 */
504 if (((new_state->src.x1 >> 16) & (fb->format->hsub - 1)) ||
505 ((new_state->src.y1 >> 16) & (fb->format->vsub - 1)))
506 return -EINVAL;
507 break;
508 case DRM_FORMAT_RGB565_A8:
509 case DRM_FORMAT_BGR565_A8:
510 case DRM_FORMAT_RGB888_A8:
511 case DRM_FORMAT_BGR888_A8:
512 case DRM_FORMAT_RGBX8888_A8:
513 case DRM_FORMAT_BGRX8888_A8:
514 alpha_eba = drm_plane_state_to_eba(new_state, 1);
515 if (alpha_eba & 0x7)
516 return -EINVAL;
517
518 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
519 return -EINVAL;
520
521 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
522 crtc_state->mode_changed = true;
523 break;
524 }
525
526 return 0;
527}
528
529static void ipu_plane_atomic_disable(struct drm_plane *plane,
530 struct drm_atomic_state *state)
531{
532 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
533
534 if (ipu_plane->dp)
535 ipu_dp_disable_channel(ipu_plane->dp, true);
536 ipu_plane->disabling = true;
537}
538
539static int ipu_chan_assign_axi_id(int ipu_chan)
540{
541 switch (ipu_chan) {
542 case IPUV3_CHANNEL_MEM_BG_SYNC:
543 return 1;
544 case IPUV3_CHANNEL_MEM_FG_SYNC:
545 return 2;
546 case IPUV3_CHANNEL_MEM_DC_SYNC:
547 return 3;
548 default:
549 return 0;
550 }
551}
552
553static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
554 u8 *burstsize, u8 *num_bursts)
555{
556 const unsigned int width_bytes = width * cpp;
557 unsigned int npb, bursts;
558
559 /* Maximum number of pixels per burst without overshooting stride */
560 for (npb = 64 / cpp; npb > 0; --npb) {
561 if (round_up(width_bytes, npb * cpp) <= stride)
562 break;
563 }
564 *burstsize = npb;
565
566 /* Maximum number of consecutive bursts without overshooting stride */
567 for (bursts = 8; bursts > 1; bursts /= 2) {
568 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
569 break;
570 }
571 *num_bursts = bursts;
572}
573
574static void ipu_plane_atomic_update(struct drm_plane *plane,
575 struct drm_atomic_state *state)
576{
577 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
578 plane);
579 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
580 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
581 plane);
582 struct ipu_plane_state *ipu_state = to_ipu_plane_state(new_state);
583 struct drm_crtc_state *crtc_state = new_state->crtc->state;
584 struct drm_framebuffer *fb = new_state->fb;
585 struct drm_rect *dst = &new_state->dst;
586 unsigned long eba, ubo, vbo;
587 unsigned long alpha_eba = 0;
588 enum ipu_color_space ics;
589 unsigned int axi_id = 0;
590 const struct drm_format_info *info;
591 u8 burstsize, num_bursts;
592 u32 width, height;
593 int active;
594
595 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
596 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
597
598 switch (ipu_plane->dp_flow) {
599 case IPU_DP_FLOW_SYNC_BG:
600 if (new_state->normalized_zpos == 1) {
601 ipu_dp_set_global_alpha(ipu_plane->dp,
602 !fb->format->has_alpha, 0xff,
603 true);
604 } else {
605 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
606 }
607 break;
608 case IPU_DP_FLOW_SYNC_FG:
609 if (new_state->normalized_zpos == 1) {
610 ipu_dp_set_global_alpha(ipu_plane->dp,
611 !fb->format->has_alpha, 0xff,
612 false);
613 }
614 break;
615 }
616
617 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_BG)
618 width = ipu_src_rect_width(new_state);
619 else
620 width = drm_rect_width(&new_state->src) >> 16;
621
622 eba = drm_plane_state_to_eba(new_state, 0);
623
624 /*
625 * Configure PRG channel and attached PRE, this changes the EBA to an
626 * internal SRAM location.
627 */
628 if (ipu_state->use_pre) {
629 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
630 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id, width,
631 drm_rect_height(&new_state->src) >> 16,
632 fb->pitches[0], fb->format->format,
633 fb->modifier, &eba);
634 }
635
636 if (!old_state->fb ||
637 old_state->fb->format->format != fb->format->format ||
638 old_state->color_encoding != new_state->color_encoding ||
639 old_state->color_range != new_state->color_range) {
640 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
641 switch (ipu_plane->dp_flow) {
642 case IPU_DP_FLOW_SYNC_BG:
643 ipu_dp_setup_channel(ipu_plane->dp, new_state->color_encoding,
644 new_state->color_range, ics,
645 IPUV3_COLORSPACE_RGB);
646 break;
647 case IPU_DP_FLOW_SYNC_FG:
648 ipu_dp_setup_channel(ipu_plane->dp, new_state->color_encoding,
649 new_state->color_range, ics,
650 IPUV3_COLORSPACE_UNKNOWN);
651 break;
652 }
653 }
654
655 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
656 /* nothing to do if PRE is used */
657 if (ipu_state->use_pre)
658 return;
659 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
660 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
661 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
662 if (ipu_plane_separate_alpha(ipu_plane)) {
663 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
664 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
665 alpha_eba);
666 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
667 }
668 return;
669 }
670
671 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
672 switch (ipu_plane->dp_flow) {
673 case IPU_DP_FLOW_SYNC_BG:
674 ipu_dp_setup_channel(ipu_plane->dp, DRM_COLOR_YCBCR_BT601,
675 DRM_COLOR_YCBCR_LIMITED_RANGE, ics,
676 IPUV3_COLORSPACE_RGB);
677 break;
678 case IPU_DP_FLOW_SYNC_FG:
679 ipu_dp_setup_channel(ipu_plane->dp, DRM_COLOR_YCBCR_BT601,
680 DRM_COLOR_YCBCR_LIMITED_RANGE, ics,
681 IPUV3_COLORSPACE_UNKNOWN);
682 break;
683 }
684
685 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, width);
686
687 height = drm_rect_height(&new_state->src) >> 16;
688 info = drm_format_info(fb->format->format);
689 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
690 &burstsize, &num_bursts);
691
692 ipu_cpmem_zero(ipu_plane->ipu_ch);
693 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
694 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
695 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
696 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
697 ipu_idmac_enable_watermark(ipu_plane->ipu_ch, true);
698 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
699 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
700 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
701
702 switch (fb->format->format) {
703 case DRM_FORMAT_YUV420:
704 case DRM_FORMAT_YVU420:
705 case DRM_FORMAT_YUV422:
706 case DRM_FORMAT_YVU422:
707 case DRM_FORMAT_YUV444:
708 case DRM_FORMAT_YVU444:
709 ubo = drm_plane_state_to_ubo(new_state);
710 vbo = drm_plane_state_to_vbo(new_state);
711 if (fb->format->format == DRM_FORMAT_YVU420 ||
712 fb->format->format == DRM_FORMAT_YVU422 ||
713 fb->format->format == DRM_FORMAT_YVU444)
714 swap(ubo, vbo);
715
716 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
717 fb->pitches[1], ubo, vbo);
718
719 dev_dbg(ipu_plane->base.dev->dev,
720 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
721 new_state->src.x1 >> 16, new_state->src.y1 >> 16);
722 break;
723 case DRM_FORMAT_NV12:
724 case DRM_FORMAT_NV16:
725 ubo = drm_plane_state_to_ubo(new_state);
726
727 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
728 fb->pitches[1], ubo, ubo);
729
730 dev_dbg(ipu_plane->base.dev->dev,
731 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
732 new_state->src.x1 >> 16, new_state->src.y1 >> 16);
733 break;
734 case DRM_FORMAT_RGB565_A8:
735 case DRM_FORMAT_BGR565_A8:
736 case DRM_FORMAT_RGB888_A8:
737 case DRM_FORMAT_BGR888_A8:
738 case DRM_FORMAT_RGBX8888_A8:
739 case DRM_FORMAT_BGRX8888_A8:
740 alpha_eba = drm_plane_state_to_eba(new_state, 1);
741 num_bursts = 0;
742
743 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
744 eba, alpha_eba, new_state->src.x1 >> 16,
745 new_state->src.y1 >> 16);
746
747 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
748
749 ipu_cpmem_zero(ipu_plane->alpha_ch);
750 ipu_cpmem_set_resolution(ipu_plane->alpha_ch, width,
751 drm_rect_height(&new_state->src) >> 16);
752 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
753 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
754 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
755 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
756 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
757 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
758 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
759 break;
760 default:
761 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
762 eba, new_state->src.x1 >> 16, new_state->src.y1 >> 16);
763 break;
764 }
765 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
766 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
767 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
768 ipu_plane_enable(ipu_plane);
769}
770
771static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
772 .atomic_check = ipu_plane_atomic_check,
773 .atomic_disable = ipu_plane_atomic_disable,
774 .atomic_update = ipu_plane_atomic_update,
775};
776
777bool ipu_plane_atomic_update_pending(struct drm_plane *plane)
778{
779 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
780 struct drm_plane_state *state = plane->state;
781 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
782
783 /* disabled crtcs must not block the update */
784 if (!state->crtc)
785 return false;
786
787 if (ipu_state->use_pre)
788 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch);
789
790 /*
791 * Pretend no update is pending in the non-PRE/PRG case. For this to
792 * happen, an atomic update would have to be deferred until after the
793 * start of the next frame and simultaneously interrupt latency would
794 * have to be high enough to let the atomic update finish and issue an
795 * event before the previous end of frame interrupt handler can be
796 * executed.
797 */
798 return false;
799}
800int ipu_planes_assign_pre(struct drm_device *dev,
801 struct drm_atomic_state *state)
802{
803 struct drm_crtc_state *old_crtc_state, *crtc_state;
804 struct drm_plane_state *plane_state;
805 struct ipu_plane_state *ipu_state;
806 struct ipu_plane *ipu_plane;
807 struct drm_plane *plane;
808 struct drm_crtc *crtc;
809 int available_pres = ipu_prg_max_active_channels();
810 int ret, i;
811
812 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
813 ret = drm_atomic_add_affected_planes(state, crtc);
814 if (ret)
815 return ret;
816 }
817
818 /*
819 * We are going over the planes in 2 passes: first we assign PREs to
820 * planes with a tiling modifier, which need the PREs to resolve into
821 * linear. Any failure to assign a PRE there is fatal. In the second
822 * pass we try to assign PREs to linear FBs, to improve memory access
823 * patterns for them. Failure at this point is non-fatal, as we can
824 * scan out linear FBs without a PRE.
825 */
826 for_each_new_plane_in_state(state, plane, plane_state, i) {
827 ipu_state = to_ipu_plane_state(plane_state);
828 ipu_plane = to_ipu_plane(plane);
829
830 if (!plane_state->fb) {
831 ipu_state->use_pre = false;
832 continue;
833 }
834
835 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
836 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
837 continue;
838
839 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
840 return -EINVAL;
841
842 if (!ipu_prg_format_supported(ipu_plane->ipu,
843 plane_state->fb->format->format,
844 plane_state->fb->modifier))
845 return -EINVAL;
846
847 ipu_state->use_pre = true;
848 available_pres--;
849 }
850
851 for_each_new_plane_in_state(state, plane, plane_state, i) {
852 ipu_state = to_ipu_plane_state(plane_state);
853 ipu_plane = to_ipu_plane(plane);
854
855 if (!plane_state->fb) {
856 ipu_state->use_pre = false;
857 continue;
858 }
859
860 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
861 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
862 continue;
863
864 /* make sure that modifier is initialized */
865 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
866
867 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
868 ipu_prg_format_supported(ipu_plane->ipu,
869 plane_state->fb->format->format,
870 plane_state->fb->modifier)) {
871 ipu_state->use_pre = true;
872 available_pres--;
873 } else {
874 ipu_state->use_pre = false;
875 }
876 }
877
878 return 0;
879}
880
881struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
882 int dma, int dp, unsigned int possible_crtcs,
883 enum drm_plane_type type)
884{
885 struct ipu_plane *ipu_plane;
886 const uint64_t *modifiers = ipu_format_modifiers;
887 unsigned int zpos = (type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
888 unsigned int format_count;
889 const uint32_t *formats;
890 int ret;
891
892 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
893 dma, dp, possible_crtcs);
894
895 if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG) {
896 formats = ipu_plane_all_formats;
897 format_count = ARRAY_SIZE(ipu_plane_all_formats);
898 } else {
899 formats = ipu_plane_rgb_formats;
900 format_count = ARRAY_SIZE(ipu_plane_rgb_formats);
901 }
902
903 if (ipu_prg_present(ipu))
904 modifiers = pre_format_modifiers;
905
906 ipu_plane = drmm_universal_plane_alloc(dev, struct ipu_plane, base,
907 possible_crtcs, &ipu_plane_funcs,
908 formats, format_count, modifiers,
909 type, NULL);
910 if (IS_ERR(ipu_plane)) {
911 DRM_ERROR("failed to allocate and initialize %s plane\n",
912 zpos ? "overlay" : "primary");
913 return ipu_plane;
914 }
915
916 ipu_plane->ipu = ipu;
917 ipu_plane->dma = dma;
918 ipu_plane->dp_flow = dp;
919
920 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
921
922 if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG)
923 ret = drm_plane_create_zpos_property(&ipu_plane->base, zpos, 0,
924 1);
925 else
926 ret = drm_plane_create_zpos_immutable_property(&ipu_plane->base,
927 0);
928 if (ret)
929 return ERR_PTR(ret);
930
931 ret = drm_plane_create_color_properties(&ipu_plane->base,
932 BIT(DRM_COLOR_YCBCR_BT601) |
933 BIT(DRM_COLOR_YCBCR_BT709),
934 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
935 DRM_COLOR_YCBCR_BT601,
936 DRM_COLOR_YCBCR_LIMITED_RANGE);
937 if (ret)
938 return ERR_PTR(ret);
939
940 ret = ipu_plane_get_resources(dev, ipu_plane);
941 if (ret) {
942 DRM_ERROR("failed to get %s plane resources: %pe\n",
943 zpos ? "overlay" : "primary", &ret);
944 return ERR_PTR(ret);
945 }
946
947 return ipu_plane;
948}