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1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "dm_services.h"
27#include "dc.h"
28#include "mod_freesync.h"
29#include "core_types.h"
30
31#define MOD_FREESYNC_MAX_CONCURRENT_STREAMS 32
32
33/* Refresh rate ramp at a fixed rate of 65 Hz/second */
34#define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65)
35/* Number of elements in the render times cache array */
36#define RENDER_TIMES_MAX_COUNT 10
37/* Threshold to exit BTR (to avoid frequent enter-exits at the lower limit) */
38#define BTR_EXIT_MARGIN 2000
39/* Number of consecutive frames to check before entering/exiting fixed refresh*/
40#define FIXED_REFRESH_ENTER_FRAME_COUNT 5
41#define FIXED_REFRESH_EXIT_FRAME_COUNT 5
42
43#define FREESYNC_REGISTRY_NAME "freesync_v1"
44
45#define FREESYNC_NO_STATIC_FOR_EXTERNAL_DP_REGKEY "DalFreeSyncNoStaticForExternalDp"
46
47#define FREESYNC_NO_STATIC_FOR_INTERNAL_REGKEY "DalFreeSyncNoStaticForInternal"
48
49#define FREESYNC_DEFAULT_REGKEY "LCDFreeSyncDefault"
50
51struct gradual_static_ramp {
52 bool ramp_is_active;
53 bool ramp_direction_is_up;
54 unsigned int ramp_current_frame_duration_in_ns;
55};
56
57struct freesync_time {
58 /* video (48Hz feature) related */
59 unsigned int update_duration_in_ns;
60
61 /* BTR/fixed refresh related */
62 unsigned int prev_time_stamp_in_us;
63
64 unsigned int min_render_time_in_us;
65 unsigned int max_render_time_in_us;
66
67 unsigned int render_times_index;
68 unsigned int render_times[RENDER_TIMES_MAX_COUNT];
69
70 unsigned int min_window;
71 unsigned int max_window;
72};
73
74struct below_the_range {
75 bool btr_active;
76 bool program_btr;
77
78 unsigned int mid_point_in_us;
79
80 unsigned int inserted_frame_duration_in_us;
81 unsigned int frames_to_insert;
82 unsigned int frame_counter;
83};
84
85struct fixed_refresh {
86 bool fixed_active;
87 bool program_fixed;
88 unsigned int frame_counter;
89};
90
91struct freesync_range {
92 unsigned int min_refresh;
93 unsigned int max_frame_duration;
94 unsigned int vmax;
95
96 unsigned int max_refresh;
97 unsigned int min_frame_duration;
98 unsigned int vmin;
99};
100
101struct freesync_state {
102 bool fullscreen;
103 bool static_screen;
104 bool video;
105
106 unsigned int vmin;
107 unsigned int vmax;
108
109 struct freesync_time time;
110
111 unsigned int nominal_refresh_rate_in_micro_hz;
112 bool windowed_fullscreen;
113
114 struct gradual_static_ramp static_ramp;
115 struct below_the_range btr;
116 struct fixed_refresh fixed_refresh;
117 struct freesync_range freesync_range;
118};
119
120struct freesync_entity {
121 struct dc_stream_state *stream;
122 struct mod_freesync_caps *caps;
123 struct freesync_state state;
124 struct mod_freesync_user_enable user_enable;
125};
126
127struct freesync_registry_options {
128 bool drr_external_supported;
129 bool drr_internal_supported;
130 bool lcd_freesync_default_set;
131 int lcd_freesync_default_value;
132};
133
134struct core_freesync {
135 struct mod_freesync public;
136 struct dc *dc;
137 struct freesync_registry_options opts;
138 struct freesync_entity *map;
139 int num_entities;
140};
141
142#define MOD_FREESYNC_TO_CORE(mod_freesync)\
143 container_of(mod_freesync, struct core_freesync, public)
144
145struct mod_freesync *mod_freesync_create(struct dc *dc)
146{
147 struct core_freesync *core_freesync =
148 kzalloc(sizeof(struct core_freesync), GFP_KERNEL);
149
150
151 struct persistent_data_flag flag;
152
153 int i, data = 0;
154
155 if (core_freesync == NULL)
156 goto fail_alloc_context;
157
158 core_freesync->map = kzalloc(sizeof(struct freesync_entity) * MOD_FREESYNC_MAX_CONCURRENT_STREAMS,
159 GFP_KERNEL);
160
161 if (core_freesync->map == NULL)
162 goto fail_alloc_map;
163
164 for (i = 0; i < MOD_FREESYNC_MAX_CONCURRENT_STREAMS; i++)
165 core_freesync->map[i].stream = NULL;
166
167 core_freesync->num_entities = 0;
168
169 if (dc == NULL)
170 goto fail_construct;
171
172 core_freesync->dc = dc;
173
174 /* Create initial module folder in registry for freesync enable data */
175 flag.save_per_edid = true;
176 flag.save_per_link = false;
177 dm_write_persistent_data(dc->ctx, NULL, FREESYNC_REGISTRY_NAME,
178 NULL, NULL, 0, &flag);
179 flag.save_per_edid = false;
180 flag.save_per_link = false;
181
182 if (dm_read_persistent_data(dc->ctx, NULL, NULL,
183 FREESYNC_NO_STATIC_FOR_INTERNAL_REGKEY,
184 &data, sizeof(data), &flag)) {
185 core_freesync->opts.drr_internal_supported =
186 (data & 1) ? false : true;
187 }
188
189 if (dm_read_persistent_data(dc->ctx, NULL, NULL,
190 FREESYNC_NO_STATIC_FOR_EXTERNAL_DP_REGKEY,
191 &data, sizeof(data), &flag)) {
192 core_freesync->opts.drr_external_supported =
193 (data & 1) ? false : true;
194 }
195
196 if (dm_read_persistent_data(dc->ctx, NULL, NULL,
197 FREESYNC_DEFAULT_REGKEY,
198 &data, sizeof(data), &flag)) {
199 core_freesync->opts.lcd_freesync_default_set = true;
200 core_freesync->opts.lcd_freesync_default_value = data;
201 } else {
202 core_freesync->opts.lcd_freesync_default_set = false;
203 core_freesync->opts.lcd_freesync_default_value = 0;
204 }
205
206 return &core_freesync->public;
207
208fail_construct:
209 kfree(core_freesync->map);
210
211fail_alloc_map:
212 kfree(core_freesync);
213
214fail_alloc_context:
215 return NULL;
216}
217
218void mod_freesync_destroy(struct mod_freesync *mod_freesync)
219{
220 if (mod_freesync != NULL) {
221 int i;
222 struct core_freesync *core_freesync =
223 MOD_FREESYNC_TO_CORE(mod_freesync);
224
225 for (i = 0; i < core_freesync->num_entities; i++)
226 if (core_freesync->map[i].stream)
227 dc_stream_release(core_freesync->map[i].stream);
228
229 kfree(core_freesync->map);
230
231 kfree(core_freesync);
232 }
233}
234
235/* Given a specific dc_stream* this function finds its equivalent
236 * on the core_freesync->map and returns the corresponding index
237 */
238static unsigned int map_index_from_stream(struct core_freesync *core_freesync,
239 struct dc_stream_state *stream)
240{
241 unsigned int index = 0;
242
243 for (index = 0; index < core_freesync->num_entities; index++) {
244 if (core_freesync->map[index].stream == stream) {
245 return index;
246 }
247 }
248 /* Could not find stream requested */
249 ASSERT(false);
250 return index;
251}
252
253bool mod_freesync_add_stream(struct mod_freesync *mod_freesync,
254 struct dc_stream_state *stream, struct mod_freesync_caps *caps)
255{
256 struct dc *dc = NULL;
257 struct core_freesync *core_freesync = NULL;
258 int persistent_freesync_enable = 0;
259 struct persistent_data_flag flag;
260 unsigned int nom_refresh_rate_uhz;
261 unsigned long long temp;
262
263 if (mod_freesync == NULL)
264 return false;
265
266 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
267 dc = core_freesync->dc;
268
269 flag.save_per_edid = true;
270 flag.save_per_link = false;
271
272 if (core_freesync->num_entities < MOD_FREESYNC_MAX_CONCURRENT_STREAMS) {
273
274 dc_stream_retain(stream);
275
276 temp = stream->timing.pix_clk_khz;
277 temp *= 1000ULL * 1000ULL * 1000ULL;
278 temp = div_u64(temp, stream->timing.h_total);
279 temp = div_u64(temp, stream->timing.v_total);
280
281 nom_refresh_rate_uhz = (unsigned int) temp;
282
283 core_freesync->map[core_freesync->num_entities].stream = stream;
284 core_freesync->map[core_freesync->num_entities].caps = caps;
285
286 core_freesync->map[core_freesync->num_entities].state.
287 fullscreen = false;
288 core_freesync->map[core_freesync->num_entities].state.
289 static_screen = false;
290 core_freesync->map[core_freesync->num_entities].state.
291 video = false;
292 core_freesync->map[core_freesync->num_entities].state.time.
293 update_duration_in_ns = 0;
294 core_freesync->map[core_freesync->num_entities].state.
295 static_ramp.ramp_is_active = false;
296
297 /* get persistent data from registry */
298 if (dm_read_persistent_data(dc->ctx, stream->sink,
299 FREESYNC_REGISTRY_NAME,
300 "userenable", &persistent_freesync_enable,
301 sizeof(int), &flag)) {
302 core_freesync->map[core_freesync->num_entities].user_enable.
303 enable_for_gaming =
304 (persistent_freesync_enable & 1) ? true : false;
305 core_freesync->map[core_freesync->num_entities].user_enable.
306 enable_for_static =
307 (persistent_freesync_enable & 2) ? true : false;
308 core_freesync->map[core_freesync->num_entities].user_enable.
309 enable_for_video =
310 (persistent_freesync_enable & 4) ? true : false;
311 /* If FreeSync display and LCDFreeSyncDefault is set, use as default values write back to userenable */
312 } else if (caps->supported && (core_freesync->opts.lcd_freesync_default_set)) {
313 core_freesync->map[core_freesync->num_entities].user_enable.enable_for_gaming =
314 (core_freesync->opts.lcd_freesync_default_value & 1) ? true : false;
315 core_freesync->map[core_freesync->num_entities].user_enable.enable_for_static =
316 (core_freesync->opts.lcd_freesync_default_value & 2) ? true : false;
317 core_freesync->map[core_freesync->num_entities].user_enable.enable_for_video =
318 (core_freesync->opts.lcd_freesync_default_value & 4) ? true : false;
319 dm_write_persistent_data(dc->ctx, stream->sink,
320 FREESYNC_REGISTRY_NAME,
321 "userenable", &core_freesync->opts.lcd_freesync_default_value,
322 sizeof(int), &flag);
323 } else {
324 core_freesync->map[core_freesync->num_entities].user_enable.
325 enable_for_gaming = false;
326 core_freesync->map[core_freesync->num_entities].user_enable.
327 enable_for_static = false;
328 core_freesync->map[core_freesync->num_entities].user_enable.
329 enable_for_video = false;
330 }
331
332 if (caps->supported &&
333 nom_refresh_rate_uhz >= caps->min_refresh_in_micro_hz &&
334 nom_refresh_rate_uhz <= caps->max_refresh_in_micro_hz)
335 stream->ignore_msa_timing_param = 1;
336
337 core_freesync->num_entities++;
338 return true;
339 }
340 return false;
341}
342
343bool mod_freesync_remove_stream(struct mod_freesync *mod_freesync,
344 struct dc_stream_state *stream)
345{
346 int i = 0;
347 struct core_freesync *core_freesync = NULL;
348 unsigned int index = 0;
349
350 if (mod_freesync == NULL)
351 return false;
352
353 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
354 index = map_index_from_stream(core_freesync, stream);
355
356 dc_stream_release(core_freesync->map[index].stream);
357 core_freesync->map[index].stream = NULL;
358 /* To remove this entity, shift everything after down */
359 for (i = index; i < core_freesync->num_entities - 1; i++)
360 core_freesync->map[i] = core_freesync->map[i + 1];
361 core_freesync->num_entities--;
362 return true;
363}
364
365static void adjust_vmin_vmax(struct core_freesync *core_freesync,
366 struct dc_stream_state **streams,
367 int num_streams,
368 int map_index,
369 unsigned int v_total_min,
370 unsigned int v_total_max)
371{
372 if (num_streams == 0 || streams == NULL || num_streams > 1)
373 return;
374
375 core_freesync->map[map_index].state.vmin = v_total_min;
376 core_freesync->map[map_index].state.vmax = v_total_max;
377
378 dc_stream_adjust_vmin_vmax(core_freesync->dc, streams,
379 num_streams, v_total_min,
380 v_total_max);
381}
382
383
384static void update_stream_freesync_context(struct core_freesync *core_freesync,
385 struct dc_stream_state *stream)
386{
387 unsigned int index;
388 struct freesync_context *ctx;
389
390 ctx = &stream->freesync_ctx;
391
392 index = map_index_from_stream(core_freesync, stream);
393
394 ctx->supported = core_freesync->map[index].caps->supported;
395 ctx->enabled = (core_freesync->map[index].user_enable.enable_for_gaming ||
396 core_freesync->map[index].user_enable.enable_for_video ||
397 core_freesync->map[index].user_enable.enable_for_static);
398 ctx->active = (core_freesync->map[index].state.fullscreen ||
399 core_freesync->map[index].state.video ||
400 core_freesync->map[index].state.static_ramp.ramp_is_active);
401 ctx->min_refresh_in_micro_hz =
402 core_freesync->map[index].caps->min_refresh_in_micro_hz;
403 ctx->nominal_refresh_in_micro_hz = core_freesync->
404 map[index].state.nominal_refresh_rate_in_micro_hz;
405
406}
407
408static void update_stream(struct core_freesync *core_freesync,
409 struct dc_stream_state *stream)
410{
411 unsigned int index = map_index_from_stream(core_freesync, stream);
412 if (core_freesync->map[index].caps->supported) {
413 stream->ignore_msa_timing_param = 1;
414 update_stream_freesync_context(core_freesync, stream);
415 }
416}
417
418static void calc_freesync_range(struct core_freesync *core_freesync,
419 struct dc_stream_state *stream,
420 struct freesync_state *state,
421 unsigned int min_refresh_in_uhz,
422 unsigned int max_refresh_in_uhz)
423{
424 unsigned int min_frame_duration_in_ns = 0, max_frame_duration_in_ns = 0;
425 unsigned int index = map_index_from_stream(core_freesync, stream);
426 uint32_t vtotal = stream->timing.v_total;
427
428 if ((min_refresh_in_uhz == 0) || (max_refresh_in_uhz == 0)) {
429 state->freesync_range.min_refresh =
430 state->nominal_refresh_rate_in_micro_hz;
431 state->freesync_range.max_refresh =
432 state->nominal_refresh_rate_in_micro_hz;
433
434 state->freesync_range.max_frame_duration = 0;
435 state->freesync_range.min_frame_duration = 0;
436
437 state->freesync_range.vmax = vtotal;
438 state->freesync_range.vmin = vtotal;
439
440 return;
441 }
442
443 min_frame_duration_in_ns = ((unsigned int) (div64_u64(
444 (1000000000ULL * 1000000),
445 max_refresh_in_uhz)));
446 max_frame_duration_in_ns = ((unsigned int) (div64_u64(
447 (1000000000ULL * 1000000),
448 min_refresh_in_uhz)));
449
450 state->freesync_range.min_refresh = min_refresh_in_uhz;
451 state->freesync_range.max_refresh = max_refresh_in_uhz;
452
453 state->freesync_range.max_frame_duration = max_frame_duration_in_ns;
454 state->freesync_range.min_frame_duration = min_frame_duration_in_ns;
455
456 state->freesync_range.vmax = div64_u64(div64_u64(((unsigned long long)(
457 max_frame_duration_in_ns) * stream->timing.pix_clk_khz),
458 stream->timing.h_total), 1000000);
459 state->freesync_range.vmin = div64_u64(div64_u64(((unsigned long long)(
460 min_frame_duration_in_ns) * stream->timing.pix_clk_khz),
461 stream->timing.h_total), 1000000);
462
463 /* vmin/vmax cannot be less than vtotal */
464 if (state->freesync_range.vmin < vtotal) {
465 /* Error of 1 is permissible */
466 ASSERT((state->freesync_range.vmin + 1) >= vtotal);
467 state->freesync_range.vmin = vtotal;
468 }
469
470 if (state->freesync_range.vmax < vtotal) {
471 /* Error of 1 is permissible */
472 ASSERT((state->freesync_range.vmax + 1) >= vtotal);
473 state->freesync_range.vmax = vtotal;
474 }
475
476 /* Determine whether BTR can be supported */
477 if (max_frame_duration_in_ns >=
478 2 * min_frame_duration_in_ns)
479 core_freesync->map[index].caps->btr_supported = true;
480 else
481 core_freesync->map[index].caps->btr_supported = false;
482
483 /* Cache the time variables */
484 state->time.max_render_time_in_us =
485 max_frame_duration_in_ns / 1000;
486 state->time.min_render_time_in_us =
487 min_frame_duration_in_ns / 1000;
488 state->btr.mid_point_in_us =
489 (max_frame_duration_in_ns +
490 min_frame_duration_in_ns) / 2000;
491}
492
493static void calc_v_total_from_duration(struct dc_stream_state *stream,
494 unsigned int duration_in_ns, int *v_total_nominal)
495{
496 *v_total_nominal = div64_u64(div64_u64(((unsigned long long)(
497 duration_in_ns) * stream->timing.pix_clk_khz),
498 stream->timing.h_total), 1000000);
499}
500
501static void calc_v_total_for_static_ramp(struct core_freesync *core_freesync,
502 struct dc_stream_state *stream,
503 unsigned int index, int *v_total)
504{
505 unsigned int frame_duration = 0;
506
507 struct gradual_static_ramp *static_ramp_variables =
508 &core_freesync->map[index].state.static_ramp;
509
510 /* Calc ratio between new and current frame duration with 3 digit */
511 unsigned int frame_duration_ratio = div64_u64(1000000,
512 (1000 + div64_u64(((unsigned long long)(
513 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) *
514 static_ramp_variables->ramp_current_frame_duration_in_ns),
515 1000000000)));
516
517 /* Calculate delta between new and current frame duration in ns */
518 unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
519 static_ramp_variables->ramp_current_frame_duration_in_ns) *
520 (1000 - frame_duration_ratio)), 1000);
521
522 /* Adjust frame duration delta based on ratio between current and
523 * standard frame duration (frame duration at 60 Hz refresh rate).
524 */
525 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
526 frame_duration_delta) * static_ramp_variables->
527 ramp_current_frame_duration_in_ns), 16666666);
528
529 /* Going to a higher refresh rate (lower frame duration) */
530 if (static_ramp_variables->ramp_direction_is_up) {
531 /* reduce frame duration */
532 static_ramp_variables->ramp_current_frame_duration_in_ns -=
533 ramp_rate_interpolated;
534
535 /* min frame duration */
536 frame_duration = ((unsigned int) (div64_u64(
537 (1000000000ULL * 1000000),
538 core_freesync->map[index].state.
539 nominal_refresh_rate_in_micro_hz)));
540
541 /* adjust for frame duration below min */
542 if (static_ramp_variables->ramp_current_frame_duration_in_ns <=
543 frame_duration) {
544
545 static_ramp_variables->ramp_is_active = false;
546 static_ramp_variables->
547 ramp_current_frame_duration_in_ns =
548 frame_duration;
549 }
550 /* Going to a lower refresh rate (larger frame duration) */
551 } else {
552 /* increase frame duration */
553 static_ramp_variables->ramp_current_frame_duration_in_ns +=
554 ramp_rate_interpolated;
555
556 /* max frame duration */
557 frame_duration = ((unsigned int) (div64_u64(
558 (1000000000ULL * 1000000),
559 core_freesync->map[index].caps->min_refresh_in_micro_hz)));
560
561 /* adjust for frame duration above max */
562 if (static_ramp_variables->ramp_current_frame_duration_in_ns >=
563 frame_duration) {
564
565 static_ramp_variables->ramp_is_active = false;
566 static_ramp_variables->
567 ramp_current_frame_duration_in_ns =
568 frame_duration;
569 }
570 }
571
572 calc_v_total_from_duration(stream, static_ramp_variables->
573 ramp_current_frame_duration_in_ns, v_total);
574}
575
576static void reset_freesync_state_variables(struct freesync_state* state)
577{
578 state->static_ramp.ramp_is_active = false;
579 if (state->nominal_refresh_rate_in_micro_hz)
580 state->static_ramp.ramp_current_frame_duration_in_ns =
581 ((unsigned int) (div64_u64(
582 (1000000000ULL * 1000000),
583 state->nominal_refresh_rate_in_micro_hz)));
584
585 state->btr.btr_active = false;
586 state->btr.frame_counter = 0;
587 state->btr.frames_to_insert = 0;
588 state->btr.inserted_frame_duration_in_us = 0;
589 state->btr.program_btr = false;
590
591 state->fixed_refresh.fixed_active = false;
592 state->fixed_refresh.program_fixed = false;
593}
594/*
595 * Sets freesync mode on a stream depending on current freesync state.
596 */
597static bool set_freesync_on_streams(struct core_freesync *core_freesync,
598 struct dc_stream_state **streams, int num_streams)
599{
600 int v_total_nominal = 0, v_total_min = 0, v_total_max = 0;
601 unsigned int stream_idx, map_index = 0;
602 struct freesync_state *state;
603
604 if (num_streams == 0 || streams == NULL || num_streams > 1)
605 return false;
606
607 for (stream_idx = 0; stream_idx < num_streams; stream_idx++) {
608
609 map_index = map_index_from_stream(core_freesync,
610 streams[stream_idx]);
611
612 state = &core_freesync->map[map_index].state;
613
614 if (core_freesync->map[map_index].caps->supported) {
615
616 /* Fullscreen has the topmost priority. If the
617 * fullscreen bit is set, we are in a fullscreen
618 * application where it should not matter if it is
619 * static screen. We should not check the static_screen
620 * or video bit.
621 *
622 * Special cases of fullscreen include btr and fixed
623 * refresh. We program btr on every flip and involves
624 * programming full range right before the last inserted frame.
625 * However, we do not want to program the full freesync range
626 * when fixed refresh is active, because we only program
627 * that logic once and this will override it.
628 */
629 if (core_freesync->map[map_index].user_enable.
630 enable_for_gaming == true &&
631 state->fullscreen == true &&
632 state->fixed_refresh.fixed_active == false) {
633 /* Enable freesync */
634
635 v_total_min = state->freesync_range.vmin;
636 v_total_max = state->freesync_range.vmax;
637
638 /* Update the freesync context for the stream */
639 update_stream_freesync_context(core_freesync,
640 streams[stream_idx]);
641
642 adjust_vmin_vmax(core_freesync, streams,
643 num_streams, map_index,
644 v_total_min,
645 v_total_max);
646
647 return true;
648
649 } else if (core_freesync->map[map_index].user_enable.
650 enable_for_video && state->video == true) {
651 /* Enable 48Hz feature */
652
653 calc_v_total_from_duration(streams[stream_idx],
654 state->time.update_duration_in_ns,
655 &v_total_nominal);
656
657 /* Program only if v_total_nominal is in range*/
658 if (v_total_nominal >=
659 streams[stream_idx]->timing.v_total) {
660
661 /* Update the freesync context for
662 * the stream
663 */
664 update_stream_freesync_context(
665 core_freesync,
666 streams[stream_idx]);
667
668 adjust_vmin_vmax(
669 core_freesync, streams,
670 num_streams, map_index,
671 v_total_nominal,
672 v_total_nominal);
673 }
674 return true;
675
676 } else {
677 /* Disable freesync */
678 v_total_nominal = streams[stream_idx]->
679 timing.v_total;
680
681 /* Update the freesync context for
682 * the stream
683 */
684 update_stream_freesync_context(
685 core_freesync,
686 streams[stream_idx]);
687
688 adjust_vmin_vmax(core_freesync, streams,
689 num_streams, map_index,
690 v_total_nominal,
691 v_total_nominal);
692
693 /* Reset the cached variables */
694 reset_freesync_state_variables(state);
695
696 return true;
697 }
698 } else {
699 /* Disable freesync */
700 v_total_nominal = streams[stream_idx]->
701 timing.v_total;
702 /*
703 * we have to reset drr always even sink does
704 * not support freesync because a former stream has
705 * be programmed
706 */
707 adjust_vmin_vmax(core_freesync, streams,
708 num_streams, map_index,
709 v_total_nominal,
710 v_total_nominal);
711 /* Reset the cached variables */
712 reset_freesync_state_variables(state);
713 }
714
715 }
716
717 return false;
718}
719
720static void set_static_ramp_variables(struct core_freesync *core_freesync,
721 unsigned int index, bool enable_static_screen)
722{
723 unsigned int frame_duration = 0;
724 unsigned int nominal_refresh_rate = core_freesync->map[index].state.
725 nominal_refresh_rate_in_micro_hz;
726 unsigned int min_refresh_rate= core_freesync->map[index].caps->
727 min_refresh_in_micro_hz;
728 struct gradual_static_ramp *static_ramp_variables =
729 &core_freesync->map[index].state.static_ramp;
730
731 /* If we are ENABLING static screen, refresh rate should go DOWN.
732 * If we are DISABLING static screen, refresh rate should go UP.
733 */
734 if (enable_static_screen)
735 static_ramp_variables->ramp_direction_is_up = false;
736 else
737 static_ramp_variables->ramp_direction_is_up = true;
738
739 /* If ramp is not active, set initial frame duration depending on
740 * whether we are enabling/disabling static screen mode. If the ramp is
741 * already active, ramp should continue in the opposite direction
742 * starting with the current frame duration
743 */
744 if (!static_ramp_variables->ramp_is_active) {
745 if (enable_static_screen == true) {
746 /* Going to lower refresh rate, so start from max
747 * refresh rate (min frame duration)
748 */
749 frame_duration = ((unsigned int) (div64_u64(
750 (1000000000ULL * 1000000),
751 nominal_refresh_rate)));
752 } else {
753 /* Going to higher refresh rate, so start from min
754 * refresh rate (max frame duration)
755 */
756 frame_duration = ((unsigned int) (div64_u64(
757 (1000000000ULL * 1000000),
758 min_refresh_rate)));
759 }
760 static_ramp_variables->
761 ramp_current_frame_duration_in_ns = frame_duration;
762
763 static_ramp_variables->ramp_is_active = true;
764 }
765}
766
767void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
768 struct dc_stream_state **streams, int num_streams)
769{
770 unsigned int index, v_total, inserted_frame_v_total = 0;
771 unsigned int min_frame_duration_in_ns, vmax, vmin = 0;
772 struct freesync_state *state;
773 struct core_freesync *core_freesync = NULL;
774 struct dc_static_screen_events triggers = {0};
775
776 if (mod_freesync == NULL)
777 return;
778
779 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
780
781 if (core_freesync->num_entities == 0)
782 return;
783
784 index = map_index_from_stream(core_freesync,
785 streams[0]);
786
787 if (core_freesync->map[index].caps->supported == false)
788 return;
789
790 state = &core_freesync->map[index].state;
791
792 /* Below the Range Logic */
793
794 /* Only execute if in fullscreen mode */
795 if (state->fullscreen == true &&
796 core_freesync->map[index].user_enable.enable_for_gaming &&
797 core_freesync->map[index].caps->btr_supported &&
798 state->btr.btr_active) {
799
800 /* TODO: pass in flag for Pre-DCE12 ASIC
801 * in order for frame variable duration to take affect,
802 * it needs to be done one VSYNC early, which is at
803 * frameCounter == 1.
804 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
805 * will take affect on current frame
806 */
807 if (state->btr.frames_to_insert == state->btr.frame_counter) {
808
809 min_frame_duration_in_ns = ((unsigned int) (div64_u64(
810 (1000000000ULL * 1000000),
811 state->nominal_refresh_rate_in_micro_hz)));
812
813 vmin = state->freesync_range.vmin;
814
815 inserted_frame_v_total = vmin;
816
817 if (min_frame_duration_in_ns / 1000)
818 inserted_frame_v_total =
819 state->btr.inserted_frame_duration_in_us *
820 vmin / (min_frame_duration_in_ns / 1000);
821
822 /* Set length of inserted frames as v_total_max*/
823 vmax = inserted_frame_v_total;
824 vmin = inserted_frame_v_total;
825
826 /* Program V_TOTAL */
827 adjust_vmin_vmax(core_freesync, streams,
828 num_streams, index,
829 vmin, vmax);
830 }
831
832 if (state->btr.frame_counter > 0)
833 state->btr.frame_counter--;
834
835 /* Restore FreeSync */
836 if (state->btr.frame_counter == 0)
837 set_freesync_on_streams(core_freesync, streams, num_streams);
838 }
839
840 /* If in fullscreen freesync mode or in video, do not program
841 * static screen ramp values
842 */
843 if (state->fullscreen == true || state->video == true) {
844
845 state->static_ramp.ramp_is_active = false;
846
847 return;
848 }
849
850 /* Gradual Static Screen Ramping Logic */
851
852 /* Execute if ramp is active and user enabled freesync static screen*/
853 if (state->static_ramp.ramp_is_active &&
854 core_freesync->map[index].user_enable.enable_for_static) {
855
856 calc_v_total_for_static_ramp(core_freesync, streams[0],
857 index, &v_total);
858
859 /* Update the freesync context for the stream */
860 update_stream_freesync_context(core_freesync, streams[0]);
861
862 /* Program static screen ramp values */
863 adjust_vmin_vmax(core_freesync, streams,
864 num_streams, index,
865 v_total,
866 v_total);
867
868 triggers.overlay_update = true;
869 triggers.surface_update = true;
870
871 dc_stream_set_static_screen_events(core_freesync->dc, streams,
872 num_streams, &triggers);
873 }
874}
875
876void mod_freesync_update_state(struct mod_freesync *mod_freesync,
877 struct dc_stream_state **streams, int num_streams,
878 struct mod_freesync_params *freesync_params)
879{
880 bool freesync_program_required = false;
881 unsigned int stream_index;
882 struct freesync_state *state;
883 struct core_freesync *core_freesync = NULL;
884 struct dc_static_screen_events triggers = {0};
885
886 if (mod_freesync == NULL)
887 return;
888
889 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
890
891 if (core_freesync->num_entities == 0)
892 return;
893
894 for(stream_index = 0; stream_index < num_streams; stream_index++) {
895
896 unsigned int map_index = map_index_from_stream(core_freesync,
897 streams[stream_index]);
898
899 bool is_embedded = dc_is_embedded_signal(
900 streams[stream_index]->sink->sink_signal);
901
902 struct freesync_registry_options *opts = &core_freesync->opts;
903
904 state = &core_freesync->map[map_index].state;
905
906 switch (freesync_params->state){
907 case FREESYNC_STATE_FULLSCREEN:
908 state->fullscreen = freesync_params->enable;
909 freesync_program_required = true;
910 state->windowed_fullscreen =
911 freesync_params->windowed_fullscreen;
912 break;
913 case FREESYNC_STATE_STATIC_SCREEN:
914 /* Static screen ramp is disabled by default, but can
915 * be enabled through regkey.
916 */
917 if ((is_embedded && opts->drr_internal_supported) ||
918 (!is_embedded && opts->drr_external_supported))
919
920 if (state->static_screen !=
921 freesync_params->enable) {
922
923 /* Change the state flag */
924 state->static_screen =
925 freesync_params->enable;
926
927 /* Update static screen ramp */
928 set_static_ramp_variables(core_freesync,
929 map_index,
930 freesync_params->enable);
931 }
932 /* We program the ramp starting next VUpdate */
933 break;
934 case FREESYNC_STATE_VIDEO:
935 /* Change core variables only if there is a change*/
936 if(freesync_params->update_duration_in_ns !=
937 state->time.update_duration_in_ns) {
938
939 state->video = freesync_params->enable;
940 state->time.update_duration_in_ns =
941 freesync_params->update_duration_in_ns;
942
943 freesync_program_required = true;
944 }
945 break;
946 case FREESYNC_STATE_NONE:
947 /* handle here to avoid warning */
948 break;
949 }
950 }
951
952 /* Update mask */
953 triggers.overlay_update = true;
954 triggers.surface_update = true;
955
956 dc_stream_set_static_screen_events(core_freesync->dc, streams,
957 num_streams, &triggers);
958
959 if (freesync_program_required)
960 /* Program freesync according to current state*/
961 set_freesync_on_streams(core_freesync, streams, num_streams);
962}
963
964
965bool mod_freesync_get_state(struct mod_freesync *mod_freesync,
966 struct dc_stream_state *stream,
967 struct mod_freesync_params *freesync_params)
968{
969 unsigned int index = 0;
970 struct core_freesync *core_freesync = NULL;
971
972 if (mod_freesync == NULL)
973 return false;
974
975 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
976 index = map_index_from_stream(core_freesync, stream);
977
978 if (core_freesync->map[index].state.fullscreen) {
979 freesync_params->state = FREESYNC_STATE_FULLSCREEN;
980 freesync_params->enable = true;
981 } else if (core_freesync->map[index].state.static_screen) {
982 freesync_params->state = FREESYNC_STATE_STATIC_SCREEN;
983 freesync_params->enable = true;
984 } else if (core_freesync->map[index].state.video) {
985 freesync_params->state = FREESYNC_STATE_VIDEO;
986 freesync_params->enable = true;
987 } else {
988 freesync_params->state = FREESYNC_STATE_NONE;
989 freesync_params->enable = false;
990 }
991
992 freesync_params->update_duration_in_ns =
993 core_freesync->map[index].state.time.update_duration_in_ns;
994
995 freesync_params->windowed_fullscreen =
996 core_freesync->map[index].state.windowed_fullscreen;
997
998 return true;
999}
1000
1001bool mod_freesync_set_user_enable(struct mod_freesync *mod_freesync,
1002 struct dc_stream_state **streams, int num_streams,
1003 struct mod_freesync_user_enable *user_enable)
1004{
1005 unsigned int stream_index, map_index;
1006 int persistent_data = 0;
1007 struct persistent_data_flag flag;
1008 struct dc *dc = NULL;
1009 struct core_freesync *core_freesync = NULL;
1010
1011 if (mod_freesync == NULL)
1012 return false;
1013
1014 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1015 dc = core_freesync->dc;
1016
1017 flag.save_per_edid = true;
1018 flag.save_per_link = false;
1019
1020 for(stream_index = 0; stream_index < num_streams;
1021 stream_index++){
1022
1023 map_index = map_index_from_stream(core_freesync,
1024 streams[stream_index]);
1025
1026 core_freesync->map[map_index].user_enable = *user_enable;
1027
1028 /* Write persistent data in registry*/
1029 if (core_freesync->map[map_index].user_enable.
1030 enable_for_gaming)
1031 persistent_data = persistent_data | 1;
1032 if (core_freesync->map[map_index].user_enable.
1033 enable_for_static)
1034 persistent_data = persistent_data | 2;
1035 if (core_freesync->map[map_index].user_enable.
1036 enable_for_video)
1037 persistent_data = persistent_data | 4;
1038
1039 dm_write_persistent_data(dc->ctx,
1040 streams[stream_index]->sink,
1041 FREESYNC_REGISTRY_NAME,
1042 "userenable",
1043 &persistent_data,
1044 sizeof(int),
1045 &flag);
1046 }
1047
1048 set_freesync_on_streams(core_freesync, streams, num_streams);
1049
1050 return true;
1051}
1052
1053bool mod_freesync_get_user_enable(struct mod_freesync *mod_freesync,
1054 struct dc_stream_state *stream,
1055 struct mod_freesync_user_enable *user_enable)
1056{
1057 unsigned int index = 0;
1058 struct core_freesync *core_freesync = NULL;
1059
1060 if (mod_freesync == NULL)
1061 return false;
1062
1063 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1064 index = map_index_from_stream(core_freesync, stream);
1065
1066 *user_enable = core_freesync->map[index].user_enable;
1067
1068 return true;
1069}
1070
1071bool mod_freesync_get_static_ramp_active(struct mod_freesync *mod_freesync,
1072 struct dc_stream_state *stream,
1073 bool *is_ramp_active)
1074{
1075 unsigned int index = 0;
1076 struct core_freesync *core_freesync = NULL;
1077
1078 if (mod_freesync == NULL)
1079 return false;
1080
1081 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1082 index = map_index_from_stream(core_freesync, stream);
1083
1084 *is_ramp_active =
1085 core_freesync->map[index].state.static_ramp.ramp_is_active;
1086
1087 return true;
1088}
1089
1090bool mod_freesync_override_min_max(struct mod_freesync *mod_freesync,
1091 struct dc_stream_state *streams,
1092 unsigned int min_refresh,
1093 unsigned int max_refresh,
1094 struct mod_freesync_caps *caps)
1095{
1096 unsigned int index = 0;
1097 struct core_freesync *core_freesync;
1098 struct freesync_state *state;
1099
1100 if (mod_freesync == NULL)
1101 return false;
1102
1103 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1104 index = map_index_from_stream(core_freesync, streams);
1105 state = &core_freesync->map[index].state;
1106
1107 if (max_refresh == 0)
1108 max_refresh = state->nominal_refresh_rate_in_micro_hz;
1109
1110 if (min_refresh == 0) {
1111 /* Restore defaults */
1112 calc_freesync_range(core_freesync, streams, state,
1113 core_freesync->map[index].caps->
1114 min_refresh_in_micro_hz,
1115 state->nominal_refresh_rate_in_micro_hz);
1116 } else {
1117 calc_freesync_range(core_freesync, streams,
1118 state,
1119 min_refresh,
1120 max_refresh);
1121
1122 /* Program vtotal min/max */
1123 adjust_vmin_vmax(core_freesync, &streams, 1, index,
1124 state->freesync_range.vmin,
1125 state->freesync_range.vmax);
1126 }
1127
1128 if (min_refresh != 0 &&
1129 dc_is_embedded_signal(streams->sink->sink_signal) &&
1130 (max_refresh - min_refresh >= 10000000)) {
1131 caps->supported = true;
1132 caps->min_refresh_in_micro_hz = min_refresh;
1133 caps->max_refresh_in_micro_hz = max_refresh;
1134 }
1135
1136 /* Update the stream */
1137 update_stream(core_freesync, streams);
1138
1139 return true;
1140}
1141
1142bool mod_freesync_get_min_max(struct mod_freesync *mod_freesync,
1143 struct dc_stream_state *stream,
1144 unsigned int *min_refresh,
1145 unsigned int *max_refresh)
1146{
1147 unsigned int index = 0;
1148 struct core_freesync *core_freesync = NULL;
1149
1150 if (mod_freesync == NULL)
1151 return false;
1152
1153 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1154 index = map_index_from_stream(core_freesync, stream);
1155
1156 *min_refresh =
1157 core_freesync->map[index].state.freesync_range.min_refresh;
1158 *max_refresh =
1159 core_freesync->map[index].state.freesync_range.max_refresh;
1160
1161 return true;
1162}
1163
1164bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
1165 struct dc_stream_state *stream,
1166 unsigned int *vmin,
1167 unsigned int *vmax)
1168{
1169 unsigned int index = 0;
1170 struct core_freesync *core_freesync = NULL;
1171
1172 if (mod_freesync == NULL)
1173 return false;
1174
1175 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1176 index = map_index_from_stream(core_freesync, stream);
1177
1178 *vmin =
1179 core_freesync->map[index].state.freesync_range.vmin;
1180 *vmax =
1181 core_freesync->map[index].state.freesync_range.vmax;
1182
1183 return true;
1184}
1185
1186bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
1187 struct dc_stream_state *stream,
1188 unsigned int *nom_v_pos,
1189 unsigned int *v_pos)
1190{
1191 unsigned int index = 0;
1192 struct core_freesync *core_freesync = NULL;
1193 struct crtc_position position;
1194
1195 if (mod_freesync == NULL)
1196 return false;
1197
1198 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1199 index = map_index_from_stream(core_freesync, stream);
1200
1201 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
1202 &position.vertical_count,
1203 &position.nominal_vcount)) {
1204
1205 *nom_v_pos = position.nominal_vcount;
1206 *v_pos = position.vertical_count;
1207
1208 return true;
1209 }
1210
1211 return false;
1212}
1213
1214void mod_freesync_notify_mode_change(struct mod_freesync *mod_freesync,
1215 struct dc_stream_state **streams, int num_streams)
1216{
1217 unsigned int stream_index, map_index;
1218 struct freesync_state *state;
1219 struct core_freesync *core_freesync = NULL;
1220 struct dc_static_screen_events triggers = {0};
1221 unsigned long long temp = 0;
1222
1223 if (mod_freesync == NULL)
1224 return;
1225
1226 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1227
1228 for (stream_index = 0; stream_index < num_streams; stream_index++) {
1229 map_index = map_index_from_stream(core_freesync,
1230 streams[stream_index]);
1231
1232 state = &core_freesync->map[map_index].state;
1233
1234 /* Update the field rate for new timing */
1235 temp = streams[stream_index]->timing.pix_clk_khz;
1236 temp *= 1000ULL * 1000ULL * 1000ULL;
1237 temp = div_u64(temp,
1238 streams[stream_index]->timing.h_total);
1239 temp = div_u64(temp,
1240 streams[stream_index]->timing.v_total);
1241 state->nominal_refresh_rate_in_micro_hz =
1242 (unsigned int) temp;
1243
1244 if (core_freesync->map[map_index].caps->supported) {
1245
1246 /* Update the stream */
1247 update_stream(core_freesync, streams[stream_index]);
1248
1249 /* Calculate vmin/vmax and refresh rate for
1250 * current mode
1251 */
1252 calc_freesync_range(core_freesync, *streams, state,
1253 core_freesync->map[map_index].caps->
1254 min_refresh_in_micro_hz,
1255 state->nominal_refresh_rate_in_micro_hz);
1256
1257 /* Update mask */
1258 triggers.overlay_update = true;
1259 triggers.surface_update = true;
1260
1261 dc_stream_set_static_screen_events(core_freesync->dc,
1262 streams, num_streams,
1263 &triggers);
1264 }
1265 }
1266
1267 /* Program freesync according to current state*/
1268 set_freesync_on_streams(core_freesync, streams, num_streams);
1269}
1270
1271/* Add the timestamps to the cache and determine whether BTR programming
1272 * is required, depending on the times calculated
1273 */
1274static void update_timestamps(struct core_freesync *core_freesync,
1275 const struct dc_stream_state *stream, unsigned int map_index,
1276 unsigned int last_render_time_in_us)
1277{
1278 struct freesync_state *state = &core_freesync->map[map_index].state;
1279
1280 state->time.render_times[state->time.render_times_index] =
1281 last_render_time_in_us;
1282 state->time.render_times_index++;
1283
1284 if (state->time.render_times_index >= RENDER_TIMES_MAX_COUNT)
1285 state->time.render_times_index = 0;
1286
1287 if (last_render_time_in_us + BTR_EXIT_MARGIN <
1288 state->time.max_render_time_in_us) {
1289
1290 /* Exit Below the Range */
1291 if (state->btr.btr_active) {
1292
1293 state->btr.program_btr = true;
1294 state->btr.btr_active = false;
1295 state->btr.frame_counter = 0;
1296
1297 /* Exit Fixed Refresh mode */
1298 } else if (state->fixed_refresh.fixed_active) {
1299
1300 state->fixed_refresh.frame_counter++;
1301
1302 if (state->fixed_refresh.frame_counter >
1303 FIXED_REFRESH_EXIT_FRAME_COUNT) {
1304 state->fixed_refresh.frame_counter = 0;
1305 state->fixed_refresh.program_fixed = true;
1306 state->fixed_refresh.fixed_active = false;
1307 }
1308 }
1309
1310 } else if (last_render_time_in_us > state->time.max_render_time_in_us) {
1311
1312 /* Enter Below the Range */
1313 if (!state->btr.btr_active &&
1314 core_freesync->map[map_index].caps->btr_supported) {
1315
1316 state->btr.program_btr = true;
1317 state->btr.btr_active = true;
1318
1319 /* Enter Fixed Refresh mode */
1320 } else if (!state->fixed_refresh.fixed_active &&
1321 !core_freesync->map[map_index].caps->btr_supported) {
1322
1323 state->fixed_refresh.frame_counter++;
1324
1325 if (state->fixed_refresh.frame_counter >
1326 FIXED_REFRESH_ENTER_FRAME_COUNT) {
1327 state->fixed_refresh.frame_counter = 0;
1328 state->fixed_refresh.program_fixed = true;
1329 state->fixed_refresh.fixed_active = true;
1330 }
1331 }
1332 }
1333
1334 /* When Below the Range is active, must react on every frame */
1335 if (state->btr.btr_active)
1336 state->btr.program_btr = true;
1337}
1338
1339static void apply_below_the_range(struct core_freesync *core_freesync,
1340 struct dc_stream_state *stream, unsigned int map_index,
1341 unsigned int last_render_time_in_us)
1342{
1343 unsigned int inserted_frame_duration_in_us = 0;
1344 unsigned int mid_point_frames_ceil = 0;
1345 unsigned int mid_point_frames_floor = 0;
1346 unsigned int frame_time_in_us = 0;
1347 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
1348 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
1349 unsigned int frames_to_insert = 0;
1350 unsigned int min_frame_duration_in_ns = 0;
1351 struct freesync_state *state = &core_freesync->map[map_index].state;
1352
1353 if (!state->btr.program_btr)
1354 return;
1355
1356 state->btr.program_btr = false;
1357
1358 min_frame_duration_in_ns = ((unsigned int) (div64_u64(
1359 (1000000000ULL * 1000000),
1360 state->nominal_refresh_rate_in_micro_hz)));
1361
1362 /* Program BTR */
1363
1364 /* BTR set to "not active" so disengage */
1365 if (!state->btr.btr_active)
1366
1367 /* Restore FreeSync */
1368 set_freesync_on_streams(core_freesync, &stream, 1);
1369
1370 /* BTR set to "active" so engage */
1371 else {
1372
1373 /* Calculate number of midPoint frames that could fit within
1374 * the render time interval- take ceil of this value
1375 */
1376 mid_point_frames_ceil = (last_render_time_in_us +
1377 state->btr.mid_point_in_us- 1) /
1378 state->btr.mid_point_in_us;
1379
1380 if (mid_point_frames_ceil > 0) {
1381
1382 frame_time_in_us = last_render_time_in_us /
1383 mid_point_frames_ceil;
1384 delta_from_mid_point_in_us_1 =
1385 (state->btr.mid_point_in_us >
1386 frame_time_in_us) ?
1387 (state->btr.mid_point_in_us - frame_time_in_us):
1388 (frame_time_in_us - state->btr.mid_point_in_us);
1389 }
1390
1391 /* Calculate number of midPoint frames that could fit within
1392 * the render time interval- take floor of this value
1393 */
1394 mid_point_frames_floor = last_render_time_in_us /
1395 state->btr.mid_point_in_us;
1396
1397 if (mid_point_frames_floor > 0) {
1398
1399 frame_time_in_us = last_render_time_in_us /
1400 mid_point_frames_floor;
1401 delta_from_mid_point_in_us_2 =
1402 (state->btr.mid_point_in_us >
1403 frame_time_in_us) ?
1404 (state->btr.mid_point_in_us - frame_time_in_us):
1405 (frame_time_in_us - state->btr.mid_point_in_us);
1406 }
1407
1408 /* Choose number of frames to insert based on how close it
1409 * can get to the mid point of the variable range.
1410 */
1411 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2)
1412 frames_to_insert = mid_point_frames_ceil;
1413 else
1414 frames_to_insert = mid_point_frames_floor;
1415
1416 /* Either we've calculated the number of frames to insert,
1417 * or we need to insert min duration frames
1418 */
1419 if (frames_to_insert > 0)
1420 inserted_frame_duration_in_us = last_render_time_in_us /
1421 frames_to_insert;
1422
1423 if (inserted_frame_duration_in_us <
1424 state->time.min_render_time_in_us)
1425
1426 inserted_frame_duration_in_us =
1427 state->time.min_render_time_in_us;
1428
1429 /* Cache the calculated variables */
1430 state->btr.inserted_frame_duration_in_us =
1431 inserted_frame_duration_in_us;
1432 state->btr.frames_to_insert = frames_to_insert;
1433 state->btr.frame_counter = frames_to_insert;
1434
1435 }
1436}
1437
1438static void apply_fixed_refresh(struct core_freesync *core_freesync,
1439 struct dc_stream_state *stream, unsigned int map_index)
1440{
1441 unsigned int vmin = 0, vmax = 0;
1442 struct freesync_state *state = &core_freesync->map[map_index].state;
1443
1444 if (!state->fixed_refresh.program_fixed)
1445 return;
1446
1447 state->fixed_refresh.program_fixed = false;
1448
1449 /* Program Fixed Refresh */
1450
1451 /* Fixed Refresh set to "not active" so disengage */
1452 if (!state->fixed_refresh.fixed_active) {
1453 set_freesync_on_streams(core_freesync, &stream, 1);
1454
1455 /* Fixed Refresh set to "active" so engage (fix to max) */
1456 } else {
1457
1458 vmin = state->freesync_range.vmin;
1459 vmax = vmin;
1460 adjust_vmin_vmax(core_freesync, &stream, map_index,
1461 1, vmin, vmax);
1462 }
1463}
1464
1465void mod_freesync_pre_update_plane_addresses(struct mod_freesync *mod_freesync,
1466 struct dc_stream_state **streams, int num_streams,
1467 unsigned int curr_time_stamp_in_us)
1468{
1469 unsigned int stream_index, map_index, last_render_time_in_us = 0;
1470 struct core_freesync *core_freesync = NULL;
1471
1472 if (mod_freesync == NULL)
1473 return;
1474
1475 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1476
1477 for (stream_index = 0; stream_index < num_streams; stream_index++) {
1478
1479 map_index = map_index_from_stream(core_freesync,
1480 streams[stream_index]);
1481
1482 if (core_freesync->map[map_index].caps->supported) {
1483
1484 last_render_time_in_us = curr_time_stamp_in_us -
1485 core_freesync->map[map_index].state.time.
1486 prev_time_stamp_in_us;
1487
1488 /* Add the timestamps to the cache and determine
1489 * whether BTR program is required
1490 */
1491 update_timestamps(core_freesync, streams[stream_index],
1492 map_index, last_render_time_in_us);
1493
1494 if (core_freesync->map[map_index].state.fullscreen &&
1495 core_freesync->map[map_index].user_enable.
1496 enable_for_gaming) {
1497
1498 if (core_freesync->map[map_index].caps->btr_supported) {
1499
1500 apply_below_the_range(core_freesync,
1501 streams[stream_index], map_index,
1502 last_render_time_in_us);
1503 } else {
1504 apply_fixed_refresh(core_freesync,
1505 streams[stream_index], map_index);
1506 }
1507 }
1508
1509 core_freesync->map[map_index].state.time.
1510 prev_time_stamp_in_us = curr_time_stamp_in_us;
1511 }
1512
1513 }
1514}
1515
1516void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
1517 struct dc_stream_state **streams, int num_streams,
1518 unsigned int *v_total_min, unsigned int *v_total_max,
1519 unsigned int *event_triggers,
1520 unsigned int *window_min, unsigned int *window_max,
1521 unsigned int *lfc_mid_point_in_us,
1522 unsigned int *inserted_frames,
1523 unsigned int *inserted_duration_in_us)
1524{
1525 unsigned int stream_index, map_index;
1526 struct core_freesync *core_freesync = NULL;
1527
1528 if (mod_freesync == NULL)
1529 return;
1530
1531 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1532
1533 for (stream_index = 0; stream_index < num_streams; stream_index++) {
1534
1535 map_index = map_index_from_stream(core_freesync,
1536 streams[stream_index]);
1537
1538 if (core_freesync->map[map_index].caps->supported) {
1539 struct freesync_state state =
1540 core_freesync->map[map_index].state;
1541 *v_total_min = state.vmin;
1542 *v_total_max = state.vmax;
1543 *event_triggers = 0;
1544 *window_min = state.time.min_window;
1545 *window_max = state.time.max_window;
1546 *lfc_mid_point_in_us = state.btr.mid_point_in_us;
1547 *inserted_frames = state.btr.frames_to_insert;
1548 *inserted_duration_in_us =
1549 state.btr.inserted_frame_duration_in_us;
1550 }
1551
1552 }
1553}
1554
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "dm_services.h"
27#include "dc.h"
28#include "mod_freesync.h"
29#include "core_types.h"
30
31#define MOD_FREESYNC_MAX_CONCURRENT_STREAMS 32
32
33#define MIN_REFRESH_RANGE 10
34/* Refresh rate ramp at a fixed rate of 65 Hz/second */
35#define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65)
36/* Number of elements in the render times cache array */
37#define RENDER_TIMES_MAX_COUNT 10
38/* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */
39#define BTR_MAX_MARGIN 2500
40/* Threshold to change BTR multiplier (to avoid frequent changes) */
41#define BTR_DRIFT_MARGIN 2000
42/* Threshold to exit fixed refresh rate */
43#define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 1
44/* Number of consecutive frames to check before entering/exiting fixed refresh */
45#define FIXED_REFRESH_ENTER_FRAME_COUNT 5
46#define FIXED_REFRESH_EXIT_FRAME_COUNT 10
47/* Flip interval workaround constants */
48#define VSYNCS_BETWEEN_FLIP_THRESHOLD 2
49#define FREESYNC_CONSEC_FLIP_AFTER_VSYNC 5
50#define FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US 500
51
52struct core_freesync {
53 struct mod_freesync public;
54 struct dc *dc;
55};
56
57#define MOD_FREESYNC_TO_CORE(mod_freesync)\
58 container_of(mod_freesync, struct core_freesync, public)
59
60struct mod_freesync *mod_freesync_create(struct dc *dc)
61{
62 struct core_freesync *core_freesync =
63 kzalloc(sizeof(struct core_freesync), GFP_KERNEL);
64
65 if (core_freesync == NULL)
66 goto fail_alloc_context;
67
68 if (dc == NULL)
69 goto fail_construct;
70
71 core_freesync->dc = dc;
72 return &core_freesync->public;
73
74fail_construct:
75 kfree(core_freesync);
76
77fail_alloc_context:
78 return NULL;
79}
80
81void mod_freesync_destroy(struct mod_freesync *mod_freesync)
82{
83 struct core_freesync *core_freesync = NULL;
84 if (mod_freesync == NULL)
85 return;
86 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
87 kfree(core_freesync);
88}
89
90#if 0 /* Unused currently */
91static unsigned int calc_refresh_in_uhz_from_duration(
92 unsigned int duration_in_ns)
93{
94 unsigned int refresh_in_uhz =
95 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
96 duration_in_ns)));
97 return refresh_in_uhz;
98}
99#endif
100
101static unsigned int calc_duration_in_us_from_refresh_in_uhz(
102 unsigned int refresh_in_uhz)
103{
104 unsigned int duration_in_us =
105 ((unsigned int)(div64_u64((1000000000ULL * 1000),
106 refresh_in_uhz)));
107 return duration_in_us;
108}
109
110static unsigned int calc_duration_in_us_from_v_total(
111 const struct dc_stream_state *stream,
112 const struct mod_vrr_params *in_vrr,
113 unsigned int v_total)
114{
115 unsigned int duration_in_us =
116 (unsigned int)(div64_u64(((unsigned long long)(v_total)
117 * 10000) * stream->timing.h_total,
118 stream->timing.pix_clk_100hz));
119
120 return duration_in_us;
121}
122
123unsigned int mod_freesync_calc_v_total_from_refresh(
124 const struct dc_stream_state *stream,
125 unsigned int refresh_in_uhz)
126{
127 unsigned int v_total;
128 unsigned int frame_duration_in_ns;
129
130 frame_duration_in_ns =
131 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
132 refresh_in_uhz)));
133
134 v_total = div64_u64(div64_u64(((unsigned long long)(
135 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
136 stream->timing.h_total), 1000000);
137
138 /* v_total cannot be less than nominal */
139 if (v_total < stream->timing.v_total) {
140 ASSERT(v_total < stream->timing.v_total);
141 v_total = stream->timing.v_total;
142 }
143
144 return v_total;
145}
146
147static unsigned int calc_v_total_from_duration(
148 const struct dc_stream_state *stream,
149 const struct mod_vrr_params *vrr,
150 unsigned int duration_in_us)
151{
152 unsigned int v_total = 0;
153
154 if (duration_in_us < vrr->min_duration_in_us)
155 duration_in_us = vrr->min_duration_in_us;
156
157 if (duration_in_us > vrr->max_duration_in_us)
158 duration_in_us = vrr->max_duration_in_us;
159
160 if (dc_is_hdmi_signal(stream->signal)) {
161 uint32_t h_total_up_scaled;
162
163 h_total_up_scaled = stream->timing.h_total * 10000;
164 v_total = div_u64((unsigned long long)duration_in_us
165 * stream->timing.pix_clk_100hz + (h_total_up_scaled - 1),
166 h_total_up_scaled);
167 } else {
168 v_total = div64_u64(div64_u64(((unsigned long long)(
169 duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
170 stream->timing.h_total), 1000);
171 }
172
173 /* v_total cannot be less than nominal */
174 if (v_total < stream->timing.v_total) {
175 ASSERT(v_total < stream->timing.v_total);
176 v_total = stream->timing.v_total;
177 }
178
179 return v_total;
180}
181
182static void update_v_total_for_static_ramp(
183 struct core_freesync *core_freesync,
184 const struct dc_stream_state *stream,
185 struct mod_vrr_params *in_out_vrr)
186{
187 unsigned int v_total = 0;
188 unsigned int current_duration_in_us =
189 calc_duration_in_us_from_v_total(
190 stream, in_out_vrr,
191 in_out_vrr->adjust.v_total_max);
192 unsigned int target_duration_in_us =
193 calc_duration_in_us_from_refresh_in_uhz(
194 in_out_vrr->fixed.target_refresh_in_uhz);
195 bool ramp_direction_is_up = (current_duration_in_us >
196 target_duration_in_us) ? true : false;
197
198 /* Calculate ratio between new and current frame duration with 3 digit */
199 unsigned int frame_duration_ratio = div64_u64(1000000,
200 (1000 + div64_u64(((unsigned long long)(
201 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) *
202 current_duration_in_us),
203 1000000)));
204
205 /* Calculate delta between new and current frame duration in us */
206 unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
207 current_duration_in_us) *
208 (1000 - frame_duration_ratio)), 1000);
209
210 /* Adjust frame duration delta based on ratio between current and
211 * standard frame duration (frame duration at 60 Hz refresh rate).
212 */
213 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
214 frame_duration_delta) * current_duration_in_us), 16666);
215
216 /* Going to a higher refresh rate (lower frame duration) */
217 if (ramp_direction_is_up) {
218 /* Reduce frame duration */
219 current_duration_in_us -= ramp_rate_interpolated;
220
221 /* Adjust for frame duration below min */
222 if (current_duration_in_us <= target_duration_in_us) {
223 in_out_vrr->fixed.ramping_active = false;
224 in_out_vrr->fixed.ramping_done = true;
225 current_duration_in_us =
226 calc_duration_in_us_from_refresh_in_uhz(
227 in_out_vrr->fixed.target_refresh_in_uhz);
228 }
229 /* Going to a lower refresh rate (larger frame duration) */
230 } else {
231 /* Increase frame duration */
232 current_duration_in_us += ramp_rate_interpolated;
233
234 /* Adjust for frame duration above max */
235 if (current_duration_in_us >= target_duration_in_us) {
236 in_out_vrr->fixed.ramping_active = false;
237 in_out_vrr->fixed.ramping_done = true;
238 current_duration_in_us =
239 calc_duration_in_us_from_refresh_in_uhz(
240 in_out_vrr->fixed.target_refresh_in_uhz);
241 }
242 }
243
244 v_total = div64_u64(div64_u64(((unsigned long long)(
245 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
246 stream->timing.h_total), 1000);
247
248 /* v_total cannot be less than nominal */
249 if (v_total < stream->timing.v_total)
250 v_total = stream->timing.v_total;
251
252 in_out_vrr->adjust.v_total_min = v_total;
253 in_out_vrr->adjust.v_total_max = v_total;
254}
255
256static void apply_below_the_range(struct core_freesync *core_freesync,
257 const struct dc_stream_state *stream,
258 unsigned int last_render_time_in_us,
259 struct mod_vrr_params *in_out_vrr)
260{
261 unsigned int inserted_frame_duration_in_us = 0;
262 unsigned int mid_point_frames_ceil = 0;
263 unsigned int mid_point_frames_floor = 0;
264 unsigned int frame_time_in_us = 0;
265 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
266 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
267 unsigned int frames_to_insert = 0;
268 unsigned int delta_from_mid_point_delta_in_us;
269 unsigned int max_render_time_in_us =
270 in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us;
271
272 /* Program BTR */
273 if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) {
274 /* Exit Below the Range */
275 if (in_out_vrr->btr.btr_active) {
276 in_out_vrr->btr.frame_counter = 0;
277 in_out_vrr->btr.btr_active = false;
278 }
279 } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) {
280 /* Enter Below the Range */
281 if (!in_out_vrr->btr.btr_active) {
282 in_out_vrr->btr.btr_active = true;
283 }
284 }
285
286 /* BTR set to "not active" so disengage */
287 if (!in_out_vrr->btr.btr_active) {
288 in_out_vrr->btr.inserted_duration_in_us = 0;
289 in_out_vrr->btr.frames_to_insert = 0;
290 in_out_vrr->btr.frame_counter = 0;
291
292 /* Restore FreeSync */
293 in_out_vrr->adjust.v_total_min =
294 mod_freesync_calc_v_total_from_refresh(stream,
295 in_out_vrr->max_refresh_in_uhz);
296 in_out_vrr->adjust.v_total_max =
297 mod_freesync_calc_v_total_from_refresh(stream,
298 in_out_vrr->min_refresh_in_uhz);
299 /* BTR set to "active" so engage */
300 } else {
301
302 /* Calculate number of midPoint frames that could fit within
303 * the render time interval - take ceil of this value
304 */
305 mid_point_frames_ceil = (last_render_time_in_us +
306 in_out_vrr->btr.mid_point_in_us - 1) /
307 in_out_vrr->btr.mid_point_in_us;
308
309 if (mid_point_frames_ceil > 0) {
310 frame_time_in_us = last_render_time_in_us /
311 mid_point_frames_ceil;
312 delta_from_mid_point_in_us_1 =
313 (in_out_vrr->btr.mid_point_in_us >
314 frame_time_in_us) ?
315 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
316 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
317 }
318
319 /* Calculate number of midPoint frames that could fit within
320 * the render time interval - take floor of this value
321 */
322 mid_point_frames_floor = last_render_time_in_us /
323 in_out_vrr->btr.mid_point_in_us;
324
325 if (mid_point_frames_floor > 0) {
326
327 frame_time_in_us = last_render_time_in_us /
328 mid_point_frames_floor;
329 delta_from_mid_point_in_us_2 =
330 (in_out_vrr->btr.mid_point_in_us >
331 frame_time_in_us) ?
332 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
333 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
334 }
335
336 /* Choose number of frames to insert based on how close it
337 * can get to the mid point of the variable range.
338 * - Delta for CEIL: delta_from_mid_point_in_us_1
339 * - Delta for FLOOR: delta_from_mid_point_in_us_2
340 */
341 if ((last_render_time_in_us / mid_point_frames_ceil) < in_out_vrr->min_duration_in_us) {
342 /* Check for out of range.
343 * If using CEIL produces a value that is out of range,
344 * then we are forced to use FLOOR.
345 */
346 frames_to_insert = mid_point_frames_floor;
347 } else if (mid_point_frames_floor < 2) {
348 /* Check if FLOOR would result in non-LFC. In this case
349 * choose to use CEIL
350 */
351 frames_to_insert = mid_point_frames_ceil;
352 } else if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
353 /* If choosing CEIL results in a frame duration that is
354 * closer to the mid point of the range.
355 * Choose CEIL
356 */
357 frames_to_insert = mid_point_frames_ceil;
358 } else {
359 /* If choosing FLOOR results in a frame duration that is
360 * closer to the mid point of the range.
361 * Choose FLOOR
362 */
363 frames_to_insert = mid_point_frames_floor;
364 }
365
366 /* Prefer current frame multiplier when BTR is enabled unless it drifts
367 * too far from the midpoint
368 */
369 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
370 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 -
371 delta_from_mid_point_in_us_1;
372 } else {
373 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 -
374 delta_from_mid_point_in_us_2;
375 }
376 if (in_out_vrr->btr.frames_to_insert != 0 &&
377 delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN) {
378 if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) <
379 max_render_time_in_us) &&
380 ((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) >
381 in_out_vrr->min_duration_in_us))
382 frames_to_insert = in_out_vrr->btr.frames_to_insert;
383 }
384
385 /* Either we've calculated the number of frames to insert,
386 * or we need to insert min duration frames
387 */
388 if (last_render_time_in_us / frames_to_insert <
389 in_out_vrr->min_duration_in_us){
390 frames_to_insert -= (frames_to_insert > 1) ?
391 1 : 0;
392 }
393
394 if (frames_to_insert > 0)
395 inserted_frame_duration_in_us = last_render_time_in_us /
396 frames_to_insert;
397
398 if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us)
399 inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us;
400
401 /* Cache the calculated variables */
402 in_out_vrr->btr.inserted_duration_in_us =
403 inserted_frame_duration_in_us;
404 in_out_vrr->btr.frames_to_insert = frames_to_insert;
405 in_out_vrr->btr.frame_counter = frames_to_insert;
406 }
407}
408
409static void apply_fixed_refresh(struct core_freesync *core_freesync,
410 const struct dc_stream_state *stream,
411 unsigned int last_render_time_in_us,
412 struct mod_vrr_params *in_out_vrr)
413{
414 bool update = false;
415 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
416
417 /* Compute the exit refresh rate and exit frame duration */
418 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us)
419 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ));
420 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz;
421
422 if (last_render_time_in_us < exit_frame_duration_in_us) {
423 /* Exit Fixed Refresh mode */
424 if (in_out_vrr->fixed.fixed_active) {
425 in_out_vrr->fixed.frame_counter++;
426
427 if (in_out_vrr->fixed.frame_counter >
428 FIXED_REFRESH_EXIT_FRAME_COUNT) {
429 in_out_vrr->fixed.frame_counter = 0;
430 in_out_vrr->fixed.fixed_active = false;
431 in_out_vrr->fixed.target_refresh_in_uhz = 0;
432 update = true;
433 }
434 } else
435 in_out_vrr->fixed.frame_counter = 0;
436 } else if (last_render_time_in_us > max_render_time_in_us) {
437 /* Enter Fixed Refresh mode */
438 if (!in_out_vrr->fixed.fixed_active) {
439 in_out_vrr->fixed.frame_counter++;
440
441 if (in_out_vrr->fixed.frame_counter >
442 FIXED_REFRESH_ENTER_FRAME_COUNT) {
443 in_out_vrr->fixed.frame_counter = 0;
444 in_out_vrr->fixed.fixed_active = true;
445 in_out_vrr->fixed.target_refresh_in_uhz =
446 in_out_vrr->max_refresh_in_uhz;
447 update = true;
448 }
449 } else
450 in_out_vrr->fixed.frame_counter = 0;
451 }
452
453 if (update) {
454 if (in_out_vrr->fixed.fixed_active) {
455 in_out_vrr->adjust.v_total_min =
456 mod_freesync_calc_v_total_from_refresh(
457 stream, in_out_vrr->max_refresh_in_uhz);
458 in_out_vrr->adjust.v_total_max =
459 in_out_vrr->adjust.v_total_min;
460 } else {
461 in_out_vrr->adjust.v_total_min =
462 mod_freesync_calc_v_total_from_refresh(stream,
463 in_out_vrr->max_refresh_in_uhz);
464 in_out_vrr->adjust.v_total_max =
465 mod_freesync_calc_v_total_from_refresh(stream,
466 in_out_vrr->min_refresh_in_uhz);
467 }
468 }
469}
470
471static void determine_flip_interval_workaround_req(struct mod_vrr_params *in_vrr,
472 unsigned int curr_time_stamp_in_us)
473{
474 in_vrr->flip_interval.vsync_to_flip_in_us = curr_time_stamp_in_us -
475 in_vrr->flip_interval.v_update_timestamp_in_us;
476
477 /* Determine conditions for stopping workaround */
478 if (in_vrr->flip_interval.flip_interval_workaround_active &&
479 in_vrr->flip_interval.vsyncs_between_flip < VSYNCS_BETWEEN_FLIP_THRESHOLD &&
480 in_vrr->flip_interval.vsync_to_flip_in_us > FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US) {
481 in_vrr->flip_interval.flip_interval_detect_counter = 0;
482 in_vrr->flip_interval.program_flip_interval_workaround = true;
483 in_vrr->flip_interval.flip_interval_workaround_active = false;
484 } else {
485 /* Determine conditions for starting workaround */
486 if (in_vrr->flip_interval.vsyncs_between_flip >= VSYNCS_BETWEEN_FLIP_THRESHOLD &&
487 in_vrr->flip_interval.vsync_to_flip_in_us < FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US) {
488 /* Increase flip interval counter we have 2 vsyncs between flips and
489 * vsync to flip interval is less than 500us
490 */
491 in_vrr->flip_interval.flip_interval_detect_counter++;
492 if (in_vrr->flip_interval.flip_interval_detect_counter > FREESYNC_CONSEC_FLIP_AFTER_VSYNC) {
493 /* Start workaround if we detect 5 consecutive instances of the above case */
494 in_vrr->flip_interval.program_flip_interval_workaround = true;
495 in_vrr->flip_interval.flip_interval_workaround_active = true;
496 }
497 } else {
498 /* Reset the flip interval counter if we condition is no longer met */
499 in_vrr->flip_interval.flip_interval_detect_counter = 0;
500 }
501 }
502
503 in_vrr->flip_interval.vsyncs_between_flip = 0;
504}
505
506static bool vrr_settings_require_update(struct core_freesync *core_freesync,
507 struct mod_freesync_config *in_config,
508 unsigned int min_refresh_in_uhz,
509 unsigned int max_refresh_in_uhz,
510 struct mod_vrr_params *in_vrr)
511{
512 if (in_vrr->state != in_config->state) {
513 return true;
514 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED &&
515 in_vrr->fixed.target_refresh_in_uhz !=
516 in_config->fixed_refresh_in_uhz) {
517 return true;
518 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) {
519 return true;
520 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) {
521 return true;
522 }
523
524 return false;
525}
526
527bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
528 const struct dc_stream_state *stream,
529 unsigned int *vmin,
530 unsigned int *vmax)
531{
532 *vmin = stream->adjust.v_total_min;
533 *vmax = stream->adjust.v_total_max;
534
535 return true;
536}
537
538bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
539 struct dc_stream_state *stream,
540 unsigned int *nom_v_pos,
541 unsigned int *v_pos)
542{
543 struct core_freesync *core_freesync = NULL;
544 struct crtc_position position;
545
546 if (mod_freesync == NULL)
547 return false;
548
549 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
550
551 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
552 &position.vertical_count,
553 &position.nominal_vcount)) {
554
555 *nom_v_pos = position.nominal_vcount;
556 *v_pos = position.vertical_count;
557
558 return true;
559 }
560
561 return false;
562}
563
564static void build_vrr_infopacket_data_v1(const struct mod_vrr_params *vrr,
565 struct dc_info_packet *infopacket,
566 bool freesync_on_desktop)
567{
568 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
569 infopacket->sb[1] = 0x1A;
570
571 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
572 infopacket->sb[2] = 0x00;
573
574 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
575 infopacket->sb[3] = 0x00;
576
577 /* PB4 = Reserved */
578
579 /* PB5 = Reserved */
580
581 /* PB6 = [Bits 7:3 = Reserved] */
582
583 /* PB6 = [Bit 0 = FreeSync Supported] */
584 if (vrr->state != VRR_STATE_UNSUPPORTED)
585 infopacket->sb[6] |= 0x01;
586
587 /* PB6 = [Bit 1 = FreeSync Enabled] */
588 if (vrr->state != VRR_STATE_DISABLED &&
589 vrr->state != VRR_STATE_UNSUPPORTED)
590 infopacket->sb[6] |= 0x02;
591
592 if (freesync_on_desktop) {
593 /* PB6 = [Bit 2 = FreeSync Active] */
594 if (vrr->state != VRR_STATE_DISABLED &&
595 vrr->state != VRR_STATE_UNSUPPORTED)
596 infopacket->sb[6] |= 0x04;
597 } else {
598 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
599 vrr->state == VRR_STATE_ACTIVE_FIXED)
600 infopacket->sb[6] |= 0x04;
601 }
602
603 // For v1 & 2 infoframes program nominal if non-fs mode, otherwise full range
604 /* PB7 = FreeSync Minimum refresh rate (Hz) */
605 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
606 vrr->state == VRR_STATE_ACTIVE_FIXED) {
607 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000);
608 } else {
609 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
610 }
611
612 /* PB8 = FreeSync Maximum refresh rate (Hz)
613 * Note: We should never go above the field rate of the mode timing set.
614 */
615 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
616}
617
618static void build_vrr_infopacket_data_v3(const struct mod_vrr_params *vrr,
619 struct dc_info_packet *infopacket)
620{
621 unsigned int min_refresh;
622 unsigned int max_refresh;
623 unsigned int fixed_refresh;
624 unsigned int min_programmed;
625 unsigned int max_programmed;
626
627 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
628 infopacket->sb[1] = 0x1A;
629
630 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
631 infopacket->sb[2] = 0x00;
632
633 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
634 infopacket->sb[3] = 0x00;
635
636 /* PB4 = Reserved */
637
638 /* PB5 = Reserved */
639
640 /* PB6 = [Bits 7:3 = Reserved] */
641
642 /* PB6 = [Bit 0 = FreeSync Supported] */
643 if (vrr->state != VRR_STATE_UNSUPPORTED)
644 infopacket->sb[6] |= 0x01;
645
646 /* PB6 = [Bit 1 = FreeSync Enabled] */
647 if (vrr->state != VRR_STATE_DISABLED &&
648 vrr->state != VRR_STATE_UNSUPPORTED)
649 infopacket->sb[6] |= 0x02;
650
651 /* PB6 = [Bit 2 = FreeSync Active] */
652 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
653 vrr->state == VRR_STATE_ACTIVE_FIXED)
654 infopacket->sb[6] |= 0x04;
655
656 min_refresh = (vrr->min_refresh_in_uhz + 500000) / 1000000;
657 max_refresh = (vrr->max_refresh_in_uhz + 500000) / 1000000;
658 fixed_refresh = (vrr->fixed_refresh_in_uhz + 500000) / 1000000;
659
660 min_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh :
661 (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? min_refresh :
662 (vrr->state == VRR_STATE_INACTIVE) ? min_refresh :
663 max_refresh; // Non-fs case, program nominal range
664
665 max_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh :
666 (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? max_refresh :
667 max_refresh;// Non-fs case, program nominal range
668
669 /* PB7 = FreeSync Minimum refresh rate (Hz) */
670 infopacket->sb[7] = min_programmed & 0xFF;
671
672 /* PB8 = FreeSync Maximum refresh rate (Hz) */
673 infopacket->sb[8] = max_programmed & 0xFF;
674
675 /* PB11 : MSB FreeSync Minimum refresh rate [Hz] - bits 9:8 */
676 infopacket->sb[11] = (min_programmed >> 8) & 0x03;
677
678 /* PB12 : MSB FreeSync Maximum refresh rate [Hz] - bits 9:8 */
679 infopacket->sb[12] = (max_programmed >> 8) & 0x03;
680
681 /* PB16 : Reserved bits 7:1, FixedRate bit 0 */
682 infopacket->sb[16] = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? 1 : 0;
683}
684
685static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
686 struct dc_info_packet *infopacket)
687{
688 if (app_tf != TRANSFER_FUNC_UNKNOWN) {
689 infopacket->valid = true;
690
691 if (app_tf != TRANSFER_FUNC_PQ2084) {
692 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active]
693 if (app_tf == TRANSFER_FUNC_GAMMA_22)
694 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
695 }
696 }
697}
698
699static void build_vrr_infopacket_header_v1(enum signal_type signal,
700 struct dc_info_packet *infopacket,
701 unsigned int *payload_size)
702{
703 if (dc_is_hdmi_signal(signal)) {
704
705 /* HEADER */
706
707 /* HB0 = Packet Type = 0x83 (Source Product
708 * Descriptor InfoFrame)
709 */
710 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
711
712 /* HB1 = Version = 0x01 */
713 infopacket->hb1 = 0x01;
714
715 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
716 infopacket->hb2 = 0x08;
717
718 *payload_size = 0x08;
719
720 } else if (dc_is_dp_signal(signal)) {
721
722 /* HEADER */
723
724 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
725 * when used to associate audio related info packets
726 */
727 infopacket->hb0 = 0x00;
728
729 /* HB1 = Packet Type = 0x83 (Source Product
730 * Descriptor InfoFrame)
731 */
732 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
733
734 /* HB2 = [Bits 7:0 = Least significant eight bits -
735 * For INFOFRAME, the value must be 1Bh]
736 */
737 infopacket->hb2 = 0x1B;
738
739 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
740 * [Bits 1:0 = Most significant two bits = 0x00]
741 */
742 infopacket->hb3 = 0x04;
743
744 *payload_size = 0x1B;
745 }
746}
747
748static void build_vrr_infopacket_header_v2(enum signal_type signal,
749 struct dc_info_packet *infopacket,
750 unsigned int *payload_size)
751{
752 if (dc_is_hdmi_signal(signal)) {
753
754 /* HEADER */
755
756 /* HB0 = Packet Type = 0x83 (Source Product
757 * Descriptor InfoFrame)
758 */
759 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
760
761 /* HB1 = Version = 0x02 */
762 infopacket->hb1 = 0x02;
763
764 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */
765 infopacket->hb2 = 0x09;
766
767 *payload_size = 0x09;
768 } else if (dc_is_dp_signal(signal)) {
769
770 /* HEADER */
771
772 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
773 * when used to associate audio related info packets
774 */
775 infopacket->hb0 = 0x00;
776
777 /* HB1 = Packet Type = 0x83 (Source Product
778 * Descriptor InfoFrame)
779 */
780 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
781
782 /* HB2 = [Bits 7:0 = Least significant eight bits -
783 * For INFOFRAME, the value must be 1Bh]
784 */
785 infopacket->hb2 = 0x1B;
786
787 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
788 * [Bits 1:0 = Most significant two bits = 0x00]
789 */
790 infopacket->hb3 = 0x08;
791
792 *payload_size = 0x1B;
793 }
794}
795
796static void build_vrr_infopacket_header_v3(enum signal_type signal,
797 struct dc_info_packet *infopacket,
798 unsigned int *payload_size)
799{
800 unsigned char version;
801
802 version = 3;
803 if (dc_is_hdmi_signal(signal)) {
804
805 /* HEADER */
806
807 /* HB0 = Packet Type = 0x83 (Source Product
808 * Descriptor InfoFrame)
809 */
810 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
811
812 /* HB1 = Version = 0x03 */
813 infopacket->hb1 = version;
814
815 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length] */
816 infopacket->hb2 = 0x10;
817
818 *payload_size = 0x10;
819 } else if (dc_is_dp_signal(signal)) {
820
821 /* HEADER */
822
823 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
824 * when used to associate audio related info packets
825 */
826 infopacket->hb0 = 0x00;
827
828 /* HB1 = Packet Type = 0x83 (Source Product
829 * Descriptor InfoFrame)
830 */
831 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
832
833 /* HB2 = [Bits 7:0 = Least significant eight bits -
834 * For INFOFRAME, the value must be 1Bh]
835 */
836 infopacket->hb2 = 0x1B;
837
838 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
839 * [Bits 1:0 = Most significant two bits = 0x00]
840 */
841
842 infopacket->hb3 = (version & 0x3F) << 2;
843
844 *payload_size = 0x1B;
845 }
846}
847
848static void build_vrr_infopacket_checksum(unsigned int *payload_size,
849 struct dc_info_packet *infopacket)
850{
851 /* Calculate checksum */
852 unsigned int idx = 0;
853 unsigned char checksum = 0;
854
855 checksum += infopacket->hb0;
856 checksum += infopacket->hb1;
857 checksum += infopacket->hb2;
858 checksum += infopacket->hb3;
859
860 for (idx = 1; idx <= *payload_size; idx++)
861 checksum += infopacket->sb[idx];
862
863 /* PB0 = Checksum (one byte complement) */
864 infopacket->sb[0] = (unsigned char)(0x100 - checksum);
865
866 infopacket->valid = true;
867}
868
869static void build_vrr_infopacket_v1(enum signal_type signal,
870 const struct mod_vrr_params *vrr,
871 struct dc_info_packet *infopacket,
872 bool freesync_on_desktop)
873{
874 /* SPD info packet for FreeSync */
875 unsigned int payload_size = 0;
876
877 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size);
878 build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop);
879 build_vrr_infopacket_checksum(&payload_size, infopacket);
880
881 infopacket->valid = true;
882}
883
884static void build_vrr_infopacket_v2(enum signal_type signal,
885 const struct mod_vrr_params *vrr,
886 enum color_transfer_func app_tf,
887 struct dc_info_packet *infopacket,
888 bool freesync_on_desktop)
889{
890 unsigned int payload_size = 0;
891
892 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
893 build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop);
894
895 build_vrr_infopacket_fs2_data(app_tf, infopacket);
896
897 build_vrr_infopacket_checksum(&payload_size, infopacket);
898
899 infopacket->valid = true;
900}
901#ifndef TRIM_FSFT
902static void build_vrr_infopacket_fast_transport_data(
903 bool ftActive,
904 unsigned int ftOutputRate,
905 struct dc_info_packet *infopacket)
906{
907 /* PB9 : bit7 - fast transport Active*/
908 unsigned char activeBit = (ftActive) ? 1 << 7 : 0;
909
910 infopacket->sb[1] &= ~activeBit; //clear bit
911 infopacket->sb[1] |= activeBit; //set bit
912
913 /* PB13 : Target Output Pixel Rate [kHz] - bits 7:0 */
914 infopacket->sb[13] = ftOutputRate & 0xFF;
915
916 /* PB14 : Target Output Pixel Rate [kHz] - bits 15:8 */
917 infopacket->sb[14] = (ftOutputRate >> 8) & 0xFF;
918
919 /* PB15 : Target Output Pixel Rate [kHz] - bits 23:16 */
920 infopacket->sb[15] = (ftOutputRate >> 16) & 0xFF;
921
922}
923#endif
924
925static void build_vrr_infopacket_v3(enum signal_type signal,
926 const struct mod_vrr_params *vrr,
927#ifndef TRIM_FSFT
928 bool ftActive, unsigned int ftOutputRate,
929#endif
930 enum color_transfer_func app_tf,
931 struct dc_info_packet *infopacket)
932{
933 unsigned int payload_size = 0;
934
935 build_vrr_infopacket_header_v3(signal, infopacket, &payload_size);
936 build_vrr_infopacket_data_v3(vrr, infopacket);
937
938 build_vrr_infopacket_fs2_data(app_tf, infopacket);
939
940#ifndef TRIM_FSFT
941 build_vrr_infopacket_fast_transport_data(
942 ftActive,
943 ftOutputRate,
944 infopacket);
945#endif
946
947 build_vrr_infopacket_checksum(&payload_size, infopacket);
948
949 infopacket->valid = true;
950}
951
952static void build_vrr_infopacket_sdp_v1_3(enum vrr_packet_type packet_type,
953 struct dc_info_packet *infopacket)
954{
955 uint8_t idx = 0, size = 0;
956
957 size = ((packet_type == PACKET_TYPE_FS_V1) ? 0x08 :
958 (packet_type == PACKET_TYPE_FS_V3) ? 0x10 :
959 0x09);
960
961 for (idx = infopacket->hb2; idx > 1; idx--) // Data Byte Count: 0x1B
962 infopacket->sb[idx] = infopacket->sb[idx-1];
963
964 infopacket->sb[1] = size; // Length
965 infopacket->sb[0] = (infopacket->hb3 >> 2) & 0x3F;//Version
966 infopacket->hb3 = (0x13 << 2); // Header,SDP 1.3
967 infopacket->hb2 = 0x1D;
968}
969
970void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
971 const struct dc_stream_state *stream,
972 const struct mod_vrr_params *vrr,
973 enum vrr_packet_type packet_type,
974 enum color_transfer_func app_tf,
975 struct dc_info_packet *infopacket,
976 bool pack_sdp_v1_3)
977{
978 /* SPD info packet for FreeSync
979 * VTEM info packet for HdmiVRR
980 * Check if Freesync is supported. Return if false. If true,
981 * set the corresponding bit in the info packet
982 */
983 if (!vrr->send_info_frame)
984 return;
985
986 switch (packet_type) {
987 case PACKET_TYPE_FS_V3:
988#ifndef TRIM_FSFT
989 // always populate with pixel rate.
990 build_vrr_infopacket_v3(
991 stream->signal, vrr,
992 stream->timing.flags.FAST_TRANSPORT,
993 (stream->timing.flags.FAST_TRANSPORT) ?
994 stream->timing.fast_transport_output_rate_100hz :
995 stream->timing.pix_clk_100hz,
996 app_tf, infopacket);
997#else
998 build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket);
999#endif
1000 break;
1001 case PACKET_TYPE_FS_V2:
1002 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop);
1003 break;
1004 case PACKET_TYPE_VRR:
1005 case PACKET_TYPE_FS_V1:
1006 default:
1007 build_vrr_infopacket_v1(stream->signal, vrr, infopacket, stream->freesync_on_desktop);
1008 }
1009
1010 if (true == pack_sdp_v1_3 &&
1011 true == dc_is_dp_signal(stream->signal) &&
1012 packet_type != PACKET_TYPE_VRR &&
1013 packet_type != PACKET_TYPE_VTEM)
1014 build_vrr_infopacket_sdp_v1_3(packet_type, infopacket);
1015}
1016
1017void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
1018 const struct dc_stream_state *stream,
1019 struct mod_freesync_config *in_config,
1020 struct mod_vrr_params *in_out_vrr)
1021{
1022 struct core_freesync *core_freesync = NULL;
1023 unsigned long long nominal_field_rate_in_uhz = 0;
1024 unsigned long long rounded_nominal_in_uhz = 0;
1025 unsigned int refresh_range = 0;
1026 unsigned long long min_refresh_in_uhz = 0;
1027 unsigned long long max_refresh_in_uhz = 0;
1028
1029 if (mod_freesync == NULL)
1030 return;
1031
1032 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1033
1034 /* Calculate nominal field rate for stream */
1035 nominal_field_rate_in_uhz =
1036 mod_freesync_calc_nominal_field_rate(stream);
1037
1038 min_refresh_in_uhz = in_config->min_refresh_in_uhz;
1039 max_refresh_in_uhz = in_config->max_refresh_in_uhz;
1040
1041 /* Full range may be larger than current video timing, so cap at nominal */
1042 if (max_refresh_in_uhz > nominal_field_rate_in_uhz)
1043 max_refresh_in_uhz = nominal_field_rate_in_uhz;
1044
1045 /* Full range may be larger than current video timing, so cap at nominal */
1046 if (min_refresh_in_uhz > max_refresh_in_uhz)
1047 min_refresh_in_uhz = max_refresh_in_uhz;
1048
1049 /* If a monitor reports exactly max refresh of 2x of min, enforce it on nominal */
1050 rounded_nominal_in_uhz =
1051 div_u64(nominal_field_rate_in_uhz + 50000, 100000) * 100000;
1052 if (in_config->max_refresh_in_uhz == (2 * in_config->min_refresh_in_uhz) &&
1053 in_config->max_refresh_in_uhz == rounded_nominal_in_uhz)
1054 min_refresh_in_uhz = div_u64(nominal_field_rate_in_uhz, 2);
1055
1056 if (!vrr_settings_require_update(core_freesync,
1057 in_config, (unsigned int)min_refresh_in_uhz, (unsigned int)max_refresh_in_uhz,
1058 in_out_vrr))
1059 return;
1060
1061 in_out_vrr->state = in_config->state;
1062 in_out_vrr->send_info_frame = in_config->vsif_supported;
1063
1064 if (in_config->state == VRR_STATE_UNSUPPORTED) {
1065 in_out_vrr->state = VRR_STATE_UNSUPPORTED;
1066 in_out_vrr->supported = false;
1067 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1068 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1069
1070 return;
1071
1072 } else {
1073 in_out_vrr->min_refresh_in_uhz = (unsigned int)min_refresh_in_uhz;
1074 in_out_vrr->max_duration_in_us =
1075 calc_duration_in_us_from_refresh_in_uhz(
1076 (unsigned int)min_refresh_in_uhz);
1077
1078 in_out_vrr->max_refresh_in_uhz = (unsigned int)max_refresh_in_uhz;
1079 in_out_vrr->min_duration_in_us =
1080 calc_duration_in_us_from_refresh_in_uhz(
1081 (unsigned int)max_refresh_in_uhz);
1082
1083 if (in_config->state == VRR_STATE_ACTIVE_FIXED)
1084 in_out_vrr->fixed_refresh_in_uhz = in_config->fixed_refresh_in_uhz;
1085 else
1086 in_out_vrr->fixed_refresh_in_uhz = 0;
1087
1088 refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000) -
1089+ div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000);
1090
1091 in_out_vrr->supported = true;
1092 }
1093
1094 in_out_vrr->fixed.ramping_active = in_config->ramping;
1095
1096 in_out_vrr->btr.btr_enabled = in_config->btr;
1097
1098 if (in_out_vrr->max_refresh_in_uhz < (2 * in_out_vrr->min_refresh_in_uhz))
1099 in_out_vrr->btr.btr_enabled = false;
1100 else {
1101 in_out_vrr->btr.margin_in_us = in_out_vrr->max_duration_in_us -
1102 2 * in_out_vrr->min_duration_in_us;
1103 if (in_out_vrr->btr.margin_in_us > BTR_MAX_MARGIN)
1104 in_out_vrr->btr.margin_in_us = BTR_MAX_MARGIN;
1105 }
1106
1107 in_out_vrr->btr.btr_active = false;
1108 in_out_vrr->btr.inserted_duration_in_us = 0;
1109 in_out_vrr->btr.frames_to_insert = 0;
1110 in_out_vrr->btr.frame_counter = 0;
1111 in_out_vrr->fixed.fixed_active = false;
1112 in_out_vrr->fixed.target_refresh_in_uhz = 0;
1113
1114 in_out_vrr->btr.mid_point_in_us =
1115 (in_out_vrr->min_duration_in_us +
1116 in_out_vrr->max_duration_in_us) / 2;
1117
1118 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) {
1119 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1120 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1121 } else if (in_out_vrr->state == VRR_STATE_DISABLED) {
1122 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1123 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1124 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) {
1125 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1126 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1127 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1128 refresh_range >= MIN_REFRESH_RANGE) {
1129
1130 in_out_vrr->adjust.v_total_min =
1131 mod_freesync_calc_v_total_from_refresh(stream,
1132 in_out_vrr->max_refresh_in_uhz);
1133 in_out_vrr->adjust.v_total_max =
1134 mod_freesync_calc_v_total_from_refresh(stream,
1135 in_out_vrr->min_refresh_in_uhz);
1136 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
1137 in_out_vrr->fixed.target_refresh_in_uhz =
1138 in_out_vrr->fixed_refresh_in_uhz;
1139 if (in_out_vrr->fixed.ramping_active &&
1140 in_out_vrr->fixed.fixed_active) {
1141 /* Do not update vtotals if ramping is already active
1142 * in order to continue ramp from current refresh.
1143 */
1144 in_out_vrr->fixed.fixed_active = true;
1145 } else {
1146 in_out_vrr->fixed.fixed_active = true;
1147 in_out_vrr->adjust.v_total_min =
1148 mod_freesync_calc_v_total_from_refresh(stream,
1149 in_out_vrr->fixed.target_refresh_in_uhz);
1150 in_out_vrr->adjust.v_total_max =
1151 in_out_vrr->adjust.v_total_min;
1152 }
1153 } else {
1154 in_out_vrr->state = VRR_STATE_INACTIVE;
1155 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1156 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1157 }
1158}
1159
1160void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,
1161 const struct dc_plane_state *plane,
1162 const struct dc_stream_state *stream,
1163 unsigned int curr_time_stamp_in_us,
1164 struct mod_vrr_params *in_out_vrr)
1165{
1166 struct core_freesync *core_freesync = NULL;
1167 unsigned int last_render_time_in_us = 0;
1168 unsigned int average_render_time_in_us = 0;
1169
1170 if (mod_freesync == NULL)
1171 return;
1172
1173 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1174
1175 if (in_out_vrr->supported &&
1176 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
1177 unsigned int i = 0;
1178 unsigned int oldest_index = plane->time.index + 1;
1179
1180 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX)
1181 oldest_index = 0;
1182
1183 last_render_time_in_us = curr_time_stamp_in_us -
1184 plane->time.prev_update_time_in_us;
1185
1186 /* Sum off all entries except oldest one */
1187 for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX; i++) {
1188 average_render_time_in_us +=
1189 plane->time.time_elapsed_in_us[i];
1190 }
1191 average_render_time_in_us -=
1192 plane->time.time_elapsed_in_us[oldest_index];
1193
1194 /* Add render time for current flip */
1195 average_render_time_in_us += last_render_time_in_us;
1196 average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX;
1197
1198 if (in_out_vrr->btr.btr_enabled) {
1199 apply_below_the_range(core_freesync,
1200 stream,
1201 last_render_time_in_us,
1202 in_out_vrr);
1203 } else {
1204 apply_fixed_refresh(core_freesync,
1205 stream,
1206 last_render_time_in_us,
1207 in_out_vrr);
1208 }
1209
1210 determine_flip_interval_workaround_req(in_out_vrr,
1211 curr_time_stamp_in_us);
1212
1213 }
1214}
1215
1216void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
1217 const struct dc_stream_state *stream,
1218 struct mod_vrr_params *in_out_vrr)
1219{
1220 struct core_freesync *core_freesync = NULL;
1221 unsigned int cur_timestamp_in_us;
1222 unsigned long long cur_tick;
1223
1224 if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL))
1225 return;
1226
1227 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1228
1229 if (in_out_vrr->supported == false)
1230 return;
1231
1232 cur_tick = dm_get_timestamp(core_freesync->dc->ctx);
1233 cur_timestamp_in_us = (unsigned int)
1234 div_u64(dm_get_elapse_time_in_ns(core_freesync->dc->ctx, cur_tick, 0), 1000);
1235
1236 in_out_vrr->flip_interval.vsyncs_between_flip++;
1237 in_out_vrr->flip_interval.v_update_timestamp_in_us = cur_timestamp_in_us;
1238
1239 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1240 (in_out_vrr->flip_interval.flip_interval_workaround_active ||
1241 (!in_out_vrr->flip_interval.flip_interval_workaround_active &&
1242 in_out_vrr->flip_interval.program_flip_interval_workaround))) {
1243 // set freesync vmin vmax to nominal for workaround
1244 in_out_vrr->adjust.v_total_min =
1245 mod_freesync_calc_v_total_from_refresh(
1246 stream, in_out_vrr->max_refresh_in_uhz);
1247 in_out_vrr->adjust.v_total_max =
1248 in_out_vrr->adjust.v_total_min;
1249 in_out_vrr->flip_interval.program_flip_interval_workaround = false;
1250 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = true;
1251 return;
1252 }
1253
1254 if (in_out_vrr->state != VRR_STATE_ACTIVE_VARIABLE &&
1255 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup) {
1256 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = false;
1257 in_out_vrr->flip_interval.flip_interval_detect_counter = 0;
1258 in_out_vrr->flip_interval.vsyncs_between_flip = 0;
1259 in_out_vrr->flip_interval.vsync_to_flip_in_us = 0;
1260 }
1261
1262 /* Below the Range Logic */
1263
1264 /* Only execute if in fullscreen mode */
1265 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1266 in_out_vrr->btr.btr_active) {
1267 /* TODO: pass in flag for Pre-DCE12 ASIC
1268 * in order for frame variable duration to take affect,
1269 * it needs to be done one VSYNC early, which is at
1270 * frameCounter == 1.
1271 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
1272 * will take affect on current frame
1273 */
1274 if (in_out_vrr->btr.frames_to_insert ==
1275 in_out_vrr->btr.frame_counter) {
1276 in_out_vrr->adjust.v_total_min =
1277 calc_v_total_from_duration(stream,
1278 in_out_vrr,
1279 in_out_vrr->btr.inserted_duration_in_us);
1280 in_out_vrr->adjust.v_total_max =
1281 in_out_vrr->adjust.v_total_min;
1282 }
1283
1284 if (in_out_vrr->btr.frame_counter > 0)
1285 in_out_vrr->btr.frame_counter--;
1286
1287 /* Restore FreeSync */
1288 if (in_out_vrr->btr.frame_counter == 0) {
1289 in_out_vrr->adjust.v_total_min =
1290 mod_freesync_calc_v_total_from_refresh(stream,
1291 in_out_vrr->max_refresh_in_uhz);
1292 in_out_vrr->adjust.v_total_max =
1293 mod_freesync_calc_v_total_from_refresh(stream,
1294 in_out_vrr->min_refresh_in_uhz);
1295 }
1296 }
1297
1298 /* If in fullscreen freesync mode or in video, do not program
1299 * static screen ramp values
1300 */
1301 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE)
1302 in_out_vrr->fixed.ramping_active = false;
1303
1304 /* Gradual Static Screen Ramping Logic
1305 * Execute if ramp is active and user enabled freesync static screen
1306 */
1307 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED &&
1308 in_out_vrr->fixed.ramping_active) {
1309 update_v_total_for_static_ramp(
1310 core_freesync, stream, in_out_vrr);
1311 }
1312}
1313
1314void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
1315 const struct mod_vrr_params *vrr,
1316 unsigned int *v_total_min, unsigned int *v_total_max,
1317 unsigned int *event_triggers,
1318 unsigned int *window_min, unsigned int *window_max,
1319 unsigned int *lfc_mid_point_in_us,
1320 unsigned int *inserted_frames,
1321 unsigned int *inserted_duration_in_us)
1322{
1323 if (mod_freesync == NULL)
1324 return;
1325
1326 if (vrr->supported) {
1327 *v_total_min = vrr->adjust.v_total_min;
1328 *v_total_max = vrr->adjust.v_total_max;
1329 *event_triggers = 0;
1330 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us;
1331 *inserted_frames = vrr->btr.frames_to_insert;
1332 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us;
1333 }
1334}
1335
1336unsigned long long mod_freesync_calc_nominal_field_rate(
1337 const struct dc_stream_state *stream)
1338{
1339 unsigned long long nominal_field_rate_in_uhz = 0;
1340 unsigned int total = stream->timing.h_total * stream->timing.v_total;
1341
1342 /* Calculate nominal field rate for stream, rounded up to nearest integer */
1343 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz;
1344 nominal_field_rate_in_uhz *= 100000000ULL;
1345
1346 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, total);
1347
1348 return nominal_field_rate_in_uhz;
1349}
1350
1351unsigned long long mod_freesync_calc_field_rate_from_timing(
1352 unsigned int vtotal, unsigned int htotal, unsigned int pix_clk)
1353{
1354 unsigned long long field_rate_in_uhz = 0;
1355 unsigned int total = htotal * vtotal;
1356
1357 /* Calculate nominal field rate for stream, rounded up to nearest integer */
1358 field_rate_in_uhz = pix_clk;
1359 field_rate_in_uhz *= 1000000ULL;
1360
1361 field_rate_in_uhz = div_u64(field_rate_in_uhz, total);
1362
1363 return field_rate_in_uhz;
1364}
1365
1366bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr)
1367{
1368 return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED);
1369}
1370
1371bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz,
1372 uint32_t max_refresh_cap_in_uhz,
1373 uint32_t nominal_field_rate_in_uhz)
1374{
1375
1376 /* Typically nominal refresh calculated can have some fractional part.
1377 * Allow for some rounding error of actual video timing by taking floor
1378 * of caps and request. Round the nominal refresh rate.
1379 *
1380 * Dividing will convert everything to units in Hz although input
1381 * variable name is in uHz!
1382 *
1383 * Also note, this takes care of rounding error on the nominal refresh
1384 * so by rounding error we only expect it to be off by a small amount,
1385 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx.
1386 *
1387 * Example 1. Caps Min = 40 Hz, Max = 144 Hz
1388 * Request Min = 40 Hz, Max = 144 Hz
1389 * Nominal = 143.5x Hz rounded to 144 Hz
1390 * This function should allow this as valid request
1391 *
1392 * Example 2. Caps Min = 40 Hz, Max = 144 Hz
1393 * Request Min = 40 Hz, Max = 144 Hz
1394 * Nominal = 144.4x Hz rounded to 144 Hz
1395 * This function should allow this as valid request
1396 *
1397 * Example 3. Caps Min = 40 Hz, Max = 144 Hz
1398 * Request Min = 40 Hz, Max = 144 Hz
1399 * Nominal = 120.xx Hz rounded to 120 Hz
1400 * This function should return NOT valid since the requested
1401 * max is greater than current timing's nominal
1402 *
1403 * Example 4. Caps Min = 40 Hz, Max = 120 Hz
1404 * Request Min = 40 Hz, Max = 120 Hz
1405 * Nominal = 144.xx Hz rounded to 144 Hz
1406 * This function should return NOT valid since the nominal
1407 * is greater than the capability's max refresh
1408 */
1409 nominal_field_rate_in_uhz =
1410 div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
1411 min_refresh_cap_in_uhz /= 1000000;
1412 max_refresh_cap_in_uhz /= 1000000;
1413
1414 /* Check nominal is within range */
1415 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz ||
1416 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz)
1417 return false;
1418
1419 /* If nominal is less than max, limit the max allowed refresh rate */
1420 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz)
1421 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz;
1422
1423 /* Check min is within range */
1424 if (min_refresh_cap_in_uhz > max_refresh_cap_in_uhz)
1425 return false;
1426
1427 /* For variable range, check for at least 10 Hz range */
1428 if (nominal_field_rate_in_uhz - min_refresh_cap_in_uhz < 10)
1429 return false;
1430
1431 return true;
1432}