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1/* SPDX-License-Identifier: GPL-2.0 */
2/******************************************************************************
3 * x86_emulate.h
4 *
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
6 *
7 * Copyright (c) 2005 Keir Fraser
8 *
9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
10 */
11
12#ifndef _ASM_X86_KVM_X86_EMULATE_H
13#define _ASM_X86_KVM_X86_EMULATE_H
14
15#include <asm/desc_defs.h>
16
17struct x86_emulate_ctxt;
18enum x86_intercept;
19enum x86_intercept_stage;
20
21struct x86_exception {
22 u8 vector;
23 bool error_code_valid;
24 u16 error_code;
25 bool nested_page_fault;
26 u64 address; /* cr2 or nested page fault gpa */
27 u8 async_page_fault;
28};
29
30/*
31 * This struct is used to carry enough information from the instruction
32 * decoder to main KVM so that a decision can be made whether the
33 * instruction needs to be intercepted or not.
34 */
35struct x86_instruction_info {
36 u8 intercept; /* which intercept */
37 u8 rep_prefix; /* rep prefix? */
38 u8 modrm_mod; /* mod part of modrm */
39 u8 modrm_reg; /* index of register used */
40 u8 modrm_rm; /* rm part of modrm */
41 u64 src_val; /* value of source operand */
42 u64 dst_val; /* value of destination operand */
43 u8 src_bytes; /* size of source operand */
44 u8 dst_bytes; /* size of destination operand */
45 u8 ad_bytes; /* size of src/dst address */
46 u64 next_rip; /* rip following the instruction */
47};
48
49/*
50 * x86_emulate_ops:
51 *
52 * These operations represent the instruction emulator's interface to memory.
53 * There are two categories of operation: those that act on ordinary memory
54 * regions (*_std), and those that act on memory regions known to require
55 * special treatment or emulation (*_emulated).
56 *
57 * The emulator assumes that an instruction accesses only one 'emulated memory'
58 * location, that this location is the given linear faulting address (cr2), and
59 * that this is one of the instruction's data operands. Instruction fetches and
60 * stack operations are assumed never to access emulated memory. The emulator
61 * automatically deduces which operand of a string-move operation is accessing
62 * emulated memory, and assumes that the other operand accesses normal memory.
63 *
64 * NOTES:
65 * 1. The emulator isn't very smart about emulated vs. standard memory.
66 * 'Emulated memory' access addresses should be checked for sanity.
67 * 'Normal memory' accesses may fault, and the caller must arrange to
68 * detect and handle reentrancy into the emulator via recursive faults.
69 * Accesses may be unaligned and may cross page boundaries.
70 * 2. If the access fails (cannot emulate, or a standard access faults) then
71 * it is up to the memop to propagate the fault to the guest VM via
72 * some out-of-band mechanism, unknown to the emulator. The memop signals
73 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
74 * then immediately bail.
75 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
76 * cmpxchg8b_emulated need support 8-byte accesses.
77 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
78 */
79/* Access completed successfully: continue emulation as normal. */
80#define X86EMUL_CONTINUE 0
81/* Access is unhandleable: bail from emulation and return error to caller. */
82#define X86EMUL_UNHANDLEABLE 1
83/* Terminate emulation but return success to the caller. */
84#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
85#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
86#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
87#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
88#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
89
90struct x86_emulate_ops {
91 /*
92 * read_gpr: read a general purpose register (rax - r15)
93 *
94 * @reg: gpr number.
95 */
96 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
97 /*
98 * write_gpr: write a general purpose register (rax - r15)
99 *
100 * @reg: gpr number.
101 * @val: value to write.
102 */
103 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
104 /*
105 * read_std: Read bytes of standard (non-emulated/special) memory.
106 * Used for descriptor reading.
107 * @addr: [IN ] Linear address from which to read.
108 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
109 * @bytes: [IN ] Number of bytes to read from memory.
110 */
111 int (*read_std)(struct x86_emulate_ctxt *ctxt,
112 unsigned long addr, void *val,
113 unsigned int bytes,
114 struct x86_exception *fault);
115
116 /*
117 * read_phys: Read bytes of standard (non-emulated/special) memory.
118 * Used for descriptor reading.
119 * @addr: [IN ] Physical address from which to read.
120 * @val: [OUT] Value read from memory.
121 * @bytes: [IN ] Number of bytes to read from memory.
122 */
123 int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr,
124 void *val, unsigned int bytes);
125
126 /*
127 * write_std: Write bytes of standard (non-emulated/special) memory.
128 * Used for descriptor writing.
129 * @addr: [IN ] Linear address to which to write.
130 * @val: [OUT] Value write to memory, zero-extended to 'u_long'.
131 * @bytes: [IN ] Number of bytes to write to memory.
132 */
133 int (*write_std)(struct x86_emulate_ctxt *ctxt,
134 unsigned long addr, void *val, unsigned int bytes,
135 struct x86_exception *fault);
136 /*
137 * fetch: Read bytes of standard (non-emulated/special) memory.
138 * Used for instruction fetch.
139 * @addr: [IN ] Linear address from which to read.
140 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
141 * @bytes: [IN ] Number of bytes to read from memory.
142 */
143 int (*fetch)(struct x86_emulate_ctxt *ctxt,
144 unsigned long addr, void *val, unsigned int bytes,
145 struct x86_exception *fault);
146
147 /*
148 * read_emulated: Read bytes from emulated/special memory area.
149 * @addr: [IN ] Linear address from which to read.
150 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
151 * @bytes: [IN ] Number of bytes to read from memory.
152 */
153 int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
154 unsigned long addr, void *val, unsigned int bytes,
155 struct x86_exception *fault);
156
157 /*
158 * write_emulated: Write bytes to emulated/special memory area.
159 * @addr: [IN ] Linear address to which to write.
160 * @val: [IN ] Value to write to memory (low-order bytes used as
161 * required).
162 * @bytes: [IN ] Number of bytes to write to memory.
163 */
164 int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
165 unsigned long addr, const void *val,
166 unsigned int bytes,
167 struct x86_exception *fault);
168
169 /*
170 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
171 * emulated/special memory area.
172 * @addr: [IN ] Linear address to access.
173 * @old: [IN ] Value expected to be current at @addr.
174 * @new: [IN ] Value to write to @addr.
175 * @bytes: [IN ] Number of bytes to access using CMPXCHG.
176 */
177 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
178 unsigned long addr,
179 const void *old,
180 const void *new,
181 unsigned int bytes,
182 struct x86_exception *fault);
183 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
184
185 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
186 int size, unsigned short port, void *val,
187 unsigned int count);
188
189 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
190 int size, unsigned short port, const void *val,
191 unsigned int count);
192
193 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
194 struct desc_struct *desc, u32 *base3, int seg);
195 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
196 struct desc_struct *desc, u32 base3, int seg);
197 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
198 int seg);
199 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
200 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
201 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
202 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
203 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
204 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
205 int (*cpl)(struct x86_emulate_ctxt *ctxt);
206 int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
207 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
208 u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
209 void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
210 int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
211 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
212 int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
213 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
214 void (*halt)(struct x86_emulate_ctxt *ctxt);
215 void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
216 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
217 int (*intercept)(struct x86_emulate_ctxt *ctxt,
218 struct x86_instruction_info *info,
219 enum x86_intercept_stage stage);
220
221 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
222 u32 *ecx, u32 *edx, bool check_limit);
223 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
224
225 unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt);
226 void (*set_hflags)(struct x86_emulate_ctxt *ctxt, unsigned hflags);
227 int (*pre_leave_smm)(struct x86_emulate_ctxt *ctxt, u64 smbase);
228
229};
230
231typedef u32 __attribute__((vector_size(16))) sse128_t;
232
233/* Type, address-of, and value of an instruction's operand. */
234struct operand {
235 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
236 unsigned int bytes;
237 unsigned int count;
238 union {
239 unsigned long orig_val;
240 u64 orig_val64;
241 };
242 union {
243 unsigned long *reg;
244 struct segmented_address {
245 ulong ea;
246 unsigned seg;
247 } mem;
248 unsigned xmm;
249 unsigned mm;
250 } addr;
251 union {
252 unsigned long val;
253 u64 val64;
254 char valptr[sizeof(sse128_t)];
255 sse128_t vec_val;
256 u64 mm_val;
257 void *data;
258 };
259};
260
261struct fetch_cache {
262 u8 data[15];
263 u8 *ptr;
264 u8 *end;
265};
266
267struct read_cache {
268 u8 data[1024];
269 unsigned long pos;
270 unsigned long end;
271};
272
273/* Execution mode, passed to the emulator. */
274enum x86emul_mode {
275 X86EMUL_MODE_REAL, /* Real mode. */
276 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
277 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
278 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
279 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
280};
281
282/* These match some of the HF_* flags defined in kvm_host.h */
283#define X86EMUL_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
284#define X86EMUL_SMM_MASK (1 << 6)
285#define X86EMUL_SMM_INSIDE_NMI_MASK (1 << 7)
286
287struct x86_emulate_ctxt {
288 const struct x86_emulate_ops *ops;
289
290 /* Register state before/after emulation. */
291 unsigned long eflags;
292 unsigned long eip; /* eip before instruction emulation */
293 /* Emulated execution mode, represented by an X86EMUL_MODE value. */
294 enum x86emul_mode mode;
295
296 /* interruptibility state, as a result of execution of STI or MOV SS */
297 int interruptibility;
298
299 bool perm_ok; /* do not check permissions if true */
300 bool ud; /* inject an #UD if host doesn't support insn */
301 bool tf; /* TF value before instruction (after for syscall/sysret) */
302
303 bool have_exception;
304 struct x86_exception exception;
305
306 /*
307 * decode cache
308 */
309
310 /* current opcode length in bytes */
311 u8 opcode_len;
312 u8 b;
313 u8 intercept;
314 u8 op_bytes;
315 u8 ad_bytes;
316 struct operand src;
317 struct operand src2;
318 struct operand dst;
319 int (*execute)(struct x86_emulate_ctxt *ctxt);
320 int (*check_perm)(struct x86_emulate_ctxt *ctxt);
321 /*
322 * The following six fields are cleared together,
323 * the rest are initialized unconditionally in x86_decode_insn
324 * or elsewhere
325 */
326 bool rip_relative;
327 u8 rex_prefix;
328 u8 lock_prefix;
329 u8 rep_prefix;
330 /* bitmaps of registers in _regs[] that can be read */
331 u32 regs_valid;
332 /* bitmaps of registers in _regs[] that have been written */
333 u32 regs_dirty;
334 /* modrm */
335 u8 modrm;
336 u8 modrm_mod;
337 u8 modrm_reg;
338 u8 modrm_rm;
339 u8 modrm_seg;
340 u8 seg_override;
341 u64 d;
342 unsigned long _eip;
343 struct operand memop;
344 /* Fields above regs are cleared together. */
345 unsigned long _regs[NR_VCPU_REGS];
346 struct operand *memopp;
347 struct fetch_cache fetch;
348 struct read_cache io_read;
349 struct read_cache mem_read;
350};
351
352/* Repeat String Operation Prefix */
353#define REPE_PREFIX 0xf3
354#define REPNE_PREFIX 0xf2
355
356/* CPUID vendors */
357#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
358#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
359#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
360
361#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
362#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
363#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
364
365#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
366#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
367#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
368
369enum x86_intercept_stage {
370 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
371 X86_ICPT_PRE_EXCEPT,
372 X86_ICPT_POST_EXCEPT,
373 X86_ICPT_POST_MEMACCESS,
374};
375
376enum x86_intercept {
377 x86_intercept_none,
378 x86_intercept_cr_read,
379 x86_intercept_cr_write,
380 x86_intercept_clts,
381 x86_intercept_lmsw,
382 x86_intercept_smsw,
383 x86_intercept_dr_read,
384 x86_intercept_dr_write,
385 x86_intercept_lidt,
386 x86_intercept_sidt,
387 x86_intercept_lgdt,
388 x86_intercept_sgdt,
389 x86_intercept_lldt,
390 x86_intercept_sldt,
391 x86_intercept_ltr,
392 x86_intercept_str,
393 x86_intercept_rdtsc,
394 x86_intercept_rdpmc,
395 x86_intercept_pushf,
396 x86_intercept_popf,
397 x86_intercept_cpuid,
398 x86_intercept_rsm,
399 x86_intercept_iret,
400 x86_intercept_intn,
401 x86_intercept_invd,
402 x86_intercept_pause,
403 x86_intercept_hlt,
404 x86_intercept_invlpg,
405 x86_intercept_invlpga,
406 x86_intercept_vmrun,
407 x86_intercept_vmload,
408 x86_intercept_vmsave,
409 x86_intercept_vmmcall,
410 x86_intercept_stgi,
411 x86_intercept_clgi,
412 x86_intercept_skinit,
413 x86_intercept_rdtscp,
414 x86_intercept_icebp,
415 x86_intercept_wbinvd,
416 x86_intercept_monitor,
417 x86_intercept_mwait,
418 x86_intercept_rdmsr,
419 x86_intercept_wrmsr,
420 x86_intercept_in,
421 x86_intercept_ins,
422 x86_intercept_out,
423 x86_intercept_outs,
424
425 nr_x86_intercepts
426};
427
428/* Host execution mode. */
429#if defined(CONFIG_X86_32)
430#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
431#elif defined(CONFIG_X86_64)
432#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
433#endif
434
435int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
436bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
437#define EMULATION_FAILED -1
438#define EMULATION_OK 0
439#define EMULATION_RESTART 1
440#define EMULATION_INTERCEPTED 2
441void init_decode_cache(struct x86_emulate_ctxt *ctxt);
442int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
443int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
444 u16 tss_selector, int idt_index, int reason,
445 bool has_error_code, u32 error_code);
446int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
447void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
448void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
449bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
450
451#endif /* _ASM_X86_KVM_X86_EMULATE_H */