1/*
  2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
  3 * reserved.
  4 *
  5 * This software is available to you under a choice of one of two
  6 * licenses.  You may choose to be licensed under the terms of the GNU
  7 * General Public License (GPL) Version 2, available from the file
  8 * COPYING in the main directory of this source tree, or the NetLogic
  9 * license below:
 10 *
 11 * Redistribution and use in source and binary forms, with or without
 12 * modification, are permitted provided that the following conditions
 13 * are met:
 14 *
 15 * 1. Redistributions of source code must retain the above copyright
 16 *    notice, this list of conditions and the following disclaimer.
 17 * 2. Redistributions in binary form must reproduce the above copyright
 18 *    notice, this list of conditions and the following disclaimer in
 19 *    the documentation and/or other materials provided with the
 20 *    distribution.
 21 *
 22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
 31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
 32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35
 36#include <asm/asm.h>
 37#include <asm/asm-offsets.h>
 38#include <asm/regdef.h>
 39#include <asm/mipsregs.h>
 40#include <asm/stackframe.h>
 41#include <asm/asmmacro.h>
 42#include <asm/addrspace.h>
 43
 44#include <asm/netlogic/common.h>
 45
 46#include <asm/netlogic/xlp-hal/iomap.h>
 47#include <asm/netlogic/xlp-hal/xlp.h>
 48#include <asm/netlogic/xlp-hal/sys.h>
 49#include <asm/netlogic/xlp-hal/cpucontrol.h>
 50
 51	.set	noreorder
 52	.set	noat
 53	.set	arch=xlr		/* for mfcr/mtcr, XLR is sufficient */
 54
 55/* Called by the boot cpu to wake up its sibling threads */
 56NESTED(xlp_boot_core0_siblings, PT_SIZE, sp)
 57	/* CPU register contents lost when enabling threads, save them first */
 58	SAVE_ALL
 59	sync
 60	/* find the location to which nlm_boot_siblings was relocated */
 61	li	t0, CKSEG1ADDR(RESET_VEC_PHYS)
 62	PTR_LA	t1, nlm_reset_entry
 63	PTR_LA	t2, nlm_boot_siblings
 64	dsubu	t2, t1
 65	daddu	t2, t0
 66	/* call it */
 67	jalr	t2
 68	nop
 69	RESTORE_ALL
 70	jr	ra
 71	nop
 72END(xlp_boot_core0_siblings)
 73
 74NESTED(nlm_boot_secondary_cpus, 16, sp)
 75	/* Initialize CP0 Status */
 76	move	t1, zero
 77#ifdef CONFIG_64BIT
 78	ori	t1, ST0_KX
 79#endif
 80	mtc0	t1, CP0_STATUS
 81	PTR_LA	t1, nlm_next_sp
 82	PTR_L	sp, 0(t1)
 83	PTR_LA	t1, nlm_next_gp
 84	PTR_L	gp, 0(t1)
 85
 86	/* a0 has the processor id */
 87	mfc0	a0, CP0_EBASE
 88	andi	a0, 0x3ff		/* a0 <- node/core */
 89	PTR_LA	t0, nlm_early_init_secondary
 90	jalr	t0
 91	nop
 92
 93	PTR_LA	t0, smp_bootstrap
 94	jr	t0
 95	nop
 96END(nlm_boot_secondary_cpus)
 97
 98/*
 99 * In case of RMIboot bootloader which is used on XLR boards, the CPUs
100 * be already woken up and waiting in bootloader code.
101 * This will get them out of the bootloader code and into linux. Needed
102 * because the bootloader area will be taken and initialized by linux.
103 */
104NESTED(nlm_rmiboot_preboot, 16, sp)
105	mfc0	t0, $15, 1	/* read ebase */
106	andi	t0, 0x1f	/* t0 has the processor_id() */
107	andi	t2, t0, 0x3	/* thread num */
108	sll	t0, 2		/* offset in cpu array */
109
110	li	t3, CKSEG1ADDR(RESET_DATA_PHYS)
111	ADDIU	t1, t3, BOOT_CPU_READY
112	ADDU	t1, t0
113	li	t3, 1
114	sw	t3, 0(t1)
115
116	bnez	t2, 1f		/* skip thread programming */
117	nop			/* for thread id != 0 */
118
119	/*
120	 * XLR MMU setup only for first thread in core
121	 */
122	li	t0, 0x400
123	mfcr	t1, t0
124	li	t2, 6		/* XLR thread mode mask */
125	nor	t3, t2, zero
126	and	t2, t1, t2	/* t2 - current thread mode */
127	li	v0, CKSEG1ADDR(RESET_DATA_PHYS)
128	lw	v1, BOOT_THREAD_MODE(v0) /* v1 - new thread mode */
129	sll	v1, 1
130	beq	v1, t2, 1f	/* same as request value */
131	nop			/* nothing to do */
132
133	and	t2, t1, t3	/* mask out old thread mode */
134	or	t1, t2, v1	/* put in new value */
135	mtcr	t1, t0		/* update core control */
136
137	/* wait for NMI to hit */
1381:	wait
139	b	1b
140	nop
141END(nlm_rmiboot_preboot)