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1// SPDX-License-Identifier: GPL-2.0
2
3/ {
4 memory-controller@7000f000 {
5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
7
8 timing-25500000 {
9 clock-frequency = <25500000>;
10
11 nvidia,emem-configuration = <
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
20 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
21 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
22 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
23 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
24 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
25 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
26 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
27 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
28 0x74830303 /* MC_EMEM_ARB_MISC0 */
29 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
30 >;
31 };
32
33 timing-51000000 {
34 clock-frequency = <51000000>;
35
36 nvidia,emem-configuration = <
37 0x00010001 /* MC_EMEM_ARB_CFG */
38 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
39 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
40 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
41 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
42 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
43 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
44 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
45 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
46 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
47 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
48 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
49 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
50 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
51 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
52 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
53 0x73430303 /* MC_EMEM_ARB_MISC0 */
54 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
55 >;
56 };
57
58 timing-102000000 {
59 clock-frequency = <102000000>;
60
61 nvidia,emem-configuration = <
62 0x00000001 /* MC_EMEM_ARB_CFG */
63 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */
64 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
65 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
66 0x00000003 /* MC_EMEM_ARB_TIMING_RC */
67 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
68 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
69 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
70 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
71 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
72 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
73 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
74 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
75 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
76 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
77 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
78 0x72830504 /* MC_EMEM_ARB_MISC0 */
79 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
80 >;
81 };
82
83 timing-204000000 {
84 clock-frequency = <204000000>;
85
86 nvidia,emem-configuration = <
87 0x00000003 /* MC_EMEM_ARB_CFG */
88 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
89 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
90 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
91 0x00000005 /* MC_EMEM_ARB_TIMING_RC */
92 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
93 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */
94 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
95 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
96 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
97 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
98 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
99 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
100 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
101 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
102 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
103 0x72440a06 /* MC_EMEM_ARB_MISC0 */
104 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
105 >;
106 };
107
108 timing-333500000 {
109 clock-frequency = <333500000>;
110
111 nvidia,emem-configuration = <
112 0x00000005 /* MC_EMEM_ARB_CFG */
113 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */
114 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
115 0x00000002 /* MC_EMEM_ARB_TIMING_RP */
116 0x00000008 /* MC_EMEM_ARB_TIMING_RC */
117 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
118 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
119 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
120 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
121 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
122 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
123 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
124 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
125 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
126 0x06030202 /* MC_EMEM_ARB_DA_TURNS */
127 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */
128 0x70850f09 /* MC_EMEM_ARB_MISC0 */
129 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
130 >;
131 };
132
133 timing-667000000 {
134 clock-frequency = <667000000>;
135
136 nvidia,emem-configuration = <
137 0x0000000a /* MC_EMEM_ARB_CFG */
138 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */
139 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
140 0x00000004 /* MC_EMEM_ARB_TIMING_RP */
141 0x00000010 /* MC_EMEM_ARB_TIMING_RC */
142 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */
143 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
144 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
145 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
146 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
147 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
148 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
149 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
150 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
151 0x08040202 /* MC_EMEM_ARB_DA_TURNS */
152 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */
153 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */
154 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
155 >;
156 };
157 };
158
159 emc-timings-1 {
160 nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */
161
162 timing-25500000 {
163 clock-frequency = <25500000>;
164
165 nvidia,emem-configuration = <
166 0x00020001 /* MC_EMEM_ARB_CFG */
167 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
168 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
169 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
170 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
171 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
172 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
173 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
174 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
175 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
176 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
177 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
178 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
179 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
180 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
181 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
182 0x74830303 /* MC_EMEM_ARB_MISC0 */
183 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
184 >;
185 };
186
187 timing-51000000 {
188 clock-frequency = <51000000>;
189
190 nvidia,emem-configuration = <
191 0x00010001 /* MC_EMEM_ARB_CFG */
192 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
193 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
194 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
195 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
196 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
197 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
198 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
199 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
200 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
201 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
202 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
203 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
204 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
205 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
206 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
207 0x73430303 /* MC_EMEM_ARB_MISC0 */
208 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
209 >;
210 };
211
212 timing-102000000 {
213 clock-frequency = <102000000>;
214
215 nvidia,emem-configuration = <
216 0x00000001 /* MC_EMEM_ARB_CFG */
217 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */
218 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
219 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
220 0x00000003 /* MC_EMEM_ARB_TIMING_RC */
221 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
222 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
223 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
224 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
225 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
226 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
227 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
228 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
229 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
230 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
231 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
232 0x72830504 /* MC_EMEM_ARB_MISC0 */
233 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
234 >;
235 };
236
237 timing-204000000 {
238 clock-frequency = <204000000>;
239
240 nvidia,emem-configuration = <
241 0x00000003 /* MC_EMEM_ARB_CFG */
242 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
243 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
244 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
245 0x00000005 /* MC_EMEM_ARB_TIMING_RC */
246 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
247 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */
248 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
249 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
250 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
251 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
252 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
253 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
254 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
255 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
256 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
257 0x72440a06 /* MC_EMEM_ARB_MISC0 */
258 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
259 >;
260 };
261
262 timing-333500000 {
263 clock-frequency = <333500000>;
264
265 nvidia,emem-configuration = <
266 0x00000005 /* MC_EMEM_ARB_CFG */
267 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */
268 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
269 0x00000002 /* MC_EMEM_ARB_TIMING_RP */
270 0x00000008 /* MC_EMEM_ARB_TIMING_RC */
271 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
272 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
273 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
274 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
275 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
276 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
277 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
278 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
279 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
280 0x06030202 /* MC_EMEM_ARB_DA_TURNS */
281 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */
282 0x70850f09 /* MC_EMEM_ARB_MISC0 */
283 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
284 >;
285 };
286
287 timing-667000000 {
288 clock-frequency = <667000000>;
289
290 nvidia,emem-configuration = <
291 0x0000000a /* MC_EMEM_ARB_CFG */
292 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */
293 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
294 0x00000004 /* MC_EMEM_ARB_TIMING_RP */
295 0x00000010 /* MC_EMEM_ARB_TIMING_RC */
296 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */
297 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
298 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
299 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
300 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
301 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
302 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
303 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
304 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
305 0x08040202 /* MC_EMEM_ARB_DA_TURNS */
306 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */
307 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */
308 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
309 >;
310 };
311 };
312 };
313
314 memory-controller@7000f400 {
315 emc-timings-0 {
316 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
317
318 timing-25500000 {
319 clock-frequency = <25500000>;
320
321 nvidia,emc-auto-cal-interval = <0x001fffff>;
322 nvidia,emc-mode-1 = <0x80100003>;
323 nvidia,emc-mode-2 = <0x80200008>;
324 nvidia,emc-mode-reset = <0x80001221>;
325 nvidia,emc-zcal-cnt-long = <0x00000040>;
326 nvidia,emc-cfg-dyn-self-ref;
327 nvidia,emc-cfg-periodic-qrst;
328
329 nvidia,emc-configuration = <
330 0x00000001 /* EMC_RC */
331 0x00000004 /* EMC_RFC */
332 0x00000000 /* EMC_RAS */
333 0x00000000 /* EMC_RP */
334 0x00000002 /* EMC_R2W */
335 0x0000000a /* EMC_W2R */
336 0x00000005 /* EMC_R2P */
337 0x0000000b /* EMC_W2P */
338 0x00000000 /* EMC_RD_RCD */
339 0x00000000 /* EMC_WR_RCD */
340 0x00000003 /* EMC_RRD */
341 0x00000001 /* EMC_REXT */
342 0x00000000 /* EMC_WEXT */
343 0x00000005 /* EMC_WDV */
344 0x00000005 /* EMC_QUSE */
345 0x00000004 /* EMC_QRST */
346 0x0000000a /* EMC_QSAFE */
347 0x0000000b /* EMC_RDV */
348 0x000000c0 /* EMC_REFRESH */
349 0x00000000 /* EMC_BURST_REFRESH_NUM */
350 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
351 0x00000002 /* EMC_PDEX2WR */
352 0x00000002 /* EMC_PDEX2RD */
353 0x00000001 /* EMC_PCHG2PDEN */
354 0x00000000 /* EMC_ACT2PDEN */
355 0x00000007 /* EMC_AR2PDEN */
356 0x0000000f /* EMC_RW2PDEN */
357 0x00000005 /* EMC_TXSR */
358 0x00000005 /* EMC_TXSRDLL */
359 0x00000004 /* EMC_TCKE */
360 0x00000001 /* EMC_TFAW */
361 0x00000000 /* EMC_TRPAB */
362 0x00000004 /* EMC_TCLKSTABLE */
363 0x00000005 /* EMC_TCLKSTOP */
364 0x000000c7 /* EMC_TREFBW */
365 0x00000006 /* EMC_QUSE_EXTRA */
366 0x00000004 /* EMC_FBIO_CFG6 */
367 0x00000000 /* EMC_ODT_WRITE */
368 0x00000000 /* EMC_ODT_READ */
369 0x00004288 /* EMC_FBIO_CFG5 */
370 0x007800a4 /* EMC_CFG_DIG_DLL */
371 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
372 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
373 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
374 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
375 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
376 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
377 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
378 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
379 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
380 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
381 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
382 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
383 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
384 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
385 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
386 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
387 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
388 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
389 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
390 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
391 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
392 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
393 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
394 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
395 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
396 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
397 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
398 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
399 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
400 0x000002a0 /* EMC_XM2CMDPADCTRL */
401 0x0800211c /* EMC_XM2DQSPADCTRL2 */
402 0x00000000 /* EMC_XM2DQPADCTRL2 */
403 0x77fff884 /* EMC_XM2CLKPADCTRL */
404 0x01f1f108 /* EMC_XM2COMPPADCTRL */
405 0x05057404 /* EMC_XM2VTTGENPADCTRL */
406 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
407 0x08000168 /* EMC_XM2QUSEPADCTRL */
408 0x08000000 /* EMC_XM2DQSPADCTRL3 */
409 0x00000802 /* EMC_CTT_TERM_CTRL */
410 0x00000000 /* EMC_ZCAL_INTERVAL */
411 0x00000040 /* EMC_ZCAL_WAIT_CNT */
412 0x000c000c /* EMC_MRS_WAIT_CNT */
413 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
414 0x00000000 /* EMC_CTT */
415 0x00000000 /* EMC_CTT_DURATION */
416 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
417 0xe8000000 /* EMC_FBIO_SPARE */
418 0xff00ff00 /* EMC_CFG_RSV */
419 >;
420 };
421
422 timing-51000000 {
423 clock-frequency = <51000000>;
424
425 nvidia,emc-auto-cal-interval = <0x001fffff>;
426 nvidia,emc-mode-1 = <0x80100003>;
427 nvidia,emc-mode-2 = <0x80200008>;
428 nvidia,emc-mode-reset = <0x80001221>;
429 nvidia,emc-zcal-cnt-long = <0x00000040>;
430 nvidia,emc-cfg-dyn-self-ref;
431 nvidia,emc-cfg-periodic-qrst;
432
433 nvidia,emc-configuration = <
434 0x00000002 /* EMC_RC */
435 0x00000008 /* EMC_RFC */
436 0x00000001 /* EMC_RAS */
437 0x00000000 /* EMC_RP */
438 0x00000002 /* EMC_R2W */
439 0x0000000a /* EMC_W2R */
440 0x00000005 /* EMC_R2P */
441 0x0000000b /* EMC_W2P */
442 0x00000000 /* EMC_RD_RCD */
443 0x00000000 /* EMC_WR_RCD */
444 0x00000003 /* EMC_RRD */
445 0x00000001 /* EMC_REXT */
446 0x00000000 /* EMC_WEXT */
447 0x00000005 /* EMC_WDV */
448 0x00000005 /* EMC_QUSE */
449 0x00000004 /* EMC_QRST */
450 0x0000000a /* EMC_QSAFE */
451 0x0000000b /* EMC_RDV */
452 0x00000181 /* EMC_REFRESH */
453 0x00000000 /* EMC_BURST_REFRESH_NUM */
454 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
455 0x00000002 /* EMC_PDEX2WR */
456 0x00000002 /* EMC_PDEX2RD */
457 0x00000001 /* EMC_PCHG2PDEN */
458 0x00000000 /* EMC_ACT2PDEN */
459 0x00000007 /* EMC_AR2PDEN */
460 0x0000000f /* EMC_RW2PDEN */
461 0x00000009 /* EMC_TXSR */
462 0x00000009 /* EMC_TXSRDLL */
463 0x00000004 /* EMC_TCKE */
464 0x00000002 /* EMC_TFAW */
465 0x00000000 /* EMC_TRPAB */
466 0x00000004 /* EMC_TCLKSTABLE */
467 0x00000005 /* EMC_TCLKSTOP */
468 0x0000018e /* EMC_TREFBW */
469 0x00000006 /* EMC_QUSE_EXTRA */
470 0x00000004 /* EMC_FBIO_CFG6 */
471 0x00000000 /* EMC_ODT_WRITE */
472 0x00000000 /* EMC_ODT_READ */
473 0x00004288 /* EMC_FBIO_CFG5 */
474 0x007800a4 /* EMC_CFG_DIG_DLL */
475 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
476 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
477 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
478 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
479 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
480 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
481 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
482 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
483 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
484 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
485 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
486 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
487 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
488 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
489 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
490 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
491 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
492 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
493 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
494 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
495 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
496 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
497 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
498 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
499 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
500 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
501 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
502 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
503 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
504 0x000002a0 /* EMC_XM2CMDPADCTRL */
505 0x0800211c /* EMC_XM2DQSPADCTRL2 */
506 0x00000000 /* EMC_XM2DQPADCTRL2 */
507 0x77fff884 /* EMC_XM2CLKPADCTRL */
508 0x01f1f108 /* EMC_XM2COMPPADCTRL */
509 0x05057404 /* EMC_XM2VTTGENPADCTRL */
510 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
511 0x08000168 /* EMC_XM2QUSEPADCTRL */
512 0x08000000 /* EMC_XM2DQSPADCTRL3 */
513 0x00000802 /* EMC_CTT_TERM_CTRL */
514 0x00000000 /* EMC_ZCAL_INTERVAL */
515 0x00000040 /* EMC_ZCAL_WAIT_CNT */
516 0x000c000c /* EMC_MRS_WAIT_CNT */
517 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
518 0x00000000 /* EMC_CTT */
519 0x00000000 /* EMC_CTT_DURATION */
520 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
521 0xe8000000 /* EMC_FBIO_SPARE */
522 0xff00ff00 /* EMC_CFG_RSV */
523 >;
524 };
525
526 timing-102000000 {
527 clock-frequency = <102000000>;
528
529 nvidia,emc-auto-cal-interval = <0x001fffff>;
530 nvidia,emc-mode-1 = <0x80100003>;
531 nvidia,emc-mode-2 = <0x80200008>;
532 nvidia,emc-mode-reset = <0x80001221>;
533 nvidia,emc-zcal-cnt-long = <0x00000040>;
534 nvidia,emc-cfg-dyn-self-ref;
535 nvidia,emc-cfg-periodic-qrst;
536
537 nvidia,emc-configuration = <
538 0x00000005 /* EMC_RC */
539 0x00000010 /* EMC_RFC */
540 0x00000003 /* EMC_RAS */
541 0x00000001 /* EMC_RP */
542 0x00000002 /* EMC_R2W */
543 0x0000000a /* EMC_W2R */
544 0x00000005 /* EMC_R2P */
545 0x0000000b /* EMC_W2P */
546 0x00000001 /* EMC_RD_RCD */
547 0x00000001 /* EMC_WR_RCD */
548 0x00000003 /* EMC_RRD */
549 0x00000001 /* EMC_REXT */
550 0x00000000 /* EMC_WEXT */
551 0x00000005 /* EMC_WDV */
552 0x00000005 /* EMC_QUSE */
553 0x00000004 /* EMC_QRST */
554 0x0000000a /* EMC_QSAFE */
555 0x0000000b /* EMC_RDV */
556 0x00000303 /* EMC_REFRESH */
557 0x00000000 /* EMC_BURST_REFRESH_NUM */
558 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
559 0x00000002 /* EMC_PDEX2WR */
560 0x00000002 /* EMC_PDEX2RD */
561 0x00000001 /* EMC_PCHG2PDEN */
562 0x00000000 /* EMC_ACT2PDEN */
563 0x00000007 /* EMC_AR2PDEN */
564 0x0000000f /* EMC_RW2PDEN */
565 0x00000012 /* EMC_TXSR */
566 0x00000012 /* EMC_TXSRDLL */
567 0x00000004 /* EMC_TCKE */
568 0x00000004 /* EMC_TFAW */
569 0x00000000 /* EMC_TRPAB */
570 0x00000004 /* EMC_TCLKSTABLE */
571 0x00000005 /* EMC_TCLKSTOP */
572 0x0000031c /* EMC_TREFBW */
573 0x00000006 /* EMC_QUSE_EXTRA */
574 0x00000004 /* EMC_FBIO_CFG6 */
575 0x00000000 /* EMC_ODT_WRITE */
576 0x00000000 /* EMC_ODT_READ */
577 0x00004288 /* EMC_FBIO_CFG5 */
578 0x007800a4 /* EMC_CFG_DIG_DLL */
579 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
580 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
581 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
582 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
583 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
584 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
585 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
586 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
587 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
588 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
589 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
590 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
591 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
592 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
593 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
594 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
595 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
596 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
597 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
598 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
599 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
600 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
601 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
602 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
603 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
604 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
605 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
606 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
607 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
608 0x000002a0 /* EMC_XM2CMDPADCTRL */
609 0x0800211c /* EMC_XM2DQSPADCTRL2 */
610 0x00000000 /* EMC_XM2DQPADCTRL2 */
611 0x77fff884 /* EMC_XM2CLKPADCTRL */
612 0x01f1f108 /* EMC_XM2COMPPADCTRL */
613 0x05057404 /* EMC_XM2VTTGENPADCTRL */
614 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
615 0x08000168 /* EMC_XM2QUSEPADCTRL */
616 0x08000000 /* EMC_XM2DQSPADCTRL3 */
617 0x00000802 /* EMC_CTT_TERM_CTRL */
618 0x00000000 /* EMC_ZCAL_INTERVAL */
619 0x00000040 /* EMC_ZCAL_WAIT_CNT */
620 0x000c000c /* EMC_MRS_WAIT_CNT */
621 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
622 0x00000000 /* EMC_CTT */
623 0x00000000 /* EMC_CTT_DURATION */
624 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
625 0xe8000000 /* EMC_FBIO_SPARE */
626 0xff00ff00 /* EMC_CFG_RSV */
627 >;
628 };
629
630 timing-204000000 {
631 clock-frequency = <204000000>;
632
633 nvidia,emc-auto-cal-interval = <0x001fffff>;
634 nvidia,emc-mode-1 = <0x80100003>;
635 nvidia,emc-mode-2 = <0x80200008>;
636 nvidia,emc-mode-reset = <0x80001221>;
637 nvidia,emc-zcal-cnt-long = <0x00000040>;
638 nvidia,emc-cfg-dyn-self-ref;
639 nvidia,emc-cfg-periodic-qrst;
640
641 nvidia,emc-configuration = <
642 0x0000000a /* EMC_RC */
643 0x00000020 /* EMC_RFC */
644 0x00000007 /* EMC_RAS */
645 0x00000002 /* EMC_RP */
646 0x00000002 /* EMC_R2W */
647 0x0000000a /* EMC_W2R */
648 0x00000005 /* EMC_R2P */
649 0x0000000b /* EMC_W2P */
650 0x00000002 /* EMC_RD_RCD */
651 0x00000002 /* EMC_WR_RCD */
652 0x00000003 /* EMC_RRD */
653 0x00000001 /* EMC_REXT */
654 0x00000000 /* EMC_WEXT */
655 0x00000005 /* EMC_WDV */
656 0x00000005 /* EMC_QUSE */
657 0x00000004 /* EMC_QRST */
658 0x0000000a /* EMC_QSAFE */
659 0x0000000b /* EMC_RDV */
660 0x00000607 /* EMC_REFRESH */
661 0x00000000 /* EMC_BURST_REFRESH_NUM */
662 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
663 0x00000002 /* EMC_PDEX2WR */
664 0x00000002 /* EMC_PDEX2RD */
665 0x00000001 /* EMC_PCHG2PDEN */
666 0x00000000 /* EMC_ACT2PDEN */
667 0x00000007 /* EMC_AR2PDEN */
668 0x0000000f /* EMC_RW2PDEN */
669 0x00000023 /* EMC_TXSR */
670 0x00000023 /* EMC_TXSRDLL */
671 0x00000004 /* EMC_TCKE */
672 0x00000007 /* EMC_TFAW */
673 0x00000000 /* EMC_TRPAB */
674 0x00000004 /* EMC_TCLKSTABLE */
675 0x00000005 /* EMC_TCLKSTOP */
676 0x00000638 /* EMC_TREFBW */
677 0x00000006 /* EMC_QUSE_EXTRA */
678 0x00000006 /* EMC_FBIO_CFG6 */
679 0x00000000 /* EMC_ODT_WRITE */
680 0x00000000 /* EMC_ODT_READ */
681 0x00004288 /* EMC_FBIO_CFG5 */
682 0x004400a4 /* EMC_CFG_DIG_DLL */
683 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
684 0x00080000 /* EMC_DLL_XFORM_DQS0 */
685 0x00080000 /* EMC_DLL_XFORM_DQS1 */
686 0x00080000 /* EMC_DLL_XFORM_DQS2 */
687 0x00080000 /* EMC_DLL_XFORM_DQS3 */
688 0x00080000 /* EMC_DLL_XFORM_DQS4 */
689 0x00080000 /* EMC_DLL_XFORM_DQS5 */
690 0x00080000 /* EMC_DLL_XFORM_DQS6 */
691 0x00080000 /* EMC_DLL_XFORM_DQS7 */
692 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
693 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
694 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
695 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
696 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
697 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
698 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
699 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
700 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
701 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
702 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
703 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
704 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
705 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
706 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
707 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
708 0x00080000 /* EMC_DLL_XFORM_DQ0 */
709 0x00080000 /* EMC_DLL_XFORM_DQ1 */
710 0x00080000 /* EMC_DLL_XFORM_DQ2 */
711 0x00080000 /* EMC_DLL_XFORM_DQ3 */
712 0x000002a0 /* EMC_XM2CMDPADCTRL */
713 0x0800211c /* EMC_XM2DQSPADCTRL2 */
714 0x00000000 /* EMC_XM2DQPADCTRL2 */
715 0x77fff884 /* EMC_XM2CLKPADCTRL */
716 0x01f1f108 /* EMC_XM2COMPPADCTRL */
717 0x05057404 /* EMC_XM2VTTGENPADCTRL */
718 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
719 0x08000168 /* EMC_XM2QUSEPADCTRL */
720 0x08000000 /* EMC_XM2DQSPADCTRL3 */
721 0x00000802 /* EMC_CTT_TERM_CTRL */
722 0x00020000 /* EMC_ZCAL_INTERVAL */
723 0x00000100 /* EMC_ZCAL_WAIT_CNT */
724 0x000c000c /* EMC_MRS_WAIT_CNT */
725 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
726 0x00000000 /* EMC_CTT */
727 0x00000000 /* EMC_CTT_DURATION */
728 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
729 0xe8000000 /* EMC_FBIO_SPARE */
730 0xff00ff00 /* EMC_CFG_RSV */
731 >;
732 };
733
734 timing-333500000 {
735 clock-frequency = <333500000>;
736
737 nvidia,emc-auto-cal-interval = <0x001fffff>;
738 nvidia,emc-mode-1 = <0x80100002>;
739 nvidia,emc-mode-2 = <0x80200000>;
740 nvidia,emc-mode-reset = <0x80000321>;
741 nvidia,emc-zcal-cnt-long = <0x00000040>;
742
743 nvidia,emc-configuration = <
744 0x0000000f /* EMC_RC */
745 0x00000034 /* EMC_RFC */
746 0x0000000a /* EMC_RAS */
747 0x00000003 /* EMC_RP */
748 0x00000003 /* EMC_R2W */
749 0x00000008 /* EMC_W2R */
750 0x00000002 /* EMC_R2P */
751 0x00000009 /* EMC_W2P */
752 0x00000003 /* EMC_RD_RCD */
753 0x00000003 /* EMC_WR_RCD */
754 0x00000002 /* EMC_RRD */
755 0x00000001 /* EMC_REXT */
756 0x00000000 /* EMC_WEXT */
757 0x00000004 /* EMC_WDV */
758 0x00000006 /* EMC_QUSE */
759 0x00000004 /* EMC_QRST */
760 0x0000000a /* EMC_QSAFE */
761 0x0000000c /* EMC_RDV */
762 0x000009e9 /* EMC_REFRESH */
763 0x00000000 /* EMC_BURST_REFRESH_NUM */
764 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */
765 0x00000001 /* EMC_PDEX2WR */
766 0x00000008 /* EMC_PDEX2RD */
767 0x00000001 /* EMC_PCHG2PDEN */
768 0x00000000 /* EMC_ACT2PDEN */
769 0x00000007 /* EMC_AR2PDEN */
770 0x0000000e /* EMC_RW2PDEN */
771 0x00000039 /* EMC_TXSR */
772 0x00000200 /* EMC_TXSRDLL */
773 0x00000004 /* EMC_TCKE */
774 0x0000000a /* EMC_TFAW */
775 0x00000000 /* EMC_TRPAB */
776 0x00000004 /* EMC_TCLKSTABLE */
777 0x00000005 /* EMC_TCLKSTOP */
778 0x00000a2a /* EMC_TREFBW */
779 0x00000000 /* EMC_QUSE_EXTRA */
780 0x00000004 /* EMC_FBIO_CFG6 */
781 0x00000000 /* EMC_ODT_WRITE */
782 0x00000000 /* EMC_ODT_READ */
783 0x00007088 /* EMC_FBIO_CFG5 */
784 0x002600a4 /* EMC_CFG_DIG_DLL */
785 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
786 0x0003c000 /* EMC_DLL_XFORM_DQS0 */
787 0x0003c000 /* EMC_DLL_XFORM_DQS1 */
788 0x0003c000 /* EMC_DLL_XFORM_DQS2 */
789 0x0003c000 /* EMC_DLL_XFORM_DQS3 */
790 0x00014000 /* EMC_DLL_XFORM_DQS4 */
791 0x00014000 /* EMC_DLL_XFORM_DQS5 */
792 0x00014000 /* EMC_DLL_XFORM_DQS6 */
793 0x00014000 /* EMC_DLL_XFORM_DQS7 */
794 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
795 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
796 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
797 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
798 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
799 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
800 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
801 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
802 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
803 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
804 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
805 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
806 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
807 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
808 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
809 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
810 0x00048000 /* EMC_DLL_XFORM_DQ0 */
811 0x00048000 /* EMC_DLL_XFORM_DQ1 */
812 0x00048000 /* EMC_DLL_XFORM_DQ2 */
813 0x00048000 /* EMC_DLL_XFORM_DQ3 */
814 0x000002a0 /* EMC_XM2CMDPADCTRL */
815 0x0800013d /* EMC_XM2DQSPADCTRL2 */
816 0x00000000 /* EMC_XM2DQPADCTRL2 */
817 0x77fff884 /* EMC_XM2CLKPADCTRL */
818 0x01f1f508 /* EMC_XM2COMPPADCTRL */
819 0x05057404 /* EMC_XM2VTTGENPADCTRL */
820 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
821 0x080001e8 /* EMC_XM2QUSEPADCTRL */
822 0x08000021 /* EMC_XM2DQSPADCTRL3 */
823 0x00000802 /* EMC_CTT_TERM_CTRL */
824 0x00020000 /* EMC_ZCAL_INTERVAL */
825 0x00000100 /* EMC_ZCAL_WAIT_CNT */
826 0x018b000c /* EMC_MRS_WAIT_CNT */
827 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
828 0x00000000 /* EMC_CTT */
829 0x00000000 /* EMC_CTT_DURATION */
830 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */
831 0xe8000000 /* EMC_FBIO_SPARE */
832 0xff00ff89 /* EMC_CFG_RSV */
833 >;
834 };
835
836 timing-667000000 {
837 clock-frequency = <667000000>;
838
839 nvidia,emc-auto-cal-interval = <0x001fffff>;
840 nvidia,emc-mode-1 = <0x80100002>;
841 nvidia,emc-mode-2 = <0x80200018>;
842 nvidia,emc-mode-reset = <0x80000b71>;
843 nvidia,emc-zcal-cnt-long = <0x00000040>;
844 nvidia,emc-cfg-periodic-qrst;
845
846 nvidia,emc-configuration = <
847 0x0000001f /* EMC_RC */
848 0x00000069 /* EMC_RFC */
849 0x00000017 /* EMC_RAS */
850 0x00000007 /* EMC_RP */
851 0x00000005 /* EMC_R2W */
852 0x0000000c /* EMC_W2R */
853 0x00000003 /* EMC_R2P */
854 0x00000011 /* EMC_W2P */
855 0x00000007 /* EMC_RD_RCD */
856 0x00000007 /* EMC_WR_RCD */
857 0x00000002 /* EMC_RRD */
858 0x00000001 /* EMC_REXT */
859 0x00000000 /* EMC_WEXT */
860 0x00000007 /* EMC_WDV */
861 0x0000000b /* EMC_QUSE */
862 0x00000009 /* EMC_QRST */
863 0x0000000b /* EMC_QSAFE */
864 0x00000011 /* EMC_RDV */
865 0x00001412 /* EMC_REFRESH */
866 0x00000000 /* EMC_BURST_REFRESH_NUM */
867 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
868 0x00000002 /* EMC_PDEX2WR */
869 0x0000000e /* EMC_PDEX2RD */
870 0x00000001 /* EMC_PCHG2PDEN */
871 0x00000000 /* EMC_ACT2PDEN */
872 0x0000000c /* EMC_AR2PDEN */
873 0x00000016 /* EMC_RW2PDEN */
874 0x00000072 /* EMC_TXSR */
875 0x00000200 /* EMC_TXSRDLL */
876 0x00000005 /* EMC_TCKE */
877 0x00000015 /* EMC_TFAW */
878 0x00000000 /* EMC_TRPAB */
879 0x00000006 /* EMC_TCLKSTABLE */
880 0x00000007 /* EMC_TCLKSTOP */
881 0x00001453 /* EMC_TREFBW */
882 0x0000000c /* EMC_QUSE_EXTRA */
883 0x00000004 /* EMC_FBIO_CFG6 */
884 0x00000000 /* EMC_ODT_WRITE */
885 0x00000000 /* EMC_ODT_READ */
886 0x00005088 /* EMC_FBIO_CFG5 */
887 0xf00b0191 /* EMC_CFG_DIG_DLL */
888 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
889 0x00000008 /* EMC_DLL_XFORM_DQS0 */
890 0x00000008 /* EMC_DLL_XFORM_DQS1 */
891 0x00000008 /* EMC_DLL_XFORM_DQS2 */
892 0x00000008 /* EMC_DLL_XFORM_DQS3 */
893 0x0000000a /* EMC_DLL_XFORM_DQS4 */
894 0x0000000a /* EMC_DLL_XFORM_DQS5 */
895 0x0000000a /* EMC_DLL_XFORM_DQS6 */
896 0x0000000a /* EMC_DLL_XFORM_DQS7 */
897 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
898 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
899 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
900 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
901 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
902 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
903 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
904 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
905 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
906 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
907 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
908 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
909 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
910 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
911 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
912 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
913 0x0000000c /* EMC_DLL_XFORM_DQ0 */
914 0x0000000c /* EMC_DLL_XFORM_DQ1 */
915 0x0000000c /* EMC_DLL_XFORM_DQ2 */
916 0x0000000c /* EMC_DLL_XFORM_DQ3 */
917 0x000002a0 /* EMC_XM2CMDPADCTRL */
918 0x0600013d /* EMC_XM2DQSPADCTRL2 */
919 0x22220000 /* EMC_XM2DQPADCTRL2 */
920 0x77fff884 /* EMC_XM2CLKPADCTRL */
921 0x01f1f501 /* EMC_XM2COMPPADCTRL */
922 0x07077404 /* EMC_XM2VTTGENPADCTRL */
923 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
924 0x080001e8 /* EMC_XM2QUSEPADCTRL */
925 0x0a000021 /* EMC_XM2DQSPADCTRL3 */
926 0x00000802 /* EMC_CTT_TERM_CTRL */
927 0x00020000 /* EMC_ZCAL_INTERVAL */
928 0x00000100 /* EMC_ZCAL_WAIT_CNT */
929 0x0156000c /* EMC_MRS_WAIT_CNT */
930 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
931 0x00000000 /* EMC_CTT */
932 0x00000000 /* EMC_CTT_DURATION */
933 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
934 0xf8000000 /* EMC_FBIO_SPARE */
935 0xff00ff49 /* EMC_CFG_RSV */
936 >;
937 };
938 };
939
940 emc-timings-1 {
941 nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */
942
943 timing-25500000 {
944 clock-frequency = <25500000>;
945
946 nvidia,emc-auto-cal-interval = <0x001fffff>;
947 nvidia,emc-mode-1 = <0x80100003>;
948 nvidia,emc-mode-2 = <0x80200008>;
949 nvidia,emc-mode-reset = <0x80001221>;
950 nvidia,emc-zcal-cnt-long = <0x00000040>;
951 nvidia,emc-cfg-dyn-self-ref;
952 nvidia,emc-cfg-periodic-qrst;
953
954 nvidia,emc-configuration = <
955 0x00000001 /* EMC_RC */
956 0x00000004 /* EMC_RFC */
957 0x00000000 /* EMC_RAS */
958 0x00000000 /* EMC_RP */
959 0x00000002 /* EMC_R2W */
960 0x0000000a /* EMC_W2R */
961 0x00000005 /* EMC_R2P */
962 0x0000000b /* EMC_W2P */
963 0x00000000 /* EMC_RD_RCD */
964 0x00000000 /* EMC_WR_RCD */
965 0x00000003 /* EMC_RRD */
966 0x00000001 /* EMC_REXT */
967 0x00000000 /* EMC_WEXT */
968 0x00000005 /* EMC_WDV */
969 0x00000005 /* EMC_QUSE */
970 0x00000004 /* EMC_QRST */
971 0x0000000a /* EMC_QSAFE */
972 0x0000000b /* EMC_RDV */
973 0x000000c0 /* EMC_REFRESH */
974 0x00000000 /* EMC_BURST_REFRESH_NUM */
975 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
976 0x00000002 /* EMC_PDEX2WR */
977 0x00000002 /* EMC_PDEX2RD */
978 0x00000001 /* EMC_PCHG2PDEN */
979 0x00000000 /* EMC_ACT2PDEN */
980 0x00000007 /* EMC_AR2PDEN */
981 0x0000000f /* EMC_RW2PDEN */
982 0x00000005 /* EMC_TXSR */
983 0x00000005 /* EMC_TXSRDLL */
984 0x00000004 /* EMC_TCKE */
985 0x00000001 /* EMC_TFAW */
986 0x00000000 /* EMC_TRPAB */
987 0x00000004 /* EMC_TCLKSTABLE */
988 0x00000005 /* EMC_TCLKSTOP */
989 0x000000c7 /* EMC_TREFBW */
990 0x00000006 /* EMC_QUSE_EXTRA */
991 0x00000004 /* EMC_FBIO_CFG6 */
992 0x00000000 /* EMC_ODT_WRITE */
993 0x00000000 /* EMC_ODT_READ */
994 0x00004288 /* EMC_FBIO_CFG5 */
995 0x007800a4 /* EMC_CFG_DIG_DLL */
996 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
997 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
998 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
999 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1000 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1001 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1002 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1003 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1004 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1005 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1006 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1007 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1008 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1009 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1010 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1011 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1012 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1013 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1014 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1015 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1016 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1017 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1018 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1019 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1020 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1021 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1022 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1023 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1024 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1025 0x000002a0 /* EMC_XM2CMDPADCTRL */
1026 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1027 0x00000000 /* EMC_XM2DQPADCTRL2 */
1028 0x77fff884 /* EMC_XM2CLKPADCTRL */
1029 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1030 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1031 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1032 0x08000168 /* EMC_XM2QUSEPADCTRL */
1033 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1034 0x00000802 /* EMC_CTT_TERM_CTRL */
1035 0x00000000 /* EMC_ZCAL_INTERVAL */
1036 0x00000040 /* EMC_ZCAL_WAIT_CNT */
1037 0x000c000c /* EMC_MRS_WAIT_CNT */
1038 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1039 0x00000000 /* EMC_CTT */
1040 0x00000000 /* EMC_CTT_DURATION */
1041 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
1042 0xe8000000 /* EMC_FBIO_SPARE */
1043 0xff00ff00 /* EMC_CFG_RSV */
1044 >;
1045 };
1046
1047 timing-51000000 {
1048 clock-frequency = <51000000>;
1049
1050 nvidia,emc-auto-cal-interval = <0x001fffff>;
1051 nvidia,emc-mode-1 = <0x80100003>;
1052 nvidia,emc-mode-2 = <0x80200008>;
1053 nvidia,emc-mode-reset = <0x80001221>;
1054 nvidia,emc-zcal-cnt-long = <0x00000040>;
1055 nvidia,emc-cfg-dyn-self-ref;
1056 nvidia,emc-cfg-periodic-qrst;
1057
1058 nvidia,emc-configuration = <
1059 0x00000002 /* EMC_RC */
1060 0x00000008 /* EMC_RFC */
1061 0x00000001 /* EMC_RAS */
1062 0x00000000 /* EMC_RP */
1063 0x00000002 /* EMC_R2W */
1064 0x0000000a /* EMC_W2R */
1065 0x00000005 /* EMC_R2P */
1066 0x0000000b /* EMC_W2P */
1067 0x00000000 /* EMC_RD_RCD */
1068 0x00000000 /* EMC_WR_RCD */
1069 0x00000003 /* EMC_RRD */
1070 0x00000001 /* EMC_REXT */
1071 0x00000000 /* EMC_WEXT */
1072 0x00000005 /* EMC_WDV */
1073 0x00000005 /* EMC_QUSE */
1074 0x00000004 /* EMC_QRST */
1075 0x0000000a /* EMC_QSAFE */
1076 0x0000000b /* EMC_RDV */
1077 0x00000181 /* EMC_REFRESH */
1078 0x00000000 /* EMC_BURST_REFRESH_NUM */
1079 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
1080 0x00000002 /* EMC_PDEX2WR */
1081 0x00000002 /* EMC_PDEX2RD */
1082 0x00000001 /* EMC_PCHG2PDEN */
1083 0x00000000 /* EMC_ACT2PDEN */
1084 0x00000007 /* EMC_AR2PDEN */
1085 0x0000000f /* EMC_RW2PDEN */
1086 0x00000009 /* EMC_TXSR */
1087 0x00000009 /* EMC_TXSRDLL */
1088 0x00000004 /* EMC_TCKE */
1089 0x00000002 /* EMC_TFAW */
1090 0x00000000 /* EMC_TRPAB */
1091 0x00000004 /* EMC_TCLKSTABLE */
1092 0x00000005 /* EMC_TCLKSTOP */
1093 0x0000018e /* EMC_TREFBW */
1094 0x00000006 /* EMC_QUSE_EXTRA */
1095 0x00000004 /* EMC_FBIO_CFG6 */
1096 0x00000000 /* EMC_ODT_WRITE */
1097 0x00000000 /* EMC_ODT_READ */
1098 0x00004288 /* EMC_FBIO_CFG5 */
1099 0x007800a4 /* EMC_CFG_DIG_DLL */
1100 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1101 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1102 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1103 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1104 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1105 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1106 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1107 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1108 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1109 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1110 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1111 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1112 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1113 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1114 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1115 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1116 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1117 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1118 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1119 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1120 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1121 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1122 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1123 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1124 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1125 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1126 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1127 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1128 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1129 0x000002a0 /* EMC_XM2CMDPADCTRL */
1130 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1131 0x00000000 /* EMC_XM2DQPADCTRL2 */
1132 0x77fff884 /* EMC_XM2CLKPADCTRL */
1133 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1134 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1135 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1136 0x08000168 /* EMC_XM2QUSEPADCTRL */
1137 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1138 0x00000802 /* EMC_CTT_TERM_CTRL */
1139 0x00000000 /* EMC_ZCAL_INTERVAL */
1140 0x00000040 /* EMC_ZCAL_WAIT_CNT */
1141 0x000c000c /* EMC_MRS_WAIT_CNT */
1142 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1143 0x00000000 /* EMC_CTT */
1144 0x00000000 /* EMC_CTT_DURATION */
1145 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
1146 0xe8000000 /* EMC_FBIO_SPARE */
1147 0xff00ff00 /* EMC_CFG_RSV */
1148 >;
1149 };
1150
1151 timing-102000000 {
1152 clock-frequency = <102000000>;
1153
1154 nvidia,emc-auto-cal-interval = <0x001fffff>;
1155 nvidia,emc-mode-1 = <0x80100003>;
1156 nvidia,emc-mode-2 = <0x80200008>;
1157 nvidia,emc-mode-reset = <0x80001221>;
1158 nvidia,emc-zcal-cnt-long = <0x00000040>;
1159 nvidia,emc-cfg-dyn-self-ref;
1160 nvidia,emc-cfg-periodic-qrst;
1161
1162 nvidia,emc-configuration = <
1163 0x00000005 /* EMC_RC */
1164 0x00000010 /* EMC_RFC */
1165 0x00000003 /* EMC_RAS */
1166 0x00000001 /* EMC_RP */
1167 0x00000002 /* EMC_R2W */
1168 0x0000000a /* EMC_W2R */
1169 0x00000005 /* EMC_R2P */
1170 0x0000000b /* EMC_W2P */
1171 0x00000001 /* EMC_RD_RCD */
1172 0x00000001 /* EMC_WR_RCD */
1173 0x00000003 /* EMC_RRD */
1174 0x00000001 /* EMC_REXT */
1175 0x00000000 /* EMC_WEXT */
1176 0x00000005 /* EMC_WDV */
1177 0x00000005 /* EMC_QUSE */
1178 0x00000004 /* EMC_QRST */
1179 0x0000000a /* EMC_QSAFE */
1180 0x0000000b /* EMC_RDV */
1181 0x00000303 /* EMC_REFRESH */
1182 0x00000000 /* EMC_BURST_REFRESH_NUM */
1183 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
1184 0x00000002 /* EMC_PDEX2WR */
1185 0x00000002 /* EMC_PDEX2RD */
1186 0x00000001 /* EMC_PCHG2PDEN */
1187 0x00000000 /* EMC_ACT2PDEN */
1188 0x00000007 /* EMC_AR2PDEN */
1189 0x0000000f /* EMC_RW2PDEN */
1190 0x00000012 /* EMC_TXSR */
1191 0x00000012 /* EMC_TXSRDLL */
1192 0x00000004 /* EMC_TCKE */
1193 0x00000004 /* EMC_TFAW */
1194 0x00000000 /* EMC_TRPAB */
1195 0x00000004 /* EMC_TCLKSTABLE */
1196 0x00000005 /* EMC_TCLKSTOP */
1197 0x0000031c /* EMC_TREFBW */
1198 0x00000006 /* EMC_QUSE_EXTRA */
1199 0x00000004 /* EMC_FBIO_CFG6 */
1200 0x00000000 /* EMC_ODT_WRITE */
1201 0x00000000 /* EMC_ODT_READ */
1202 0x00004288 /* EMC_FBIO_CFG5 */
1203 0x007800a4 /* EMC_CFG_DIG_DLL */
1204 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1205 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1206 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1207 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1208 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1209 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1210 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1211 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1212 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1213 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1214 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1215 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1216 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1217 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1218 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1219 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1220 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1221 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1222 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1223 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1224 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1225 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1226 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1227 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1228 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1229 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1230 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1231 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1232 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1233 0x000002a0 /* EMC_XM2CMDPADCTRL */
1234 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1235 0x00000000 /* EMC_XM2DQPADCTRL2 */
1236 0x77fff884 /* EMC_XM2CLKPADCTRL */
1237 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1238 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1239 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1240 0x08000168 /* EMC_XM2QUSEPADCTRL */
1241 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1242 0x00000802 /* EMC_CTT_TERM_CTRL */
1243 0x00000000 /* EMC_ZCAL_INTERVAL */
1244 0x00000040 /* EMC_ZCAL_WAIT_CNT */
1245 0x000c000c /* EMC_MRS_WAIT_CNT */
1246 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1247 0x00000000 /* EMC_CTT */
1248 0x00000000 /* EMC_CTT_DURATION */
1249 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1250 0xe8000000 /* EMC_FBIO_SPARE */
1251 0xff00ff00 /* EMC_CFG_RSV */
1252 >;
1253 };
1254
1255 timing-204000000 {
1256 clock-frequency = <204000000>;
1257
1258 nvidia,emc-auto-cal-interval = <0x001fffff>;
1259 nvidia,emc-mode-1 = <0x80100003>;
1260 nvidia,emc-mode-2 = <0x80200008>;
1261 nvidia,emc-mode-reset = <0x80001221>;
1262 nvidia,emc-zcal-cnt-long = <0x00000040>;
1263 nvidia,emc-cfg-dyn-self-ref;
1264 nvidia,emc-cfg-periodic-qrst;
1265
1266 nvidia,emc-configuration = <
1267 0x0000000a /* EMC_RC */
1268 0x00000020 /* EMC_RFC */
1269 0x00000007 /* EMC_RAS */
1270 0x00000002 /* EMC_RP */
1271 0x00000002 /* EMC_R2W */
1272 0x0000000a /* EMC_W2R */
1273 0x00000005 /* EMC_R2P */
1274 0x0000000b /* EMC_W2P */
1275 0x00000002 /* EMC_RD_RCD */
1276 0x00000002 /* EMC_WR_RCD */
1277 0x00000003 /* EMC_RRD */
1278 0x00000001 /* EMC_REXT */
1279 0x00000000 /* EMC_WEXT */
1280 0x00000005 /* EMC_WDV */
1281 0x00000005 /* EMC_QUSE */
1282 0x00000004 /* EMC_QRST */
1283 0x0000000a /* EMC_QSAFE */
1284 0x0000000b /* EMC_RDV */
1285 0x00000607 /* EMC_REFRESH */
1286 0x00000000 /* EMC_BURST_REFRESH_NUM */
1287 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
1288 0x00000002 /* EMC_PDEX2WR */
1289 0x00000002 /* EMC_PDEX2RD */
1290 0x00000001 /* EMC_PCHG2PDEN */
1291 0x00000000 /* EMC_ACT2PDEN */
1292 0x00000007 /* EMC_AR2PDEN */
1293 0x0000000f /* EMC_RW2PDEN */
1294 0x00000023 /* EMC_TXSR */
1295 0x00000023 /* EMC_TXSRDLL */
1296 0x00000004 /* EMC_TCKE */
1297 0x00000007 /* EMC_TFAW */
1298 0x00000000 /* EMC_TRPAB */
1299 0x00000004 /* EMC_TCLKSTABLE */
1300 0x00000005 /* EMC_TCLKSTOP */
1301 0x00000638 /* EMC_TREFBW */
1302 0x00000006 /* EMC_QUSE_EXTRA */
1303 0x00000006 /* EMC_FBIO_CFG6 */
1304 0x00000000 /* EMC_ODT_WRITE */
1305 0x00000000 /* EMC_ODT_READ */
1306 0x00004288 /* EMC_FBIO_CFG5 */
1307 0x004400a4 /* EMC_CFG_DIG_DLL */
1308 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1309 0x00080000 /* EMC_DLL_XFORM_DQS0 */
1310 0x00080000 /* EMC_DLL_XFORM_DQS1 */
1311 0x00080000 /* EMC_DLL_XFORM_DQS2 */
1312 0x00080000 /* EMC_DLL_XFORM_DQS3 */
1313 0x00080000 /* EMC_DLL_XFORM_DQS4 */
1314 0x00080000 /* EMC_DLL_XFORM_DQS5 */
1315 0x00080000 /* EMC_DLL_XFORM_DQS6 */
1316 0x00080000 /* EMC_DLL_XFORM_DQS7 */
1317 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1318 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1319 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1320 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1321 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1322 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1323 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1324 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1325 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1326 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1327 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1328 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1329 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1330 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1331 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1332 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1333 0x00080000 /* EMC_DLL_XFORM_DQ0 */
1334 0x00080000 /* EMC_DLL_XFORM_DQ1 */
1335 0x00080000 /* EMC_DLL_XFORM_DQ2 */
1336 0x00080000 /* EMC_DLL_XFORM_DQ3 */
1337 0x000002a0 /* EMC_XM2CMDPADCTRL */
1338 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1339 0x00000000 /* EMC_XM2DQPADCTRL2 */
1340 0x77fff884 /* EMC_XM2CLKPADCTRL */
1341 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1342 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1343 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1344 0x08000168 /* EMC_XM2QUSEPADCTRL */
1345 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1346 0x00000802 /* EMC_CTT_TERM_CTRL */
1347 0x00020000 /* EMC_ZCAL_INTERVAL */
1348 0x00000100 /* EMC_ZCAL_WAIT_CNT */
1349 0x000c000c /* EMC_MRS_WAIT_CNT */
1350 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1351 0x00000000 /* EMC_CTT */
1352 0x00000000 /* EMC_CTT_DURATION */
1353 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
1354 0xe8000000 /* EMC_FBIO_SPARE */
1355 0xff00ff00 /* EMC_CFG_RSV */
1356 >;
1357 };
1358
1359 timing-333500000 {
1360 clock-frequency = <333500000>;
1361
1362 nvidia,emc-auto-cal-interval = <0x001fffff>;
1363 nvidia,emc-mode-1 = <0x80100002>;
1364 nvidia,emc-mode-2 = <0x80200000>;
1365 nvidia,emc-mode-reset = <0x80000321>;
1366 nvidia,emc-zcal-cnt-long = <0x00000040>;
1367
1368 nvidia,emc-configuration = <
1369 0x0000000f /* EMC_RC */
1370 0x00000034 /* EMC_RFC */
1371 0x0000000a /* EMC_RAS */
1372 0x00000003 /* EMC_RP */
1373 0x00000003 /* EMC_R2W */
1374 0x00000008 /* EMC_W2R */
1375 0x00000002 /* EMC_R2P */
1376 0x00000009 /* EMC_W2P */
1377 0x00000003 /* EMC_RD_RCD */
1378 0x00000003 /* EMC_WR_RCD */
1379 0x00000002 /* EMC_RRD */
1380 0x00000001 /* EMC_REXT */
1381 0x00000000 /* EMC_WEXT */
1382 0x00000004 /* EMC_WDV */
1383 0x00000006 /* EMC_QUSE */
1384 0x00000004 /* EMC_QRST */
1385 0x0000000a /* EMC_QSAFE */
1386 0x0000000c /* EMC_RDV */
1387 0x000009e9 /* EMC_REFRESH */
1388 0x00000000 /* EMC_BURST_REFRESH_NUM */
1389 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */
1390 0x00000001 /* EMC_PDEX2WR */
1391 0x00000008 /* EMC_PDEX2RD */
1392 0x00000001 /* EMC_PCHG2PDEN */
1393 0x00000000 /* EMC_ACT2PDEN */
1394 0x00000007 /* EMC_AR2PDEN */
1395 0x0000000e /* EMC_RW2PDEN */
1396 0x00000039 /* EMC_TXSR */
1397 0x00000200 /* EMC_TXSRDLL */
1398 0x00000004 /* EMC_TCKE */
1399 0x0000000a /* EMC_TFAW */
1400 0x00000000 /* EMC_TRPAB */
1401 0x00000004 /* EMC_TCLKSTABLE */
1402 0x00000005 /* EMC_TCLKSTOP */
1403 0x00000a2a /* EMC_TREFBW */
1404 0x00000000 /* EMC_QUSE_EXTRA */
1405 0x00000004 /* EMC_FBIO_CFG6 */
1406 0x00000000 /* EMC_ODT_WRITE */
1407 0x00000000 /* EMC_ODT_READ */
1408 0x00007088 /* EMC_FBIO_CFG5 */
1409 0x002600a4 /* EMC_CFG_DIG_DLL */
1410 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1411 0x0003c000 /* EMC_DLL_XFORM_DQS0 */
1412 0x0003c000 /* EMC_DLL_XFORM_DQS1 */
1413 0x0003c000 /* EMC_DLL_XFORM_DQS2 */
1414 0x0003c000 /* EMC_DLL_XFORM_DQS3 */
1415 0x00014000 /* EMC_DLL_XFORM_DQS4 */
1416 0x00014000 /* EMC_DLL_XFORM_DQS5 */
1417 0x00014000 /* EMC_DLL_XFORM_DQS6 */
1418 0x00014000 /* EMC_DLL_XFORM_DQS7 */
1419 0x00018000 /* EMC_DLL_XFORM_QUSE0 */
1420 0x00018000 /* EMC_DLL_XFORM_QUSE1 */
1421 0x00018000 /* EMC_DLL_XFORM_QUSE2 */
1422 0x00018000 /* EMC_DLL_XFORM_QUSE3 */
1423 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1424 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1425 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1426 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1427 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1428 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1429 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1430 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1431 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1432 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1433 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1434 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1435 0x00048000 /* EMC_DLL_XFORM_DQ0 */
1436 0x00048000 /* EMC_DLL_XFORM_DQ1 */
1437 0x00048000 /* EMC_DLL_XFORM_DQ2 */
1438 0x00048000 /* EMC_DLL_XFORM_DQ3 */
1439 0x000002a0 /* EMC_XM2CMDPADCTRL */
1440 0x0600013d /* EMC_XM2DQSPADCTRL2 */
1441 0x00000000 /* EMC_XM2DQPADCTRL2 */
1442 0x77fff884 /* EMC_XM2CLKPADCTRL */
1443 0x01f1f508 /* EMC_XM2COMPPADCTRL */
1444 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1445 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1446 0x080001e8 /* EMC_XM2QUSEPADCTRL */
1447 0x08000021 /* EMC_XM2DQSPADCTRL3 */
1448 0x00000802 /* EMC_CTT_TERM_CTRL */
1449 0x00020000 /* EMC_ZCAL_INTERVAL */
1450 0x00000100 /* EMC_ZCAL_WAIT_CNT */
1451 0x018b000c /* EMC_MRS_WAIT_CNT */
1452 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1453 0x00000000 /* EMC_CTT */
1454 0x00000000 /* EMC_CTT_DURATION */
1455 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */
1456 0xf8000000 /* EMC_FBIO_SPARE */
1457 0xff00ff89 /* EMC_CFG_RSV */
1458 >;
1459 };
1460
1461 timing-667000000 {
1462 clock-frequency = <667000000>;
1463
1464 nvidia,emc-auto-cal-interval = <0x001fffff>;
1465 nvidia,emc-mode-1 = <0x80100002>;
1466 nvidia,emc-mode-2 = <0x80200018>;
1467 nvidia,emc-mode-reset = <0x80000b71>;
1468 nvidia,emc-zcal-cnt-long = <0x00000040>;
1469 nvidia,emc-cfg-periodic-qrst;
1470
1471 nvidia,emc-configuration = <
1472 0x00000020 /* EMC_RC */
1473 0x0000006a /* EMC_RFC */
1474 0x00000017 /* EMC_RAS */
1475 0x00000007 /* EMC_RP */
1476 0x00000005 /* EMC_R2W */
1477 0x0000000c /* EMC_W2R */
1478 0x00000003 /* EMC_R2P */
1479 0x00000011 /* EMC_W2P */
1480 0x00000007 /* EMC_RD_RCD */
1481 0x00000007 /* EMC_WR_RCD */
1482 0x00000002 /* EMC_RRD */
1483 0x00000001 /* EMC_REXT */
1484 0x00000000 /* EMC_WEXT */
1485 0x00000007 /* EMC_WDV */
1486 0x0000000a /* EMC_QUSE */
1487 0x00000009 /* EMC_QRST */
1488 0x0000000b /* EMC_QSAFE */
1489 0x00000011 /* EMC_RDV */
1490 0x00001412 /* EMC_REFRESH */
1491 0x00000000 /* EMC_BURST_REFRESH_NUM */
1492 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
1493 0x00000002 /* EMC_PDEX2WR */
1494 0x0000000e /* EMC_PDEX2RD */
1495 0x00000001 /* EMC_PCHG2PDEN */
1496 0x00000000 /* EMC_ACT2PDEN */
1497 0x0000000c /* EMC_AR2PDEN */
1498 0x00000016 /* EMC_RW2PDEN */
1499 0x00000072 /* EMC_TXSR */
1500 0x00000200 /* EMC_TXSRDLL */
1501 0x00000005 /* EMC_TCKE */
1502 0x00000015 /* EMC_TFAW */
1503 0x00000000 /* EMC_TRPAB */
1504 0x00000006 /* EMC_TCLKSTABLE */
1505 0x00000007 /* EMC_TCLKSTOP */
1506 0x00001453 /* EMC_TREFBW */
1507 0x0000000b /* EMC_QUSE_EXTRA */
1508 0x00000006 /* EMC_FBIO_CFG6 */
1509 0x00000000 /* EMC_ODT_WRITE */
1510 0x00000000 /* EMC_ODT_READ */
1511 0x00005088 /* EMC_FBIO_CFG5 */
1512 0xf00b0191 /* EMC_CFG_DIG_DLL */
1513 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1514 0x0000000a /* EMC_DLL_XFORM_DQS0 */
1515 0x0000000a /* EMC_DLL_XFORM_DQS1 */
1516 0x0000000a /* EMC_DLL_XFORM_DQS2 */
1517 0x0000000a /* EMC_DLL_XFORM_DQS3 */
1518 0x0000000a /* EMC_DLL_XFORM_DQS4 */
1519 0x0000000a /* EMC_DLL_XFORM_DQS5 */
1520 0x0000000a /* EMC_DLL_XFORM_DQS6 */
1521 0x0000000a /* EMC_DLL_XFORM_DQS7 */
1522 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1523 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1524 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1525 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1526 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1527 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1528 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1529 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1530 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1531 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1532 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1533 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1534 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1535 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1536 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1537 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1538 0x0000000c /* EMC_DLL_XFORM_DQ0 */
1539 0x0000000c /* EMC_DLL_XFORM_DQ1 */
1540 0x0000000c /* EMC_DLL_XFORM_DQ2 */
1541 0x0000000c /* EMC_DLL_XFORM_DQ3 */
1542 0x000002a0 /* EMC_XM2CMDPADCTRL */
1543 0x0400013d /* EMC_XM2DQSPADCTRL2 */
1544 0x22220000 /* EMC_XM2DQPADCTRL2 */
1545 0x77fff884 /* EMC_XM2CLKPADCTRL */
1546 0x01f1f501 /* EMC_XM2COMPPADCTRL */
1547 0x07077404 /* EMC_XM2VTTGENPADCTRL */
1548 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
1549 0x080001e8 /* EMC_XM2QUSEPADCTRL */
1550 0x0a000021 /* EMC_XM2DQSPADCTRL3 */
1551 0x00000802 /* EMC_CTT_TERM_CTRL */
1552 0x00020000 /* EMC_ZCAL_INTERVAL */
1553 0x00000100 /* EMC_ZCAL_WAIT_CNT */
1554 0x0155000c /* EMC_MRS_WAIT_CNT */
1555 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1556 0x00000000 /* EMC_CTT */
1557 0x00000000 /* EMC_CTT_DURATION */
1558 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
1559 0xe8000000 /* EMC_FBIO_SPARE */
1560 0xff00ff49 /* EMC_CFG_RSV */
1561 >;
1562 };
1563 };
1564 };
1565};
1566
1567&emc_icc_dvfs_opp_table {
1568 /delete-node/ opp-750000000-1300;
1569 /delete-node/ opp-800000000-1300;
1570 /delete-node/ opp-900000000-1350;
1571};
1572
1573&emc_bw_dfs_opp_table {
1574 /delete-node/ opp-750000000;
1575 /delete-node/ opp-800000000;
1576 /delete-node/ opp-900000000;
1577};