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1/*
2 * Google Veyron Minnie Rev 0+ board device tree source
3 *
4 * Copyright 2015 Google, Inc
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46#include "rk3288-veyron-chromebook.dtsi"
47
48/ {
49 model = "Google Minnie";
50 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
51 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
52 "google,veyron-minnie-rev0", "google,veyron-minnie",
53 "google,veyron", "rockchip,rk3288";
54
55 backlight_regulator: backlight-regulator {
56 compatible = "regulator-fixed";
57 enable-active-high;
58 gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&bl_pwr_en>;
61 regulator-name = "backlight_regulator";
62 vin-supply = <&vcc33_sys>;
63 startup-delay-us = <15000>;
64 };
65
66 panel_regulator: panel-regulator {
67 compatible = "regulator-fixed";
68 enable-active-high;
69 gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
70 pinctrl-names = "default";
71 pinctrl-0 = <&lcd_enable_h>;
72 regulator-name = "panel_regulator";
73 startup-delay-us = <100000>;
74 vin-supply = <&vcc33_sys>;
75 };
76
77 vcc18_lcd: vcc18-lcd {
78 compatible = "regulator-fixed";
79 enable-active-high;
80 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&avdd_1v8_disp_en>;
83 regulator-name = "vcc18_lcd";
84 regulator-always-on;
85 regulator-boot-on;
86 vin-supply = <&vcc18_wl>;
87 };
88};
89
90&backlight {
91 /* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
92 brightness-levels = <
93 0 3 4 5 6 7
94 8 9 10 11 12 13 14 15
95 16 17 18 19 20 21 22 23
96 24 25 26 27 28 29 30 31
97 32 33 34 35 36 37 38 39
98 40 41 42 43 44 45 46 47
99 48 49 50 51 52 53 54 55
100 56 57 58 59 60 61 62 63
101 64 65 66 67 68 69 70 71
102 72 73 74 75 76 77 78 79
103 80 81 82 83 84 85 86 87
104 88 89 90 91 92 93 94 95
105 96 97 98 99 100 101 102 103
106 104 105 106 107 108 109 110 111
107 112 113 114 115 116 117 118 119
108 120 121 122 123 124 125 126 127
109 128 129 130 131 132 133 134 135
110 136 137 138 139 140 141 142 143
111 144 145 146 147 148 149 150 151
112 152 153 154 155 156 157 158 159
113 160 161 162 163 164 165 166 167
114 168 169 170 171 172 173 174 175
115 176 177 178 179 180 181 182 183
116 184 185 186 187 188 189 190 191
117 192 193 194 195 196 197 198 199
118 200 201 202 203 204 205 206 207
119 208 209 210 211 212 213 214 215
120 216 217 218 219 220 221 222 223
121 224 225 226 227 228 229 230 231
122 232 233 234 235 236 237 238 239
123 240 241 242 243 244 245 246 247
124 248 249 250 251 252 253 254 255>;
125 power-supply = <&backlight_regulator>;
126};
127
128&emmc {
129 /delete-property/mmc-hs200-1_8v;
130};
131
132&gpio_keys {
133 pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>;
134
135 volum_down {
136 label = "Volum_down";
137 gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
138 linux,code = <KEY_VOLUMEDOWN>;
139 debounce-interval = <100>;
140 };
141
142 volum_up {
143 label = "Volum_up";
144 gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
145 linux,code = <KEY_VOLUMEUP>;
146 debounce-interval = <100>;
147 };
148};
149
150&i2c_tunnel {
151 battery: bq27500@55 {
152 compatible = "ti,bq27500";
153 reg = <0x55>;
154 };
155};
156
157&i2c3 {
158 status = "okay";
159
160 clock-frequency = <400000>;
161 i2c-scl-falling-time-ns = <50>;
162 i2c-scl-rising-time-ns = <300>;
163
164 touchscreen@10 {
165 compatible = "elan,ekth3500";
166 reg = <0x10>;
167 interrupt-parent = <&gpio2>;
168 interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
169 pinctrl-names = "default";
170 pinctrl-0 = <&touch_int &touch_rst>;
171 reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
172 vcc33-supply = <&vcc33_touch>;
173 vccio-supply = <&vcc33_touch>;
174 };
175};
176
177&panel {
178 compatible = "auo,b101ean01", "simple-panel";
179 power-supply= <&panel_regulator>;
180};
181
182&rk808 {
183 pinctrl-names = "default";
184 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
185
186 regulators {
187 vcc33_touch: LDO_REG2 {
188 regulator-min-microvolt = <3300000>;
189 regulator-max-microvolt = <3300000>;
190 regulator-name = "vcc33_touch";
191 regulator-state-mem {
192 regulator-off-in-suspend;
193 };
194 };
195
196 vcc5v_touch: SWITCH_REG2 {
197 regulator-name = "vcc5v_touch";
198 regulator-state-mem {
199 regulator-off-in-suspend;
200 };
201 };
202 };
203};
204
205&sdmmc {
206 disable-wp;
207 pinctrl-names = "default";
208 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
209 &sdmmc_bus4>;
210};
211
212&vcc_5v {
213 enable-active-high;
214 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&drv_5v>;
217};
218
219&vcc50_hdmi {
220 enable-active-high;
221 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&vcc50_hdmi_en>;
224};
225
226&pinctrl {
227 backlight {
228 bl_pwr_en: bl_pwr_en {
229 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
230 };
231 };
232
233 buck-5v {
234 drv_5v: drv-5v {
235 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
236 };
237 };
238
239 buttons {
240 volum_down_l: volum-down-l {
241 rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
242 };
243
244 volum_up_l: volum-up-l {
245 rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
246 };
247 };
248
249 hdmi {
250 vcc50_hdmi_en: vcc50-hdmi-en {
251 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
252 };
253 };
254
255 lcd {
256 lcd_enable_h: lcd-en {
257 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
258 };
259
260 avdd_1v8_disp_en: avdd-1v8-disp-en {
261 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
262 };
263 };
264
265 pmic {
266 dvs_1: dvs-1 {
267 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
268 };
269
270 dvs_2: dvs-2 {
271 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
272 };
273 };
274
275 prochot {
276 gpio_prochot: gpio-prochot {
277 rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
278 };
279 };
280
281 touchscreen {
282 touch_int: touch-int {
283 rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
284 };
285
286 touch_rst: touch-rst {
287 rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
288 };
289 };
290};
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Veyron Minnie Rev 0+ board device tree source
4 *
5 * Copyright 2015 Google, Inc
6 */
7
8/dts-v1/;
9#include "rk3288-veyron-chromebook.dtsi"
10#include "rk3288-veyron-broadcom-bluetooth.dtsi"
11
12/ {
13 model = "Google Minnie";
14 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
15 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
16 "google,veyron-minnie-rev0", "google,veyron-minnie",
17 "google,veyron", "rockchip,rk3288";
18
19 volume_buttons: volume-buttons {
20 compatible = "gpio-keys";
21 pinctrl-names = "default";
22 pinctrl-0 = <&volum_down_l &volum_up_l>;
23
24 key-volum-down {
25 label = "Volum_down";
26 gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
27 linux,code = <KEY_VOLUMEDOWN>;
28 debounce-interval = <100>;
29 };
30
31 key-volum-up {
32 label = "Volum_up";
33 gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_VOLUMEUP>;
35 debounce-interval = <100>;
36 };
37 };
38};
39
40&backlight {
41 /* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
42 brightness-levels = <3 255>;
43 num-interpolated-steps = <252>;
44};
45
46&i2c_tunnel {
47 battery: bq27500@55 {
48 compatible = "ti,bq27500";
49 reg = <0x55>;
50 };
51};
52
53&i2c3 {
54 status = "okay";
55
56 clock-frequency = <400000>;
57 i2c-scl-falling-time-ns = <50>;
58 i2c-scl-rising-time-ns = <300>;
59
60 touchscreen@10 {
61 compatible = "elan,ekth3500";
62 reg = <0x10>;
63 interrupt-parent = <&gpio2>;
64 interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&touch_int &touch_rst>;
67 reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
68 vcc33-supply = <&vcc33_touch>;
69 vccio-supply = <&vcc33_touch>;
70 };
71};
72
73&panel {
74 compatible = "auo,b101ean01";
75
76 /delete-node/ panel-timing;
77
78 panel-timing {
79 clock-frequency = <66666667>;
80 hactive = <1280>;
81 hfront-porch = <18>;
82 hback-porch = <21>;
83 hsync-len = <32>;
84 vactive = <800>;
85 vfront-porch = <4>;
86 vback-porch = <8>;
87 vsync-len = <18>;
88 };
89};
90
91&rk808 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
94
95 regulators {
96 vcc33_touch: LDO_REG2 {
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 regulator-name = "vcc33_touch";
100 regulator-state-mem {
101 regulator-off-in-suspend;
102 };
103 };
104
105 vcc5v_touch: SWITCH_REG2 {
106 regulator-name = "vcc5v_touch";
107 regulator-state-mem {
108 regulator-off-in-suspend;
109 };
110 };
111 };
112};
113
114&sdmmc {
115 disable-wp;
116 pinctrl-names = "default";
117 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
118 &sdmmc_bus4>;
119};
120
121&vcc_5v {
122 enable-active-high;
123 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&drv_5v>;
126};
127
128&vcc50_hdmi {
129 enable-active-high;
130 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&vcc50_hdmi_en>;
133};
134
135&gpio0 {
136 gpio-line-names = "PMIC_SLEEP_AP",
137 "DDRIO_PWROFF",
138 "DDRIO_RETEN",
139 "TS3A227E_INT_L",
140 "PMIC_INT_L",
141 "PWR_KEY_L",
142 "AP_LID_INT_L",
143 "EC_IN_RW",
144
145 "AC_PRESENT_AP",
146 /*
147 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
148 * it REC_MODE_L.
149 */
150 "RECOVERY_SW_L",
151 "OTP_OUT",
152 "HOST1_PWR_EN",
153 "USBOTG_PWREN_H",
154 "AP_WARM_RESET_H",
155 "nFALUT2",
156 "I2C0_SDA_PMIC",
157
158 "I2C0_SCL_PMIC",
159 "SUSPEND_L",
160 "USB_INT";
161};
162
163&gpio2 {
164 gpio-line-names = "CONFIG0",
165 "CONFIG1",
166 "CONFIG2",
167 "",
168 "",
169 "",
170 "",
171 "CONFIG3",
172
173 "PROCHOT#",
174 "EMMC_RST_L",
175 "",
176 "",
177 "BL_PWR_EN",
178 "AVDD_1V8_DISP_EN",
179 "TOUCH_INT",
180 "TOUCH_RST",
181
182 "I2C3_SCL_TP",
183 "I2C3_SDA_TP";
184};
185
186&gpio3 {
187 gpio-line-names = "FLASH0_D0",
188 "FLASH0_D1",
189 "FLASH0_D2",
190 "FLASH0_D3",
191 "FLASH0_D4",
192 "FLASH0_D5",
193 "FLASH0_D6",
194 "FLASH0_D7",
195
196 "",
197 "",
198 "",
199 "",
200 "",
201 "",
202 "",
203 "",
204
205 "FLASH0_CS2/EMMC_CMD",
206 "",
207 "FLASH0_DQS/EMMC_CLKO";
208};
209
210&gpio4 {
211 gpio-line-names = "",
212 "",
213 "",
214 "",
215 "",
216 "",
217 "",
218 "",
219
220 "",
221 "",
222 "",
223 "",
224 "",
225 "",
226 "",
227 "",
228
229 "UART0_RXD",
230 "UART0_TXD",
231 "UART0_CTS",
232 "UART0_RTS",
233 "SDIO0_D0",
234 "SDIO0_D1",
235 "SDIO0_D2",
236 "SDIO0_D3",
237
238 "SDIO0_CMD",
239 "SDIO0_CLK",
240 "dev_wake",
241 "",
242 "WIFI_ENABLE_H",
243 "BT_ENABLE_L",
244 "WIFI_HOST_WAKE",
245 "BT_HOST_WAKE";
246};
247
248&gpio5 {
249 gpio-line-names = "",
250 "",
251 "",
252 "",
253 "",
254 "",
255 "",
256 "",
257
258 "",
259 "",
260 "Volum_Up#",
261 "Volum_Down#",
262 "SPI0_CLK",
263 "SPI0_CS0",
264 "SPI0_TXD",
265 "SPI0_RXD",
266
267 "",
268 "",
269 "",
270 "VCC50_HDMI_EN";
271};
272
273&gpio6 {
274 gpio-line-names = "I2S0_SCLK",
275 "I2S0_LRCK_RX",
276 "I2S0_LRCK_TX",
277 "I2S0_SDI",
278 "I2S0_SDO0",
279 "HP_DET_H",
280 "",
281 "INT_CODEC",
282
283 "I2S0_CLK",
284 "I2C2_SDA",
285 "I2C2_SCL",
286 "MICDET",
287 "",
288 "",
289 "",
290 "",
291
292 "SDMMC_D0",
293 "SDMMC_D1",
294 "SDMMC_D2",
295 "SDMMC_D3",
296 "SDMMC_CLK",
297 "SDMMC_CMD";
298};
299
300&gpio7 {
301 gpio-line-names = "LCDC_BL",
302 "PWM_LOG",
303 "BL_EN",
304 "TRACKPAD_INT",
305 "TPM_INT_H",
306 "SDMMC_DET_L",
307 /*
308 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
309 * it FW_WP_AP.
310 */
311 "AP_FLASH_WP_L",
312 "EC_INT",
313
314 "CPU_NMI",
315 "DVS_OK",
316 "SDMMC_WP",
317 "EDP_HPD",
318 "DVS1",
319 "nFALUT1",
320 "LCD_EN",
321 "DVS2",
322
323 "VCC5V_GOOD_H",
324 "I2C4_SDA_TP",
325 "I2C4_SCL_TP",
326 "I2C5_SDA_HDMI",
327 "I2C5_SCL_HDMI",
328 "5V_DRV",
329 "UART2_RXD",
330 "UART2_TXD";
331};
332
333&gpio8 {
334 gpio-line-names = "RAM_ID0",
335 "RAM_ID1",
336 "RAM_ID2",
337 "RAM_ID3",
338 "I2C1_SDA_TPM",
339 "I2C1_SCL_TPM",
340 "SPI2_CLK",
341 "SPI2_CS0",
342
343 "SPI2_RXD",
344 "SPI2_TXD";
345};
346
347&pinctrl {
348 pinctrl-names = "default", "sleep";
349 pinctrl-0 = <
350 /* Common for sleep and wake, but no owners */
351 &ddr0_retention
352 &ddrio_pwroff
353 &global_pwroff
354
355 /* Wake only */
356 &suspend_l_wake
357 >;
358 pinctrl-1 = <
359 /* Common for sleep and wake, but no owners */
360 &ddr0_retention
361 &ddrio_pwroff
362 &global_pwroff
363
364 /* Sleep only */
365 &suspend_l_sleep
366 >;
367
368 buck-5v {
369 drv_5v: drv-5v {
370 rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
371 };
372 };
373
374 buttons {
375 volum_down_l: volum-down-l {
376 rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
377 };
378
379 volum_up_l: volum-up-l {
380 rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
381 };
382 };
383
384 hdmi {
385 vcc50_hdmi_en: vcc50-hdmi-en {
386 rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
387 };
388 };
389
390 pmic {
391 dvs_1: dvs-1 {
392 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
393 };
394
395 dvs_2: dvs-2 {
396 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
397 };
398 };
399
400 prochot {
401 gpio_prochot: gpio-prochot {
402 rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
403 };
404 };
405
406 touchscreen {
407 touch_int: touch-int {
408 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
409 };
410
411 touch_rst: touch-rst {
412 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
413 };
414 };
415};