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1/*
2 * Device Tree Source for the Genmai board
3 *
4 * Copyright (C) 2013-14 Renesas Solutions Corp.
5 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r7s72100.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
16
17/ {
18 model = "Genmai";
19 compatible = "renesas,genmai", "renesas,r7s72100";
20
21 aliases {
22 serial0 = &scif2;
23 };
24
25 chosen {
26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
27 stdout-path = "serial0:115200n8";
28 };
29
30 memory@8000000 {
31 device_type = "memory";
32 reg = <0x08000000 0x08000000>;
33 };
34
35 lbsc {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 };
39
40 leds {
41 status = "okay";
42 compatible = "gpio-leds";
43
44 led1 {
45 gpios = <&port4 10 GPIO_ACTIVE_LOW>;
46 };
47
48 led2 {
49 gpios = <&port4 11 GPIO_ACTIVE_LOW>;
50 };
51 };
52};
53
54&pinctrl {
55
56 scif2_pins: serial2 {
57 /* P3_0 as TxD2; P3_2 as RxD2 */
58 pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
59 };
60
61 i2c2_pins: i2c2 {
62 /* RIIC2: P1_4 as SCL, P1_5 as SDA */
63 pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
64 };
65
66 ether_pins: ether {
67 /* Ethernet on Ports 1,2,3,5 */
68 pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */
69 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
70 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
71 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
72 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
73 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
74 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
75 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */
76 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */
77 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */
78 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */
79 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */
80 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */
81 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */
82 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */
83 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */
84 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
85 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
86 };
87};
88
89&extal_clk {
90 clock-frequency = <13330000>;
91};
92
93&usb_x1_clk {
94 clock-frequency = <48000000>;
95};
96
97&rtc_x1_clk {
98 clock-frequency = <32768>;
99};
100
101&mtu2 {
102 status = "okay";
103};
104
105ðer {
106 pinctrl-names = "default";
107 pinctrl-0 = <ðer_pins>;
108
109 status = "okay";
110
111 renesas,no-ether-link;
112 phy-handle = <&phy0>;
113 phy0: ethernet-phy@0 {
114 reg = <0>;
115 };
116};
117
118&i2c2 {
119 status = "okay";
120 clock-frequency = <400000>;
121
122 pinctrl-names = "default";
123 pinctrl-0 = <&i2c2_pins>;
124
125 eeprom@50 {
126 compatible = "renesas,r1ex24128", "atmel,24c128";
127 reg = <0x50>;
128 pagesize = <64>;
129 };
130};
131
132&rtc {
133 status = "okay";
134};
135
136&scif2 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&scif2_pins>;
139
140 status = "okay";
141};
142
143&spi4 {
144 status = "okay";
145
146 codec: codec@0 {
147 compatible = "wlf,wm8978";
148 reg = <0>;
149 spi-max-frequency = <5000000>;
150 };
151};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Genmai board
4 *
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
7 */
8
9/dts-v1/;
10#include "r7s72100.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
13
14/ {
15 model = "Genmai";
16 compatible = "renesas,genmai", "renesas,r7s72100";
17
18 aliases {
19 serial0 = &scif2;
20 };
21
22 chosen {
23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@8000000 {
28 device_type = "memory";
29 reg = <0x08000000 0x08000000>;
30 };
31
32 lbsc {
33 #address-cells = <1>;
34 #size-cells = <1>;
35 };
36
37 leds {
38 status = "okay";
39 compatible = "gpio-leds";
40
41 led1 {
42 gpios = <&port4 10 GPIO_ACTIVE_LOW>;
43 };
44
45 led2 {
46 gpios = <&port4 11 GPIO_ACTIVE_LOW>;
47 };
48 };
49};
50
51&pinctrl {
52
53 scif2_pins: serial2 {
54 /* P3_0 as TxD2; P3_2 as RxD2 */
55 pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
56 };
57
58 i2c2_pins: i2c2 {
59 /* RIIC2: P1_4 as SCL, P1_5 as SDA */
60 pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
61 };
62
63 ether_pins: ether {
64 /* Ethernet on Ports 1,2,3,5 */
65 pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */
66 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
67 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
68 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
69 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
70 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
71 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
72 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */
73 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */
74 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */
75 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */
76 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */
77 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */
78 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */
79 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */
80 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */
81 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
82 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
83 };
84};
85
86&extal_clk {
87 clock-frequency = <13330000>;
88};
89
90&usb_x1_clk {
91 clock-frequency = <48000000>;
92};
93
94&rtc_x1_clk {
95 clock-frequency = <32768>;
96};
97
98&mtu2 {
99 status = "okay";
100};
101
102ðer {
103 pinctrl-names = "default";
104 pinctrl-0 = <ðer_pins>;
105
106 status = "okay";
107
108 renesas,no-ether-link;
109 phy-handle = <&phy0>;
110 phy0: ethernet-phy@0 {
111 compatible = "ethernet-phy-idb824.2814",
112 "ethernet-phy-ieee802.3-c22";
113 reg = <0>;
114 };
115};
116
117&i2c2 {
118 status = "okay";
119 clock-frequency = <400000>;
120
121 pinctrl-names = "default";
122 pinctrl-0 = <&i2c2_pins>;
123
124 eeprom@50 {
125 compatible = "renesas,r1ex24128", "atmel,24c128";
126 reg = <0x50>;
127 pagesize = <64>;
128 };
129};
130
131&rtc {
132 status = "okay";
133};
134
135&scif2 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&scif2_pins>;
138
139 status = "okay";
140};
141
142&spi4 {
143 status = "okay";
144
145 codec: codec@0 {
146 compatible = "wlf,wm8978";
147 reg = <0>;
148 spi-max-frequency = <5000000>;
149 };
150};