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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (c) 2019 Protonic Holland
4 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include "imx6dl.dtsi"
11
12/ {
13 model = "Van der Laan LANMCU";
14 compatible = "vdl,lanmcu", "fsl,imx6dl";
15
16 chosen {
17 stdout-path = &uart4;
18 };
19
20 clock_ksz8081: clock-ksz8081 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <50000000>;
24 };
25
26 backlight: backlight {
27 compatible = "pwm-backlight";
28 pwms = <&pwm1 0 5000000 0>;
29 brightness-levels = <0 1000>;
30 num-interpolated-steps = <20>;
31 default-brightness-level = <19>;
32 };
33
34 display {
35 compatible = "fsl,imx-parallel-display";
36 pinctrl-0 = <&pinctrl_ipu1_disp>;
37 pinctrl-names = "default";
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 port@0 {
42 reg = <0>;
43
44 display_in: endpoint {
45 remote-endpoint = <&ipu1_di0_disp0>;
46 };
47 };
48
49 port@1 {
50 reg = <1>;
51
52 display_out: endpoint {
53 remote-endpoint = <&panel_in>;
54 };
55 };
56 };
57
58 leds {
59 compatible = "gpio-leds";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_leds>;
62
63 led-0 {
64 label = "debug0";
65 function = LED_FUNCTION_STATUS;
66 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
67 linux,default-trigger = "heartbeat";
68 };
69 };
70
71 panel {
72 compatible = "edt,etm0700g0bdh6";
73 backlight = <&backlight>;
74
75 port {
76 panel_in: endpoint {
77 remote-endpoint = <&display_out>;
78 };
79 };
80 };
81
82 reg_otg_vbus: regulator-otg-vbus {
83 compatible = "regulator-fixed";
84 regulator-name = "otg-vbus";
85 regulator-min-microvolt = <5000000>;
86 regulator-max-microvolt = <5000000>;
87 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
88 enable-active-high;
89 };
90
91 usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
92 compatible = "mmc-pwrseq-simple";
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_wifi_npd>;
95 reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
96 };
97
98};
99
100&can1 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_can1>;
103 status = "okay";
104};
105
106&can2 {
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_can2>;
109 status = "okay";
110};
111
112&fec {
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_enet>;
115 phy-mode = "rmii";
116 clocks = <&clks IMX6QDL_CLK_ENET>,
117 <&clks IMX6QDL_CLK_ENET>,
118 <&clock_ksz8081>;
119 clock-names = "ipg", "ahb", "ptp";
120 phy-handle = <&rgmii_phy>;
121 status = "okay";
122
123 mdio {
124 #address-cells = <1>;
125 #size-cells = <0>;
126
127 /* Microchip KSZ8081RNA PHY */
128 rgmii_phy: ethernet-phy@0 {
129 reg = <0>;
130 interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
131 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
132 reset-assert-us = <10000>;
133 reset-deassert-us = <300>;
134 };
135 };
136};
137
138&gpio1 {
139 gpio-line-names =
140 "", "SD1_CD", "", "", "", "", "", "",
141 "DEBUG_0", "BL_PWM", "", "", "", "", "", "",
142 "", "", "", "", "", "", "", "ENET_LED_GREEN",
143 "", "", "", "", "", "", "", "";
144};
145
146&gpio3 {
147 gpio-line-names =
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
151 "", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
152};
153
154&gpio5 {
155 gpio-line-names =
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "ENET_RST", "ENET_INT",
159 "", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
160};
161
162&gpio6 {
163 gpio-line-names =
164 "", "", "", "", "", "", "", "",
165 "", "", "WLAN_REG_ON", "", "", "", "", "",
166 "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "";
168};
169
170&gpio7 {
171 gpio-line-names =
172 "", "", "", "", "", "", "", "",
173 "EMMC_RST", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "";
176};
177
178&i2c1 {
179 clock-frequency = <100000>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_i2c1>;
182 status = "okay";
183
184 /* additional i2c devices are added automatically by the boot loader */
185};
186
187&i2c3 {
188 clock-frequency = <100000>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_i2c3>;
191 status = "okay";
192
193 touchscreen@38 {
194 compatible = "edt,edt-ft5406";
195 reg = <0x38>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_ts_edt>;
198 interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
199
200 touchscreen-size-x = <1792>;
201 touchscreen-size-y = <1024>;
202
203 touchscreen-fuzz-x = <0>;
204 touchscreen-fuzz-y = <0>;
205
206 /* Touch screen calibration */
207 threshold = <50>;
208 gain = <5>;
209 offset = <10>;
210 };
211
212 rtc@51 {
213 compatible = "nxp,pcf8563";
214 reg = <0x51>;
215 };
216};
217
218&ipu1_di0_disp0 {
219 remote-endpoint = <&display_in>;
220};
221
222&pwm1 {
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_pwm1>;
225 status = "okay";
226};
227
228&uart2 {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_uart2>;
231 linux,rs485-enabled-at-boot-time;
232 uart-has-rtscts;
233 status = "okay";
234};
235
236&uart3 {
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_uart3>;
239 linux,rs485-enabled-at-boot-time;
240 uart-has-rtscts;
241 status = "okay";
242};
243
244&uart4 {
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_uart4>;
247 status = "okay";
248};
249
250&usbotg {
251 vbus-supply = <®_otg_vbus>;
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctrl_usbotg>;
254 phy_type = "utmi";
255 dr_mode = "host";
256 status = "okay";
257};
258
259&usdhc1 {
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_usdhc1>;
262 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
263 no-1-8-v;
264 disable-wp;
265 cap-sd-highspeed;
266 no-mmc;
267 no-sdio;
268 status = "okay";
269};
270
271&usdhc2 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_usdhc2>;
274 no-1-8-v;
275 non-removable;
276 mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
277 #address-cells = <1>;
278 #size-cells = <0>;
279 status = "okay";
280
281 wifi@1 {
282 reg = <1>;
283 compatible = "brcm,bcm4329-fmac";
284 };
285};
286
287&usdhc3 {
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_usdhc3>;
290 bus-width = <8>;
291 no-1-8-v;
292 non-removable;
293 no-sd;
294 no-sdio;
295 status = "okay";
296};
297
298&iomuxc {
299 pinctrl_can1: can1grp {
300 fsl,pins = <
301 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
302 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
303 >;
304 };
305
306 pinctrl_can2: can2grp {
307 fsl,pins = <
308 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
309 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
310 >;
311 };
312
313 pinctrl_enet: enetgrp {
314 fsl,pins = <
315 /* MX6QDL_ENET_PINGRP4 */
316 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
317 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
318 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
319 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
320 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
321 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
322 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
323 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
324 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
325
326 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
327 /* Phy reset */
328 MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
329 /* nINTRP */
330 MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
331 >;
332 };
333
334 pinctrl_i2c1: i2c1grp {
335 fsl,pins = <
336 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
337 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
338 >;
339 };
340
341 pinctrl_i2c3: i2c3grp {
342 fsl,pins = <
343 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
344 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
345 >;
346 };
347
348 pinctrl_ipu1_disp: ipudisp1grp {
349 fsl,pins = <
350 /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
351 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
352 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
353 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
354 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
355 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
356 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
357 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
358 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
359 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
360 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
361 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
362 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
363 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
364 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
365 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
366 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
367 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
368 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
369 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
370 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
371 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
372 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
373 >;
374 };
375
376 pinctrl_leds: ledsgrp {
377 fsl,pins = <
378 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
379 >;
380 };
381
382 pinctrl_pwm1: pwm1grp {
383 fsl,pins = <
384 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
385 >;
386 };
387
388 pinctrl_ts_edt: ts1grp {
389 fsl,pins = <
390 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
391 >;
392 };
393
394 pinctrl_uart2: uart2grp {
395 fsl,pins = <
396 MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
397 MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
398 MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x130b1
399 >;
400 };
401
402 pinctrl_uart3: uart3grp {
403 fsl,pins = <
404 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
405 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
406 MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x130b1
407 >;
408 };
409
410 pinctrl_uart4: uart4grp {
411 fsl,pins = <
412 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
413 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
414 >;
415 };
416
417 pinctrl_usbotg: usbotggrp {
418 fsl,pins = <
419 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
420 /* power enable, high active */
421 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
422 >;
423 };
424
425 pinctrl_usdhc1: usdhc1grp {
426 fsl,pins = <
427 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
428 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
429 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
430 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
431 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
432 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
433 MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b0
434 >;
435 };
436
437 pinctrl_usdhc2: usdhc2grp {
438 fsl,pins = <
439 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
440 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
441 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
442 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
443 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
444 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
445 >;
446 };
447
448 pinctrl_usdhc3: usdhc3grp {
449 fsl,pins = <
450 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
451 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
452 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
453 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
454 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
455 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
456 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
457 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
458 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
459 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
460 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
461 >;
462 };
463
464 pinctrl_wifi_npd: wifigrp {
465 fsl,pins = <
466 /* WL_REG_ON */
467 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
468 >;
469 };
470};