Loading...
1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11#include "skeleton.dtsi"
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16
17/ {
18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 serial5 = &uart0;
29 serial6 = &uart1;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 ssc0 = &ssc0;
37 };
38 cpus {
39 #address-cells = <0>;
40 #size-cells = <0>;
41
42 cpu {
43 compatible = "arm,arm926ej-s";
44 device_type = "cpu";
45 };
46 };
47
48 memory {
49 reg = <0x20000000 0x04000000>;
50 };
51
52 clocks {
53 slow_xtal: slow_xtal {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58
59 main_xtal: main_xtal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
63 };
64
65 adc_op_clk: adc_op_clk{
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <5000000>;
69 };
70 };
71
72 sram0: sram@2ff000 {
73 compatible = "mmio-sram";
74 reg = <0x002ff000 0x2000>;
75 };
76
77 ahb {
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges;
82
83 apb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88
89 aic: interrupt-controller@fffff000 {
90 #interrupt-cells = <3>;
91 compatible = "atmel,at91rm9200-aic";
92 interrupt-controller;
93 reg = <0xfffff000 0x200>;
94 atmel,external-irqs = <29 30 31>;
95 };
96
97 ramc0: ramc@ffffea00 {
98 compatible = "atmel,at91sam9260-sdramc";
99 reg = <0xffffea00 0x200>;
100 };
101
102 smc: smc@ffffec00 {
103 compatible = "atmel,at91sam9260-smc", "syscon";
104 reg = <0xffffec00 0x200>;
105 };
106
107 matrix: matrix@ffffee00 {
108 compatible = "atmel,at91sam9260-matrix", "syscon";
109 reg = <0xffffee00 0x200>;
110 };
111
112 pmc: pmc@fffffc00 {
113 compatible = "atmel,at91sam9260-pmc", "syscon";
114 reg = <0xfffffc00 0x100>;
115 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
116 interrupt-controller;
117 #address-cells = <1>;
118 #size-cells = <0>;
119 #interrupt-cells = <1>;
120
121 main_osc: main_osc {
122 compatible = "atmel,at91rm9200-clk-main-osc";
123 #clock-cells = <0>;
124 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
125 clocks = <&main_xtal>;
126 };
127
128 main: mainck {
129 compatible = "atmel,at91rm9200-clk-main";
130 #clock-cells = <0>;
131 clocks = <&main_osc>;
132 };
133
134 slow_rc_osc: slow_rc_osc {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <32768>;
138 clock-accuracy = <50000000>;
139 };
140
141 clk32k: slck {
142 compatible = "atmel,at91sam9260-clk-slow";
143 #clock-cells = <0>;
144 clocks = <&slow_rc_osc>, <&slow_xtal>;
145 };
146
147 plla: pllack {
148 compatible = "atmel,at91rm9200-clk-pll";
149 #clock-cells = <0>;
150 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
151 clocks = <&main>;
152 reg = <0>;
153 atmel,clk-input-range = <1000000 32000000>;
154 #atmel,pll-clk-output-range-cells = <4>;
155 atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
156 <150000000 240000000 2 1>;
157 };
158
159 pllb: pllbck {
160 compatible = "atmel,at91rm9200-clk-pll";
161 #clock-cells = <0>;
162 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
163 clocks = <&main>;
164 reg = <1>;
165 atmel,clk-input-range = <1000000 5000000>;
166 #atmel,pll-clk-output-range-cells = <4>;
167 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
168 };
169
170 mck: masterck {
171 compatible = "atmel,at91rm9200-clk-master";
172 #clock-cells = <0>;
173 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
174 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
175 atmel,clk-output-range = <0 105000000>;
176 atmel,clk-divisors = <1 2 4 0>;
177 };
178
179 usb: usbck {
180 compatible = "atmel,at91rm9200-clk-usb";
181 #clock-cells = <0>;
182 atmel,clk-divisors = <1 2 4 0>;
183 clocks = <&pllb>;
184 };
185
186 prog: progck {
187 compatible = "atmel,at91rm9200-clk-programmable";
188 #address-cells = <1>;
189 #size-cells = <0>;
190 interrupt-parent = <&pmc>;
191 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
192
193 prog0: prog0 {
194 #clock-cells = <0>;
195 reg = <0>;
196 interrupts = <AT91_PMC_PCKRDY(0)>;
197 };
198
199 prog1: prog1 {
200 #clock-cells = <0>;
201 reg = <1>;
202 interrupts = <AT91_PMC_PCKRDY(1)>;
203 };
204 };
205
206 systemck {
207 compatible = "atmel,at91rm9200-clk-system";
208 #address-cells = <1>;
209 #size-cells = <0>;
210
211 uhpck: uhpck {
212 #clock-cells = <0>;
213 reg = <6>;
214 clocks = <&usb>;
215 };
216
217 udpck: udpck {
218 #clock-cells = <0>;
219 reg = <7>;
220 clocks = <&usb>;
221 };
222
223 pck0: pck0 {
224 #clock-cells = <0>;
225 reg = <8>;
226 clocks = <&prog0>;
227 };
228
229 pck1: pck1 {
230 #clock-cells = <0>;
231 reg = <9>;
232 clocks = <&prog1>;
233 };
234 };
235
236 periphck {
237 compatible = "atmel,at91rm9200-clk-peripheral";
238 #address-cells = <1>;
239 #size-cells = <0>;
240 clocks = <&mck>;
241
242 pioA_clk: pioA_clk {
243 #clock-cells = <0>;
244 reg = <2>;
245 };
246
247 pioB_clk: pioB_clk {
248 #clock-cells = <0>;
249 reg = <3>;
250 };
251
252 pioC_clk: pioC_clk {
253 #clock-cells = <0>;
254 reg = <4>;
255 };
256
257 adc_clk: adc_clk {
258 #clock-cells = <0>;
259 reg = <5>;
260 };
261
262 usart0_clk: usart0_clk {
263 #clock-cells = <0>;
264 reg = <6>;
265 };
266
267 usart1_clk: usart1_clk {
268 #clock-cells = <0>;
269 reg = <7>;
270 };
271
272 usart2_clk: usart2_clk {
273 #clock-cells = <0>;
274 reg = <8>;
275 };
276
277 mci0_clk: mci0_clk {
278 #clock-cells = <0>;
279 reg = <9>;
280 };
281
282 udc_clk: udc_clk {
283 #clock-cells = <0>;
284 reg = <10>;
285 };
286
287 twi0_clk: twi0_clk {
288 reg = <11>;
289 #clock-cells = <0>;
290 };
291
292 spi0_clk: spi0_clk {
293 #clock-cells = <0>;
294 reg = <12>;
295 };
296
297 spi1_clk: spi1_clk {
298 #clock-cells = <0>;
299 reg = <13>;
300 };
301
302 ssc0_clk: ssc0_clk {
303 #clock-cells = <0>;
304 reg = <14>;
305 };
306
307 tc0_clk: tc0_clk {
308 #clock-cells = <0>;
309 reg = <17>;
310 };
311
312 tc1_clk: tc1_clk {
313 #clock-cells = <0>;
314 reg = <18>;
315 };
316
317 tc2_clk: tc2_clk {
318 #clock-cells = <0>;
319 reg = <19>;
320 };
321
322 ohci_clk: ohci_clk {
323 #clock-cells = <0>;
324 reg = <20>;
325 };
326
327 macb0_clk: macb0_clk {
328 #clock-cells = <0>;
329 reg = <21>;
330 };
331
332 isi_clk: isi_clk {
333 #clock-cells = <0>;
334 reg = <22>;
335 };
336
337 usart3_clk: usart3_clk {
338 #clock-cells = <0>;
339 reg = <23>;
340 };
341
342 uart0_clk: uart0_clk {
343 #clock-cells = <0>;
344 reg = <24>;
345 };
346
347 uart1_clk: uart1_clk {
348 #clock-cells = <0>;
349 reg = <25>;
350 };
351
352 tc3_clk: tc3_clk {
353 #clock-cells = <0>;
354 reg = <26>;
355 };
356
357 tc4_clk: tc4_clk {
358 #clock-cells = <0>;
359 reg = <27>;
360 };
361
362 tc5_clk: tc5_clk {
363 #clock-cells = <0>;
364 reg = <28>;
365 };
366 };
367 };
368
369 rstc@fffffd00 {
370 compatible = "atmel,at91sam9260-rstc";
371 reg = <0xfffffd00 0x10>;
372 clocks = <&clk32k>;
373 };
374
375 shdwc@fffffd10 {
376 compatible = "atmel,at91sam9260-shdwc";
377 reg = <0xfffffd10 0x10>;
378 clocks = <&clk32k>;
379 };
380
381 pit: timer@fffffd30 {
382 compatible = "atmel,at91sam9260-pit";
383 reg = <0xfffffd30 0xf>;
384 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
385 clocks = <&mck>;
386 };
387
388 tcb0: timer@fffa0000 {
389 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
390 #address-cells = <1>;
391 #size-cells = <0>;
392 reg = <0xfffa0000 0x100>;
393 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
394 18 IRQ_TYPE_LEVEL_HIGH 0
395 19 IRQ_TYPE_LEVEL_HIGH 0>;
396 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
397 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
398 };
399
400 tcb1: timer@fffdc000 {
401 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
402 #address-cells = <1>;
403 #size-cells = <0>;
404 reg = <0xfffdc000 0x100>;
405 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
406 27 IRQ_TYPE_LEVEL_HIGH 0
407 28 IRQ_TYPE_LEVEL_HIGH 0>;
408 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
409 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
410 };
411
412 pinctrl@fffff400 {
413 #address-cells = <1>;
414 #size-cells = <1>;
415 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
416 ranges = <0xfffff400 0xfffff400 0x600>;
417
418 atmel,mux-mask = <
419 /* A B */
420 0xffffffff 0xffc00c3b /* pioA */
421 0xffffffff 0x7fff3ccf /* pioB */
422 0xffffffff 0x007fffff /* pioC */
423 >;
424
425 /* shared pinctrl settings */
426 dbgu {
427 pinctrl_dbgu: dbgu-0 {
428 atmel,pins =
429 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
430 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
431 };
432 };
433
434 usart0 {
435 pinctrl_usart0: usart0-0 {
436 atmel,pins =
437 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
438 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
439 };
440
441 pinctrl_usart0_rts: usart0_rts-0 {
442 atmel,pins =
443 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
444 };
445
446 pinctrl_usart0_cts: usart0_cts-0 {
447 atmel,pins =
448 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
449 };
450
451 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
452 atmel,pins =
453 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
454 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
455 };
456
457 pinctrl_usart0_dcd: usart0_dcd-0 {
458 atmel,pins =
459 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
460 };
461
462 pinctrl_usart0_ri: usart0_ri-0 {
463 atmel,pins =
464 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
465 };
466 };
467
468 usart1 {
469 pinctrl_usart1: usart1-0 {
470 atmel,pins =
471 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
472 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
473 };
474
475 pinctrl_usart1_rts: usart1_rts-0 {
476 atmel,pins =
477 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
478 };
479
480 pinctrl_usart1_cts: usart1_cts-0 {
481 atmel,pins =
482 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
483 };
484 };
485
486 usart2 {
487 pinctrl_usart2: usart2-0 {
488 atmel,pins =
489 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
490 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
491 };
492
493 pinctrl_usart2_rts: usart2_rts-0 {
494 atmel,pins =
495 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
496 };
497
498 pinctrl_usart2_cts: usart2_cts-0 {
499 atmel,pins =
500 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
501 };
502 };
503
504 usart3 {
505 pinctrl_usart3: usart3-0 {
506 atmel,pins =
507 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
508 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
509 };
510
511 pinctrl_usart3_rts: usart3_rts-0 {
512 atmel,pins =
513 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
514 };
515
516 pinctrl_usart3_cts: usart3_cts-0 {
517 atmel,pins =
518 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
519 };
520 };
521
522 uart0 {
523 pinctrl_uart0: uart0-0 {
524 atmel,pins =
525 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
526 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
527 };
528 };
529
530 uart1 {
531 pinctrl_uart1: uart1-0 {
532 atmel,pins =
533 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
534 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
535 };
536 };
537
538 nand {
539 pinctrl_nand_rb: nand-rb-0 {
540 atmel,pins =
541 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
542 };
543
544 pinctrl_nand_cs: nand-cs-0 {
545 atmel,pins =
546 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
547 };
548 };
549
550 macb {
551 pinctrl_macb_rmii: macb_rmii-0 {
552 atmel,pins =
553 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
554 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
555 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
556 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
557 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
558 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
559 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
560 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
561 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
562 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
563 };
564
565 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
566 atmel,pins =
567 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
568 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
569 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
570 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
571 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
572 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
573 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
574 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
575 };
576
577 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
578 atmel,pins =
579 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
580 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
581 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
582 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
583 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
584 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
585 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
586 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
587 };
588 };
589
590 mmc0 {
591 pinctrl_mmc0_clk: mmc0_clk-0 {
592 atmel,pins =
593 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
594 };
595
596 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
597 atmel,pins =
598 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
599 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
600 };
601
602 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
603 atmel,pins =
604 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
605 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
606 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
607 };
608
609 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
610 atmel,pins =
611 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
612 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
613 };
614
615 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
616 atmel,pins =
617 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
618 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
619 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
620 };
621 };
622
623 ssc0 {
624 pinctrl_ssc0_tx: ssc0_tx-0 {
625 atmel,pins =
626 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
627 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
628 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
629 };
630
631 pinctrl_ssc0_rx: ssc0_rx-0 {
632 atmel,pins =
633 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
634 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
635 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
636 };
637 };
638
639 spi0 {
640 pinctrl_spi0: spi0-0 {
641 atmel,pins =
642 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
643 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
644 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
645 };
646 };
647
648 spi1 {
649 pinctrl_spi1: spi1-0 {
650 atmel,pins =
651 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
652 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
653 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
654 };
655 };
656
657 i2c_gpio0 {
658 pinctrl_i2c_gpio0: i2c_gpio0-0 {
659 atmel,pins =
660 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
661 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
662 };
663 };
664
665 tcb0 {
666 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
667 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
668 };
669
670 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
671 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
672 };
673
674 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
675 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
676 };
677
678 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
679 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
680 };
681
682 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
683 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
684 };
685
686 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
687 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
688 };
689
690 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
691 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
692 };
693
694 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
695 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
696 };
697
698 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
699 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
700 };
701 };
702
703 tcb1 {
704 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
705 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
706 };
707
708 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
709 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
710 };
711
712 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
713 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
714 };
715
716 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
717 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
718 };
719
720 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
721 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
722 };
723
724 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
725 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
726 };
727
728 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
729 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
730 };
731
732 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
733 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
734 };
735
736 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
737 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
738 };
739 };
740
741 pioA: gpio@fffff400 {
742 compatible = "atmel,at91rm9200-gpio";
743 reg = <0xfffff400 0x200>;
744 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
745 #gpio-cells = <2>;
746 gpio-controller;
747 interrupt-controller;
748 #interrupt-cells = <2>;
749 clocks = <&pioA_clk>;
750 };
751
752 pioB: gpio@fffff600 {
753 compatible = "atmel,at91rm9200-gpio";
754 reg = <0xfffff600 0x200>;
755 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
756 #gpio-cells = <2>;
757 gpio-controller;
758 interrupt-controller;
759 #interrupt-cells = <2>;
760 clocks = <&pioB_clk>;
761 };
762
763 pioC: gpio@fffff800 {
764 compatible = "atmel,at91rm9200-gpio";
765 reg = <0xfffff800 0x200>;
766 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
767 #gpio-cells = <2>;
768 gpio-controller;
769 interrupt-controller;
770 #interrupt-cells = <2>;
771 clocks = <&pioC_clk>;
772 };
773 };
774
775 dbgu: serial@fffff200 {
776 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
777 reg = <0xfffff200 0x200>;
778 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
779 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_dbgu>;
781 clocks = <&mck>;
782 clock-names = "usart";
783 status = "disabled";
784 };
785
786 usart0: serial@fffb0000 {
787 compatible = "atmel,at91sam9260-usart";
788 reg = <0xfffb0000 0x200>;
789 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
790 atmel,use-dma-rx;
791 atmel,use-dma-tx;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_usart0>;
794 clocks = <&usart0_clk>;
795 clock-names = "usart";
796 status = "disabled";
797 };
798
799 usart1: serial@fffb4000 {
800 compatible = "atmel,at91sam9260-usart";
801 reg = <0xfffb4000 0x200>;
802 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
803 atmel,use-dma-rx;
804 atmel,use-dma-tx;
805 pinctrl-names = "default";
806 pinctrl-0 = <&pinctrl_usart1>;
807 clocks = <&usart1_clk>;
808 clock-names = "usart";
809 status = "disabled";
810 };
811
812 usart2: serial@fffb8000 {
813 compatible = "atmel,at91sam9260-usart";
814 reg = <0xfffb8000 0x200>;
815 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
816 atmel,use-dma-rx;
817 atmel,use-dma-tx;
818 pinctrl-names = "default";
819 pinctrl-0 = <&pinctrl_usart2>;
820 clocks = <&usart2_clk>;
821 clock-names = "usart";
822 status = "disabled";
823 };
824
825 usart3: serial@fffd0000 {
826 compatible = "atmel,at91sam9260-usart";
827 reg = <0xfffd0000 0x200>;
828 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
829 atmel,use-dma-rx;
830 atmel,use-dma-tx;
831 pinctrl-names = "default";
832 pinctrl-0 = <&pinctrl_usart3>;
833 clocks = <&usart3_clk>;
834 clock-names = "usart";
835 status = "disabled";
836 };
837
838 uart0: serial@fffd4000 {
839 compatible = "atmel,at91sam9260-usart";
840 reg = <0xfffd4000 0x200>;
841 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
842 atmel,use-dma-rx;
843 atmel,use-dma-tx;
844 pinctrl-names = "default";
845 pinctrl-0 = <&pinctrl_uart0>;
846 clocks = <&uart0_clk>;
847 clock-names = "usart";
848 status = "disabled";
849 };
850
851 uart1: serial@fffd8000 {
852 compatible = "atmel,at91sam9260-usart";
853 reg = <0xfffd8000 0x200>;
854 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
855 atmel,use-dma-rx;
856 atmel,use-dma-tx;
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_uart1>;
859 clocks = <&uart1_clk>;
860 clock-names = "usart";
861 status = "disabled";
862 };
863
864 macb0: ethernet@fffc4000 {
865 compatible = "cdns,at91sam9260-macb", "cdns,macb";
866 reg = <0xfffc4000 0x100>;
867 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
868 pinctrl-names = "default";
869 pinctrl-0 = <&pinctrl_macb_rmii>;
870 clocks = <&macb0_clk>, <&macb0_clk>;
871 clock-names = "hclk", "pclk";
872 status = "disabled";
873 };
874
875 usb1: gadget@fffa4000 {
876 compatible = "atmel,at91sam9260-udc";
877 reg = <0xfffa4000 0x4000>;
878 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
879 clocks = <&udc_clk>, <&udpck>;
880 clock-names = "pclk", "hclk";
881 status = "disabled";
882 };
883
884 i2c0: i2c@fffac000 {
885 compatible = "atmel,at91sam9260-i2c";
886 reg = <0xfffac000 0x100>;
887 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
888 #address-cells = <1>;
889 #size-cells = <0>;
890 clocks = <&twi0_clk>;
891 status = "disabled";
892 };
893
894 mmc0: mmc@fffa8000 {
895 compatible = "atmel,hsmci";
896 reg = <0xfffa8000 0x600>;
897 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
898 #address-cells = <1>;
899 #size-cells = <0>;
900 pinctrl-names = "default";
901 clocks = <&mci0_clk>;
902 clock-names = "mci_clk";
903 status = "disabled";
904 };
905
906 ssc0: ssc@fffbc000 {
907 compatible = "atmel,at91rm9200-ssc";
908 reg = <0xfffbc000 0x4000>;
909 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
910 pinctrl-names = "default";
911 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
912 clocks = <&ssc0_clk>;
913 clock-names = "pclk";
914 status = "disabled";
915 };
916
917 spi0: spi@fffc8000 {
918 #address-cells = <1>;
919 #size-cells = <0>;
920 compatible = "atmel,at91rm9200-spi";
921 reg = <0xfffc8000 0x200>;
922 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
923 pinctrl-names = "default";
924 pinctrl-0 = <&pinctrl_spi0>;
925 clocks = <&spi0_clk>;
926 clock-names = "spi_clk";
927 status = "disabled";
928 };
929
930 spi1: spi@fffcc000 {
931 #address-cells = <1>;
932 #size-cells = <0>;
933 compatible = "atmel,at91rm9200-spi";
934 reg = <0xfffcc000 0x200>;
935 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
936 pinctrl-names = "default";
937 pinctrl-0 = <&pinctrl_spi1>;
938 clocks = <&spi1_clk>;
939 clock-names = "spi_clk";
940 status = "disabled";
941 };
942
943 adc0: adc@fffe0000 {
944 #address-cells = <1>;
945 #size-cells = <0>;
946 compatible = "atmel,at91sam9260-adc";
947 reg = <0xfffe0000 0x100>;
948 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
949 clocks = <&adc_clk>, <&adc_op_clk>;
950 clock-names = "adc_clk", "adc_op_clk";
951 atmel,adc-use-external-triggers;
952 atmel,adc-channels-used = <0xf>;
953 atmel,adc-vref = <3300>;
954 atmel,adc-startup-time = <15>;
955 atmel,adc-res = <8 10>;
956 atmel,adc-res-names = "lowres", "highres";
957 atmel,adc-use-res = "highres";
958
959 trigger0 {
960 trigger-name = "timer-counter-0";
961 trigger-value = <0x1>;
962 };
963 trigger1 {
964 trigger-name = "timer-counter-1";
965 trigger-value = <0x3>;
966 };
967
968 trigger2 {
969 trigger-name = "timer-counter-2";
970 trigger-value = <0x5>;
971 };
972
973 trigger3 {
974 trigger-name = "external";
975 trigger-value = <0xd>;
976 trigger-external;
977 };
978 };
979
980 rtc@fffffd20 {
981 compatible = "atmel,at91sam9260-rtt";
982 reg = <0xfffffd20 0x10>;
983 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
984 clocks = <&clk32k>;
985 status = "disabled";
986 };
987
988 watchdog@fffffd40 {
989 compatible = "atmel,at91sam9260-wdt";
990 reg = <0xfffffd40 0x10>;
991 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
992 clocks = <&clk32k>;
993 atmel,watchdog-type = "hardware";
994 atmel,reset-type = "all";
995 atmel,dbg-halt;
996 status = "disabled";
997 };
998
999 gpbr: syscon@fffffd50 {
1000 compatible = "atmel,at91sam9260-gpbr", "syscon";
1001 reg = <0xfffffd50 0x10>;
1002 status = "disabled";
1003 };
1004 };
1005
1006 usb0: ohci@500000 {
1007 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1008 reg = <0x00500000 0x100000>;
1009 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1010 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1011 clock-names = "ohci_clk", "hclk", "uhpck";
1012 status = "disabled";
1013 };
1014
1015 ebi: ebi@10000000 {
1016 compatible = "atmel,at91sam9260-ebi";
1017 #address-cells = <2>;
1018 #size-cells = <1>;
1019 atmel,smc = <&smc>;
1020 atmel,matrix = <&matrix>;
1021 reg = <0x10000000 0x80000000>;
1022 ranges = <0x0 0x0 0x10000000 0x10000000
1023 0x1 0x0 0x20000000 0x10000000
1024 0x2 0x0 0x30000000 0x10000000
1025 0x3 0x0 0x40000000 0x10000000
1026 0x4 0x0 0x50000000 0x10000000
1027 0x5 0x0 0x60000000 0x10000000
1028 0x6 0x0 0x70000000 0x10000000
1029 0x7 0x0 0x80000000 0x10000000>;
1030 clocks = <&mck>;
1031 status = "disabled";
1032
1033 nand_controller: nand-controller {
1034 compatible = "atmel,at91sam9260-nand-controller";
1035 #address-cells = <2>;
1036 #size-cells = <1>;
1037 ranges;
1038 status = "disabled";
1039 };
1040 };
1041 };
1042
1043 i2c-gpio-0 {
1044 compatible = "i2c-gpio";
1045 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
1046 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1047 >;
1048 i2c-gpio,sda-open-drain;
1049 i2c-gpio,scl-open-drain;
1050 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1051 #address-cells = <1>;
1052 #size-cells = <0>;
1053 pinctrl-names = "default";
1054 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1055 status = "disabled";
1056 };
1057};
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 *
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14#include <dt-bindings/mfd/at91-usart.h>
15
16/ {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 model = "Atmel AT91SAM9260 family SoC";
20 compatible = "atmel,at91sam9260";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
29 serial5 = &uart0;
30 serial6 = &uart1;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
36 i2c0 = &i2c0;
37 ssc0 = &ssc0;
38 };
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 cpu@0 {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 reg = <0>;
47 };
48 };
49
50 memory@20000000 {
51 device_type = "memory";
52 reg = <0x20000000 0x04000000>;
53 };
54
55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <5000000>;
72 };
73 };
74
75 sram0: sram@2ff000 {
76 compatible = "mmio-sram";
77 reg = <0x002ff000 0x2000>;
78 #address-cells = <1>;
79 #size-cells = <1>;
80 ranges = <0 0x002ff000 0x2000>;
81 };
82
83 ahb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88
89 apb {
90 compatible = "simple-bus";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 ranges;
94
95 aic: interrupt-controller@fffff000 {
96 #interrupt-cells = <3>;
97 compatible = "atmel,at91rm9200-aic";
98 interrupt-controller;
99 reg = <0xfffff000 0x200>;
100 atmel,external-irqs = <29 30 31>;
101 };
102
103 ramc0: ramc@ffffea00 {
104 compatible = "atmel,at91sam9260-sdramc";
105 reg = <0xffffea00 0x200>;
106 };
107
108 smc: smc@ffffec00 {
109 compatible = "atmel,at91sam9260-smc", "syscon";
110 reg = <0xffffec00 0x200>;
111 };
112
113 matrix: matrix@ffffee00 {
114 compatible = "atmel,at91sam9260-matrix", "syscon";
115 reg = <0xffffee00 0x200>;
116 };
117
118 pmc: pmc@fffffc00 {
119 compatible = "atmel,at91sam9260-pmc", "syscon";
120 reg = <0xfffffc00 0x100>;
121 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
122 #clock-cells = <2>;
123 clocks = <&slow_xtal>, <&main_xtal>;
124 clock-names = "slow_xtal", "main_xtal";
125 };
126
127 reset-controller@fffffd00 {
128 compatible = "atmel,at91sam9260-rstc";
129 reg = <0xfffffd00 0x10>;
130 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
131 };
132
133 shdwc@fffffd10 {
134 compatible = "atmel,at91sam9260-shdwc";
135 reg = <0xfffffd10 0x10>;
136 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
137 };
138
139 pit: timer@fffffd30 {
140 compatible = "atmel,at91sam9260-pit";
141 reg = <0xfffffd30 0xf>;
142 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
143 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
144 };
145
146 tcb0: timer@fffa0000 {
147 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
148 #address-cells = <1>;
149 #size-cells = <0>;
150 reg = <0xfffa0000 0x100>;
151 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
152 18 IRQ_TYPE_LEVEL_HIGH 0
153 19 IRQ_TYPE_LEVEL_HIGH 0>;
154 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
155 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
156 };
157
158 tcb1: timer@fffdc000 {
159 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
160 #address-cells = <1>;
161 #size-cells = <0>;
162 reg = <0xfffdc000 0x100>;
163 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
164 27 IRQ_TYPE_LEVEL_HIGH 0
165 28 IRQ_TYPE_LEVEL_HIGH 0>;
166 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
167 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
168 };
169
170 pinctrl: pinctrl@fffff400 {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
174 ranges = <0xfffff400 0xfffff400 0x600>;
175
176 atmel,mux-mask = <
177 /* A B */
178 0xffffffff 0xffc00c3b /* pioA */
179 0xffffffff 0x7fff3ccf /* pioB */
180 0xffffffff 0x007fffff /* pioC */
181 >;
182
183 /* shared pinctrl settings */
184 dbgu {
185 pinctrl_dbgu: dbgu-0 {
186 atmel,pins =
187 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
188 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
189 };
190 };
191
192 usart0 {
193 pinctrl_usart0: usart0-0 {
194 atmel,pins =
195 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
196 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
197 };
198
199 pinctrl_usart0_rts: usart0_rts-0 {
200 atmel,pins =
201 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
202 };
203
204 pinctrl_usart0_cts: usart0_cts-0 {
205 atmel,pins =
206 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
207 };
208
209 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
210 atmel,pins =
211 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
212 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
213 };
214
215 pinctrl_usart0_dcd: usart0_dcd-0 {
216 atmel,pins =
217 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
218 };
219
220 pinctrl_usart0_ri: usart0_ri-0 {
221 atmel,pins =
222 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
223 };
224 };
225
226 usart1 {
227 pinctrl_usart1: usart1-0 {
228 atmel,pins =
229 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
230 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
231 };
232
233 pinctrl_usart1_rts: usart1_rts-0 {
234 atmel,pins =
235 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
236 };
237
238 pinctrl_usart1_cts: usart1_cts-0 {
239 atmel,pins =
240 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
241 };
242 };
243
244 usart2 {
245 pinctrl_usart2: usart2-0 {
246 atmel,pins =
247 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
248 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
249 };
250
251 pinctrl_usart2_rts: usart2_rts-0 {
252 atmel,pins =
253 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
254 };
255
256 pinctrl_usart2_cts: usart2_cts-0 {
257 atmel,pins =
258 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
259 };
260 };
261
262 usart3 {
263 pinctrl_usart3: usart3-0 {
264 atmel,pins =
265 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
266 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
267 };
268
269 pinctrl_usart3_rts: usart3_rts-0 {
270 atmel,pins =
271 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
272 };
273
274 pinctrl_usart3_cts: usart3_cts-0 {
275 atmel,pins =
276 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
277 };
278 };
279
280 uart0 {
281 pinctrl_uart0: uart0-0 {
282 atmel,pins =
283 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
284 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
285 };
286 };
287
288 uart1 {
289 pinctrl_uart1: uart1-0 {
290 atmel,pins =
291 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
292 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
293 };
294 };
295
296 nand {
297 pinctrl_nand_rb: nand-rb-0 {
298 atmel,pins =
299 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
300 };
301
302 pinctrl_nand_cs: nand-cs-0 {
303 atmel,pins =
304 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
305 };
306 };
307
308 macb {
309 pinctrl_macb_rmii: macb_rmii-0 {
310 atmel,pins =
311 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
312 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
313 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
314 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
315 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
316 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
317 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
318 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
319 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
320 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
321 };
322
323 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
324 atmel,pins =
325 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
326 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
327 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
328 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
329 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
330 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
331 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
332 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
333 };
334
335 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
336 atmel,pins =
337 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
338 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
339 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
340 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
341 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
342 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
343 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
344 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
345 };
346 };
347
348 mmc0 {
349 pinctrl_mmc0_clk: mmc0_clk-0 {
350 atmel,pins =
351 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
352 };
353
354 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
355 atmel,pins =
356 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
357 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
358 };
359
360 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
361 atmel,pins =
362 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
363 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
364 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
365 };
366
367 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
368 atmel,pins =
369 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
370 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
371 };
372
373 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
374 atmel,pins =
375 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
376 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
377 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
378 };
379 };
380
381 ssc0 {
382 pinctrl_ssc0_tx: ssc0_tx-0 {
383 atmel,pins =
384 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
385 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
386 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
387 };
388
389 pinctrl_ssc0_rx: ssc0_rx-0 {
390 atmel,pins =
391 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
392 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
393 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
394 };
395 };
396
397 spi0 {
398 pinctrl_spi0: spi0-0 {
399 atmel,pins =
400 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
401 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
402 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
403 };
404 };
405
406 spi1 {
407 pinctrl_spi1: spi1-0 {
408 atmel,pins =
409 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
410 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
411 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
412 };
413 };
414
415 i2c_gpio0 {
416 pinctrl_i2c_gpio0: i2c_gpio0-0 {
417 atmel,pins =
418 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
419 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
420 };
421 };
422
423 tcb0 {
424 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
425 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
426 };
427
428 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
429 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
433 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
434 };
435
436 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
437 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 };
439
440 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
441 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
442 };
443
444 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
445 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
446 };
447
448 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
449 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
450 };
451
452 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
453 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454 };
455
456 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
457 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
458 };
459 };
460
461 tcb1 {
462 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
463 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465
466 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
467 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 };
469
470 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
471 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 };
473
474 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
475 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 };
477
478 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
479 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 };
481
482 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
483 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 };
485
486 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
487 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
489
490 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
491 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
493
494 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
495 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
497 };
498
499 pioA: gpio@fffff400 {
500 compatible = "atmel,at91rm9200-gpio";
501 reg = <0xfffff400 0x200>;
502 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
503 #gpio-cells = <2>;
504 gpio-controller;
505 interrupt-controller;
506 #interrupt-cells = <2>;
507 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
508 };
509
510 pioB: gpio@fffff600 {
511 compatible = "atmel,at91rm9200-gpio";
512 reg = <0xfffff600 0x200>;
513 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
514 #gpio-cells = <2>;
515 gpio-controller;
516 interrupt-controller;
517 #interrupt-cells = <2>;
518 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
519 };
520
521 pioC: gpio@fffff800 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffff800 0x200>;
524 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
525 #gpio-cells = <2>;
526 gpio-controller;
527 interrupt-controller;
528 #interrupt-cells = <2>;
529 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
530 };
531 };
532
533 dbgu: serial@fffff200 {
534 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
535 reg = <0xfffff200 0x200>;
536 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
537 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
538 pinctrl-names = "default";
539 pinctrl-0 = <&pinctrl_dbgu>;
540 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
541 clock-names = "usart";
542 status = "disabled";
543 };
544
545 usart0: serial@fffb0000 {
546 compatible = "atmel,at91sam9260-usart";
547 reg = <0xfffb0000 0x200>;
548 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
549 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
550 atmel,use-dma-rx;
551 atmel,use-dma-tx;
552 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_usart0>;
554 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
555 clock-names = "usart";
556 status = "disabled";
557 };
558
559 usart1: serial@fffb4000 {
560 compatible = "atmel,at91sam9260-usart";
561 reg = <0xfffb4000 0x200>;
562 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
563 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
564 atmel,use-dma-rx;
565 atmel,use-dma-tx;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_usart1>;
568 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
569 clock-names = "usart";
570 status = "disabled";
571 };
572
573 usart2: serial@fffb8000 {
574 compatible = "atmel,at91sam9260-usart";
575 reg = <0xfffb8000 0x200>;
576 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
577 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
578 atmel,use-dma-rx;
579 atmel,use-dma-tx;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usart2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
583 clock-names = "usart";
584 status = "disabled";
585 };
586
587 usart3: serial@fffd0000 {
588 compatible = "atmel,at91sam9260-usart";
589 reg = <0xfffd0000 0x200>;
590 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
591 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
592 atmel,use-dma-rx;
593 atmel,use-dma-tx;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_usart3>;
596 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
597 clock-names = "usart";
598 status = "disabled";
599 };
600
601 uart0: serial@fffd4000 {
602 compatible = "atmel,at91sam9260-usart";
603 reg = <0xfffd4000 0x200>;
604 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
605 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
606 atmel,use-dma-rx;
607 atmel,use-dma-tx;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_uart0>;
610 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
611 clock-names = "usart";
612 status = "disabled";
613 };
614
615 uart1: serial@fffd8000 {
616 compatible = "atmel,at91sam9260-usart";
617 reg = <0xfffd8000 0x200>;
618 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
619 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
620 atmel,use-dma-rx;
621 atmel,use-dma-tx;
622 pinctrl-names = "default";
623 pinctrl-0 = <&pinctrl_uart1>;
624 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
625 clock-names = "usart";
626 status = "disabled";
627 };
628
629 macb0: ethernet@fffc4000 {
630 compatible = "cdns,at91sam9260-macb", "cdns,macb";
631 reg = <0xfffc4000 0x100>;
632 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_macb_rmii>;
635 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
636 clock-names = "hclk", "pclk";
637 status = "disabled";
638 };
639
640 usb1: gadget@fffa4000 {
641 compatible = "atmel,at91sam9260-udc";
642 reg = <0xfffa4000 0x4000>;
643 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
644 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
645 clock-names = "pclk", "hclk";
646 status = "disabled";
647 };
648
649 i2c0: i2c@fffac000 {
650 compatible = "atmel,at91sam9260-i2c";
651 reg = <0xfffac000 0x100>;
652 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
656 status = "disabled";
657 };
658
659 mmc0: mmc@fffa8000 {
660 compatible = "atmel,hsmci";
661 reg = <0xfffa8000 0x600>;
662 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
663 #address-cells = <1>;
664 #size-cells = <0>;
665 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
666 clock-names = "mci_clk";
667 status = "disabled";
668 };
669
670 ssc0: ssc@fffbc000 {
671 compatible = "atmel,at91rm9200-ssc";
672 reg = <0xfffbc000 0x4000>;
673 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
676 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
677 clock-names = "pclk";
678 status = "disabled";
679 };
680
681 spi0: spi@fffc8000 {
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "atmel,at91rm9200-spi";
685 reg = <0xfffc8000 0x200>;
686 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi0>;
689 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
690 clock-names = "spi_clk";
691 status = "disabled";
692 };
693
694 spi1: spi@fffcc000 {
695 #address-cells = <1>;
696 #size-cells = <0>;
697 compatible = "atmel,at91rm9200-spi";
698 reg = <0xfffcc000 0x200>;
699 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&pinctrl_spi1>;
702 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
703 clock-names = "spi_clk";
704 status = "disabled";
705 };
706
707 adc0: adc@fffe0000 {
708 compatible = "atmel,at91sam9260-adc";
709 reg = <0xfffe0000 0x100>;
710 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
712 clock-names = "adc_clk", "adc_op_clk";
713 atmel,adc-use-external-triggers;
714 atmel,adc-channels-used = <0xf>;
715 atmel,adc-vref = <3300>;
716 atmel,adc-startup-time = <15>;
717 };
718
719 rtc@fffffd20 {
720 compatible = "atmel,at91sam9260-rtt";
721 reg = <0xfffffd20 0x10>;
722 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
723 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
724 status = "disabled";
725 };
726
727 watchdog: watchdog@fffffd40 {
728 compatible = "atmel,at91sam9260-wdt";
729 reg = <0xfffffd40 0x10>;
730 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
731 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
732 atmel,watchdog-type = "hardware";
733 atmel,reset-type = "all";
734 atmel,dbg-halt;
735 status = "disabled";
736 };
737
738 gpbr: syscon@fffffd50 {
739 compatible = "atmel,at91sam9260-gpbr", "syscon";
740 reg = <0xfffffd50 0x10>;
741 status = "disabled";
742 };
743 };
744
745 usb0: ohci@500000 {
746 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
747 reg = <0x00500000 0x100000>;
748 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
749 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
750 clock-names = "ohci_clk", "hclk", "uhpck";
751 status = "disabled";
752 };
753
754 ebi: ebi@10000000 {
755 compatible = "atmel,at91sam9260-ebi";
756 #address-cells = <2>;
757 #size-cells = <1>;
758 atmel,smc = <&smc>;
759 atmel,matrix = <&matrix>;
760 reg = <0x10000000 0x80000000>;
761 ranges = <0x0 0x0 0x10000000 0x10000000
762 0x1 0x0 0x20000000 0x10000000
763 0x2 0x0 0x30000000 0x10000000
764 0x3 0x0 0x40000000 0x10000000
765 0x4 0x0 0x50000000 0x10000000
766 0x5 0x0 0x60000000 0x10000000
767 0x6 0x0 0x70000000 0x10000000
768 0x7 0x0 0x80000000 0x10000000>;
769 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
770 status = "disabled";
771
772 nand_controller: nand-controller {
773 compatible = "atmel,at91sam9260-nand-controller";
774 #address-cells = <2>;
775 #size-cells = <1>;
776 ranges;
777 status = "disabled";
778 };
779 };
780 };
781
782 i2c_gpio0: i2c-gpio-0 {
783 compatible = "i2c-gpio";
784 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
785 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
786 >;
787 i2c-gpio,sda-open-drain;
788 i2c-gpio,scl-open-drain;
789 i2c-gpio,delay-us = <2>; /* ~100 kHz */
790 #address-cells = <1>;
791 #size-cells = <0>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_i2c_gpio0>;
794 status = "disabled";
795 };
796};