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1/* sercos3: UIO driver for the Automata Sercos III PCI card
2
3 Copyright (C) 2008 Linutronix GmbH
4 Author: John Ogness <john.ogness@linutronix.de>
5
6 This is a straight-forward UIO driver, where interrupts are disabled
7 by the interrupt handler and re-enabled via a write to the UIO device
8 by the userspace-part.
9
10 The only part that may seem odd is the use of a logical OR when
11 storing and restoring enabled interrupts. This is done because the
12 userspace-part could directly modify the Interrupt Enable Register
13 at any time. To reduce possible conflicts, the kernel driver uses
14 a logical OR to make more controlled changes (rather than blindly
15 overwriting previous values).
16
17 Race conditions exist if the userspace-part directly modifies the
18 Interrupt Enable Register while in operation. The consequences are
19 that certain interrupts would fail to be enabled or disabled. For
20 this reason, the userspace-part should only directly modify the
21 Interrupt Enable Register at the beginning (to get things going).
22 The userspace-part can safely disable interrupts at any time using
23 a write to the UIO device.
24*/
25
26#include <linux/device.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/uio_driver.h>
30#include <linux/io.h>
31#include <linux/slab.h>
32
33/* ID's for SERCOS III PCI card (PLX 9030) */
34#define SERCOS_SUB_VENDOR_ID 0x1971
35#define SERCOS_SUB_SYSID_3530 0x3530
36#define SERCOS_SUB_SYSID_3535 0x3535
37#define SERCOS_SUB_SYSID_3780 0x3780
38
39/* Interrupt Enable Register */
40#define IER0_OFFSET 0x08
41
42/* Interrupt Status Register */
43#define ISR0_OFFSET 0x18
44
45struct sercos3_priv {
46 u32 ier0_cache;
47 spinlock_t ier0_cache_lock;
48};
49
50/* this function assumes ier0_cache_lock is locked! */
51static void sercos3_disable_interrupts(struct uio_info *info,
52 struct sercos3_priv *priv)
53{
54 void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
55
56 /* add enabled interrupts to cache */
57 priv->ier0_cache |= ioread32(ier0);
58
59 /* disable interrupts */
60 iowrite32(0, ier0);
61}
62
63/* this function assumes ier0_cache_lock is locked! */
64static void sercos3_enable_interrupts(struct uio_info *info,
65 struct sercos3_priv *priv)
66{
67 void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
68
69 /* restore previously enabled interrupts */
70 iowrite32(ioread32(ier0) | priv->ier0_cache, ier0);
71 priv->ier0_cache = 0;
72}
73
74static irqreturn_t sercos3_handler(int irq, struct uio_info *info)
75{
76 struct sercos3_priv *priv = info->priv;
77 void __iomem *isr0 = info->mem[3].internal_addr + ISR0_OFFSET;
78 void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
79
80 if (!(ioread32(isr0) & ioread32(ier0)))
81 return IRQ_NONE;
82
83 spin_lock(&priv->ier0_cache_lock);
84 sercos3_disable_interrupts(info, priv);
85 spin_unlock(&priv->ier0_cache_lock);
86
87 return IRQ_HANDLED;
88}
89
90static int sercos3_irqcontrol(struct uio_info *info, s32 irq_on)
91{
92 struct sercos3_priv *priv = info->priv;
93
94 spin_lock_irq(&priv->ier0_cache_lock);
95 if (irq_on)
96 sercos3_enable_interrupts(info, priv);
97 else
98 sercos3_disable_interrupts(info, priv);
99 spin_unlock_irq(&priv->ier0_cache_lock);
100
101 return 0;
102}
103
104static int sercos3_setup_iomem(struct pci_dev *dev, struct uio_info *info,
105 int n, int pci_bar)
106{
107 info->mem[n].addr = pci_resource_start(dev, pci_bar);
108 if (!info->mem[n].addr)
109 return -1;
110 info->mem[n].internal_addr = ioremap(pci_resource_start(dev, pci_bar),
111 pci_resource_len(dev, pci_bar));
112 if (!info->mem[n].internal_addr)
113 return -1;
114 info->mem[n].size = pci_resource_len(dev, pci_bar);
115 info->mem[n].memtype = UIO_MEM_PHYS;
116 return 0;
117}
118
119static int sercos3_pci_probe(struct pci_dev *dev,
120 const struct pci_device_id *id)
121{
122 struct uio_info *info;
123 struct sercos3_priv *priv;
124 int i;
125
126 info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
127 if (!info)
128 return -ENOMEM;
129
130 priv = kzalloc(sizeof(struct sercos3_priv), GFP_KERNEL);
131 if (!priv)
132 goto out_free;
133
134 if (pci_enable_device(dev))
135 goto out_free_priv;
136
137 if (pci_request_regions(dev, "sercos3"))
138 goto out_disable;
139
140 /* we only need PCI BAR's 0, 2, 3, 4, 5 */
141 if (sercos3_setup_iomem(dev, info, 0, 0))
142 goto out_unmap;
143 if (sercos3_setup_iomem(dev, info, 1, 2))
144 goto out_unmap;
145 if (sercos3_setup_iomem(dev, info, 2, 3))
146 goto out_unmap;
147 if (sercos3_setup_iomem(dev, info, 3, 4))
148 goto out_unmap;
149 if (sercos3_setup_iomem(dev, info, 4, 5))
150 goto out_unmap;
151
152 spin_lock_init(&priv->ier0_cache_lock);
153 info->priv = priv;
154 info->name = "Sercos_III_PCI";
155 info->version = "0.0.1";
156 info->irq = dev->irq;
157 info->irq_flags = IRQF_SHARED;
158 info->handler = sercos3_handler;
159 info->irqcontrol = sercos3_irqcontrol;
160
161 pci_set_drvdata(dev, info);
162
163 if (uio_register_device(&dev->dev, info))
164 goto out_unmap;
165
166 return 0;
167
168out_unmap:
169 for (i = 0; i < 5; i++) {
170 if (info->mem[i].internal_addr)
171 iounmap(info->mem[i].internal_addr);
172 }
173 pci_release_regions(dev);
174out_disable:
175 pci_disable_device(dev);
176out_free_priv:
177 kfree(priv);
178out_free:
179 kfree(info);
180 return -ENODEV;
181}
182
183static void sercos3_pci_remove(struct pci_dev *dev)
184{
185 struct uio_info *info = pci_get_drvdata(dev);
186 int i;
187
188 uio_unregister_device(info);
189 pci_release_regions(dev);
190 pci_disable_device(dev);
191 for (i = 0; i < 5; i++) {
192 if (info->mem[i].internal_addr)
193 iounmap(info->mem[i].internal_addr);
194 }
195 kfree(info->priv);
196 kfree(info);
197}
198
199static struct pci_device_id sercos3_pci_ids[] = {
200 {
201 .vendor = PCI_VENDOR_ID_PLX,
202 .device = PCI_DEVICE_ID_PLX_9030,
203 .subvendor = SERCOS_SUB_VENDOR_ID,
204 .subdevice = SERCOS_SUB_SYSID_3530,
205 },
206 {
207 .vendor = PCI_VENDOR_ID_PLX,
208 .device = PCI_DEVICE_ID_PLX_9030,
209 .subvendor = SERCOS_SUB_VENDOR_ID,
210 .subdevice = SERCOS_SUB_SYSID_3535,
211 },
212 {
213 .vendor = PCI_VENDOR_ID_PLX,
214 .device = PCI_DEVICE_ID_PLX_9030,
215 .subvendor = SERCOS_SUB_VENDOR_ID,
216 .subdevice = SERCOS_SUB_SYSID_3780,
217 },
218 { 0, }
219};
220
221static struct pci_driver sercos3_pci_driver = {
222 .name = "sercos3",
223 .id_table = sercos3_pci_ids,
224 .probe = sercos3_pci_probe,
225 .remove = sercos3_pci_remove,
226};
227
228module_pci_driver(sercos3_pci_driver);
229MODULE_DESCRIPTION("UIO driver for the Automata Sercos III PCI card");
230MODULE_AUTHOR("John Ogness <john.ogness@linutronix.de>");
231MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/* sercos3: UIO driver for the Automata Sercos III PCI card
3
4 Copyright (C) 2008 Linutronix GmbH
5 Author: John Ogness <john.ogness@linutronix.de>
6
7 This is a straight-forward UIO driver, where interrupts are disabled
8 by the interrupt handler and re-enabled via a write to the UIO device
9 by the userspace-part.
10
11 The only part that may seem odd is the use of a logical OR when
12 storing and restoring enabled interrupts. This is done because the
13 userspace-part could directly modify the Interrupt Enable Register
14 at any time. To reduce possible conflicts, the kernel driver uses
15 a logical OR to make more controlled changes (rather than blindly
16 overwriting previous values).
17
18 Race conditions exist if the userspace-part directly modifies the
19 Interrupt Enable Register while in operation. The consequences are
20 that certain interrupts would fail to be enabled or disabled. For
21 this reason, the userspace-part should only directly modify the
22 Interrupt Enable Register at the beginning (to get things going).
23 The userspace-part can safely disable interrupts at any time using
24 a write to the UIO device.
25*/
26
27#include <linux/device.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/uio_driver.h>
31#include <linux/io.h>
32#include <linux/slab.h>
33
34/* ID's for SERCOS III PCI card (PLX 9030) */
35#define SERCOS_SUB_VENDOR_ID 0x1971
36#define SERCOS_SUB_SYSID_3530 0x3530
37#define SERCOS_SUB_SYSID_3535 0x3535
38#define SERCOS_SUB_SYSID_3780 0x3780
39
40/* Interrupt Enable Register */
41#define IER0_OFFSET 0x08
42
43/* Interrupt Status Register */
44#define ISR0_OFFSET 0x18
45
46struct sercos3_priv {
47 u32 ier0_cache;
48 spinlock_t ier0_cache_lock;
49};
50
51/* this function assumes ier0_cache_lock is locked! */
52static void sercos3_disable_interrupts(struct uio_info *info,
53 struct sercos3_priv *priv)
54{
55 void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
56
57 /* add enabled interrupts to cache */
58 priv->ier0_cache |= ioread32(ier0);
59
60 /* disable interrupts */
61 iowrite32(0, ier0);
62}
63
64/* this function assumes ier0_cache_lock is locked! */
65static void sercos3_enable_interrupts(struct uio_info *info,
66 struct sercos3_priv *priv)
67{
68 void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
69
70 /* restore previously enabled interrupts */
71 iowrite32(ioread32(ier0) | priv->ier0_cache, ier0);
72 priv->ier0_cache = 0;
73}
74
75static irqreturn_t sercos3_handler(int irq, struct uio_info *info)
76{
77 struct sercos3_priv *priv = info->priv;
78 void __iomem *isr0 = info->mem[3].internal_addr + ISR0_OFFSET;
79 void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
80
81 if (!(ioread32(isr0) & ioread32(ier0)))
82 return IRQ_NONE;
83
84 spin_lock(&priv->ier0_cache_lock);
85 sercos3_disable_interrupts(info, priv);
86 spin_unlock(&priv->ier0_cache_lock);
87
88 return IRQ_HANDLED;
89}
90
91static int sercos3_irqcontrol(struct uio_info *info, s32 irq_on)
92{
93 struct sercos3_priv *priv = info->priv;
94
95 spin_lock_irq(&priv->ier0_cache_lock);
96 if (irq_on)
97 sercos3_enable_interrupts(info, priv);
98 else
99 sercos3_disable_interrupts(info, priv);
100 spin_unlock_irq(&priv->ier0_cache_lock);
101
102 return 0;
103}
104
105static int sercos3_setup_iomem(struct pci_dev *dev, struct uio_info *info,
106 int n, int pci_bar)
107{
108 info->mem[n].addr = pci_resource_start(dev, pci_bar);
109 if (!info->mem[n].addr)
110 return -1;
111 info->mem[n].internal_addr = ioremap(pci_resource_start(dev, pci_bar),
112 pci_resource_len(dev, pci_bar));
113 if (!info->mem[n].internal_addr)
114 return -1;
115 info->mem[n].size = pci_resource_len(dev, pci_bar);
116 info->mem[n].memtype = UIO_MEM_PHYS;
117 return 0;
118}
119
120static int sercos3_pci_probe(struct pci_dev *dev,
121 const struct pci_device_id *id)
122{
123 struct uio_info *info;
124 struct sercos3_priv *priv;
125 int i;
126
127 info = devm_kzalloc(&dev->dev, sizeof(struct uio_info), GFP_KERNEL);
128 if (!info)
129 return -ENOMEM;
130
131 priv = devm_kzalloc(&dev->dev, sizeof(struct sercos3_priv), GFP_KERNEL);
132 if (!priv)
133 return -ENOMEM;
134
135 if (pci_enable_device(dev))
136 return -ENODEV;
137
138 if (pci_request_regions(dev, "sercos3"))
139 goto out_disable;
140
141 /* we only need PCI BAR's 0, 2, 3, 4, 5 */
142 if (sercos3_setup_iomem(dev, info, 0, 0))
143 goto out_unmap;
144 if (sercos3_setup_iomem(dev, info, 1, 2))
145 goto out_unmap;
146 if (sercos3_setup_iomem(dev, info, 2, 3))
147 goto out_unmap;
148 if (sercos3_setup_iomem(dev, info, 3, 4))
149 goto out_unmap;
150 if (sercos3_setup_iomem(dev, info, 4, 5))
151 goto out_unmap;
152
153 spin_lock_init(&priv->ier0_cache_lock);
154 info->priv = priv;
155 info->name = "Sercos_III_PCI";
156 info->version = "0.0.1";
157 info->irq = dev->irq;
158 info->irq_flags = IRQF_SHARED;
159 info->handler = sercos3_handler;
160 info->irqcontrol = sercos3_irqcontrol;
161
162 pci_set_drvdata(dev, info);
163
164 if (uio_register_device(&dev->dev, info))
165 goto out_unmap;
166
167 return 0;
168
169out_unmap:
170 for (i = 0; i < 5; i++) {
171 if (info->mem[i].internal_addr)
172 iounmap(info->mem[i].internal_addr);
173 }
174 pci_release_regions(dev);
175out_disable:
176 pci_disable_device(dev);
177 return -ENODEV;
178}
179
180static void sercos3_pci_remove(struct pci_dev *dev)
181{
182 struct uio_info *info = pci_get_drvdata(dev);
183 int i;
184
185 uio_unregister_device(info);
186 pci_release_regions(dev);
187 pci_disable_device(dev);
188 for (i = 0; i < 5; i++) {
189 if (info->mem[i].internal_addr)
190 iounmap(info->mem[i].internal_addr);
191 }
192}
193
194static struct pci_device_id sercos3_pci_ids[] = {
195 {
196 .vendor = PCI_VENDOR_ID_PLX,
197 .device = PCI_DEVICE_ID_PLX_9030,
198 .subvendor = SERCOS_SUB_VENDOR_ID,
199 .subdevice = SERCOS_SUB_SYSID_3530,
200 },
201 {
202 .vendor = PCI_VENDOR_ID_PLX,
203 .device = PCI_DEVICE_ID_PLX_9030,
204 .subvendor = SERCOS_SUB_VENDOR_ID,
205 .subdevice = SERCOS_SUB_SYSID_3535,
206 },
207 {
208 .vendor = PCI_VENDOR_ID_PLX,
209 .device = PCI_DEVICE_ID_PLX_9030,
210 .subvendor = SERCOS_SUB_VENDOR_ID,
211 .subdevice = SERCOS_SUB_SYSID_3780,
212 },
213 { 0, }
214};
215
216static struct pci_driver sercos3_pci_driver = {
217 .name = "sercos3",
218 .id_table = sercos3_pci_ids,
219 .probe = sercos3_pci_probe,
220 .remove = sercos3_pci_remove,
221};
222
223module_pci_driver(sercos3_pci_driver);
224MODULE_DESCRIPTION("UIO driver for the Automata Sercos III PCI card");
225MODULE_AUTHOR("John Ogness <john.ogness@linutronix.de>");
226MODULE_LICENSE("GPL v2");