1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef __DAL_DCHUBBUB_H__
 27#define __DAL_DCHUBBUB_H__
 28
 29
 30enum dcc_control {
 31	dcc_control__256_256_xxx,
 32	dcc_control__128_128_xxx,
 33	dcc_control__256_64_64,
 34	dcc_control__256_128_128,
 35};
 36
 37enum segment_order {
 38	segment_order__na,
 39	segment_order__contiguous,
 40	segment_order__non_contiguous,
 41};
 42
 43struct dcn_hubbub_wm_set {
 44	uint32_t wm_set;
 45	uint32_t data_urgent;
 46	uint32_t pte_meta_urgent;
 47	uint32_t sr_enter;
 48	uint32_t sr_exit;
 49	uint32_t dram_clk_change;
 50	uint32_t usr_retrain;
 51	uint32_t fclk_pstate_change;
 52};
 53
 54struct dcn_hubbub_wm {
 55	struct dcn_hubbub_wm_set sets[4];
 56};
 57
 58enum dcn_hubbub_page_table_depth {
 59	DCN_PAGE_TABLE_DEPTH_1_LEVEL,
 60	DCN_PAGE_TABLE_DEPTH_2_LEVEL,
 61	DCN_PAGE_TABLE_DEPTH_3_LEVEL,
 62	DCN_PAGE_TABLE_DEPTH_4_LEVEL
 63};
 64
 65enum dcn_hubbub_page_table_block_size {
 66	DCN_PAGE_TABLE_BLOCK_SIZE_4KB = 0,
 67	DCN_PAGE_TABLE_BLOCK_SIZE_64KB = 4,
 68	DCN_PAGE_TABLE_BLOCK_SIZE_32KB = 3
 69};
 70
 71struct dcn_hubbub_phys_addr_config {
 72	struct {
 73		uint64_t fb_top;
 74		uint64_t fb_offset;
 75		uint64_t fb_base;
 76		uint64_t agp_top;
 77		uint64_t agp_bot;
 78		uint64_t agp_base;
 79	} system_aperture;
 80
 81	struct {
 82		uint64_t page_table_start_addr;
 83		uint64_t page_table_end_addr;
 84		uint64_t page_table_base_addr;
 85	} gart_config;
 86
 87	uint64_t page_table_default_page_addr;
 88};
 89
 90struct dcn_hubbub_virt_addr_config {
 91	uint64_t				page_table_start_addr;
 92	uint64_t				page_table_end_addr;
 93	enum dcn_hubbub_page_table_block_size	page_table_block_size;
 94	enum dcn_hubbub_page_table_depth	page_table_depth;
 95	uint64_t				page_table_base_addr;
 96};
 97
 98struct hubbub_addr_config {
 99	struct dcn_hubbub_phys_addr_config pa_config;
100	struct dcn_hubbub_virt_addr_config va_config;
101	struct {
102		uint64_t aperture_check_fault;
103		uint64_t generic_fault;
104	} default_addrs;
105};
106
107struct dcn_hubbub_state {
108	uint32_t vm_fault_addr_msb;
109	uint32_t vm_fault_addr_lsb;
110	uint32_t vm_error_status;
111	uint32_t vm_error_vmid;
112	uint32_t vm_error_pipe;
113	uint32_t vm_error_mode;
114};
115
116struct hubbub_funcs {
117	void (*update_dchub)(
118			struct hubbub *hubbub,
119			struct dchub_init_data *dh_data);
120
121	int (*init_dchub_sys_ctx)(
122			struct hubbub *hubbub,
123			struct dcn_hubbub_phys_addr_config *pa_config);
124	void (*init_vm_ctx)(
125			struct hubbub *hubbub,
126			struct dcn_hubbub_virt_addr_config *va_config,
127			int vmid);
128
129	bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
130			const struct dc_dcc_surface_param *input,
131			struct dc_surface_dcc_cap *output);
132
133	bool (*dcc_support_swizzle)(
134			enum swizzle_mode_values swizzle,
135			unsigned int bytes_per_element,
136			enum segment_order *segment_order_horz,
137			enum segment_order *segment_order_vert);
138
139	bool (*dcc_support_pixel_format)(
140			enum surface_pixel_format format,
141			unsigned int *bytes_per_element);
142
143	void (*wm_read_state)(struct hubbub *hubbub,
144			struct dcn_hubbub_wm *wm);
145
146	void (*get_dchub_ref_freq)(struct hubbub *hubbub,
147			unsigned int dccg_ref_freq_inKhz,
148			unsigned int *dchub_ref_freq_inKhz);
149
150	bool (*program_watermarks)(
151			struct hubbub *hubbub,
152			struct dcn_watermark_set *watermarks,
153			unsigned int refclk_mhz,
154			bool safe_to_lower);
155
156	bool (*is_allow_self_refresh_enabled)(struct hubbub *hubbub);
157	void (*allow_self_refresh_control)(struct hubbub *hubbub, bool allow);
158
159	bool (*verify_allow_pstate_change_high)(struct hubbub *hubbub);
160
161	void (*apply_DEDCN21_147_wa)(struct hubbub *hubbub);
162
163	void (*force_wm_propagate_to_pipes)(struct hubbub *hubbub);
164
165	void (*hubbub_read_state)(struct hubbub *hubbub, struct dcn_hubbub_state *hubbub_state);
166
167	void (*force_pstate_change_control)(struct hubbub *hubbub, bool force, bool allow);
168
169	void (*init_watermarks)(struct hubbub *hubbub);
170
171	/**
172	 * @program_det_size:
173	 *
174	 * DE-Tile buffers (DET) is a memory that is used to convert the tiled
175	 * data into linear, which the rest of the display can use to generate
176	 * the graphics output. One of the main features of this component is
177	 * that each pipe has a configurable DET buffer which means that when a
178	 * pipe is not enabled, the device can assign the memory to other
179	 * enabled pipes to try to be more efficient.
180	 *
181	 * DET logic is handled by dchubbub. Some ASICs provide a feature named
182	 * Configurable Return Buffer (CRB) segments which can be allocated to
183	 * compressed or detiled buffers.
184	 */
185	void (*program_det_size)(struct hubbub *hubbub, int hubp_inst, unsigned det_buffer_size_in_kbyte);
186	void (*program_compbuf_size)(struct hubbub *hubbub, unsigned compbuf_size_kb, bool safe_to_increase);
187	void (*init_crb)(struct hubbub *hubbub);
188	void (*force_usr_retraining_allow)(struct hubbub *hubbub, bool allow);
189	void (*set_request_limit)(struct hubbub *hubbub, int memory_channel_count, int words_per_channel);
190};
191
192struct hubbub {
193	const struct hubbub_funcs *funcs;
194	struct dc_context *ctx;
195	bool riommu_active;
196};
197
198#endif