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1/*
2 * Copyright 2008 Michael Ellerman, IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include <linux/kernel.h>
11#include <linux/kprobes.h>
12#include <linux/vmalloc.h>
13#include <linux/init.h>
14#include <linux/mm.h>
15#include <linux/cpuhotplug.h>
16#include <linux/slab.h>
17#include <linux/uaccess.h>
18#include <linux/kprobes.h>
19
20#include <asm/pgtable.h>
21#include <asm/tlbflush.h>
22#include <asm/page.h>
23#include <asm/code-patching.h>
24#include <asm/setup.h>
25
26static int __patch_instruction(unsigned int *exec_addr, unsigned int instr,
27 unsigned int *patch_addr)
28{
29 int err;
30
31 __put_user_size(instr, patch_addr, 4, err);
32 if (err)
33 return err;
34
35 asm ("dcbst 0, %0; sync; icbi 0,%1; sync; isync" :: "r" (patch_addr),
36 "r" (exec_addr));
37
38 return 0;
39}
40
41int raw_patch_instruction(unsigned int *addr, unsigned int instr)
42{
43 return __patch_instruction(addr, instr, addr);
44}
45
46#ifdef CONFIG_STRICT_KERNEL_RWX
47static DEFINE_PER_CPU(struct vm_struct *, text_poke_area);
48
49static int text_area_cpu_up(unsigned int cpu)
50{
51 struct vm_struct *area;
52
53 area = get_vm_area(PAGE_SIZE, VM_ALLOC);
54 if (!area) {
55 WARN_ONCE(1, "Failed to create text area for cpu %d\n",
56 cpu);
57 return -1;
58 }
59 this_cpu_write(text_poke_area, area);
60
61 return 0;
62}
63
64static int text_area_cpu_down(unsigned int cpu)
65{
66 free_vm_area(this_cpu_read(text_poke_area));
67 return 0;
68}
69
70/*
71 * Run as a late init call. This allows all the boot time patching to be done
72 * simply by patching the code, and then we're called here prior to
73 * mark_rodata_ro(), which happens after all init calls are run. Although
74 * BUG_ON() is rude, in this case it should only happen if ENOMEM, and we judge
75 * it as being preferable to a kernel that will crash later when someone tries
76 * to use patch_instruction().
77 */
78static int __init setup_text_poke_area(void)
79{
80 BUG_ON(!cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
81 "powerpc/text_poke:online", text_area_cpu_up,
82 text_area_cpu_down));
83
84 return 0;
85}
86late_initcall(setup_text_poke_area);
87
88/*
89 * This can be called for kernel text or a module.
90 */
91static int map_patch_area(void *addr, unsigned long text_poke_addr)
92{
93 unsigned long pfn;
94 int err;
95
96 if (is_vmalloc_addr(addr))
97 pfn = vmalloc_to_pfn(addr);
98 else
99 pfn = __pa_symbol(addr) >> PAGE_SHIFT;
100
101 err = map_kernel_page(text_poke_addr, (pfn << PAGE_SHIFT),
102 pgprot_val(PAGE_KERNEL));
103
104 pr_devel("Mapped addr %lx with pfn %lx:%d\n", text_poke_addr, pfn, err);
105 if (err)
106 return -1;
107
108 return 0;
109}
110
111static inline int unmap_patch_area(unsigned long addr)
112{
113 pte_t *ptep;
114 pmd_t *pmdp;
115 pud_t *pudp;
116 pgd_t *pgdp;
117
118 pgdp = pgd_offset_k(addr);
119 if (unlikely(!pgdp))
120 return -EINVAL;
121
122 pudp = pud_offset(pgdp, addr);
123 if (unlikely(!pudp))
124 return -EINVAL;
125
126 pmdp = pmd_offset(pudp, addr);
127 if (unlikely(!pmdp))
128 return -EINVAL;
129
130 ptep = pte_offset_kernel(pmdp, addr);
131 if (unlikely(!ptep))
132 return -EINVAL;
133
134 pr_devel("clearing mm %p, pte %p, addr %lx\n", &init_mm, ptep, addr);
135
136 /*
137 * In hash, pte_clear flushes the tlb, in radix, we have to
138 */
139 pte_clear(&init_mm, addr, ptep);
140 flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
141
142 return 0;
143}
144
145int patch_instruction(unsigned int *addr, unsigned int instr)
146{
147 int err;
148 unsigned int *patch_addr = NULL;
149 unsigned long flags;
150 unsigned long text_poke_addr;
151 unsigned long kaddr = (unsigned long)addr;
152
153 /*
154 * During early early boot patch_instruction is called
155 * when text_poke_area is not ready, but we still need
156 * to allow patching. We just do the plain old patching
157 */
158 if (!this_cpu_read(text_poke_area))
159 return raw_patch_instruction(addr, instr);
160
161 local_irq_save(flags);
162
163 text_poke_addr = (unsigned long)__this_cpu_read(text_poke_area)->addr;
164 if (map_patch_area(addr, text_poke_addr)) {
165 err = -1;
166 goto out;
167 }
168
169 patch_addr = (unsigned int *)(text_poke_addr) +
170 ((kaddr & ~PAGE_MASK) / sizeof(unsigned int));
171
172 __patch_instruction(addr, instr, patch_addr);
173
174 err = unmap_patch_area(text_poke_addr);
175 if (err)
176 pr_warn("failed to unmap %lx\n", text_poke_addr);
177
178out:
179 local_irq_restore(flags);
180
181 return err;
182}
183#else /* !CONFIG_STRICT_KERNEL_RWX */
184
185int patch_instruction(unsigned int *addr, unsigned int instr)
186{
187 return raw_patch_instruction(addr, instr);
188}
189
190#endif /* CONFIG_STRICT_KERNEL_RWX */
191NOKPROBE_SYMBOL(patch_instruction);
192
193int patch_branch(unsigned int *addr, unsigned long target, int flags)
194{
195 return patch_instruction(addr, create_branch(addr, target, flags));
196}
197
198bool is_offset_in_branch_range(long offset)
199{
200 /*
201 * Powerpc branch instruction is :
202 *
203 * 0 6 30 31
204 * +---------+----------------+---+---+
205 * | opcode | LI |AA |LK |
206 * +---------+----------------+---+---+
207 * Where AA = 0 and LK = 0
208 *
209 * LI is a signed 24 bits integer. The real branch offset is computed
210 * by: imm32 = SignExtend(LI:'0b00', 32);
211 *
212 * So the maximum forward branch should be:
213 * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
214 * The maximum backward branch should be:
215 * (0xff800000 << 2) = 0xfe000000 = -0x2000000
216 */
217 return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
218}
219
220/*
221 * Helper to check if a given instruction is a conditional branch
222 * Derived from the conditional checks in analyse_instr()
223 */
224bool is_conditional_branch(unsigned int instr)
225{
226 unsigned int opcode = instr >> 26;
227
228 if (opcode == 16) /* bc, bca, bcl, bcla */
229 return true;
230 if (opcode == 19) {
231 switch ((instr >> 1) & 0x3ff) {
232 case 16: /* bclr, bclrl */
233 case 528: /* bcctr, bcctrl */
234 case 560: /* bctar, bctarl */
235 return true;
236 }
237 }
238 return false;
239}
240NOKPROBE_SYMBOL(is_conditional_branch);
241
242unsigned int create_branch(const unsigned int *addr,
243 unsigned long target, int flags)
244{
245 unsigned int instruction;
246 long offset;
247
248 offset = target;
249 if (! (flags & BRANCH_ABSOLUTE))
250 offset = offset - (unsigned long)addr;
251
252 /* Check we can represent the target in the instruction format */
253 if (!is_offset_in_branch_range(offset))
254 return 0;
255
256 /* Mask out the flags and target, so they don't step on each other. */
257 instruction = 0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC);
258
259 return instruction;
260}
261
262unsigned int create_cond_branch(const unsigned int *addr,
263 unsigned long target, int flags)
264{
265 unsigned int instruction;
266 long offset;
267
268 offset = target;
269 if (! (flags & BRANCH_ABSOLUTE))
270 offset = offset - (unsigned long)addr;
271
272 /* Check we can represent the target in the instruction format */
273 if (offset < -0x8000 || offset > 0x7FFF || offset & 0x3)
274 return 0;
275
276 /* Mask out the flags and target, so they don't step on each other. */
277 instruction = 0x40000000 | (flags & 0x3FF0003) | (offset & 0xFFFC);
278
279 return instruction;
280}
281
282static unsigned int branch_opcode(unsigned int instr)
283{
284 return (instr >> 26) & 0x3F;
285}
286
287static int instr_is_branch_iform(unsigned int instr)
288{
289 return branch_opcode(instr) == 18;
290}
291
292static int instr_is_branch_bform(unsigned int instr)
293{
294 return branch_opcode(instr) == 16;
295}
296
297int instr_is_relative_branch(unsigned int instr)
298{
299 if (instr & BRANCH_ABSOLUTE)
300 return 0;
301
302 return instr_is_branch_iform(instr) || instr_is_branch_bform(instr);
303}
304
305int instr_is_relative_link_branch(unsigned int instr)
306{
307 return instr_is_relative_branch(instr) && (instr & BRANCH_SET_LINK);
308}
309
310static unsigned long branch_iform_target(const unsigned int *instr)
311{
312 signed long imm;
313
314 imm = *instr & 0x3FFFFFC;
315
316 /* If the top bit of the immediate value is set this is negative */
317 if (imm & 0x2000000)
318 imm -= 0x4000000;
319
320 if ((*instr & BRANCH_ABSOLUTE) == 0)
321 imm += (unsigned long)instr;
322
323 return (unsigned long)imm;
324}
325
326static unsigned long branch_bform_target(const unsigned int *instr)
327{
328 signed long imm;
329
330 imm = *instr & 0xFFFC;
331
332 /* If the top bit of the immediate value is set this is negative */
333 if (imm & 0x8000)
334 imm -= 0x10000;
335
336 if ((*instr & BRANCH_ABSOLUTE) == 0)
337 imm += (unsigned long)instr;
338
339 return (unsigned long)imm;
340}
341
342unsigned long branch_target(const unsigned int *instr)
343{
344 if (instr_is_branch_iform(*instr))
345 return branch_iform_target(instr);
346 else if (instr_is_branch_bform(*instr))
347 return branch_bform_target(instr);
348
349 return 0;
350}
351
352int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr)
353{
354 if (instr_is_branch_iform(*instr) || instr_is_branch_bform(*instr))
355 return branch_target(instr) == addr;
356
357 return 0;
358}
359
360unsigned int translate_branch(const unsigned int *dest, const unsigned int *src)
361{
362 unsigned long target;
363
364 target = branch_target(src);
365
366 if (instr_is_branch_iform(*src))
367 return create_branch(dest, target, *src);
368 else if (instr_is_branch_bform(*src))
369 return create_cond_branch(dest, target, *src);
370
371 return 0;
372}
373
374#ifdef CONFIG_PPC_BOOK3E_64
375void __patch_exception(int exc, unsigned long addr)
376{
377 extern unsigned int interrupt_base_book3e;
378 unsigned int *ibase = &interrupt_base_book3e;
379
380 /* Our exceptions vectors start with a NOP and -then- a branch
381 * to deal with single stepping from userspace which stops on
382 * the second instruction. Thus we need to patch the second
383 * instruction of the exception, not the first one
384 */
385
386 patch_branch(ibase + (exc / 4) + 1, addr, 0);
387}
388#endif
389
390#ifdef CONFIG_CODE_PATCHING_SELFTEST
391
392static void __init test_trampoline(void)
393{
394 asm ("nop;\n");
395}
396
397#define check(x) \
398 if (!(x)) printk("code-patching: test failed at line %d\n", __LINE__);
399
400static void __init test_branch_iform(void)
401{
402 unsigned int instr;
403 unsigned long addr;
404
405 addr = (unsigned long)&instr;
406
407 /* The simplest case, branch to self, no flags */
408 check(instr_is_branch_iform(0x48000000));
409 /* All bits of target set, and flags */
410 check(instr_is_branch_iform(0x4bffffff));
411 /* High bit of opcode set, which is wrong */
412 check(!instr_is_branch_iform(0xcbffffff));
413 /* Middle bits of opcode set, which is wrong */
414 check(!instr_is_branch_iform(0x7bffffff));
415
416 /* Simplest case, branch to self with link */
417 check(instr_is_branch_iform(0x48000001));
418 /* All bits of targets set */
419 check(instr_is_branch_iform(0x4bfffffd));
420 /* Some bits of targets set */
421 check(instr_is_branch_iform(0x4bff00fd));
422 /* Must be a valid branch to start with */
423 check(!instr_is_branch_iform(0x7bfffffd));
424
425 /* Absolute branch to 0x100 */
426 instr = 0x48000103;
427 check(instr_is_branch_to_addr(&instr, 0x100));
428 /* Absolute branch to 0x420fc */
429 instr = 0x480420ff;
430 check(instr_is_branch_to_addr(&instr, 0x420fc));
431 /* Maximum positive relative branch, + 20MB - 4B */
432 instr = 0x49fffffc;
433 check(instr_is_branch_to_addr(&instr, addr + 0x1FFFFFC));
434 /* Smallest negative relative branch, - 4B */
435 instr = 0x4bfffffc;
436 check(instr_is_branch_to_addr(&instr, addr - 4));
437 /* Largest negative relative branch, - 32 MB */
438 instr = 0x4a000000;
439 check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
440
441 /* Branch to self, with link */
442 instr = create_branch(&instr, addr, BRANCH_SET_LINK);
443 check(instr_is_branch_to_addr(&instr, addr));
444
445 /* Branch to self - 0x100, with link */
446 instr = create_branch(&instr, addr - 0x100, BRANCH_SET_LINK);
447 check(instr_is_branch_to_addr(&instr, addr - 0x100));
448
449 /* Branch to self + 0x100, no link */
450 instr = create_branch(&instr, addr + 0x100, 0);
451 check(instr_is_branch_to_addr(&instr, addr + 0x100));
452
453 /* Maximum relative negative offset, - 32 MB */
454 instr = create_branch(&instr, addr - 0x2000000, BRANCH_SET_LINK);
455 check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
456
457 /* Out of range relative negative offset, - 32 MB + 4*/
458 instr = create_branch(&instr, addr - 0x2000004, BRANCH_SET_LINK);
459 check(instr == 0);
460
461 /* Out of range relative positive offset, + 32 MB */
462 instr = create_branch(&instr, addr + 0x2000000, BRANCH_SET_LINK);
463 check(instr == 0);
464
465 /* Unaligned target */
466 instr = create_branch(&instr, addr + 3, BRANCH_SET_LINK);
467 check(instr == 0);
468
469 /* Check flags are masked correctly */
470 instr = create_branch(&instr, addr, 0xFFFFFFFC);
471 check(instr_is_branch_to_addr(&instr, addr));
472 check(instr == 0x48000000);
473}
474
475static void __init test_create_function_call(void)
476{
477 unsigned int *iptr;
478 unsigned long dest;
479
480 /* Check we can create a function call */
481 iptr = (unsigned int *)ppc_function_entry(test_trampoline);
482 dest = ppc_function_entry(test_create_function_call);
483 patch_instruction(iptr, create_branch(iptr, dest, BRANCH_SET_LINK));
484 check(instr_is_branch_to_addr(iptr, dest));
485}
486
487static void __init test_branch_bform(void)
488{
489 unsigned long addr;
490 unsigned int *iptr, instr, flags;
491
492 iptr = &instr;
493 addr = (unsigned long)iptr;
494
495 /* The simplest case, branch to self, no flags */
496 check(instr_is_branch_bform(0x40000000));
497 /* All bits of target set, and flags */
498 check(instr_is_branch_bform(0x43ffffff));
499 /* High bit of opcode set, which is wrong */
500 check(!instr_is_branch_bform(0xc3ffffff));
501 /* Middle bits of opcode set, which is wrong */
502 check(!instr_is_branch_bform(0x7bffffff));
503
504 /* Absolute conditional branch to 0x100 */
505 instr = 0x43ff0103;
506 check(instr_is_branch_to_addr(&instr, 0x100));
507 /* Absolute conditional branch to 0x20fc */
508 instr = 0x43ff20ff;
509 check(instr_is_branch_to_addr(&instr, 0x20fc));
510 /* Maximum positive relative conditional branch, + 32 KB - 4B */
511 instr = 0x43ff7ffc;
512 check(instr_is_branch_to_addr(&instr, addr + 0x7FFC));
513 /* Smallest negative relative conditional branch, - 4B */
514 instr = 0x43fffffc;
515 check(instr_is_branch_to_addr(&instr, addr - 4));
516 /* Largest negative relative conditional branch, - 32 KB */
517 instr = 0x43ff8000;
518 check(instr_is_branch_to_addr(&instr, addr - 0x8000));
519
520 /* All condition code bits set & link */
521 flags = 0x3ff000 | BRANCH_SET_LINK;
522
523 /* Branch to self */
524 instr = create_cond_branch(iptr, addr, flags);
525 check(instr_is_branch_to_addr(&instr, addr));
526
527 /* Branch to self - 0x100 */
528 instr = create_cond_branch(iptr, addr - 0x100, flags);
529 check(instr_is_branch_to_addr(&instr, addr - 0x100));
530
531 /* Branch to self + 0x100 */
532 instr = create_cond_branch(iptr, addr + 0x100, flags);
533 check(instr_is_branch_to_addr(&instr, addr + 0x100));
534
535 /* Maximum relative negative offset, - 32 KB */
536 instr = create_cond_branch(iptr, addr - 0x8000, flags);
537 check(instr_is_branch_to_addr(&instr, addr - 0x8000));
538
539 /* Out of range relative negative offset, - 32 KB + 4*/
540 instr = create_cond_branch(iptr, addr - 0x8004, flags);
541 check(instr == 0);
542
543 /* Out of range relative positive offset, + 32 KB */
544 instr = create_cond_branch(iptr, addr + 0x8000, flags);
545 check(instr == 0);
546
547 /* Unaligned target */
548 instr = create_cond_branch(iptr, addr + 3, flags);
549 check(instr == 0);
550
551 /* Check flags are masked correctly */
552 instr = create_cond_branch(iptr, addr, 0xFFFFFFFC);
553 check(instr_is_branch_to_addr(&instr, addr));
554 check(instr == 0x43FF0000);
555}
556
557static void __init test_translate_branch(void)
558{
559 unsigned long addr;
560 unsigned int *p, *q;
561 void *buf;
562
563 buf = vmalloc(PAGE_ALIGN(0x2000000 + 1));
564 check(buf);
565 if (!buf)
566 return;
567
568 /* Simple case, branch to self moved a little */
569 p = buf;
570 addr = (unsigned long)p;
571 patch_branch(p, addr, 0);
572 check(instr_is_branch_to_addr(p, addr));
573 q = p + 1;
574 patch_instruction(q, translate_branch(q, p));
575 check(instr_is_branch_to_addr(q, addr));
576
577 /* Maximum negative case, move b . to addr + 32 MB */
578 p = buf;
579 addr = (unsigned long)p;
580 patch_branch(p, addr, 0);
581 q = buf + 0x2000000;
582 patch_instruction(q, translate_branch(q, p));
583 check(instr_is_branch_to_addr(p, addr));
584 check(instr_is_branch_to_addr(q, addr));
585 check(*q == 0x4a000000);
586
587 /* Maximum positive case, move x to x - 32 MB + 4 */
588 p = buf + 0x2000000;
589 addr = (unsigned long)p;
590 patch_branch(p, addr, 0);
591 q = buf + 4;
592 patch_instruction(q, translate_branch(q, p));
593 check(instr_is_branch_to_addr(p, addr));
594 check(instr_is_branch_to_addr(q, addr));
595 check(*q == 0x49fffffc);
596
597 /* Jump to x + 16 MB moved to x + 20 MB */
598 p = buf;
599 addr = 0x1000000 + (unsigned long)buf;
600 patch_branch(p, addr, BRANCH_SET_LINK);
601 q = buf + 0x1400000;
602 patch_instruction(q, translate_branch(q, p));
603 check(instr_is_branch_to_addr(p, addr));
604 check(instr_is_branch_to_addr(q, addr));
605
606 /* Jump to x + 16 MB moved to x - 16 MB + 4 */
607 p = buf + 0x1000000;
608 addr = 0x2000000 + (unsigned long)buf;
609 patch_branch(p, addr, 0);
610 q = buf + 4;
611 patch_instruction(q, translate_branch(q, p));
612 check(instr_is_branch_to_addr(p, addr));
613 check(instr_is_branch_to_addr(q, addr));
614
615
616 /* Conditional branch tests */
617
618 /* Simple case, branch to self moved a little */
619 p = buf;
620 addr = (unsigned long)p;
621 patch_instruction(p, create_cond_branch(p, addr, 0));
622 check(instr_is_branch_to_addr(p, addr));
623 q = p + 1;
624 patch_instruction(q, translate_branch(q, p));
625 check(instr_is_branch_to_addr(q, addr));
626
627 /* Maximum negative case, move b . to addr + 32 KB */
628 p = buf;
629 addr = (unsigned long)p;
630 patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC));
631 q = buf + 0x8000;
632 patch_instruction(q, translate_branch(q, p));
633 check(instr_is_branch_to_addr(p, addr));
634 check(instr_is_branch_to_addr(q, addr));
635 check(*q == 0x43ff8000);
636
637 /* Maximum positive case, move x to x - 32 KB + 4 */
638 p = buf + 0x8000;
639 addr = (unsigned long)p;
640 patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC));
641 q = buf + 4;
642 patch_instruction(q, translate_branch(q, p));
643 check(instr_is_branch_to_addr(p, addr));
644 check(instr_is_branch_to_addr(q, addr));
645 check(*q == 0x43ff7ffc);
646
647 /* Jump to x + 12 KB moved to x + 20 KB */
648 p = buf;
649 addr = 0x3000 + (unsigned long)buf;
650 patch_instruction(p, create_cond_branch(p, addr, BRANCH_SET_LINK));
651 q = buf + 0x5000;
652 patch_instruction(q, translate_branch(q, p));
653 check(instr_is_branch_to_addr(p, addr));
654 check(instr_is_branch_to_addr(q, addr));
655
656 /* Jump to x + 8 KB moved to x - 8 KB + 4 */
657 p = buf + 0x2000;
658 addr = 0x4000 + (unsigned long)buf;
659 patch_instruction(p, create_cond_branch(p, addr, 0));
660 q = buf + 4;
661 patch_instruction(q, translate_branch(q, p));
662 check(instr_is_branch_to_addr(p, addr));
663 check(instr_is_branch_to_addr(q, addr));
664
665 /* Free the buffer we were using */
666 vfree(buf);
667}
668
669static int __init test_code_patching(void)
670{
671 printk(KERN_DEBUG "Running code patching self-tests ...\n");
672
673 test_branch_iform();
674 test_branch_bform();
675 test_create_function_call();
676 test_translate_branch();
677
678 return 0;
679}
680late_initcall(test_code_patching);
681
682#endif /* CONFIG_CODE_PATCHING_SELFTEST */
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2008 Michael Ellerman, IBM Corporation.
4 */
5
6#include <linux/kprobes.h>
7#include <linux/mmu_context.h>
8#include <linux/random.h>
9#include <linux/vmalloc.h>
10#include <linux/init.h>
11#include <linux/cpuhotplug.h>
12#include <linux/uaccess.h>
13#include <linux/jump_label.h>
14
15#include <asm/debug.h>
16#include <asm/pgalloc.h>
17#include <asm/tlb.h>
18#include <asm/tlbflush.h>
19#include <asm/page.h>
20#include <asm/code-patching.h>
21#include <asm/inst.h>
22
23static int __patch_instruction(u32 *exec_addr, ppc_inst_t instr, u32 *patch_addr)
24{
25 if (!ppc_inst_prefixed(instr)) {
26 u32 val = ppc_inst_val(instr);
27
28 __put_kernel_nofault(patch_addr, &val, u32, failed);
29 } else {
30 u64 val = ppc_inst_as_ulong(instr);
31
32 __put_kernel_nofault(patch_addr, &val, u64, failed);
33 }
34
35 asm ("dcbst 0, %0; sync; icbi 0,%1; sync; isync" :: "r" (patch_addr),
36 "r" (exec_addr));
37
38 return 0;
39
40failed:
41 return -EPERM;
42}
43
44int raw_patch_instruction(u32 *addr, ppc_inst_t instr)
45{
46 return __patch_instruction(addr, instr, addr);
47}
48
49struct patch_context {
50 union {
51 struct vm_struct *area;
52 struct mm_struct *mm;
53 };
54 unsigned long addr;
55 pte_t *pte;
56};
57
58static DEFINE_PER_CPU(struct patch_context, cpu_patching_context);
59
60static int map_patch_area(void *addr, unsigned long text_poke_addr);
61static void unmap_patch_area(unsigned long addr);
62
63static bool mm_patch_enabled(void)
64{
65 return IS_ENABLED(CONFIG_SMP) && radix_enabled();
66}
67
68/*
69 * The following applies for Radix MMU. Hash MMU has different requirements,
70 * and so is not supported.
71 *
72 * Changing mm requires context synchronising instructions on both sides of
73 * the context switch, as well as a hwsync between the last instruction for
74 * which the address of an associated storage access was translated using
75 * the current context.
76 *
77 * switch_mm_irqs_off() performs an isync after the context switch. It is
78 * the responsibility of the caller to perform the CSI and hwsync before
79 * starting/stopping the temp mm.
80 */
81static struct mm_struct *start_using_temp_mm(struct mm_struct *temp_mm)
82{
83 struct mm_struct *orig_mm = current->active_mm;
84
85 lockdep_assert_irqs_disabled();
86 switch_mm_irqs_off(orig_mm, temp_mm, current);
87
88 WARN_ON(!mm_is_thread_local(temp_mm));
89
90 suspend_breakpoints();
91 return orig_mm;
92}
93
94static void stop_using_temp_mm(struct mm_struct *temp_mm,
95 struct mm_struct *orig_mm)
96{
97 lockdep_assert_irqs_disabled();
98 switch_mm_irqs_off(temp_mm, orig_mm, current);
99 restore_breakpoints();
100}
101
102static int text_area_cpu_up(unsigned int cpu)
103{
104 struct vm_struct *area;
105 unsigned long addr;
106 int err;
107
108 area = get_vm_area(PAGE_SIZE, VM_ALLOC);
109 if (!area) {
110 WARN_ONCE(1, "Failed to create text area for cpu %d\n",
111 cpu);
112 return -1;
113 }
114
115 // Map/unmap the area to ensure all page tables are pre-allocated
116 addr = (unsigned long)area->addr;
117 err = map_patch_area(empty_zero_page, addr);
118 if (err)
119 return err;
120
121 unmap_patch_area(addr);
122
123 this_cpu_write(cpu_patching_context.area, area);
124 this_cpu_write(cpu_patching_context.addr, addr);
125 this_cpu_write(cpu_patching_context.pte, virt_to_kpte(addr));
126
127 return 0;
128}
129
130static int text_area_cpu_down(unsigned int cpu)
131{
132 free_vm_area(this_cpu_read(cpu_patching_context.area));
133 this_cpu_write(cpu_patching_context.area, NULL);
134 this_cpu_write(cpu_patching_context.addr, 0);
135 this_cpu_write(cpu_patching_context.pte, NULL);
136 return 0;
137}
138
139static void put_patching_mm(struct mm_struct *mm, unsigned long patching_addr)
140{
141 struct mmu_gather tlb;
142
143 tlb_gather_mmu(&tlb, mm);
144 free_pgd_range(&tlb, patching_addr, patching_addr + PAGE_SIZE, 0, 0);
145 mmput(mm);
146}
147
148static int text_area_cpu_up_mm(unsigned int cpu)
149{
150 struct mm_struct *mm;
151 unsigned long addr;
152 pte_t *pte;
153 spinlock_t *ptl;
154
155 mm = mm_alloc();
156 if (WARN_ON(!mm))
157 goto fail_no_mm;
158
159 /*
160 * Choose a random page-aligned address from the interval
161 * [PAGE_SIZE .. DEFAULT_MAP_WINDOW - PAGE_SIZE].
162 * The lower address bound is PAGE_SIZE to avoid the zero-page.
163 */
164 addr = (1 + (get_random_long() % (DEFAULT_MAP_WINDOW / PAGE_SIZE - 2))) << PAGE_SHIFT;
165
166 /*
167 * PTE allocation uses GFP_KERNEL which means we need to
168 * pre-allocate the PTE here because we cannot do the
169 * allocation during patching when IRQs are disabled.
170 *
171 * Using get_locked_pte() to avoid open coding, the lock
172 * is unnecessary.
173 */
174 pte = get_locked_pte(mm, addr, &ptl);
175 if (!pte)
176 goto fail_no_pte;
177 pte_unmap_unlock(pte, ptl);
178
179 this_cpu_write(cpu_patching_context.mm, mm);
180 this_cpu_write(cpu_patching_context.addr, addr);
181
182 return 0;
183
184fail_no_pte:
185 put_patching_mm(mm, addr);
186fail_no_mm:
187 return -ENOMEM;
188}
189
190static int text_area_cpu_down_mm(unsigned int cpu)
191{
192 put_patching_mm(this_cpu_read(cpu_patching_context.mm),
193 this_cpu_read(cpu_patching_context.addr));
194
195 this_cpu_write(cpu_patching_context.mm, NULL);
196 this_cpu_write(cpu_patching_context.addr, 0);
197
198 return 0;
199}
200
201static __ro_after_init DEFINE_STATIC_KEY_FALSE(poking_init_done);
202
203void __init poking_init(void)
204{
205 int ret;
206
207 if (!IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
208 return;
209
210 if (mm_patch_enabled())
211 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
212 "powerpc/text_poke_mm:online",
213 text_area_cpu_up_mm,
214 text_area_cpu_down_mm);
215 else
216 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
217 "powerpc/text_poke:online",
218 text_area_cpu_up,
219 text_area_cpu_down);
220
221 /* cpuhp_setup_state returns >= 0 on success */
222 if (WARN_ON(ret < 0))
223 return;
224
225 static_branch_enable(&poking_init_done);
226}
227
228static unsigned long get_patch_pfn(void *addr)
229{
230 if (IS_ENABLED(CONFIG_MODULES) && is_vmalloc_or_module_addr(addr))
231 return vmalloc_to_pfn(addr);
232 else
233 return __pa_symbol(addr) >> PAGE_SHIFT;
234}
235
236/*
237 * This can be called for kernel text or a module.
238 */
239static int map_patch_area(void *addr, unsigned long text_poke_addr)
240{
241 unsigned long pfn = get_patch_pfn(addr);
242
243 return map_kernel_page(text_poke_addr, (pfn << PAGE_SHIFT), PAGE_KERNEL);
244}
245
246static void unmap_patch_area(unsigned long addr)
247{
248 pte_t *ptep;
249 pmd_t *pmdp;
250 pud_t *pudp;
251 p4d_t *p4dp;
252 pgd_t *pgdp;
253
254 pgdp = pgd_offset_k(addr);
255 if (WARN_ON(pgd_none(*pgdp)))
256 return;
257
258 p4dp = p4d_offset(pgdp, addr);
259 if (WARN_ON(p4d_none(*p4dp)))
260 return;
261
262 pudp = pud_offset(p4dp, addr);
263 if (WARN_ON(pud_none(*pudp)))
264 return;
265
266 pmdp = pmd_offset(pudp, addr);
267 if (WARN_ON(pmd_none(*pmdp)))
268 return;
269
270 ptep = pte_offset_kernel(pmdp, addr);
271 if (WARN_ON(pte_none(*ptep)))
272 return;
273
274 /*
275 * In hash, pte_clear flushes the tlb, in radix, we have to
276 */
277 pte_clear(&init_mm, addr, ptep);
278 flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
279}
280
281static int __do_patch_instruction_mm(u32 *addr, ppc_inst_t instr)
282{
283 int err;
284 u32 *patch_addr;
285 unsigned long text_poke_addr;
286 pte_t *pte;
287 unsigned long pfn = get_patch_pfn(addr);
288 struct mm_struct *patching_mm;
289 struct mm_struct *orig_mm;
290 spinlock_t *ptl;
291
292 patching_mm = __this_cpu_read(cpu_patching_context.mm);
293 text_poke_addr = __this_cpu_read(cpu_patching_context.addr);
294 patch_addr = (u32 *)(text_poke_addr + offset_in_page(addr));
295
296 pte = get_locked_pte(patching_mm, text_poke_addr, &ptl);
297 if (!pte)
298 return -ENOMEM;
299
300 __set_pte_at(patching_mm, text_poke_addr, pte, pfn_pte(pfn, PAGE_KERNEL), 0);
301
302 /* order PTE update before use, also serves as the hwsync */
303 asm volatile("ptesync": : :"memory");
304
305 /* order context switch after arbitrary prior code */
306 isync();
307
308 orig_mm = start_using_temp_mm(patching_mm);
309
310 err = __patch_instruction(addr, instr, patch_addr);
311
312 /* hwsync performed by __patch_instruction (sync) if successful */
313 if (err)
314 mb(); /* sync */
315
316 /* context synchronisation performed by __patch_instruction (isync or exception) */
317 stop_using_temp_mm(patching_mm, orig_mm);
318
319 pte_clear(patching_mm, text_poke_addr, pte);
320 /*
321 * ptesync to order PTE update before TLB invalidation done
322 * by radix__local_flush_tlb_page_psize (in _tlbiel_va)
323 */
324 local_flush_tlb_page_psize(patching_mm, text_poke_addr, mmu_virtual_psize);
325
326 pte_unmap_unlock(pte, ptl);
327
328 return err;
329}
330
331static int __do_patch_instruction(u32 *addr, ppc_inst_t instr)
332{
333 int err;
334 u32 *patch_addr;
335 unsigned long text_poke_addr;
336 pte_t *pte;
337 unsigned long pfn = get_patch_pfn(addr);
338
339 text_poke_addr = (unsigned long)__this_cpu_read(cpu_patching_context.addr) & PAGE_MASK;
340 patch_addr = (u32 *)(text_poke_addr + offset_in_page(addr));
341
342 pte = __this_cpu_read(cpu_patching_context.pte);
343 __set_pte_at(&init_mm, text_poke_addr, pte, pfn_pte(pfn, PAGE_KERNEL), 0);
344 /* See ptesync comment in radix__set_pte_at() */
345 if (radix_enabled())
346 asm volatile("ptesync": : :"memory");
347
348 err = __patch_instruction(addr, instr, patch_addr);
349
350 pte_clear(&init_mm, text_poke_addr, pte);
351 flush_tlb_kernel_range(text_poke_addr, text_poke_addr + PAGE_SIZE);
352
353 return err;
354}
355
356int patch_instruction(u32 *addr, ppc_inst_t instr)
357{
358 int err;
359 unsigned long flags;
360
361 /*
362 * During early early boot patch_instruction is called
363 * when text_poke_area is not ready, but we still need
364 * to allow patching. We just do the plain old patching
365 */
366 if (!IS_ENABLED(CONFIG_STRICT_KERNEL_RWX) ||
367 !static_branch_likely(&poking_init_done))
368 return raw_patch_instruction(addr, instr);
369
370 local_irq_save(flags);
371 if (mm_patch_enabled())
372 err = __do_patch_instruction_mm(addr, instr);
373 else
374 err = __do_patch_instruction(addr, instr);
375 local_irq_restore(flags);
376
377 return err;
378}
379NOKPROBE_SYMBOL(patch_instruction);
380
381int patch_branch(u32 *addr, unsigned long target, int flags)
382{
383 ppc_inst_t instr;
384
385 if (create_branch(&instr, addr, target, flags))
386 return -ERANGE;
387
388 return patch_instruction(addr, instr);
389}
390
391/*
392 * Helper to check if a given instruction is a conditional branch
393 * Derived from the conditional checks in analyse_instr()
394 */
395bool is_conditional_branch(ppc_inst_t instr)
396{
397 unsigned int opcode = ppc_inst_primary_opcode(instr);
398
399 if (opcode == 16) /* bc, bca, bcl, bcla */
400 return true;
401 if (opcode == 19) {
402 switch ((ppc_inst_val(instr) >> 1) & 0x3ff) {
403 case 16: /* bclr, bclrl */
404 case 528: /* bcctr, bcctrl */
405 case 560: /* bctar, bctarl */
406 return true;
407 }
408 }
409 return false;
410}
411NOKPROBE_SYMBOL(is_conditional_branch);
412
413int create_cond_branch(ppc_inst_t *instr, const u32 *addr,
414 unsigned long target, int flags)
415{
416 long offset;
417
418 offset = target;
419 if (! (flags & BRANCH_ABSOLUTE))
420 offset = offset - (unsigned long)addr;
421
422 /* Check we can represent the target in the instruction format */
423 if (!is_offset_in_cond_branch_range(offset))
424 return 1;
425
426 /* Mask out the flags and target, so they don't step on each other. */
427 *instr = ppc_inst(0x40000000 | (flags & 0x3FF0003) | (offset & 0xFFFC));
428
429 return 0;
430}
431
432int instr_is_relative_branch(ppc_inst_t instr)
433{
434 if (ppc_inst_val(instr) & BRANCH_ABSOLUTE)
435 return 0;
436
437 return instr_is_branch_iform(instr) || instr_is_branch_bform(instr);
438}
439
440int instr_is_relative_link_branch(ppc_inst_t instr)
441{
442 return instr_is_relative_branch(instr) && (ppc_inst_val(instr) & BRANCH_SET_LINK);
443}
444
445static unsigned long branch_iform_target(const u32 *instr)
446{
447 signed long imm;
448
449 imm = ppc_inst_val(ppc_inst_read(instr)) & 0x3FFFFFC;
450
451 /* If the top bit of the immediate value is set this is negative */
452 if (imm & 0x2000000)
453 imm -= 0x4000000;
454
455 if ((ppc_inst_val(ppc_inst_read(instr)) & BRANCH_ABSOLUTE) == 0)
456 imm += (unsigned long)instr;
457
458 return (unsigned long)imm;
459}
460
461static unsigned long branch_bform_target(const u32 *instr)
462{
463 signed long imm;
464
465 imm = ppc_inst_val(ppc_inst_read(instr)) & 0xFFFC;
466
467 /* If the top bit of the immediate value is set this is negative */
468 if (imm & 0x8000)
469 imm -= 0x10000;
470
471 if ((ppc_inst_val(ppc_inst_read(instr)) & BRANCH_ABSOLUTE) == 0)
472 imm += (unsigned long)instr;
473
474 return (unsigned long)imm;
475}
476
477unsigned long branch_target(const u32 *instr)
478{
479 if (instr_is_branch_iform(ppc_inst_read(instr)))
480 return branch_iform_target(instr);
481 else if (instr_is_branch_bform(ppc_inst_read(instr)))
482 return branch_bform_target(instr);
483
484 return 0;
485}
486
487int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src)
488{
489 unsigned long target;
490 target = branch_target(src);
491
492 if (instr_is_branch_iform(ppc_inst_read(src)))
493 return create_branch(instr, dest, target,
494 ppc_inst_val(ppc_inst_read(src)));
495 else if (instr_is_branch_bform(ppc_inst_read(src)))
496 return create_cond_branch(instr, dest, target,
497 ppc_inst_val(ppc_inst_read(src)));
498
499 return 1;
500}