1/*
 2 * Ralink RT3662/RT3883 specific CPU feature overrides
 3 *
 4 * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
 5 *
 6 * This file was derived from: include/asm-mips/cpu-features.h
 7 *	Copyright (C) 2003, 2004 Ralf Baechle
 8 *	Copyright (C) 2004 Maciej W. Rozycki
 9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 *
14 */
15#ifndef _RT3883_CPU_FEATURE_OVERRIDES_H
16#define _RT3883_CPU_FEATURE_OVERRIDES_H
17
18#define cpu_has_tlb		1
19#define cpu_has_4kex		1
20#define cpu_has_3k_cache	0
21#define cpu_has_4k_cache	1
22#define cpu_has_tx39_cache	0
23#define cpu_has_sb1_cache	0
24#define cpu_has_fpu		0
25#define cpu_has_32fpr		0
26#define cpu_has_counter		1
27#define cpu_has_watch		1
28#define cpu_has_divec		1
29
30#define cpu_has_prefetch	1
31#define cpu_has_ejtag		1
32#define cpu_has_llsc		1
33
34#define cpu_has_mips16		1
35#define cpu_has_mdmx		0
36#define cpu_has_mips3d		0
37#define cpu_has_smartmips	0
38
39#define cpu_has_mips32r1	1
40#define cpu_has_mips32r2	1
41#define cpu_has_mips64r1	0
42#define cpu_has_mips64r2	0
43
44#define cpu_has_dsp		1
45#define cpu_has_mipsmt		0
46
47#define cpu_has_64bits		0
48#define cpu_has_64bit_zero_reg	0
49#define cpu_has_64bit_gp_regs	0
50#define cpu_has_64bit_addresses	0
51
52#define cpu_dcache_line_size()	32
53#define cpu_icache_line_size()	32
54
55#endif /* _RT3883_CPU_FEATURE_OVERRIDES_H */

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Ralink RT3662/RT3883 specific CPU feature overrides
 4 *
 5 * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
 6 *
 7 * This file was derived from: include/asm-mips/cpu-features.h
 8 *	Copyright (C) 2003, 2004 Ralf Baechle
 9 *	Copyright (C) 2004 Maciej W. Rozycki
 
 
 
 
 
10 */
11#ifndef _RT3883_CPU_FEATURE_OVERRIDES_H
12#define _RT3883_CPU_FEATURE_OVERRIDES_H
13
14#define cpu_has_tlb		1
15#define cpu_has_4kex		1
16#define cpu_has_3k_cache	0
17#define cpu_has_4k_cache	1
 
18#define cpu_has_sb1_cache	0
19#define cpu_has_fpu		0
20#define cpu_has_32fpr		0
21#define cpu_has_counter		1
22#define cpu_has_watch		1
23#define cpu_has_divec		1
24
25#define cpu_has_prefetch	1
26#define cpu_has_ejtag		1
27#define cpu_has_llsc		1
28
29#define cpu_has_mips16		1
30#define cpu_has_mdmx		0
31#define cpu_has_mips3d		0
32#define cpu_has_smartmips	0
33
34#define cpu_has_mips32r1	1
35#define cpu_has_mips32r2	1
36#define cpu_has_mips64r1	0
37#define cpu_has_mips64r2	0
38
39#define cpu_has_dsp		1
40#define cpu_has_mipsmt		0
41
42#define cpu_has_64bits		0
43#define cpu_has_64bit_zero_reg	0
44#define cpu_has_64bit_gp_regs	0
 
45
46#define cpu_dcache_line_size()	32
47#define cpu_icache_line_size()	32
48
49#endif /* _RT3883_CPU_FEATURE_OVERRIDES_H */