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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's S5PV210 SoC device tree source
4 *
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6 *
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
9 *
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
12 * bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
17 */
18
19#include <dt-bindings/clock/s5pv210.h>
20#include <dt-bindings/clock/s5pv210-audss.h>
21
22/ {
23 #address-cells = <1>;
24 #size-cells = <1>;
25
26 aliases {
27 csis0 = &csis0;
28 fimc0 = &fimc0;
29 fimc1 = &fimc1;
30 fimc2 = &fimc2;
31 i2c0 = &i2c0;
32 i2c1 = &i2c1;
33 i2c2 = &i2c2;
34 i2s0 = &i2s0;
35 i2s1 = &i2s1;
36 i2s2 = &i2s2;
37 pinctrl0 = &pinctrl0;
38 spi0 = &spi0;
39 spi1 = &spi1;
40 };
41
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45
46 cpu@0 {
47 device_type = "cpu";
48 compatible = "arm,cortex-a8";
49 reg = <0>;
50 };
51 };
52
53 soc {
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 ranges;
58
59 external-clocks {
60 compatible = "simple-bus";
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 xxti: oscillator@0 {
65 compatible = "fixed-clock";
66 reg = <0>;
67 clock-frequency = <0>;
68 clock-output-names = "xxti";
69 #clock-cells = <0>;
70 };
71
72 xusbxti: oscillator@1 {
73 compatible = "fixed-clock";
74 reg = <1>;
75 clock-frequency = <0>;
76 clock-output-names = "xusbxti";
77 #clock-cells = <0>;
78 };
79 };
80
81 onenand: onenand@b0000000 {
82 compatible = "samsung,s5pv210-onenand";
83 reg = <0xb0600000 0x2000>,
84 <0xb0000000 0x20000>,
85 <0xb0040000 0x20000>;
86 interrupt-parent = <&vic1>;
87 interrupts = <31>;
88 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
89 clock-names = "bus", "onenand";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 status = "disabled";
93 };
94
95 chipid@e0000000 {
96 compatible = "samsung,s5pv210-chipid";
97 reg = <0xe0000000 0x1000>;
98 };
99
100 clocks: clock-controller@e0100000 {
101 compatible = "samsung,s5pv210-clock", "simple-bus";
102 reg = <0xe0100000 0x10000>;
103 clock-names = "xxti", "xusbxti";
104 clocks = <&xxti>, <&xusbxti>;
105 #clock-cells = <1>;
106 #address-cells = <1>;
107 #size-cells = <1>;
108 ranges;
109
110 pmu_syscon: syscon@e0108000 {
111 compatible = "samsung-s5pv210-pmu", "syscon";
112 reg = <0xe0108000 0x8000>;
113 };
114 };
115
116 pinctrl0: pinctrl@e0200000 {
117 compatible = "samsung,s5pv210-pinctrl";
118 reg = <0xe0200000 0x1000>;
119 interrupt-parent = <&vic0>;
120 interrupts = <30>;
121
122 wakeup-interrupt-controller {
123 compatible = "samsung,exynos4210-wakeup-eint";
124 interrupts = <16>;
125 interrupt-parent = <&vic0>;
126 };
127 };
128
129 amba {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "simple-bus";
133 ranges;
134
135 pdma0: dma@e0900000 {
136 compatible = "arm,pl330", "arm,primecell";
137 reg = <0xe0900000 0x1000>;
138 interrupt-parent = <&vic0>;
139 interrupts = <19>;
140 clocks = <&clocks CLK_PDMA0>;
141 clock-names = "apb_pclk";
142 #dma-cells = <1>;
143 #dma-channels = <8>;
144 #dma-requests = <32>;
145 };
146
147 pdma1: dma@e0a00000 {
148 compatible = "arm,pl330", "arm,primecell";
149 reg = <0xe0a00000 0x1000>;
150 interrupt-parent = <&vic0>;
151 interrupts = <20>;
152 clocks = <&clocks CLK_PDMA1>;
153 clock-names = "apb_pclk";
154 #dma-cells = <1>;
155 #dma-channels = <8>;
156 #dma-requests = <32>;
157 };
158 };
159
160 spi0: spi@e1300000 {
161 compatible = "samsung,s5pv210-spi";
162 reg = <0xe1300000 0x1000>;
163 interrupt-parent = <&vic1>;
164 interrupts = <15>;
165 dmas = <&pdma0 7>, <&pdma0 6>;
166 dma-names = "tx", "rx";
167 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
168 clock-names = "spi", "spi_busclk0";
169 pinctrl-names = "default";
170 pinctrl-0 = <&spi0_bus>;
171 #address-cells = <1>;
172 #size-cells = <0>;
173 status = "disabled";
174 };
175
176 spi1: spi@e1400000 {
177 compatible = "samsung,s5pv210-spi";
178 reg = <0xe1400000 0x1000>;
179 interrupt-parent = <&vic1>;
180 interrupts = <16>;
181 dmas = <&pdma1 7>, <&pdma1 6>;
182 dma-names = "tx", "rx";
183 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
184 clock-names = "spi", "spi_busclk0";
185 pinctrl-names = "default";
186 pinctrl-0 = <&spi1_bus>;
187 #address-cells = <1>;
188 #size-cells = <0>;
189 status = "disabled";
190 };
191
192 keypad: keypad@e1600000 {
193 compatible = "samsung,s5pv210-keypad";
194 reg = <0xe1600000 0x1000>;
195 interrupt-parent = <&vic2>;
196 interrupts = <25>;
197 clocks = <&clocks CLK_KEYIF>;
198 clock-names = "keypad";
199 status = "disabled";
200 };
201
202 i2c0: i2c@e1800000 {
203 compatible = "samsung,s3c2440-i2c";
204 reg = <0xe1800000 0x1000>;
205 interrupt-parent = <&vic1>;
206 interrupts = <14>;
207 clocks = <&clocks CLK_I2C0>;
208 clock-names = "i2c";
209 pinctrl-names = "default";
210 pinctrl-0 = <&i2c0_bus>;
211 #address-cells = <1>;
212 #size-cells = <0>;
213 status = "disabled";
214 };
215
216 i2c2: i2c@e1a00000 {
217 compatible = "samsung,s3c2440-i2c";
218 reg = <0xe1a00000 0x1000>;
219 interrupt-parent = <&vic1>;
220 interrupts = <19>;
221 clocks = <&clocks CLK_I2C2>;
222 clock-names = "i2c";
223 pinctrl-0 = <&i2c2_bus>;
224 pinctrl-names = "default";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 status = "disabled";
228 };
229
230 audio-subsystem {
231 compatible = "samsung,s5pv210-audss", "simple-bus";
232 #address-cells = <1>;
233 #size-cells = <1>;
234 ranges;
235
236 clk_audss: clock-controller@eee10000 {
237 compatible = "samsung,s5pv210-audss-clock";
238 reg = <0xeee10000 0x1000>;
239 clock-names = "hclk", "xxti",
240 "fout_epll",
241 "sclk_audio0";
242 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
243 <&clocks FOUT_EPLL>,
244 <&clocks SCLK_AUDIO0>;
245 #clock-cells = <1>;
246 };
247
248 i2s0: i2s@eee30000 {
249 compatible = "samsung,s5pv210-i2s";
250 reg = <0xeee30000 0x1000>;
251 interrupt-parent = <&vic2>;
252 interrupts = <16>;
253 dma-names = "rx", "tx", "tx-sec";
254 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
255 clock-names = "iis",
256 "i2s_opclk0",
257 "i2s_opclk1";
258 clocks = <&clk_audss CLK_I2S>,
259 <&clk_audss CLK_I2S>,
260 <&clk_audss CLK_DOUT_AUD_BUS>;
261 samsung,idma-addr = <0xc0010000>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&i2s0_bus>;
264 #sound-dai-cells = <0>;
265 status = "disabled";
266 };
267 };
268
269 i2s1: i2s@e2100000 {
270 compatible = "samsung,s3c6410-i2s";
271 reg = <0xe2100000 0x1000>;
272 interrupt-parent = <&vic2>;
273 interrupts = <17>;
274 dma-names = "rx", "tx";
275 dmas = <&pdma1 12>, <&pdma1 13>;
276 clock-names = "iis", "i2s_opclk0";
277 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&i2s1_bus>;
280 #sound-dai-cells = <0>;
281 status = "disabled";
282 };
283
284 i2s2: i2s@e2a00000 {
285 compatible = "samsung,s3c6410-i2s";
286 reg = <0xe2a00000 0x1000>;
287 interrupt-parent = <&vic2>;
288 interrupts = <18>;
289 dma-names = "rx", "tx";
290 dmas = <&pdma1 14>, <&pdma1 15>;
291 clock-names = "iis", "i2s_opclk0";
292 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&i2s2_bus>;
295 #sound-dai-cells = <0>;
296 status = "disabled";
297 };
298
299 pwm: pwm@e2500000 {
300 compatible = "samsung,s5pc100-pwm";
301 reg = <0xe2500000 0x1000>;
302 interrupt-parent = <&vic0>;
303 interrupts = <21>, <22>, <23>, <24>, <25>;
304 clock-names = "timers";
305 clocks = <&clocks CLK_PWM>;
306 #pwm-cells = <3>;
307 };
308
309 watchdog: watchdog@e2700000 {
310 compatible = "samsung,s3c6410-wdt";
311 reg = <0xe2700000 0x1000>;
312 interrupt-parent = <&vic0>;
313 interrupts = <26>;
314 clock-names = "watchdog";
315 clocks = <&clocks CLK_WDT>;
316 };
317
318 rtc: rtc@e2800000 {
319 compatible = "samsung,s3c6410-rtc";
320 reg = <0xe2800000 0x100>;
321 interrupt-parent = <&vic0>;
322 interrupts = <28>, <29>;
323 clocks = <&clocks CLK_RTC>;
324 clock-names = "rtc";
325 status = "disabled";
326 };
327
328 uart0: serial@e2900000 {
329 compatible = "samsung,s5pv210-uart";
330 reg = <0xe2900000 0x400>;
331 interrupt-parent = <&vic1>;
332 interrupts = <10>;
333 clock-names = "uart", "clk_uart_baud0",
334 "clk_uart_baud1";
335 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
336 <&clocks SCLK_UART0>;
337 status = "disabled";
338 };
339
340 uart1: serial@e2900400 {
341 compatible = "samsung,s5pv210-uart";
342 reg = <0xe2900400 0x400>;
343 interrupt-parent = <&vic1>;
344 interrupts = <11>;
345 clock-names = "uart", "clk_uart_baud0",
346 "clk_uart_baud1";
347 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
348 <&clocks SCLK_UART1>;
349 status = "disabled";
350 };
351
352 uart2: serial@e2900800 {
353 compatible = "samsung,s5pv210-uart";
354 reg = <0xe2900800 0x400>;
355 interrupt-parent = <&vic1>;
356 interrupts = <12>;
357 clock-names = "uart", "clk_uart_baud0",
358 "clk_uart_baud1";
359 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
360 <&clocks SCLK_UART2>;
361 status = "disabled";
362 };
363
364 uart3: serial@e2900c00 {
365 compatible = "samsung,s5pv210-uart";
366 reg = <0xe2900c00 0x400>;
367 interrupt-parent = <&vic1>;
368 interrupts = <13>;
369 clock-names = "uart", "clk_uart_baud0",
370 "clk_uart_baud1";
371 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
372 <&clocks SCLK_UART3>;
373 status = "disabled";
374 };
375
376 sdhci0: sdhci@eb000000 {
377 compatible = "samsung,s3c6410-sdhci";
378 reg = <0xeb000000 0x100000>;
379 interrupt-parent = <&vic1>;
380 interrupts = <26>;
381 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
382 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
383 <&clocks SCLK_MMC0>;
384 status = "disabled";
385 };
386
387 sdhci1: sdhci@eb100000 {
388 compatible = "samsung,s3c6410-sdhci";
389 reg = <0xeb100000 0x100000>;
390 interrupt-parent = <&vic1>;
391 interrupts = <27>;
392 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
393 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
394 <&clocks SCLK_MMC1>;
395 status = "disabled";
396 };
397
398 sdhci2: sdhci@eb200000 {
399 compatible = "samsung,s3c6410-sdhci";
400 reg = <0xeb200000 0x100000>;
401 interrupt-parent = <&vic1>;
402 interrupts = <28>;
403 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
404 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
405 <&clocks SCLK_MMC2>;
406 status = "disabled";
407 };
408
409 sdhci3: sdhci@eb300000 {
410 compatible = "samsung,s3c6410-sdhci";
411 reg = <0xeb300000 0x100000>;
412 interrupt-parent = <&vic3>;
413 interrupts = <2>;
414 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
415 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
416 <&clocks SCLK_MMC3>;
417 status = "disabled";
418 };
419
420 hsotg: hsotg@ec000000 {
421 compatible = "samsung,s3c6400-hsotg";
422 reg = <0xec000000 0x20000>;
423 interrupt-parent = <&vic1>;
424 interrupts = <24>;
425 clocks = <&clocks CLK_USB_OTG>;
426 clock-names = "otg";
427 phy-names = "usb2-phy";
428 phys = <&usbphy 0>;
429 status = "disabled";
430 };
431
432 usbphy: usbphy@ec100000 {
433 compatible = "samsung,s5pv210-usb2-phy";
434 reg = <0xec100000 0x100>;
435 samsung,pmureg-phandle = <&pmu_syscon>;
436 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
437 clock-names = "phy", "ref";
438 #phy-cells = <1>;
439 status = "disabled";
440 };
441
442 ehci: ehci@ec200000 {
443 compatible = "samsung,exynos4210-ehci";
444 reg = <0xec200000 0x100>;
445 interrupts = <23>;
446 interrupt-parent = <&vic1>;
447 clocks = <&clocks CLK_USB_HOST>;
448 clock-names = "usbhost";
449 #address-cells = <1>;
450 #size-cells = <0>;
451 status = "disabled";
452
453 port@0 {
454 reg = <0>;
455 phys = <&usbphy 1>;
456 };
457 };
458
459 ohci: ohci@ec300000 {
460 compatible = "samsung,exynos4210-ohci";
461 reg = <0xec300000 0x100>;
462 interrupts = <23>;
463 interrupt-parent = <&vic1>;
464 clocks = <&clocks CLK_USB_HOST>;
465 clock-names = "usbhost";
466 #address-cells = <1>;
467 #size-cells = <0>;
468 status = "disabled";
469
470 port@0 {
471 reg = <0>;
472 phys = <&usbphy 1>;
473 };
474 };
475
476 mfc: codec@f1700000 {
477 compatible = "samsung,mfc-v5";
478 reg = <0xf1700000 0x10000>;
479 interrupt-parent = <&vic2>;
480 interrupts = <14>;
481 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
482 clock-names = "sclk_mfc", "mfc";
483 };
484
485 vic0: interrupt-controller@f2000000 {
486 compatible = "arm,pl192-vic";
487 interrupt-controller;
488 reg = <0xf2000000 0x1000>;
489 #interrupt-cells = <1>;
490 };
491
492 vic1: interrupt-controller@f2100000 {
493 compatible = "arm,pl192-vic";
494 interrupt-controller;
495 reg = <0xf2100000 0x1000>;
496 #interrupt-cells = <1>;
497 };
498
499 vic2: interrupt-controller@f2200000 {
500 compatible = "arm,pl192-vic";
501 interrupt-controller;
502 reg = <0xf2200000 0x1000>;
503 #interrupt-cells = <1>;
504 };
505
506 vic3: interrupt-controller@f2300000 {
507 compatible = "arm,pl192-vic";
508 interrupt-controller;
509 reg = <0xf2300000 0x1000>;
510 #interrupt-cells = <1>;
511 };
512
513 fimd: fimd@f8000000 {
514 compatible = "samsung,exynos4210-fimd";
515 interrupt-parent = <&vic2>;
516 reg = <0xf8000000 0x20000>;
517 interrupt-names = "fifo", "vsync", "lcd_sys";
518 interrupts = <0>, <1>, <2>;
519 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
520 clock-names = "sclk_fimd", "fimd";
521 status = "disabled";
522 };
523
524 g2d: g2d@fa000000 {
525 compatible = "samsung,s5pv210-g2d";
526 reg = <0xfa000000 0x1000>;
527 interrupt-parent = <&vic2>;
528 interrupts = <9>;
529 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
530 clock-names = "sclk_fimg2d", "fimg2d";
531 };
532
533 mdma1: mdma@fa200000 {
534 compatible = "arm,pl330", "arm,primecell";
535 reg = <0xfa200000 0x1000>;
536 interrupt-parent = <&vic0>;
537 interrupts = <18>;
538 clocks = <&clocks CLK_MDMA>;
539 clock-names = "apb_pclk";
540 #dma-cells = <1>;
541 #dma-channels = <8>;
542 #dma-requests = <1>;
543 };
544
545 i2c1: i2c@fab00000 {
546 compatible = "samsung,s3c2440-i2c";
547 reg = <0xfab00000 0x1000>;
548 interrupt-parent = <&vic2>;
549 interrupts = <13>;
550 clocks = <&clocks CLK_I2C1>;
551 clock-names = "i2c";
552 pinctrl-names = "default";
553 pinctrl-0 = <&i2c1_bus>;
554 #address-cells = <1>;
555 #size-cells = <0>;
556 status = "disabled";
557 };
558
559 camera: camera {
560 compatible = "samsung,fimc", "simple-bus";
561 pinctrl-names = "default";
562 pinctrl-0 = <>;
563 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
564 clock-names = "sclk_cam0", "sclk_cam1";
565 #address-cells = <1>;
566 #size-cells = <1>;
567 ranges;
568
569 clock_cam: clock-controller {
570 #clock-cells = <1>;
571 };
572
573 csis0: csis@fa600000 {
574 compatible = "samsung,s5pv210-csis";
575 reg = <0xfa600000 0x4000>;
576 interrupt-parent = <&vic2>;
577 interrupts = <29>;
578 clocks = <&clocks CLK_CSIS>,
579 <&clocks SCLK_CSIS>;
580 clock-names = "clk_csis",
581 "sclk_csis";
582 bus-width = <4>;
583 status = "disabled";
584 #address-cells = <1>;
585 #size-cells = <0>;
586 };
587
588 fimc0: fimc@fb200000 {
589 compatible = "samsung,s5pv210-fimc";
590 reg = <0xfb200000 0x1000>;
591 interrupts = <5>;
592 interrupt-parent = <&vic2>;
593 clocks = <&clocks CLK_FIMC0>,
594 <&clocks SCLK_FIMC0>;
595 clock-names = "fimc",
596 "sclk_fimc";
597 samsung,pix-limits = <4224 8192 1920 4224>;
598 samsung,mainscaler-ext;
599 samsung,cam-if;
600 };
601
602 fimc1: fimc@fb300000 {
603 compatible = "samsung,s5pv210-fimc";
604 reg = <0xfb300000 0x1000>;
605 interrupt-parent = <&vic2>;
606 interrupts = <6>;
607 clocks = <&clocks CLK_FIMC1>,
608 <&clocks SCLK_FIMC1>;
609 clock-names = "fimc",
610 "sclk_fimc";
611 samsung,pix-limits = <4224 8192 1920 4224>;
612 samsung,mainscaler-ext;
613 samsung,cam-if;
614 };
615
616 fimc2: fimc@fb400000 {
617 compatible = "samsung,s5pv210-fimc";
618 reg = <0xfb400000 0x1000>;
619 interrupt-parent = <&vic2>;
620 interrupts = <7>;
621 clocks = <&clocks CLK_FIMC2>,
622 <&clocks SCLK_FIMC2>;
623 clock-names = "fimc",
624 "sclk_fimc";
625 samsung,pix-limits = <4224 8192 1920 4224>;
626 samsung,mainscaler-ext;
627 samsung,lcd-wb;
628 };
629 };
630 };
631};
632
633#include "s5pv210-pinctrl.dtsi"
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's S5PV210 SoC device tree source
4 *
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6 *
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
9 *
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
12 * bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
17 */
18
19#include <dt-bindings/clock/s5pv210.h>
20#include <dt-bindings/clock/s5pv210-audss.h>
21
22/ {
23 #address-cells = <1>;
24 #size-cells = <1>;
25
26 aliases {
27 csis0 = &csis0;
28 dmc0 = &dmc0;
29 dmc1 = &dmc1;
30 fimc0 = &fimc0;
31 fimc1 = &fimc1;
32 fimc2 = &fimc2;
33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 i2c2 = &i2c2;
36 i2s0 = &i2s0;
37 i2s1 = &i2s1;
38 i2s2 = &i2s2;
39 pinctrl0 = &pinctrl0;
40 spi0 = &spi0;
41 spi1 = &spi1;
42 };
43
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 cpu@0 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a8";
51 reg = <0>;
52 };
53 };
54
55 xxti: oscillator-0 {
56 compatible = "fixed-clock";
57 clock-frequency = <0>;
58 clock-output-names = "xxti";
59 #clock-cells = <0>;
60 };
61
62 xusbxti: oscillator-1 {
63 compatible = "fixed-clock";
64 clock-frequency = <0>;
65 clock-output-names = "xusbxti";
66 #clock-cells = <0>;
67 };
68
69 soc {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74
75 onenand: onenand@b0600000 {
76 compatible = "samsung,s5pv210-onenand";
77 reg = <0xb0600000 0x2000>,
78 <0xb0000000 0x20000>,
79 <0xb0040000 0x20000>;
80 interrupt-parent = <&vic1>;
81 interrupts = <31>;
82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
83 clock-names = "bus", "onenand";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 status = "disabled";
87 };
88
89 chipid@e0000000 {
90 compatible = "samsung,s5pv210-chipid";
91 reg = <0xe0000000 0x1000>;
92 };
93
94 clocks: clock-controller@e0100000 {
95 compatible = "samsung,s5pv210-clock";
96 reg = <0xe0100000 0x10000>;
97 clock-names = "xxti", "xusbxti";
98 clocks = <&xxti>, <&xusbxti>;
99 #clock-cells = <1>;
100 };
101
102 pmu_syscon: syscon@e0108000 {
103 compatible = "samsung-s5pv210-pmu", "syscon";
104 reg = <0xe0108000 0x8000>;
105 };
106
107 pinctrl0: pinctrl@e0200000 {
108 compatible = "samsung,s5pv210-pinctrl";
109 reg = <0xe0200000 0x1000>;
110 interrupt-parent = <&vic0>;
111 interrupts = <30>;
112
113 wakeup-interrupt-controller {
114 compatible = "samsung,s5pv210-wakeup-eint";
115 interrupts = <16>;
116 interrupt-parent = <&vic0>;
117 };
118 };
119
120 pdma0: dma-controller@e0900000 {
121 compatible = "arm,pl330", "arm,primecell";
122 reg = <0xe0900000 0x1000>;
123 interrupt-parent = <&vic0>;
124 interrupts = <19>;
125 clocks = <&clocks CLK_PDMA0>;
126 clock-names = "apb_pclk";
127 #dma-cells = <1>;
128 };
129
130 pdma1: dma-controller@e0a00000 {
131 compatible = "arm,pl330", "arm,primecell";
132 reg = <0xe0a00000 0x1000>;
133 interrupt-parent = <&vic0>;
134 interrupts = <20>;
135 clocks = <&clocks CLK_PDMA1>;
136 clock-names = "apb_pclk";
137 #dma-cells = <1>;
138 };
139
140 adc: adc@e1700000 {
141 compatible = "samsung,s5pv210-adc";
142 reg = <0xe1700000 0x1000>;
143 interrupt-parent = <&vic2>;
144 interrupts = <23>, <24>;
145 clocks = <&clocks CLK_TSADC>;
146 clock-names = "adc";
147 #io-channel-cells = <1>;
148 status = "disabled";
149 };
150
151 spi0: spi@e1300000 {
152 compatible = "samsung,s5pv210-spi";
153 reg = <0xe1300000 0x1000>;
154 interrupt-parent = <&vic1>;
155 interrupts = <15>;
156 dmas = <&pdma0 7>, <&pdma0 6>;
157 dma-names = "tx", "rx";
158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
159 clock-names = "spi", "spi_busclk0";
160 pinctrl-names = "default";
161 pinctrl-0 = <&spi0_bus>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 status = "disabled";
165 };
166
167 spi1: spi@e1400000 {
168 compatible = "samsung,s5pv210-spi";
169 reg = <0xe1400000 0x1000>;
170 interrupt-parent = <&vic1>;
171 interrupts = <16>;
172 dmas = <&pdma1 7>, <&pdma1 6>;
173 dma-names = "tx", "rx";
174 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
175 clock-names = "spi", "spi_busclk0";
176 pinctrl-names = "default";
177 pinctrl-0 = <&spi1_bus>;
178 #address-cells = <1>;
179 #size-cells = <0>;
180 status = "disabled";
181 };
182
183 keypad: keypad@e1600000 {
184 compatible = "samsung,s5pv210-keypad";
185 reg = <0xe1600000 0x1000>;
186 interrupt-parent = <&vic2>;
187 interrupts = <25>;
188 clocks = <&clocks CLK_KEYIF>;
189 clock-names = "keypad";
190 status = "disabled";
191 };
192
193 i2c0: i2c@e1800000 {
194 compatible = "samsung,s3c2440-i2c";
195 reg = <0xe1800000 0x1000>;
196 interrupt-parent = <&vic1>;
197 interrupts = <14>;
198 clocks = <&clocks CLK_I2C0>;
199 clock-names = "i2c";
200 pinctrl-names = "default";
201 pinctrl-0 = <&i2c0_bus>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 status = "disabled";
205 };
206
207 i2c2: i2c@e1a00000 {
208 compatible = "samsung,s3c2440-i2c";
209 reg = <0xe1a00000 0x1000>;
210 interrupt-parent = <&vic1>;
211 interrupts = <19>;
212 clocks = <&clocks CLK_I2C2>;
213 clock-names = "i2c";
214 pinctrl-0 = <&i2c2_bus>;
215 pinctrl-names = "default";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 status = "disabled";
219 };
220
221 clk_audss: clock-controller@eee10000 {
222 compatible = "samsung,s5pv210-audss-clock";
223 reg = <0xeee10000 0x1000>;
224 clock-names = "hclk", "xxti",
225 "fout_epll",
226 "sclk_audio0";
227 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
228 <&clocks FOUT_EPLL>,
229 <&clocks SCLK_AUDIO0>;
230 #clock-cells = <1>;
231 };
232
233 i2s0: i2s@eee30000 {
234 compatible = "samsung,s5pv210-i2s";
235 reg = <0xeee30000 0x1000>;
236 interrupt-parent = <&vic2>;
237 interrupts = <16>;
238 dma-names = "tx", "rx", "tx-sec";
239 dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 11>;
240 clock-names = "iis",
241 "i2s_opclk0",
242 "i2s_opclk1";
243 clocks = <&clk_audss CLK_I2S>,
244 <&clk_audss CLK_I2S>,
245 <&clk_audss CLK_DOUT_AUD_BUS>;
246 samsung,idma-addr = <0xc0010000>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&i2s0_bus>;
249 #sound-dai-cells = <0>;
250 status = "disabled";
251 };
252
253 i2s1: i2s@e2100000 {
254 compatible = "samsung,s3c6410-i2s";
255 reg = <0xe2100000 0x1000>;
256 interrupt-parent = <&vic2>;
257 interrupts = <17>;
258 dma-names = "tx", "rx";
259 dmas = <&pdma1 13>, <&pdma1 12>;
260 clock-names = "iis", "i2s_opclk0";
261 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&i2s1_bus>;
264 #sound-dai-cells = <0>;
265 status = "disabled";
266 };
267
268 i2s2: i2s@e2a00000 {
269 compatible = "samsung,s3c6410-i2s";
270 reg = <0xe2a00000 0x1000>;
271 interrupt-parent = <&vic2>;
272 interrupts = <18>;
273 dma-names = "tx", "rx";
274 dmas = <&pdma1 15>, <&pdma1 14>;
275 clock-names = "iis", "i2s_opclk0";
276 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&i2s2_bus>;
279 #sound-dai-cells = <0>;
280 status = "disabled";
281 };
282
283 pwm: pwm@e2500000 {
284 compatible = "samsung,s5pc100-pwm";
285 reg = <0xe2500000 0x1000>;
286 interrupt-parent = <&vic0>;
287 interrupts = <21>, <22>, <23>, <24>, <25>;
288 clock-names = "timers";
289 clocks = <&clocks CLK_PWM>;
290 #pwm-cells = <3>;
291 };
292
293 watchdog: watchdog@e2700000 {
294 compatible = "samsung,s3c6410-wdt";
295 reg = <0xe2700000 0x1000>;
296 interrupt-parent = <&vic0>;
297 interrupts = <26>;
298 clock-names = "watchdog";
299 clocks = <&clocks CLK_WDT>;
300 };
301
302 rtc: rtc@e2800000 {
303 compatible = "samsung,s3c6410-rtc";
304 reg = <0xe2800000 0x100>;
305 interrupt-parent = <&vic0>;
306 interrupts = <28>, <29>;
307 clocks = <&clocks CLK_RTC>;
308 clock-names = "rtc";
309 status = "disabled";
310 };
311
312 uart0: serial@e2900000 {
313 compatible = "samsung,s5pv210-uart";
314 reg = <0xe2900000 0x400>;
315 interrupt-parent = <&vic1>;
316 interrupts = <10>;
317 clock-names = "uart", "clk_uart_baud0",
318 "clk_uart_baud1";
319 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
320 <&clocks SCLK_UART0>;
321 status = "disabled";
322 };
323
324 uart1: serial@e2900400 {
325 compatible = "samsung,s5pv210-uart";
326 reg = <0xe2900400 0x400>;
327 interrupt-parent = <&vic1>;
328 interrupts = <11>;
329 clock-names = "uart", "clk_uart_baud0",
330 "clk_uart_baud1";
331 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
332 <&clocks SCLK_UART1>;
333 status = "disabled";
334 };
335
336 uart2: serial@e2900800 {
337 compatible = "samsung,s5pv210-uart";
338 reg = <0xe2900800 0x400>;
339 interrupt-parent = <&vic1>;
340 interrupts = <12>;
341 clock-names = "uart", "clk_uart_baud0",
342 "clk_uart_baud1";
343 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
344 <&clocks SCLK_UART2>;
345 status = "disabled";
346 };
347
348 uart3: serial@e2900c00 {
349 compatible = "samsung,s5pv210-uart";
350 reg = <0xe2900c00 0x400>;
351 interrupt-parent = <&vic1>;
352 interrupts = <13>;
353 clock-names = "uart", "clk_uart_baud0",
354 "clk_uart_baud1";
355 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
356 <&clocks SCLK_UART3>;
357 status = "disabled";
358 };
359
360 sdhci0: mmc@eb000000 {
361 compatible = "samsung,s3c6410-sdhci";
362 reg = <0xeb000000 0x100000>;
363 interrupt-parent = <&vic1>;
364 interrupts = <26>;
365 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
366 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
367 <&clocks SCLK_MMC0>;
368 status = "disabled";
369 };
370
371 sdhci1: mmc@eb100000 {
372 compatible = "samsung,s3c6410-sdhci";
373 reg = <0xeb100000 0x100000>;
374 interrupt-parent = <&vic1>;
375 interrupts = <27>;
376 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
377 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
378 <&clocks SCLK_MMC1>;
379 status = "disabled";
380 };
381
382 sdhci2: mmc@eb200000 {
383 compatible = "samsung,s3c6410-sdhci";
384 reg = <0xeb200000 0x100000>;
385 interrupt-parent = <&vic1>;
386 interrupts = <28>;
387 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
388 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
389 <&clocks SCLK_MMC2>;
390 status = "disabled";
391 };
392
393 sdhci3: mmc@eb300000 {
394 compatible = "samsung,s3c6410-sdhci";
395 reg = <0xeb300000 0x100000>;
396 interrupt-parent = <&vic3>;
397 interrupts = <2>;
398 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
399 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
400 <&clocks SCLK_MMC3>;
401 status = "disabled";
402 };
403
404 hsotg: hsotg@ec000000 {
405 compatible = "samsung,s3c6400-hsotg";
406 reg = <0xec000000 0x20000>;
407 interrupt-parent = <&vic1>;
408 interrupts = <24>;
409 clocks = <&clocks CLK_USB_OTG>;
410 clock-names = "otg";
411 phy-names = "usb2-phy";
412 phys = <&usbphy 0>;
413 status = "disabled";
414 };
415
416 usbphy: usbphy@ec100000 {
417 compatible = "samsung,s5pv210-usb2-phy";
418 reg = <0xec100000 0x100>;
419 samsung,pmureg-phandle = <&pmu_syscon>;
420 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
421 clock-names = "phy", "ref";
422 #phy-cells = <1>;
423 status = "disabled";
424 };
425
426 ehci: usb@ec200000 {
427 compatible = "samsung,exynos4210-ehci";
428 reg = <0xec200000 0x100>;
429 interrupts = <23>;
430 interrupt-parent = <&vic1>;
431 clocks = <&clocks CLK_USB_HOST>;
432 clock-names = "usbhost";
433 phys = <&usbphy 1>;
434 phy-names = "host";
435 status = "disabled";
436 };
437
438 ohci: usb@ec300000 {
439 compatible = "samsung,exynos4210-ohci";
440 reg = <0xec300000 0x100>;
441 interrupts = <23>;
442 interrupt-parent = <&vic1>;
443 clocks = <&clocks CLK_USB_HOST>;
444 clock-names = "usbhost";
445 phys = <&usbphy 1>;
446 phy-names = "host";
447 status = "disabled";
448 };
449
450 mfc: codec@f1700000 {
451 compatible = "samsung,mfc-v5";
452 reg = <0xf1700000 0x10000>;
453 interrupt-parent = <&vic2>;
454 interrupts = <14>;
455 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
456 clock-names = "sclk_mfc", "mfc";
457 };
458
459 vic0: interrupt-controller@f2000000 {
460 compatible = "arm,pl192-vic";
461 interrupt-controller;
462 reg = <0xf2000000 0x1000>;
463 #interrupt-cells = <1>;
464 };
465
466 vic1: interrupt-controller@f2100000 {
467 compatible = "arm,pl192-vic";
468 interrupt-controller;
469 reg = <0xf2100000 0x1000>;
470 #interrupt-cells = <1>;
471 };
472
473 vic2: interrupt-controller@f2200000 {
474 compatible = "arm,pl192-vic";
475 interrupt-controller;
476 reg = <0xf2200000 0x1000>;
477 #interrupt-cells = <1>;
478 };
479
480 vic3: interrupt-controller@f2300000 {
481 compatible = "arm,pl192-vic";
482 interrupt-controller;
483 reg = <0xf2300000 0x1000>;
484 #interrupt-cells = <1>;
485 };
486
487 fimd: fimd@f8000000 {
488 compatible = "samsung,s5pv210-fimd";
489 interrupt-parent = <&vic2>;
490 reg = <0xf8000000 0x20000>;
491 interrupt-names = "fifo", "vsync", "lcd_sys";
492 interrupts = <0>, <1>, <2>;
493 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
494 clock-names = "sclk_fimd", "fimd";
495 status = "disabled";
496 };
497
498 dmc0: dmc@f0000000 {
499 compatible = "samsung,s5pv210-dmc";
500 reg = <0xf0000000 0x1000>;
501 };
502
503 dmc1: dmc@f1400000 {
504 compatible = "samsung,s5pv210-dmc";
505 reg = <0xf1400000 0x1000>;
506 };
507
508 g2d: g2d@fa000000 {
509 compatible = "samsung,s5pv210-g2d";
510 reg = <0xfa000000 0x1000>;
511 interrupt-parent = <&vic2>;
512 interrupts = <9>;
513 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
514 clock-names = "sclk_fimg2d", "fimg2d";
515 };
516
517 mdma1: dma-controller@fa200000 {
518 compatible = "arm,pl330", "arm,primecell";
519 reg = <0xfa200000 0x1000>;
520 interrupt-parent = <&vic0>;
521 interrupts = <18>;
522 clocks = <&clocks CLK_MDMA>;
523 clock-names = "apb_pclk";
524 #dma-cells = <1>;
525 };
526
527 rotator: rotator@fa300000 {
528 compatible = "samsung,s5pv210-rotator";
529 reg = <0xfa300000 0x1000>;
530 interrupt-parent = <&vic2>;
531 interrupts = <4>;
532 clocks = <&clocks CLK_ROTATOR>;
533 clock-names = "rotator";
534 };
535
536 i2c1: i2c@fab00000 {
537 compatible = "samsung,s3c2440-i2c";
538 reg = <0xfab00000 0x1000>;
539 interrupt-parent = <&vic2>;
540 interrupts = <13>;
541 clocks = <&clocks CLK_I2C1>;
542 clock-names = "i2c";
543 pinctrl-names = "default";
544 pinctrl-0 = <&i2c1_bus>;
545 #address-cells = <1>;
546 #size-cells = <0>;
547 status = "disabled";
548 };
549
550 camera: camera {
551 compatible = "samsung,fimc", "simple-bus";
552 pinctrl-names = "default";
553 pinctrl-0 = <>;
554 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
555 clock-names = "sclk_cam0", "sclk_cam1";
556 #address-cells = <1>;
557 #size-cells = <1>;
558 #clock-cells = <1>;
559 clock-output-names = "cam_a_clkout", "cam_b_clkout";
560 ranges;
561
562 csis0: csis@fa600000 {
563 compatible = "samsung,s5pv210-csis";
564 reg = <0xfa600000 0x4000>;
565 interrupt-parent = <&vic2>;
566 interrupts = <29>;
567 clocks = <&clocks CLK_CSIS>,
568 <&clocks SCLK_CSIS>;
569 clock-names = "clk_csis",
570 "sclk_csis";
571 bus-width = <4>;
572 status = "disabled";
573 #address-cells = <1>;
574 #size-cells = <0>;
575 };
576
577 fimc0: fimc@fb200000 {
578 compatible = "samsung,s5pv210-fimc";
579 reg = <0xfb200000 0x1000>;
580 interrupts = <5>;
581 interrupt-parent = <&vic2>;
582 clocks = <&clocks CLK_FIMC0>,
583 <&clocks SCLK_FIMC0>;
584 clock-names = "fimc",
585 "sclk_fimc";
586 samsung,pix-limits = <4224 8192 1920 4224>;
587 samsung,min-pix-alignment = <16 8>;
588 samsung,cam-if;
589 };
590
591 fimc1: fimc@fb300000 {
592 compatible = "samsung,s5pv210-fimc";
593 reg = <0xfb300000 0x1000>;
594 interrupt-parent = <&vic2>;
595 interrupts = <6>;
596 clocks = <&clocks CLK_FIMC1>,
597 <&clocks SCLK_FIMC1>;
598 clock-names = "fimc",
599 "sclk_fimc";
600 samsung,pix-limits = <4224 8192 1920 4224>;
601 samsung,min-pix-alignment = <1 1>;
602 samsung,mainscaler-ext;
603 samsung,cam-if;
604 samsung,lcd-wb;
605 };
606
607 fimc2: fimc@fb400000 {
608 compatible = "samsung,s5pv210-fimc";
609 reg = <0xfb400000 0x1000>;
610 interrupt-parent = <&vic2>;
611 interrupts = <7>;
612 clocks = <&clocks CLK_FIMC2>,
613 <&clocks SCLK_FIMC2>;
614 clock-names = "fimc",
615 "sclk_fimc";
616 samsung,pix-limits = <1920 8192 1280 1920>;
617 samsung,min-pix-alignment = <16 8>;
618 samsung,rotators = <0>;
619 samsung,cam-if;
620 };
621 };
622
623 jpeg_codec: jpeg-codec@fb600000 {
624 compatible = "samsung,s5pv210-jpeg";
625 reg = <0xfb600000 0x1000>;
626 interrupt-parent = <&vic2>;
627 interrupts = <8>;
628 clocks = <&clocks CLK_JPEG>;
629 clock-names = "jpeg";
630 };
631 };
632};
633
634#include "s5pv210-pinctrl.dtsi"