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1/*
2 * Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include "orion5x-mv88f5181.dtsi"
14
15/ {
16 model = "Netgear WNR854-t";
17 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
18 "marvell,orion5x";
19 aliases {
20 serial0 = &uart0;
21 };
22
23 memory {
24 reg = <0x00000000 0x2000000>; /* 32 MB */
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 soc {
32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
33 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
34 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
35 };
36
37 gpio-keys {
38 compatible = "gpio-keys";
39 pinctrl-0 = <&pmx_reset_button>;
40 pinctrl-names = "default";
41
42 reset {
43 label = "Reset Button";
44 linux,code = <KEY_RESTART>;
45 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
46 };
47 };
48
49 gpio-leds {
50 compatible = "gpio-leds";
51 pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
52 pinctrl-names = "default";
53
54 led@0 {
55 label = "wnr854t:green:power";
56 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
57 };
58
59 led@1 {
60 label = "wnr854t:blink:power";
61 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
62 };
63
64 led@2 {
65 label = "wnr854t:green:wan";
66 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
67 };
68 };
69};
70
71&devbus_bootcs {
72 status = "okay";
73
74 devbus,keep-config;
75
76 flash@0 {
77 compatible = "cfi-flash";
78 reg = <0 0x800000>;
79 bank-width = <2>;
80
81 partitions {
82 compatible = "fixed-partitions";
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 partition@0 {
87 label = "kernel";
88 reg = <0x0 0x100000>;
89 };
90
91 partition@100000 {
92 label = "rootfs";
93 reg = <0x100000 0x660000>;
94 };
95
96 partition@760000 {
97 label = "uboot_env";
98 reg = <0x760000 0x20000>;
99 };
100
101 partition@780000 {
102 label = "uboot";
103 reg = <0x780000 0x80000>;
104 read-only;
105 };
106 };
107 };
108};
109
110&mdio {
111 status = "okay";
112
113 switch: switch@0 {
114 compatible = "marvell,mv88e6085";
115 #address-cells = <1>;
116 #size-cells = <0>;
117 reg = <0>;
118 dsa,member = <0 0>;
119
120 ports {
121 #address-cells = <1>;
122 #size-cells = <0>;
123
124 port@0 {
125 reg = <0>;
126 label = "lan3";
127 phy-handle = <&lan3phy>;
128 };
129
130 port@1 {
131 reg = <1>;
132 label = "lan4";
133 phy-handle = <&lan4phy>;
134 };
135
136 port@2 {
137 reg = <2>;
138 label = "wan";
139 phy-handle = <&wanphy>;
140 };
141
142 port@3 {
143 reg = <3>;
144 label = "cpu";
145 ethernet = <ðport>;
146 };
147
148 port@5 {
149 reg = <5>;
150 label = "lan1";
151 phy-handle = <&lan1phy>;
152 };
153
154 port@7 {
155 reg = <7>;
156 label = "lan2";
157 phy-handle = <&lan2phy>;
158 };
159 };
160
161 mdio {
162 #address-cells = <1>;
163 #size-cells = <0>;
164
165 lan3phy: ethernet-phy@0 {
166 /* Marvell 88E1121R (port 1) */
167 compatible = "ethernet-phy-id0141.0cb0",
168 "ethernet-phy-ieee802.3-c22";
169 reg = <0>;
170 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
171 };
172
173 lan4phy: ethernet-phy@1 {
174 /* Marvell 88E1121R (port 2) */
175 compatible = "ethernet-phy-id0141.0cb0",
176 "ethernet-phy-ieee802.3-c22";
177 reg = <1>;
178 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
179 };
180
181 wanphy: ethernet-phy@2 {
182 /* Marvell 88E1121R (port 1) */
183 compatible = "ethernet-phy-id0141.0cb0",
184 "ethernet-phy-ieee802.3-c22";
185 reg = <2>;
186 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
187 };
188
189 lan1phy: ethernet-phy@5 {
190 /* Marvell 88E1112 */
191 compatible = "ethernet-phy-id0141.0cb0",
192 "ethernet-phy-ieee802.3-c22";
193 reg = <5>;
194 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
195 };
196
197 lan2phy: ethernet-phy@7 {
198 /* Marvell 88E1112 */
199 compatible = "ethernet-phy-id0141.0cb0",
200 "ethernet-phy-ieee802.3-c22";
201 reg = <7>;
202 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
203 };
204 };
205 };
206};
207
208ð {
209 status = "okay";
210
211 ethernet-port@0 {
212 /* Hardwired to DSA switch */
213 speed = <1000>;
214 duplex = <1>;
215 };
216};
217
218&pinctrl {
219 pinctrl-0 = <&pmx_pci_gpios>;
220 pinctrl-names = "default";
221
222 pmx_power_led: pmx-power-led {
223 marvell,pins = "mpp0";
224 marvell,function = "gpio";
225 };
226
227 pmx_reset_button: pmx-reset-button {
228 marvell,pins = "mpp1";
229 marvell,function = "gpio";
230 };
231
232 pmx_power_led_blink: pmx-power-led-blink {
233 marvell,pins = "mpp2";
234 marvell,function = "gpio";
235 };
236
237 pmx_wan_led: pmx-wan-led {
238 marvell,pins = "mpp3";
239 marvell,function = "gpio";
240 };
241
242 pmx_pci_gpios: pmx-pci-gpios {
243 marvell,pins = "mpp4";
244 marvell,function = "gpio";
245 };
246};
247
248&uart0 {
249 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
250 status = "okay";
251};
1// SPDX-License-Identifier: GPL-2.0-only
2// Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
3
4/dts-v1/;
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/input/input.h>
8#include "orion5x-mv88f5181.dtsi"
9
10/ {
11 model = "Netgear WNR854-t";
12 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
13 "marvell,orion5x";
14 aliases {
15 serial0 = &uart0;
16 };
17
18 memory {
19 device_type = "memory";
20 reg = <0x00000000 0x2000000>; /* 32 MB */
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
29 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
30 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
31 };
32
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-0 = <&pmx_reset_button>;
36 pinctrl-names = "default";
37
38 reset {
39 label = "Reset Button";
40 linux,code = <KEY_RESTART>;
41 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
42 };
43 };
44
45 gpio-leds {
46 compatible = "gpio-leds";
47 pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
48 pinctrl-names = "default";
49
50 led@0 {
51 label = "wnr854t:green:power";
52 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
53 };
54
55 led@1 {
56 label = "wnr854t:blink:power";
57 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
58 };
59
60 led@2 {
61 label = "wnr854t:green:wan";
62 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
63 };
64 };
65};
66
67&devbus_bootcs {
68 status = "okay";
69
70 devbus,keep-config;
71
72 flash@0 {
73 compatible = "cfi-flash";
74 reg = <0 0x800000>;
75 bank-width = <2>;
76
77 partitions {
78 compatible = "fixed-partitions";
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 partition@0 {
83 label = "kernel";
84 reg = <0x0 0x100000>;
85 };
86
87 partition@100000 {
88 label = "rootfs";
89 reg = <0x100000 0x660000>;
90 };
91
92 partition@760000 {
93 label = "uboot_env";
94 reg = <0x760000 0x20000>;
95 };
96
97 partition@780000 {
98 label = "uboot";
99 reg = <0x780000 0x80000>;
100 read-only;
101 };
102 };
103 };
104};
105
106&mdio {
107 status = "okay";
108
109 switch: switch@0 {
110 compatible = "marvell,mv88e6085";
111 #address-cells = <1>;
112 #size-cells = <0>;
113 reg = <0>;
114 dsa,member = <0 0>;
115
116 ports {
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 port@0 {
121 reg = <0>;
122 label = "lan3";
123 phy-handle = <&lan3phy>;
124 };
125
126 port@1 {
127 reg = <1>;
128 label = "lan4";
129 phy-handle = <&lan4phy>;
130 };
131
132 port@2 {
133 reg = <2>;
134 label = "wan";
135 phy-handle = <&wanphy>;
136 };
137
138 port@3 {
139 reg = <3>;
140 label = "cpu";
141 ethernet = <ðport>;
142 };
143
144 port@5 {
145 reg = <5>;
146 label = "lan1";
147 phy-handle = <&lan1phy>;
148 };
149
150 port@7 {
151 reg = <7>;
152 label = "lan2";
153 phy-handle = <&lan2phy>;
154 };
155 };
156
157 mdio {
158 #address-cells = <1>;
159 #size-cells = <0>;
160
161 lan3phy: ethernet-phy@0 {
162 /* Marvell 88E1121R (port 1) */
163 compatible = "ethernet-phy-id0141.0cb0",
164 "ethernet-phy-ieee802.3-c22";
165 reg = <0>;
166 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
167 };
168
169 lan4phy: ethernet-phy@1 {
170 /* Marvell 88E1121R (port 2) */
171 compatible = "ethernet-phy-id0141.0cb0",
172 "ethernet-phy-ieee802.3-c22";
173 reg = <1>;
174 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
175 };
176
177 wanphy: ethernet-phy@2 {
178 /* Marvell 88E1121R (port 1) */
179 compatible = "ethernet-phy-id0141.0cb0",
180 "ethernet-phy-ieee802.3-c22";
181 reg = <2>;
182 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
183 };
184
185 lan1phy: ethernet-phy@5 {
186 /* Marvell 88E1112 */
187 compatible = "ethernet-phy-id0141.0cb0",
188 "ethernet-phy-ieee802.3-c22";
189 reg = <5>;
190 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
191 };
192
193 lan2phy: ethernet-phy@7 {
194 /* Marvell 88E1112 */
195 compatible = "ethernet-phy-id0141.0cb0",
196 "ethernet-phy-ieee802.3-c22";
197 reg = <7>;
198 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
199 };
200 };
201 };
202};
203
204ð {
205 status = "okay";
206
207 ethernet-port@0 {
208 /* Hardwired to DSA switch */
209 speed = <1000>;
210 duplex = <1>;
211 };
212};
213
214&pinctrl {
215 pinctrl-0 = <&pmx_pci_gpios>;
216 pinctrl-names = "default";
217
218 pmx_power_led: pmx-power-led {
219 marvell,pins = "mpp0";
220 marvell,function = "gpio";
221 };
222
223 pmx_reset_button: pmx-reset-button {
224 marvell,pins = "mpp1";
225 marvell,function = "gpio";
226 };
227
228 pmx_power_led_blink: pmx-power-led-blink {
229 marvell,pins = "mpp2";
230 marvell,function = "gpio";
231 };
232
233 pmx_wan_led: pmx-wan-led {
234 marvell,pins = "mpp3";
235 marvell,function = "gpio";
236 };
237
238 pmx_pci_gpios: pmx-pci-gpios {
239 marvell,pins = "mpp4";
240 marvell,function = "gpio";
241 };
242};
243
244&uart0 {
245 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
246 status = "okay";
247};