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v4.17
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
  4 */
  5
  6#if defined(CONFIG_SERIAL_SPRD_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  7#define SUPPORT_SYSRQ
  8#endif
  9
 10#include <linux/clk.h>
 11#include <linux/console.h>
 12#include <linux/delay.h>
 
 
 
 13#include <linux/io.h>
 14#include <linux/ioport.h>
 15#include <linux/kernel.h>
 16#include <linux/module.h>
 17#include <linux/of.h>
 18#include <linux/platform_device.h>
 19#include <linux/serial_core.h>
 20#include <linux/serial.h>
 21#include <linux/slab.h>
 22#include <linux/tty.h>
 23#include <linux/tty_flip.h>
 24
 25/* device name */
 26#define UART_NR_MAX		8
 27#define SPRD_TTY_NAME		"ttyS"
 28#define SPRD_FIFO_SIZE		128
 29#define SPRD_DEF_RATE		26000000
 30#define SPRD_BAUD_IO_LIMIT	3000000
 31#define SPRD_TIMEOUT		256000
 32
 33/* the offset of serial registers and BITs for them */
 34/* data registers */
 35#define SPRD_TXD		0x0000
 36#define SPRD_RXD		0x0004
 37
 38/* line status register and its BITs  */
 39#define SPRD_LSR		0x0008
 40#define SPRD_LSR_OE		BIT(4)
 41#define SPRD_LSR_FE		BIT(3)
 42#define SPRD_LSR_PE		BIT(2)
 43#define SPRD_LSR_BI		BIT(7)
 44#define SPRD_LSR_TX_OVER	BIT(15)
 45
 46/* data number in TX and RX fifo */
 47#define SPRD_STS1		0x000C
 
 
 48
 49/* interrupt enable register and its BITs */
 50#define SPRD_IEN		0x0010
 51#define SPRD_IEN_RX_FULL	BIT(0)
 52#define SPRD_IEN_TX_EMPTY	BIT(1)
 53#define SPRD_IEN_BREAK_DETECT	BIT(7)
 54#define SPRD_IEN_TIMEOUT	BIT(13)
 
 55
 56/* interrupt clear register */
 57#define SPRD_ICLR		0x0014
 58#define SPRD_ICLR_TIMEOUT	BIT(13)
 
 59
 60/* line control register */
 61#define SPRD_LCR		0x0018
 62#define SPRD_LCR_STOP_1BIT	0x10
 63#define SPRD_LCR_STOP_2BIT	0x30
 64#define SPRD_LCR_DATA_LEN	(BIT(2) | BIT(3))
 65#define SPRD_LCR_DATA_LEN5	0x0
 66#define SPRD_LCR_DATA_LEN6	0x4
 67#define SPRD_LCR_DATA_LEN7	0x8
 68#define SPRD_LCR_DATA_LEN8	0xc
 69#define SPRD_LCR_PARITY	(BIT(0) | BIT(1))
 70#define SPRD_LCR_PARITY_EN	0x2
 71#define SPRD_LCR_EVEN_PAR	0x0
 72#define SPRD_LCR_ODD_PAR	0x1
 73
 74/* control register 1 */
 75#define SPRD_CTL1			0x001C
 
 
 76#define RX_HW_FLOW_CTL_THLD	BIT(6)
 77#define RX_HW_FLOW_CTL_EN	BIT(7)
 78#define TX_HW_FLOW_CTL_EN	BIT(8)
 79#define RX_TOUT_THLD_DEF	0x3E00
 80#define RX_HFC_THLD_DEF	0x40
 81
 82/* fifo threshold register */
 83#define SPRD_CTL2		0x0020
 84#define THLD_TX_EMPTY	0x40
 85#define THLD_RX_FULL	0x40
 
 
 86
 87/* config baud rate register */
 88#define SPRD_CLKD0		0x0024
 
 89#define SPRD_CLKD1		0x0028
 
 
 90
 91/* interrupt mask status register */
 92#define SPRD_IMSR			0x002C
 93#define SPRD_IMSR_RX_FIFO_FULL		BIT(0)
 94#define SPRD_IMSR_TX_FIFO_EMPTY	BIT(1)
 95#define SPRD_IMSR_BREAK_DETECT		BIT(7)
 96#define SPRD_IMSR_TIMEOUT		BIT(13)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 97
 98struct reg_backup {
 99	u32 ien;
100	u32 ctrl0;
101	u32 ctrl1;
102	u32 ctrl2;
103	u32 clkd0;
104	u32 clkd1;
105	u32 dspwait;
106};
107
108struct sprd_uart_port {
109	struct uart_port port;
110	struct reg_backup reg_bak;
111	char name[16];
 
 
 
 
 
 
112};
113
114static struct sprd_uart_port *sprd_port[UART_NR_MAX];
115static int sprd_ports_num;
116
117static inline unsigned int serial_in(struct uart_port *port, int offset)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
118{
119	return readl_relaxed(port->membase + offset);
120}
121
122static inline void serial_out(struct uart_port *port, int offset, int value)
 
123{
124	writel_relaxed(value, port->membase + offset);
125}
126
127static unsigned int sprd_tx_empty(struct uart_port *port)
128{
129	if (serial_in(port, SPRD_STS1) & 0xff00)
130		return 0;
131	else
132		return TIOCSER_TEMT;
133}
134
135static unsigned int sprd_get_mctrl(struct uart_port *port)
136{
137	return TIOCM_DSR | TIOCM_CTS;
138}
139
140static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
141{
142	/* nothing to do */
 
 
 
 
 
 
 
143}
144
145static void sprd_stop_tx(struct uart_port *port)
146{
 
 
147	unsigned int ien, iclr;
148
 
 
 
149	iclr = serial_in(port, SPRD_ICLR);
150	ien = serial_in(port, SPRD_IEN);
151
152	iclr |= SPRD_IEN_TX_EMPTY;
153	ien &= ~SPRD_IEN_TX_EMPTY;
154
155	serial_out(port, SPRD_ICLR, iclr);
156	serial_out(port, SPRD_IEN, ien);
 
157}
158
159static void sprd_start_tx(struct uart_port *port)
160{
161	unsigned int ien;
162
163	ien = serial_in(port, SPRD_IEN);
164	if (!(ien & SPRD_IEN_TX_EMPTY)) {
165		ien |= SPRD_IEN_TX_EMPTY;
166		serial_out(port, SPRD_IEN, ien);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
167	}
 
 
 
168}
169
170static void sprd_stop_rx(struct uart_port *port)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
171{
 
 
172	unsigned int ien, iclr;
173
 
 
 
 
 
174	iclr = serial_in(port, SPRD_ICLR);
175	ien = serial_in(port, SPRD_IEN);
176
177	ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
178	iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
179
180	serial_out(port, SPRD_IEN, ien);
181	serial_out(port, SPRD_ICLR, iclr);
182}
183
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
184/* The Sprd serial does not support this function. */
185static void sprd_break_ctl(struct uart_port *port, int break_state)
186{
187	/* nothing to do */
188}
189
190static int handle_lsr_errors(struct uart_port *port,
191			     unsigned int *flag,
192			     unsigned int *lsr)
193{
194	int ret = 0;
195
196	/* statistics */
197	if (*lsr & SPRD_LSR_BI) {
198		*lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
199		port->icount.brk++;
200		ret = uart_handle_break(port);
201		if (ret)
202			return ret;
203	} else if (*lsr & SPRD_LSR_PE)
204		port->icount.parity++;
205	else if (*lsr & SPRD_LSR_FE)
206		port->icount.frame++;
207	if (*lsr & SPRD_LSR_OE)
208		port->icount.overrun++;
209
210	/* mask off conditions which should be ignored */
211	*lsr &= port->read_status_mask;
212	if (*lsr & SPRD_LSR_BI)
213		*flag = TTY_BREAK;
214	else if (*lsr & SPRD_LSR_PE)
215		*flag = TTY_PARITY;
216	else if (*lsr & SPRD_LSR_FE)
217		*flag = TTY_FRAME;
218
219	return ret;
220}
221
222static inline void sprd_rx(struct uart_port *port)
223{
 
 
224	struct tty_port *tty = &port->state->port;
225	unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT;
 
226
227	while ((serial_in(port, SPRD_STS1) & 0x00ff) && max_count--) {
 
 
 
 
 
 
228		lsr = serial_in(port, SPRD_LSR);
229		ch = serial_in(port, SPRD_RXD);
230		flag = TTY_NORMAL;
231		port->icount.rx++;
232
233		if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
234			SPRD_LSR_FE | SPRD_LSR_OE))
235			if (handle_lsr_errors(port, &lsr, &flag))
236				continue;
237		if (uart_handle_sysrq_char(port, ch))
238			continue;
239
240		uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
241	}
242
243	tty_flip_buffer_push(tty);
244}
245
246static inline void sprd_tx(struct uart_port *port)
247{
248	struct circ_buf *xmit = &port->state->xmit;
249	int count;
250
251	if (port->x_char) {
252		serial_out(port, SPRD_TXD, port->x_char);
253		port->icount.tx++;
254		port->x_char = 0;
255		return;
256	}
257
258	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
259		sprd_stop_tx(port);
260		return;
261	}
262
263	count = THLD_TX_EMPTY;
264	do {
265		serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]);
266		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
267		port->icount.tx++;
268		if (uart_circ_empty(xmit))
269			break;
270	} while (--count > 0);
271
272	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
273		uart_write_wakeup(port);
274
275	if (uart_circ_empty(xmit))
276		sprd_stop_tx(port);
 
 
277}
278
279/* this handles the interrupt from one port */
280static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
281{
282	struct uart_port *port = dev_id;
283	unsigned int ims;
 
 
284
285	spin_lock(&port->lock);
286
287	ims = serial_in(port, SPRD_IMSR);
288
289	if (!ims) {
290		spin_unlock(&port->lock);
291		return IRQ_NONE;
292	}
293
294	if (ims & SPRD_IMSR_TIMEOUT)
295		serial_out(port, SPRD_ICLR, SPRD_ICLR_TIMEOUT);
296
297	if (ims & (SPRD_IMSR_RX_FIFO_FULL |
298		SPRD_IMSR_BREAK_DETECT | SPRD_IMSR_TIMEOUT))
 
 
 
299		sprd_rx(port);
300
301	if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
302		sprd_tx(port);
303
304	spin_unlock(&port->lock);
305
306	return IRQ_HANDLED;
307}
308
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
309static int sprd_startup(struct uart_port *port)
310{
311	int ret = 0;
312	unsigned int ien, fc;
313	unsigned int timeout;
314	struct sprd_uart_port *sp;
315	unsigned long flags;
316
317	serial_out(port, SPRD_CTL2, ((THLD_TX_EMPTY << 8) | THLD_RX_FULL));
 
318
319	/* clear rx fifo */
320	timeout = SPRD_TIMEOUT;
321	while (timeout-- && serial_in(port, SPRD_STS1) & 0x00ff)
322		serial_in(port, SPRD_RXD);
323
324	/* clear tx fifo */
325	timeout = SPRD_TIMEOUT;
326	while (timeout-- && serial_in(port, SPRD_STS1) & 0xff00)
327		cpu_relax();
328
329	/* clear interrupt */
330	serial_out(port, SPRD_IEN, 0);
331	serial_out(port, SPRD_ICLR, ~0);
332
333	/* allocate irq */
334	sp = container_of(port, struct sprd_uart_port, port);
335	snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
 
 
 
336	ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
337				IRQF_SHARED, sp->name, port);
338	if (ret) {
339		dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
340			port->irq, ret);
341		return ret;
342	}
343	fc = serial_in(port, SPRD_CTL1);
344	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
345	serial_out(port, SPRD_CTL1, fc);
346
347	/* enable interrupt */
348	spin_lock_irqsave(&port->lock, flags);
349	ien = serial_in(port, SPRD_IEN);
350	ien |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT;
 
 
351	serial_out(port, SPRD_IEN, ien);
352	spin_unlock_irqrestore(&port->lock, flags);
353
354	return 0;
355}
356
357static void sprd_shutdown(struct uart_port *port)
358{
 
359	serial_out(port, SPRD_IEN, 0);
360	serial_out(port, SPRD_ICLR, ~0);
361	devm_free_irq(port->dev, port->irq, port);
362}
363
364static void sprd_set_termios(struct uart_port *port,
365				    struct ktermios *termios,
366				    struct ktermios *old)
367{
368	unsigned int baud, quot;
369	unsigned int lcr = 0, fc;
370	unsigned long flags;
371
372	/* ask the core to calculate the divisor for us */
373	baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
374
375	quot = (unsigned int)((port->uartclk + baud / 2) / baud);
376
377	/* set data length */
378	switch (termios->c_cflag & CSIZE) {
379	case CS5:
380		lcr |= SPRD_LCR_DATA_LEN5;
381		break;
382	case CS6:
383		lcr |= SPRD_LCR_DATA_LEN6;
384		break;
385	case CS7:
386		lcr |= SPRD_LCR_DATA_LEN7;
387		break;
388	case CS8:
389	default:
390		lcr |= SPRD_LCR_DATA_LEN8;
391		break;
392	}
393
394	/* calculate stop bits */
395	lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
396	if (termios->c_cflag & CSTOPB)
397		lcr |= SPRD_LCR_STOP_2BIT;
398	else
399		lcr |= SPRD_LCR_STOP_1BIT;
400
401	/* calculate parity */
402	lcr &= ~SPRD_LCR_PARITY;
403	termios->c_cflag &= ~CMSPAR;	/* no support mark/space */
404	if (termios->c_cflag & PARENB) {
405		lcr |= SPRD_LCR_PARITY_EN;
406		if (termios->c_cflag & PARODD)
407			lcr |= SPRD_LCR_ODD_PAR;
408		else
409			lcr |= SPRD_LCR_EVEN_PAR;
410	}
411
412	spin_lock_irqsave(&port->lock, flags);
413
414	/* update the per-port timeout */
415	uart_update_timeout(port, termios->c_cflag, baud);
416
417	port->read_status_mask = SPRD_LSR_OE;
418	if (termios->c_iflag & INPCK)
419		port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
420	if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
421		port->read_status_mask |= SPRD_LSR_BI;
422
423	/* characters to ignore */
424	port->ignore_status_mask = 0;
425	if (termios->c_iflag & IGNPAR)
426		port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
427	if (termios->c_iflag & IGNBRK) {
428		port->ignore_status_mask |= SPRD_LSR_BI;
429		/*
430		 * If we're ignoring parity and break indicators,
431		 * ignore overruns too (for real raw support).
432		 */
433		if (termios->c_iflag & IGNPAR)
434			port->ignore_status_mask |= SPRD_LSR_OE;
435	}
436
437	/* flow control */
438	fc = serial_in(port, SPRD_CTL1);
439	fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
440	if (termios->c_cflag & CRTSCTS) {
441		fc |= RX_HW_FLOW_CTL_THLD;
442		fc |= RX_HW_FLOW_CTL_EN;
443		fc |= TX_HW_FLOW_CTL_EN;
444	}
445
446	/* clock divider bit0~bit15 */
447	serial_out(port, SPRD_CLKD0, quot & 0xffff);
448
449	/* clock divider bit16~bit20 */
450	serial_out(port, SPRD_CLKD1, (quot & 0x1f0000) >> 16);
 
451	serial_out(port, SPRD_LCR, lcr);
452	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
453	serial_out(port, SPRD_CTL1, fc);
454
455	spin_unlock_irqrestore(&port->lock, flags);
456
457	/* Don't rewrite B0 */
458	if (tty_termios_baud_rate(termios))
459		tty_termios_encode_baud_rate(termios, baud, baud);
460}
461
462static const char *sprd_type(struct uart_port *port)
463{
464	return "SPX";
465}
466
467static void sprd_release_port(struct uart_port *port)
468{
469	/* nothing to do */
470}
471
472static int sprd_request_port(struct uart_port *port)
473{
474	return 0;
475}
476
477static void sprd_config_port(struct uart_port *port, int flags)
478{
479	if (flags & UART_CONFIG_TYPE)
480		port->type = PORT_SPRD;
481}
482
483static int sprd_verify_port(struct uart_port *port,
484				   struct serial_struct *ser)
485{
486	if (ser->type != PORT_SPRD)
487		return -EINVAL;
488	if (port->irq != ser->irq)
489		return -EINVAL;
490	if (port->iotype != ser->io_type)
491		return -EINVAL;
492	return 0;
493}
494
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
495static const struct uart_ops serial_sprd_ops = {
496	.tx_empty = sprd_tx_empty,
497	.get_mctrl = sprd_get_mctrl,
498	.set_mctrl = sprd_set_mctrl,
499	.stop_tx = sprd_stop_tx,
500	.start_tx = sprd_start_tx,
501	.stop_rx = sprd_stop_rx,
502	.break_ctl = sprd_break_ctl,
503	.startup = sprd_startup,
504	.shutdown = sprd_shutdown,
505	.set_termios = sprd_set_termios,
506	.type = sprd_type,
507	.release_port = sprd_release_port,
508	.request_port = sprd_request_port,
509	.config_port = sprd_config_port,
510	.verify_port = sprd_verify_port,
 
 
 
 
 
 
511};
512
513#ifdef CONFIG_SERIAL_SPRD_CONSOLE
514static void wait_for_xmitr(struct uart_port *port)
515{
516	unsigned int status, tmout = 10000;
517
518	/* wait up to 10ms for the character(s) to be sent */
519	do {
520		status = serial_in(port, SPRD_STS1);
521		if (--tmout == 0)
522			break;
523		udelay(1);
524	} while (status & 0xff00);
525}
526
527static void sprd_console_putchar(struct uart_port *port, int ch)
528{
529	wait_for_xmitr(port);
530	serial_out(port, SPRD_TXD, ch);
531}
532
533static void sprd_console_write(struct console *co, const char *s,
534				      unsigned int count)
535{
536	struct uart_port *port = &sprd_port[co->index]->port;
537	int locked = 1;
538	unsigned long flags;
539
540	if (port->sysrq)
541		locked = 0;
542	else if (oops_in_progress)
543		locked = spin_trylock_irqsave(&port->lock, flags);
544	else
545		spin_lock_irqsave(&port->lock, flags);
546
547	uart_console_write(port, s, count, sprd_console_putchar);
548
549	/* wait for transmitter to become empty */
550	wait_for_xmitr(port);
551
552	if (locked)
553		spin_unlock_irqrestore(&port->lock, flags);
554}
555
556static int __init sprd_console_setup(struct console *co, char *options)
557{
558	struct uart_port *port;
559	int baud = 115200;
560	int bits = 8;
561	int parity = 'n';
562	int flow = 'n';
563
564	if (co->index >= UART_NR_MAX || co->index < 0)
565		co->index = 0;
566
567	port = &sprd_port[co->index]->port;
568	if (port == NULL) {
569		pr_info("serial port %d not yet initialized\n", co->index);
570		return -ENODEV;
571	}
 
572	if (options)
573		uart_parse_options(options, &baud, &parity, &bits, &flow);
574
575	return uart_set_options(port, co, baud, parity, bits, flow);
 
576}
577
578static struct uart_driver sprd_uart_driver;
579static struct console sprd_console = {
580	.name = SPRD_TTY_NAME,
581	.write = sprd_console_write,
582	.device = uart_console_device,
583	.setup = sprd_console_setup,
584	.flags = CON_PRINTBUFFER,
585	.index = -1,
586	.data = &sprd_uart_driver,
587};
588
 
 
 
 
 
 
 
589#define SPRD_CONSOLE	(&sprd_console)
590
591/* Support for earlycon */
592static void sprd_putc(struct uart_port *port, int c)
593{
594	unsigned int timeout = SPRD_TIMEOUT;
595
596	while (timeout-- &&
597		   !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
598		cpu_relax();
599
600	writeb(c, port->membase + SPRD_TXD);
601}
602
603static void sprd_early_write(struct console *con, const char *s,
604				    unsigned n)
605{
606	struct earlycon_device *dev = con->data;
607
608	uart_console_write(&dev->port, s, n, sprd_putc);
609}
610
611static int __init sprd_early_console_setup(
612				struct earlycon_device *device,
613				const char *opt)
614{
615	if (!device->port.membase)
616		return -ENODEV;
617
618	device->con->write = sprd_early_write;
619	return 0;
620}
621OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
622		    sprd_early_console_setup);
623
624#else /* !CONFIG_SERIAL_SPRD_CONSOLE */
625#define SPRD_CONSOLE		NULL
626#endif
627
628static struct uart_driver sprd_uart_driver = {
629	.owner = THIS_MODULE,
630	.driver_name = "sprd_serial",
631	.dev_name = SPRD_TTY_NAME,
632	.major = 0,
633	.minor = 0,
634	.nr = UART_NR_MAX,
635	.cons = SPRD_CONSOLE,
636};
637
638static int sprd_probe_dt_alias(int index, struct device *dev)
639{
640	struct device_node *np;
641	int ret = index;
642
643	if (!IS_ENABLED(CONFIG_OF))
644		return ret;
645
646	np = dev->of_node;
647	if (!np)
648		return ret;
649
650	ret = of_alias_get_id(np, "serial");
651	if (ret < 0)
652		ret = index;
653	else if (ret >= ARRAY_SIZE(sprd_port) || sprd_port[ret] != NULL) {
654		dev_warn(dev, "requested serial port %d not available.\n", ret);
655		ret = index;
656	}
657
658	return ret;
659}
660
661static int sprd_remove(struct platform_device *dev)
662{
663	struct sprd_uart_port *sup = platform_get_drvdata(dev);
664
665	if (sup) {
666		uart_remove_one_port(&sprd_uart_driver, &sup->port);
667		sprd_port[sup->port.line] = NULL;
 
668		sprd_ports_num--;
669	}
670
671	if (!sprd_ports_num)
672		uart_unregister_driver(&sprd_uart_driver);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
673
674	return 0;
675}
676
677static int sprd_probe(struct platform_device *pdev)
678{
679	struct resource *res;
680	struct uart_port *up;
681	struct clk *clk;
682	int irq;
683	int index;
684	int ret;
685
686	for (index = 0; index < ARRAY_SIZE(sprd_port); index++)
687		if (sprd_port[index] == NULL)
688			break;
689
690	if (index == ARRAY_SIZE(sprd_port))
691		return -EBUSY;
692
693	index = sprd_probe_dt_alias(index, &pdev->dev);
694
695	sprd_port[index] = devm_kzalloc(&pdev->dev,
696		sizeof(*sprd_port[index]), GFP_KERNEL);
697	if (!sprd_port[index])
698		return -ENOMEM;
699
700	up = &sprd_port[index]->port;
701	up->dev = &pdev->dev;
702	up->line = index;
703	up->type = PORT_SPRD;
704	up->iotype = UPIO_MEM;
705	up->uartclk = SPRD_DEF_RATE;
706	up->fifosize = SPRD_FIFO_SIZE;
707	up->ops = &serial_sprd_ops;
708	up->flags = UPF_BOOT_AUTOCONF;
 
709
710	clk = devm_clk_get(&pdev->dev, NULL);
711	if (!IS_ERR_OR_NULL(clk))
712		up->uartclk = clk_get_rate(clk);
713
714	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
715	if (!res) {
716		dev_err(&pdev->dev, "not provide mem resource\n");
717		return -ENODEV;
718	}
719	up->mapbase = res->start;
720	up->membase = devm_ioremap_resource(&pdev->dev, res);
721	if (IS_ERR(up->membase))
722		return PTR_ERR(up->membase);
723
 
 
 
 
 
 
 
 
724	irq = platform_get_irq(pdev, 0);
725	if (irq < 0) {
726		dev_err(&pdev->dev, "not provide irq resource: %d\n", irq);
727		return irq;
728	}
729	up->irq = irq;
730
 
 
 
 
 
 
 
 
731	if (!sprd_ports_num) {
732		ret = uart_register_driver(&sprd_uart_driver);
733		if (ret < 0) {
734			pr_err("Failed to register SPRD-UART driver\n");
735			return ret;
736		}
737	}
 
738	sprd_ports_num++;
 
739
740	ret = uart_add_one_port(&sprd_uart_driver, up);
741	if (ret) {
742		sprd_port[index] = NULL;
743		sprd_remove(pdev);
744	}
745
746	platform_set_drvdata(pdev, up);
747
 
 
 
 
 
 
 
 
748	return ret;
749}
750
751#ifdef CONFIG_PM_SLEEP
752static int sprd_suspend(struct device *dev)
753{
754	struct sprd_uart_port *sup = dev_get_drvdata(dev);
755
756	uart_suspend_port(&sprd_uart_driver, &sup->port);
757
758	return 0;
759}
760
761static int sprd_resume(struct device *dev)
762{
763	struct sprd_uart_port *sup = dev_get_drvdata(dev);
764
765	uart_resume_port(&sprd_uart_driver, &sup->port);
766
767	return 0;
768}
769#endif
770
771static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
772
773static const struct of_device_id serial_ids[] = {
774	{.compatible = "sprd,sc9836-uart",},
 
775	{}
776};
777MODULE_DEVICE_TABLE(of, serial_ids);
778
779static struct platform_driver sprd_platform_driver = {
780	.probe		= sprd_probe,
781	.remove		= sprd_remove,
782	.driver		= {
783		.name	= "sprd_serial",
784		.of_match_table = of_match_ptr(serial_ids),
785		.pm	= &sprd_pm_ops,
786	},
787};
788
789module_platform_driver(sprd_platform_driver);
790
791MODULE_LICENSE("GPL v2");
792MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");
v6.13.7
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
   4 */
   5
 
 
 
 
   6#include <linux/clk.h>
   7#include <linux/console.h>
   8#include <linux/delay.h>
   9#include <linux/dmaengine.h>
  10#include <linux/dma-mapping.h>
  11#include <linux/dma/sprd-dma.h>
  12#include <linux/io.h>
  13#include <linux/ioport.h>
  14#include <linux/kernel.h>
  15#include <linux/module.h>
  16#include <linux/of.h>
  17#include <linux/platform_device.h>
  18#include <linux/serial_core.h>
  19#include <linux/serial.h>
  20#include <linux/slab.h>
  21#include <linux/tty.h>
  22#include <linux/tty_flip.h>
  23
  24/* device name */
  25#define UART_NR_MAX		8
  26#define SPRD_TTY_NAME		"ttyS"
  27#define SPRD_FIFO_SIZE		128
  28#define SPRD_DEF_RATE		26000000
  29#define SPRD_BAUD_IO_LIMIT	3000000
  30#define SPRD_TIMEOUT		256000
  31
  32/* the offset of serial registers and BITs for them */
  33/* data registers */
  34#define SPRD_TXD		0x0000
  35#define SPRD_RXD		0x0004
  36
  37/* line status register and its BITs  */
  38#define SPRD_LSR		0x0008
  39#define SPRD_LSR_OE		BIT(4)
  40#define SPRD_LSR_FE		BIT(3)
  41#define SPRD_LSR_PE		BIT(2)
  42#define SPRD_LSR_BI		BIT(7)
  43#define SPRD_LSR_TX_OVER	BIT(15)
  44
  45/* data number in TX and RX fifo */
  46#define SPRD_STS1		0x000C
  47#define SPRD_RX_FIFO_CNT_MASK	GENMASK(7, 0)
  48#define SPRD_TX_FIFO_CNT_MASK	GENMASK(15, 8)
  49
  50/* interrupt enable register and its BITs */
  51#define SPRD_IEN		0x0010
  52#define SPRD_IEN_RX_FULL	BIT(0)
  53#define SPRD_IEN_TX_EMPTY	BIT(1)
  54#define SPRD_IEN_BREAK_DETECT	BIT(7)
  55#define SPRD_IEN_TIMEOUT	BIT(13)
  56#define SPRD_IEN_DATA_TIMEOUT	BIT(17)
  57
  58/* interrupt clear register */
  59#define SPRD_ICLR		0x0014
  60#define SPRD_ICLR_TIMEOUT	BIT(13)
  61#define SPRD_ICLR_DATA_TIMEOUT	BIT(17)
  62
  63/* line control register */
  64#define SPRD_LCR		0x0018
  65#define SPRD_LCR_STOP_1BIT	0x10
  66#define SPRD_LCR_STOP_2BIT	0x30
  67#define SPRD_LCR_DATA_LEN	(BIT(2) | BIT(3))
  68#define SPRD_LCR_DATA_LEN5	0x0
  69#define SPRD_LCR_DATA_LEN6	0x4
  70#define SPRD_LCR_DATA_LEN7	0x8
  71#define SPRD_LCR_DATA_LEN8	0xc
  72#define SPRD_LCR_PARITY		(BIT(0) | BIT(1))
  73#define SPRD_LCR_PARITY_EN	0x2
  74#define SPRD_LCR_EVEN_PAR	0x0
  75#define SPRD_LCR_ODD_PAR	0x1
  76
  77/* control register 1 */
  78#define SPRD_CTL1		0x001C
  79#define SPRD_DMA_EN		BIT(15)
  80#define SPRD_LOOPBACK_EN	BIT(14)
  81#define RX_HW_FLOW_CTL_THLD	BIT(6)
  82#define RX_HW_FLOW_CTL_EN	BIT(7)
  83#define TX_HW_FLOW_CTL_EN	BIT(8)
  84#define RX_TOUT_THLD_DEF	0x3E00
  85#define RX_HFC_THLD_DEF		0x40
  86
  87/* fifo threshold register */
  88#define SPRD_CTL2		0x0020
  89#define THLD_TX_EMPTY		0x40
  90#define THLD_TX_EMPTY_SHIFT	8
  91#define THLD_RX_FULL		0x40
  92#define THLD_RX_FULL_MASK	GENMASK(6, 0)
  93
  94/* config baud rate register */
  95#define SPRD_CLKD0		0x0024
  96#define SPRD_CLKD0_MASK		GENMASK(15, 0)
  97#define SPRD_CLKD1		0x0028
  98#define SPRD_CLKD1_MASK		GENMASK(20, 16)
  99#define SPRD_CLKD1_SHIFT	16
 100
 101/* interrupt mask status register */
 102#define SPRD_IMSR		0x002C
 103#define SPRD_IMSR_RX_FIFO_FULL	BIT(0)
 104#define SPRD_IMSR_TX_FIFO_EMPTY	BIT(1)
 105#define SPRD_IMSR_BREAK_DETECT	BIT(7)
 106#define SPRD_IMSR_TIMEOUT	BIT(13)
 107#define SPRD_IMSR_DATA_TIMEOUT	BIT(17)
 108#define SPRD_DEFAULT_SOURCE_CLK	26000000
 109
 110#define SPRD_RX_DMA_STEP	1
 111#define SPRD_RX_FIFO_FULL	1
 112#define SPRD_TX_FIFO_FULL	0x20
 113#define SPRD_UART_RX_SIZE	(UART_XMIT_SIZE / 4)
 114
 115struct sprd_uart_dma {
 116	struct dma_chan *chn;
 117	unsigned char *virt;
 118	dma_addr_t phys_addr;
 119	dma_cookie_t cookie;
 120	u32 trans_len;
 121	bool enable;
 122};
 123
 124struct sprd_uart_data {
 125	unsigned int timeout_ien;
 126	unsigned int timeout_iclr;
 127	unsigned int timeout_imsr;
 
 
 
 
 128};
 129
 130struct sprd_uart_port {
 131	struct uart_port port;
 
 132	char name[16];
 133	struct clk *clk;
 134	struct sprd_uart_dma tx_dma;
 135	struct sprd_uart_dma rx_dma;
 136	dma_addr_t pos;
 137	unsigned char *rx_buf_tail;
 138	const struct sprd_uart_data *pdata;
 139};
 140
 141static struct sprd_uart_port *sprd_port[UART_NR_MAX];
 142static int sprd_ports_num;
 143
 144static int sprd_start_dma_rx(struct uart_port *port);
 145static int sprd_tx_dma_config(struct uart_port *port);
 146
 147static const struct sprd_uart_data sc9836_data = {
 148	.timeout_ien = SPRD_IEN_TIMEOUT,
 149	.timeout_iclr = SPRD_ICLR_TIMEOUT,
 150	.timeout_imsr = SPRD_IMSR_TIMEOUT,
 151};
 152
 153static const struct sprd_uart_data sc9632_data = {
 154	.timeout_ien = SPRD_IEN_DATA_TIMEOUT,
 155	.timeout_iclr = SPRD_ICLR_DATA_TIMEOUT,
 156	.timeout_imsr = SPRD_IMSR_DATA_TIMEOUT,
 157};
 158
 159static inline unsigned int serial_in(struct uart_port *port,
 160				     unsigned int offset)
 161{
 162	return readl_relaxed(port->membase + offset);
 163}
 164
 165static inline void serial_out(struct uart_port *port, unsigned int offset,
 166			      int value)
 167{
 168	writel_relaxed(value, port->membase + offset);
 169}
 170
 171static unsigned int sprd_tx_empty(struct uart_port *port)
 172{
 173	if (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
 174		return 0;
 175	else
 176		return TIOCSER_TEMT;
 177}
 178
 179static unsigned int sprd_get_mctrl(struct uart_port *port)
 180{
 181	return TIOCM_DSR | TIOCM_CTS;
 182}
 183
 184static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
 185{
 186	u32 val = serial_in(port, SPRD_CTL1);
 187
 188	if (mctrl & TIOCM_LOOP)
 189		val |= SPRD_LOOPBACK_EN;
 190	else
 191		val &= ~SPRD_LOOPBACK_EN;
 192
 193	serial_out(port, SPRD_CTL1, val);
 194}
 195
 196static void sprd_stop_rx(struct uart_port *port)
 197{
 198	struct sprd_uart_port *sp =
 199		container_of(port, struct sprd_uart_port, port);
 200	unsigned int ien, iclr;
 201
 202	if (sp->rx_dma.enable)
 203		dmaengine_terminate_all(sp->rx_dma.chn);
 204
 205	iclr = serial_in(port, SPRD_ICLR);
 206	ien = serial_in(port, SPRD_IEN);
 207
 208	ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
 209	iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
 210
 
 211	serial_out(port, SPRD_IEN, ien);
 212	serial_out(port, SPRD_ICLR, iclr);
 213}
 214
 215static void sprd_uart_dma_enable(struct uart_port *port, bool enable)
 216{
 217	u32 val = serial_in(port, SPRD_CTL1);
 218
 219	if (enable)
 220		val |= SPRD_DMA_EN;
 221	else
 222		val &= ~SPRD_DMA_EN;
 223
 224	serial_out(port, SPRD_CTL1, val);
 225}
 226
 227static void sprd_stop_tx_dma(struct uart_port *port)
 228{
 229	struct sprd_uart_port *sp =
 230		container_of(port, struct sprd_uart_port, port);
 231	struct dma_tx_state state;
 232	u32 trans_len;
 233
 234	dmaengine_pause(sp->tx_dma.chn);
 235
 236	dmaengine_tx_status(sp->tx_dma.chn, sp->tx_dma.cookie, &state);
 237	if (state.residue) {
 238		trans_len = state.residue - sp->tx_dma.phys_addr;
 239		uart_xmit_advance(port, trans_len);
 240		dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
 241				 sp->tx_dma.trans_len, DMA_TO_DEVICE);
 242	}
 243
 244	dmaengine_terminate_all(sp->tx_dma.chn);
 245	sp->tx_dma.trans_len = 0;
 246}
 247
 248static int sprd_tx_buf_remap(struct uart_port *port)
 249{
 250	struct sprd_uart_port *sp =
 251		container_of(port, struct sprd_uart_port, port);
 252	struct tty_port *tport = &port->state->port;
 253	unsigned char *tail;
 254
 255	sp->tx_dma.trans_len = kfifo_out_linear_ptr(&tport->xmit_fifo, &tail,
 256			UART_XMIT_SIZE);
 257
 258	sp->tx_dma.phys_addr = dma_map_single(port->dev, tail,
 259					      sp->tx_dma.trans_len,
 260					      DMA_TO_DEVICE);
 261	return dma_mapping_error(port->dev, sp->tx_dma.phys_addr);
 262}
 263
 264static void sprd_complete_tx_dma(void *data)
 265{
 266	struct uart_port *port = (struct uart_port *)data;
 267	struct sprd_uart_port *sp =
 268		container_of(port, struct sprd_uart_port, port);
 269	struct tty_port *tport = &port->state->port;
 270	unsigned long flags;
 271
 272	uart_port_lock_irqsave(port, &flags);
 273	dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
 274			 sp->tx_dma.trans_len, DMA_TO_DEVICE);
 275
 276	uart_xmit_advance(port, sp->tx_dma.trans_len);
 277
 278	if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
 279		uart_write_wakeup(port);
 280
 281	if (kfifo_is_empty(&tport->xmit_fifo) || sprd_tx_buf_remap(port) ||
 282	    sprd_tx_dma_config(port))
 283		sp->tx_dma.trans_len = 0;
 284
 285	uart_port_unlock_irqrestore(port, flags);
 286}
 287
 288static int sprd_uart_dma_submit(struct uart_port *port,
 289				struct sprd_uart_dma *ud, u32 trans_len,
 290				enum dma_transfer_direction direction,
 291				dma_async_tx_callback callback)
 292{
 293	struct dma_async_tx_descriptor *dma_des;
 294	unsigned long flags;
 295
 296	flags = SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE,
 297			       SPRD_DMA_NO_TRG,
 298			       SPRD_DMA_FRAG_REQ,
 299			       SPRD_DMA_TRANS_INT);
 300
 301	dma_des = dmaengine_prep_slave_single(ud->chn, ud->phys_addr, trans_len,
 302					      direction, flags);
 303	if (!dma_des)
 304		return -ENODEV;
 305
 306	dma_des->callback = callback;
 307	dma_des->callback_param = port;
 308
 309	ud->cookie = dmaengine_submit(dma_des);
 310	if (dma_submit_error(ud->cookie))
 311		return dma_submit_error(ud->cookie);
 312
 313	dma_async_issue_pending(ud->chn);
 314
 315	return 0;
 316}
 317
 318static int sprd_tx_dma_config(struct uart_port *port)
 319{
 320	struct sprd_uart_port *sp =
 321		container_of(port, struct sprd_uart_port, port);
 322	u32 burst = sp->tx_dma.trans_len > SPRD_TX_FIFO_FULL ?
 323		SPRD_TX_FIFO_FULL : sp->tx_dma.trans_len;
 324	int ret;
 325	struct dma_slave_config cfg = {
 326		.dst_addr = port->mapbase + SPRD_TXD,
 327		.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
 328		.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
 329		.src_maxburst = burst,
 330	};
 331
 332	ret = dmaengine_slave_config(sp->tx_dma.chn, &cfg);
 333	if (ret < 0)
 334		return ret;
 335
 336	return sprd_uart_dma_submit(port, &sp->tx_dma, sp->tx_dma.trans_len,
 337				    DMA_MEM_TO_DEV, sprd_complete_tx_dma);
 338}
 339
 340static void sprd_start_tx_dma(struct uart_port *port)
 341{
 342	struct sprd_uart_port *sp =
 343		container_of(port, struct sprd_uart_port, port);
 344	struct tty_port *tport = &port->state->port;
 345
 346	if (port->x_char) {
 347		serial_out(port, SPRD_TXD, port->x_char);
 348		port->icount.tx++;
 349		port->x_char = 0;
 350		return;
 351	}
 352
 353	if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) {
 354		sprd_stop_tx_dma(port);
 355		return;
 356	}
 357
 358	if (sp->tx_dma.trans_len)
 359		return;
 360
 361	if (sprd_tx_buf_remap(port) || sprd_tx_dma_config(port))
 362		sp->tx_dma.trans_len = 0;
 363}
 364
 365static void sprd_rx_full_thld(struct uart_port *port, u32 thld)
 366{
 367	u32 val = serial_in(port, SPRD_CTL2);
 368
 369	val &= ~THLD_RX_FULL_MASK;
 370	val |= thld & THLD_RX_FULL_MASK;
 371	serial_out(port, SPRD_CTL2, val);
 372}
 373
 374static int sprd_rx_alloc_buf(struct sprd_uart_port *sp)
 375{
 376	sp->rx_dma.virt = dma_alloc_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
 377					     &sp->rx_dma.phys_addr, GFP_KERNEL);
 378	if (!sp->rx_dma.virt)
 379		return -ENOMEM;
 380
 381	return 0;
 382}
 383
 384static void sprd_rx_free_buf(struct sprd_uart_port *sp)
 385{
 386	if (sp->rx_dma.virt)
 387		dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
 388				  sp->rx_dma.virt, sp->rx_dma.phys_addr);
 389	sp->rx_dma.virt = NULL;
 390}
 391
 392static int sprd_rx_dma_config(struct uart_port *port, u32 burst)
 393{
 394	struct sprd_uart_port *sp =
 395		container_of(port, struct sprd_uart_port, port);
 396	struct dma_slave_config cfg = {
 397		.src_addr = port->mapbase + SPRD_RXD,
 398		.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
 399		.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
 400		.src_maxburst = burst,
 401	};
 402
 403	return dmaengine_slave_config(sp->rx_dma.chn, &cfg);
 404}
 405
 406static void sprd_uart_dma_rx(struct uart_port *port)
 407{
 408	struct sprd_uart_port *sp =
 409		container_of(port, struct sprd_uart_port, port);
 410	struct tty_port *tty = &port->state->port;
 411
 412	port->icount.rx += sp->rx_dma.trans_len;
 413	tty_insert_flip_string(tty, sp->rx_buf_tail, sp->rx_dma.trans_len);
 414	tty_flip_buffer_push(tty);
 415}
 416
 417static void sprd_uart_dma_irq(struct uart_port *port)
 418{
 419	struct sprd_uart_port *sp =
 420		container_of(port, struct sprd_uart_port, port);
 421	struct dma_tx_state state;
 422	enum dma_status status;
 423
 424	status = dmaengine_tx_status(sp->rx_dma.chn,
 425				     sp->rx_dma.cookie, &state);
 426	if (status == DMA_ERROR)
 427		sprd_stop_rx(port);
 428
 429	if (!state.residue && sp->pos == sp->rx_dma.phys_addr)
 430		return;
 431
 432	if (!state.residue) {
 433		sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
 434			sp->rx_dma.phys_addr - sp->pos;
 435		sp->pos = sp->rx_dma.phys_addr;
 436	} else {
 437		sp->rx_dma.trans_len = state.residue - sp->pos;
 438		sp->pos = state.residue;
 439	}
 440
 441	sprd_uart_dma_rx(port);
 442	sp->rx_buf_tail += sp->rx_dma.trans_len;
 443}
 444
 445static void sprd_complete_rx_dma(void *data)
 446{
 447	struct uart_port *port = (struct uart_port *)data;
 448	struct sprd_uart_port *sp =
 449		container_of(port, struct sprd_uart_port, port);
 450	struct dma_tx_state state;
 451	enum dma_status status;
 452	unsigned long flags;
 453
 454	uart_port_lock_irqsave(port, &flags);
 455
 456	status = dmaengine_tx_status(sp->rx_dma.chn,
 457				     sp->rx_dma.cookie, &state);
 458	if (status != DMA_COMPLETE) {
 459		sprd_stop_rx(port);
 460		uart_port_unlock_irqrestore(port, flags);
 461		return;
 462	}
 463
 464	if (sp->pos != sp->rx_dma.phys_addr) {
 465		sp->rx_dma.trans_len =  SPRD_UART_RX_SIZE +
 466			sp->rx_dma.phys_addr - sp->pos;
 467		sprd_uart_dma_rx(port);
 468		sp->rx_buf_tail += sp->rx_dma.trans_len;
 469	}
 470
 471	if (sprd_start_dma_rx(port))
 472		sprd_stop_rx(port);
 473
 474	uart_port_unlock_irqrestore(port, flags);
 475}
 476
 477static int sprd_start_dma_rx(struct uart_port *port)
 478{
 479	struct sprd_uart_port *sp =
 480		container_of(port, struct sprd_uart_port, port);
 481	int ret;
 482
 483	if (!sp->rx_dma.enable)
 484		return 0;
 485
 486	sp->pos = sp->rx_dma.phys_addr;
 487	sp->rx_buf_tail = sp->rx_dma.virt;
 488	sprd_rx_full_thld(port, SPRD_RX_FIFO_FULL);
 489	ret = sprd_rx_dma_config(port, SPRD_RX_DMA_STEP);
 490	if (ret)
 491		return ret;
 492
 493	return sprd_uart_dma_submit(port, &sp->rx_dma, SPRD_UART_RX_SIZE,
 494				    DMA_DEV_TO_MEM, sprd_complete_rx_dma);
 495}
 496
 497static void sprd_release_dma(struct uart_port *port)
 498{
 499	struct sprd_uart_port *sp =
 500		container_of(port, struct sprd_uart_port, port);
 501
 502	sprd_uart_dma_enable(port, false);
 503
 504	if (sp->rx_dma.enable)
 505		dma_release_channel(sp->rx_dma.chn);
 506
 507	if (sp->tx_dma.enable)
 508		dma_release_channel(sp->tx_dma.chn);
 509
 510	sp->tx_dma.enable = false;
 511	sp->rx_dma.enable = false;
 512}
 513
 514static void sprd_request_dma(struct uart_port *port)
 515{
 516	struct sprd_uart_port *sp =
 517		container_of(port, struct sprd_uart_port, port);
 518
 519	sp->tx_dma.enable = true;
 520	sp->rx_dma.enable = true;
 521
 522	sp->tx_dma.chn = dma_request_chan(port->dev, "tx");
 523	if (IS_ERR(sp->tx_dma.chn)) {
 524		dev_err(port->dev, "request TX DMA channel failed, ret = %ld\n",
 525			PTR_ERR(sp->tx_dma.chn));
 526		sp->tx_dma.enable = false;
 527	}
 528
 529	sp->rx_dma.chn = dma_request_chan(port->dev, "rx");
 530	if (IS_ERR(sp->rx_dma.chn)) {
 531		dev_err(port->dev, "request RX DMA channel failed, ret = %ld\n",
 532			PTR_ERR(sp->rx_dma.chn));
 533		sp->rx_dma.enable = false;
 534	}
 535}
 536
 537static void sprd_stop_tx(struct uart_port *port)
 538{
 539	struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
 540						 port);
 541	unsigned int ien, iclr;
 542
 543	if (sp->tx_dma.enable) {
 544		sprd_stop_tx_dma(port);
 545		return;
 546	}
 547
 548	iclr = serial_in(port, SPRD_ICLR);
 549	ien = serial_in(port, SPRD_IEN);
 550
 551	iclr |= SPRD_IEN_TX_EMPTY;
 552	ien &= ~SPRD_IEN_TX_EMPTY;
 553
 554	serial_out(port, SPRD_IEN, ien);
 555	serial_out(port, SPRD_ICLR, iclr);
 556}
 557
 558static void sprd_start_tx(struct uart_port *port)
 559{
 560	struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
 561						 port);
 562	unsigned int ien;
 563
 564	if (sp->tx_dma.enable) {
 565		sprd_start_tx_dma(port);
 566		return;
 567	}
 568
 569	ien = serial_in(port, SPRD_IEN);
 570	if (!(ien & SPRD_IEN_TX_EMPTY)) {
 571		ien |= SPRD_IEN_TX_EMPTY;
 572		serial_out(port, SPRD_IEN, ien);
 573	}
 574}
 575
 576/* The Sprd serial does not support this function. */
 577static void sprd_break_ctl(struct uart_port *port, int break_state)
 578{
 579	/* nothing to do */
 580}
 581
 582static int handle_lsr_errors(struct uart_port *port,
 583			     u8 *flag,
 584			     unsigned int *lsr)
 585{
 586	int ret = 0;
 587
 588	/* statistics */
 589	if (*lsr & SPRD_LSR_BI) {
 590		*lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
 591		port->icount.brk++;
 592		ret = uart_handle_break(port);
 593		if (ret)
 594			return ret;
 595	} else if (*lsr & SPRD_LSR_PE)
 596		port->icount.parity++;
 597	else if (*lsr & SPRD_LSR_FE)
 598		port->icount.frame++;
 599	if (*lsr & SPRD_LSR_OE)
 600		port->icount.overrun++;
 601
 602	/* mask off conditions which should be ignored */
 603	*lsr &= port->read_status_mask;
 604	if (*lsr & SPRD_LSR_BI)
 605		*flag = TTY_BREAK;
 606	else if (*lsr & SPRD_LSR_PE)
 607		*flag = TTY_PARITY;
 608	else if (*lsr & SPRD_LSR_FE)
 609		*flag = TTY_FRAME;
 610
 611	return ret;
 612}
 613
 614static inline void sprd_rx(struct uart_port *port)
 615{
 616	struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
 617						 port);
 618	struct tty_port *tty = &port->state->port;
 619	unsigned int lsr, max_count = SPRD_TIMEOUT;
 620	u8 ch, flag;
 621
 622	if (sp->rx_dma.enable) {
 623		sprd_uart_dma_irq(port);
 624		return;
 625	}
 626
 627	while ((serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK) &&
 628	       max_count--) {
 629		lsr = serial_in(port, SPRD_LSR);
 630		ch = serial_in(port, SPRD_RXD);
 631		flag = TTY_NORMAL;
 632		port->icount.rx++;
 633
 634		if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
 635			   SPRD_LSR_FE | SPRD_LSR_OE))
 636			if (handle_lsr_errors(port, &flag, &lsr))
 637				continue;
 638		if (uart_handle_sysrq_char(port, ch))
 639			continue;
 640
 641		uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
 642	}
 643
 644	tty_flip_buffer_push(tty);
 645}
 646
 647static inline void sprd_tx(struct uart_port *port)
 648{
 649	u8 ch;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 650
 651	uart_port_tx_limited(port, ch, THLD_TX_EMPTY,
 652		true,
 653		serial_out(port, SPRD_TXD, ch),
 654		({}));
 655}
 656
 657/* this handles the interrupt from one port */
 658static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
 659{
 660	struct uart_port *port = dev_id;
 661	unsigned int ims;
 662	struct sprd_uart_port *sp =
 663		container_of(port, struct sprd_uart_port, port);
 664
 665	uart_port_lock(port);
 666
 667	ims = serial_in(port, SPRD_IMSR);
 668
 669	if (!ims) {
 670		uart_port_unlock(port);
 671		return IRQ_NONE;
 672	}
 673
 674	if (ims & sp->pdata->timeout_imsr)
 675		serial_out(port, SPRD_ICLR, sp->pdata->timeout_iclr);
 676
 677	if (ims & SPRD_IMSR_BREAK_DETECT)
 678		serial_out(port, SPRD_ICLR, SPRD_IMSR_BREAK_DETECT);
 679
 680	if (ims & (SPRD_IMSR_RX_FIFO_FULL | SPRD_IMSR_BREAK_DETECT |
 681		   sp->pdata->timeout_imsr))
 682		sprd_rx(port);
 683
 684	if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
 685		sprd_tx(port);
 686
 687	uart_port_unlock(port);
 688
 689	return IRQ_HANDLED;
 690}
 691
 692static void sprd_uart_dma_startup(struct uart_port *port,
 693				  struct sprd_uart_port *sp)
 694{
 695	int ret;
 696
 697	sprd_request_dma(port);
 698	if (!(sp->rx_dma.enable || sp->tx_dma.enable))
 699		return;
 700
 701	ret = sprd_start_dma_rx(port);
 702	if (ret) {
 703		sp->rx_dma.enable = false;
 704		dma_release_channel(sp->rx_dma.chn);
 705		dev_warn(port->dev, "fail to start RX dma mode\n");
 706	}
 707
 708	sprd_uart_dma_enable(port, true);
 709}
 710
 711static int sprd_startup(struct uart_port *port)
 712{
 713	int ret = 0;
 714	unsigned int ien, fc;
 715	unsigned int timeout;
 716	struct sprd_uart_port *sp;
 717	unsigned long flags;
 718
 719	serial_out(port, SPRD_CTL2,
 720		   THLD_TX_EMPTY << THLD_TX_EMPTY_SHIFT | THLD_RX_FULL);
 721
 722	/* clear rx fifo */
 723	timeout = SPRD_TIMEOUT;
 724	while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)
 725		serial_in(port, SPRD_RXD);
 726
 727	/* clear tx fifo */
 728	timeout = SPRD_TIMEOUT;
 729	while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
 730		cpu_relax();
 731
 732	/* clear interrupt */
 733	serial_out(port, SPRD_IEN, 0);
 734	serial_out(port, SPRD_ICLR, ~0);
 735
 736	/* allocate irq */
 737	sp = container_of(port, struct sprd_uart_port, port);
 738	snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
 739
 740	sprd_uart_dma_startup(port, sp);
 741
 742	ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
 743			       IRQF_SHARED, sp->name, port);
 744	if (ret) {
 745		dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
 746			port->irq, ret);
 747		return ret;
 748	}
 749	fc = serial_in(port, SPRD_CTL1);
 750	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
 751	serial_out(port, SPRD_CTL1, fc);
 752
 753	/* enable interrupt */
 754	uart_port_lock_irqsave(port, &flags);
 755	ien = serial_in(port, SPRD_IEN);
 756	ien |= SPRD_IEN_BREAK_DETECT | sp->pdata->timeout_ien;
 757	if (!sp->rx_dma.enable)
 758		ien |= SPRD_IEN_RX_FULL;
 759	serial_out(port, SPRD_IEN, ien);
 760	uart_port_unlock_irqrestore(port, flags);
 761
 762	return 0;
 763}
 764
 765static void sprd_shutdown(struct uart_port *port)
 766{
 767	sprd_release_dma(port);
 768	serial_out(port, SPRD_IEN, 0);
 769	serial_out(port, SPRD_ICLR, ~0);
 770	devm_free_irq(port->dev, port->irq, port);
 771}
 772
 773static void sprd_set_termios(struct uart_port *port, struct ktermios *termios,
 774		             const struct ktermios *old)
 
 775{
 776	unsigned int baud, quot;
 777	unsigned int lcr = 0, fc;
 778	unsigned long flags;
 779
 780	/* ask the core to calculate the divisor for us */
 781	baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
 782
 783	quot = port->uartclk / baud;
 784
 785	/* set data length */
 786	switch (termios->c_cflag & CSIZE) {
 787	case CS5:
 788		lcr |= SPRD_LCR_DATA_LEN5;
 789		break;
 790	case CS6:
 791		lcr |= SPRD_LCR_DATA_LEN6;
 792		break;
 793	case CS7:
 794		lcr |= SPRD_LCR_DATA_LEN7;
 795		break;
 796	case CS8:
 797	default:
 798		lcr |= SPRD_LCR_DATA_LEN8;
 799		break;
 800	}
 801
 802	/* calculate stop bits */
 803	lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
 804	if (termios->c_cflag & CSTOPB)
 805		lcr |= SPRD_LCR_STOP_2BIT;
 806	else
 807		lcr |= SPRD_LCR_STOP_1BIT;
 808
 809	/* calculate parity */
 810	lcr &= ~SPRD_LCR_PARITY;
 811	termios->c_cflag &= ~CMSPAR;	/* no support mark/space */
 812	if (termios->c_cflag & PARENB) {
 813		lcr |= SPRD_LCR_PARITY_EN;
 814		if (termios->c_cflag & PARODD)
 815			lcr |= SPRD_LCR_ODD_PAR;
 816		else
 817			lcr |= SPRD_LCR_EVEN_PAR;
 818	}
 819
 820	uart_port_lock_irqsave(port, &flags);
 821
 822	/* update the per-port timeout */
 823	uart_update_timeout(port, termios->c_cflag, baud);
 824
 825	port->read_status_mask = SPRD_LSR_OE;
 826	if (termios->c_iflag & INPCK)
 827		port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
 828	if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
 829		port->read_status_mask |= SPRD_LSR_BI;
 830
 831	/* characters to ignore */
 832	port->ignore_status_mask = 0;
 833	if (termios->c_iflag & IGNPAR)
 834		port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
 835	if (termios->c_iflag & IGNBRK) {
 836		port->ignore_status_mask |= SPRD_LSR_BI;
 837		/*
 838		 * If we're ignoring parity and break indicators,
 839		 * ignore overruns too (for real raw support).
 840		 */
 841		if (termios->c_iflag & IGNPAR)
 842			port->ignore_status_mask |= SPRD_LSR_OE;
 843	}
 844
 845	/* flow control */
 846	fc = serial_in(port, SPRD_CTL1);
 847	fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
 848	if (termios->c_cflag & CRTSCTS) {
 849		fc |= RX_HW_FLOW_CTL_THLD;
 850		fc |= RX_HW_FLOW_CTL_EN;
 851		fc |= TX_HW_FLOW_CTL_EN;
 852	}
 853
 854	/* clock divider bit0~bit15 */
 855	serial_out(port, SPRD_CLKD0, quot & SPRD_CLKD0_MASK);
 856
 857	/* clock divider bit16~bit20 */
 858	serial_out(port, SPRD_CLKD1,
 859		   (quot & SPRD_CLKD1_MASK) >> SPRD_CLKD1_SHIFT);
 860	serial_out(port, SPRD_LCR, lcr);
 861	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
 862	serial_out(port, SPRD_CTL1, fc);
 863
 864	uart_port_unlock_irqrestore(port, flags);
 865
 866	/* Don't rewrite B0 */
 867	if (tty_termios_baud_rate(termios))
 868		tty_termios_encode_baud_rate(termios, baud, baud);
 869}
 870
 871static const char *sprd_type(struct uart_port *port)
 872{
 873	return "SPX";
 874}
 875
 876static void sprd_release_port(struct uart_port *port)
 877{
 878	/* nothing to do */
 879}
 880
 881static int sprd_request_port(struct uart_port *port)
 882{
 883	return 0;
 884}
 885
 886static void sprd_config_port(struct uart_port *port, int flags)
 887{
 888	if (flags & UART_CONFIG_TYPE)
 889		port->type = PORT_SPRD;
 890}
 891
 892static int sprd_verify_port(struct uart_port *port, struct serial_struct *ser)
 
 893{
 894	if (ser->type != PORT_SPRD)
 895		return -EINVAL;
 896	if (port->irq != ser->irq)
 897		return -EINVAL;
 898	if (port->iotype != ser->io_type)
 899		return -EINVAL;
 900	return 0;
 901}
 902
 903static void sprd_pm(struct uart_port *port, unsigned int state,
 904		unsigned int oldstate)
 905{
 906	struct sprd_uart_port *sup =
 907		container_of(port, struct sprd_uart_port, port);
 908
 909	switch (state) {
 910	case UART_PM_STATE_ON:
 911		clk_prepare_enable(sup->clk);
 912		break;
 913	case UART_PM_STATE_OFF:
 914		clk_disable_unprepare(sup->clk);
 915		break;
 916	}
 917}
 918
 919#ifdef CONFIG_CONSOLE_POLL
 920static int sprd_poll_init(struct uart_port *port)
 921{
 922	if (port->state->pm_state != UART_PM_STATE_ON) {
 923		sprd_pm(port, UART_PM_STATE_ON, 0);
 924		port->state->pm_state = UART_PM_STATE_ON;
 925	}
 926
 927	return 0;
 928}
 929
 930static int sprd_poll_get_char(struct uart_port *port)
 931{
 932	while (!(serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK))
 933		cpu_relax();
 934
 935	return serial_in(port, SPRD_RXD);
 936}
 937
 938static void sprd_poll_put_char(struct uart_port *port, unsigned char ch)
 939{
 940	while (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
 941		cpu_relax();
 942
 943	serial_out(port, SPRD_TXD, ch);
 944}
 945#endif
 946
 947static const struct uart_ops serial_sprd_ops = {
 948	.tx_empty = sprd_tx_empty,
 949	.get_mctrl = sprd_get_mctrl,
 950	.set_mctrl = sprd_set_mctrl,
 951	.stop_tx = sprd_stop_tx,
 952	.start_tx = sprd_start_tx,
 953	.stop_rx = sprd_stop_rx,
 954	.break_ctl = sprd_break_ctl,
 955	.startup = sprd_startup,
 956	.shutdown = sprd_shutdown,
 957	.set_termios = sprd_set_termios,
 958	.type = sprd_type,
 959	.release_port = sprd_release_port,
 960	.request_port = sprd_request_port,
 961	.config_port = sprd_config_port,
 962	.verify_port = sprd_verify_port,
 963	.pm = sprd_pm,
 964#ifdef CONFIG_CONSOLE_POLL
 965	.poll_init	= sprd_poll_init,
 966	.poll_get_char	= sprd_poll_get_char,
 967	.poll_put_char	= sprd_poll_put_char,
 968#endif
 969};
 970
 971#ifdef CONFIG_SERIAL_SPRD_CONSOLE
 972static void wait_for_xmitr(struct uart_port *port)
 973{
 974	unsigned int status, tmout = 10000;
 975
 976	/* wait up to 10ms for the character(s) to be sent */
 977	do {
 978		status = serial_in(port, SPRD_STS1);
 979		if (--tmout == 0)
 980			break;
 981		udelay(1);
 982	} while (status & SPRD_TX_FIFO_CNT_MASK);
 983}
 984
 985static void sprd_console_putchar(struct uart_port *port, unsigned char ch)
 986{
 987	wait_for_xmitr(port);
 988	serial_out(port, SPRD_TXD, ch);
 989}
 990
 991static void sprd_console_write(struct console *co, const char *s,
 992			       unsigned int count)
 993{
 994	struct uart_port *port = &sprd_port[co->index]->port;
 995	int locked = 1;
 996	unsigned long flags;
 997
 998	if (port->sysrq)
 999		locked = 0;
1000	else if (oops_in_progress)
1001		locked = uart_port_trylock_irqsave(port, &flags);
1002	else
1003		uart_port_lock_irqsave(port, &flags);
1004
1005	uart_console_write(port, s, count, sprd_console_putchar);
1006
1007	/* wait for transmitter to become empty */
1008	wait_for_xmitr(port);
1009
1010	if (locked)
1011		uart_port_unlock_irqrestore(port, flags);
1012}
1013
1014static int sprd_console_setup(struct console *co, char *options)
1015{
1016	struct sprd_uart_port *sprd_uart_port;
1017	int baud = 115200;
1018	int bits = 8;
1019	int parity = 'n';
1020	int flow = 'n';
1021
1022	if (co->index >= UART_NR_MAX || co->index < 0)
1023		co->index = 0;
1024
1025	sprd_uart_port = sprd_port[co->index];
1026	if (!sprd_uart_port || !sprd_uart_port->port.membase) {
1027		pr_info("serial port %d not yet initialized\n", co->index);
1028		return -ENODEV;
1029	}
1030
1031	if (options)
1032		uart_parse_options(options, &baud, &parity, &bits, &flow);
1033
1034	return uart_set_options(&sprd_uart_port->port, co, baud,
1035				parity, bits, flow);
1036}
1037
1038static struct uart_driver sprd_uart_driver;
1039static struct console sprd_console = {
1040	.name = SPRD_TTY_NAME,
1041	.write = sprd_console_write,
1042	.device = uart_console_device,
1043	.setup = sprd_console_setup,
1044	.flags = CON_PRINTBUFFER,
1045	.index = -1,
1046	.data = &sprd_uart_driver,
1047};
1048
1049static int __init sprd_serial_console_init(void)
1050{
1051	register_console(&sprd_console);
1052	return 0;
1053}
1054console_initcall(sprd_serial_console_init);
1055
1056#define SPRD_CONSOLE	(&sprd_console)
1057
1058/* Support for earlycon */
1059static void sprd_putc(struct uart_port *port, unsigned char c)
1060{
1061	unsigned int timeout = SPRD_TIMEOUT;
1062
1063	while (timeout-- &&
1064	       !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
1065		cpu_relax();
1066
1067	writeb(c, port->membase + SPRD_TXD);
1068}
1069
1070static void sprd_early_write(struct console *con, const char *s, unsigned int n)
 
1071{
1072	struct earlycon_device *dev = con->data;
1073
1074	uart_console_write(&dev->port, s, n, sprd_putc);
1075}
1076
1077static int __init sprd_early_console_setup(struct earlycon_device *device,
1078					   const char *opt)
 
1079{
1080	if (!device->port.membase)
1081		return -ENODEV;
1082
1083	device->con->write = sprd_early_write;
1084	return 0;
1085}
1086OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
1087		    sprd_early_console_setup);
1088
1089#else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1090#define SPRD_CONSOLE		NULL
1091#endif
1092
1093static struct uart_driver sprd_uart_driver = {
1094	.owner = THIS_MODULE,
1095	.driver_name = "sprd_serial",
1096	.dev_name = SPRD_TTY_NAME,
1097	.major = 0,
1098	.minor = 0,
1099	.nr = UART_NR_MAX,
1100	.cons = SPRD_CONSOLE,
1101};
1102
1103static void sprd_remove(struct platform_device *dev)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1104{
1105	struct sprd_uart_port *sup = platform_get_drvdata(dev);
1106
1107	if (sup) {
1108		uart_remove_one_port(&sprd_uart_driver, &sup->port);
1109		sprd_port[sup->port.line] = NULL;
1110		sprd_rx_free_buf(sup);
1111		sprd_ports_num--;
1112	}
1113
1114	if (!sprd_ports_num)
1115		uart_unregister_driver(&sprd_uart_driver);
1116}
1117
1118static bool sprd_uart_is_console(struct uart_port *uport)
1119{
1120	struct console *cons = sprd_uart_driver.cons;
1121
1122	if ((cons && cons->index >= 0 && cons->index == uport->line) ||
1123	    of_console_check(uport->dev->of_node, SPRD_TTY_NAME, uport->line))
1124		return true;
1125
1126	return false;
1127}
1128
1129static int sprd_clk_init(struct uart_port *uport)
1130{
1131	struct clk *clk_uart, *clk_parent;
1132	struct sprd_uart_port *u = container_of(uport, struct sprd_uart_port, port);
1133
1134	clk_uart = devm_clk_get(uport->dev, "uart");
1135	if (IS_ERR(clk_uart)) {
1136		dev_warn(uport->dev, "uart%d can't get uart clock\n",
1137			 uport->line);
1138		clk_uart = NULL;
1139	}
1140
1141	clk_parent = devm_clk_get(uport->dev, "source");
1142	if (IS_ERR(clk_parent)) {
1143		dev_warn(uport->dev, "uart%d can't get source clock\n",
1144			 uport->line);
1145		clk_parent = NULL;
1146	}
1147
1148	if (!clk_uart || clk_set_parent(clk_uart, clk_parent))
1149		uport->uartclk = SPRD_DEFAULT_SOURCE_CLK;
1150	else
1151		uport->uartclk = clk_get_rate(clk_uart);
1152
1153	u->clk = devm_clk_get(uport->dev, "enable");
1154	if (IS_ERR(u->clk)) {
1155		if (PTR_ERR(u->clk) == -EPROBE_DEFER)
1156			return -EPROBE_DEFER;
1157
1158		dev_warn(uport->dev, "uart%d can't get enable clock\n",
1159			uport->line);
1160
1161		/* To keep console alive even if the error occurred */
1162		if (!sprd_uart_is_console(uport))
1163			return PTR_ERR(u->clk);
1164
1165		u->clk = NULL;
1166	}
1167
1168	return 0;
1169}
1170
1171static int sprd_probe(struct platform_device *pdev)
1172{
1173	struct resource *res;
1174	struct uart_port *up;
1175	struct sprd_uart_port *sport;
1176	int irq;
1177	int index;
1178	int ret;
1179
1180	index = of_alias_get_id(pdev->dev.of_node, "serial");
1181	if (index < 0 || index >= UART_NR_MAX) {
1182		dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index);
1183		return -EINVAL;
1184	}
 
 
 
1185
1186	sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
1187	if (!sport)
 
1188		return -ENOMEM;
1189
1190	up = &sport->port;
1191	up->dev = &pdev->dev;
1192	up->line = index;
1193	up->type = PORT_SPRD;
1194	up->iotype = UPIO_MEM;
1195	up->uartclk = SPRD_DEF_RATE;
1196	up->fifosize = SPRD_FIFO_SIZE;
1197	up->ops = &serial_sprd_ops;
1198	up->flags = UPF_BOOT_AUTOCONF;
1199	up->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE);
1200
1201	ret = sprd_clk_init(up);
1202	if (ret)
1203		return ret;
1204
1205	up->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
 
 
 
 
 
 
1206	if (IS_ERR(up->membase))
1207		return PTR_ERR(up->membase);
1208
1209	up->mapbase = res->start;
1210
1211	sport->pdata = of_device_get_match_data(&pdev->dev);
1212	if (!sport->pdata) {
1213		dev_err(&pdev->dev, "get match data failed!\n");
1214		return -EINVAL;
1215	}
1216
1217	irq = platform_get_irq(pdev, 0);
1218	if (irq < 0)
 
1219		return irq;
 
1220	up->irq = irq;
1221
1222	/*
1223	 * Allocate one dma buffer to prepare for receive transfer, in case
1224	 * memory allocation failure at runtime.
1225	 */
1226	ret = sprd_rx_alloc_buf(sport);
1227	if (ret)
1228		return ret;
1229
1230	if (!sprd_ports_num) {
1231		ret = uart_register_driver(&sprd_uart_driver);
1232		if (ret < 0) {
1233			pr_err("Failed to register SPRD-UART driver\n");
1234			goto free_rx_buf;
1235		}
1236	}
1237
1238	sprd_ports_num++;
1239	sprd_port[index] = sport;
1240
1241	ret = uart_add_one_port(&sprd_uart_driver, up);
1242	if (ret)
1243		goto clean_port;
 
 
1244
1245	platform_set_drvdata(pdev, up);
1246
1247	return 0;
1248
1249clean_port:
1250	sprd_port[index] = NULL;
1251	if (--sprd_ports_num == 0)
1252		uart_unregister_driver(&sprd_uart_driver);
1253free_rx_buf:
1254	sprd_rx_free_buf(sport);
1255	return ret;
1256}
1257
1258#ifdef CONFIG_PM_SLEEP
1259static int sprd_suspend(struct device *dev)
1260{
1261	struct sprd_uart_port *sup = dev_get_drvdata(dev);
1262
1263	uart_suspend_port(&sprd_uart_driver, &sup->port);
1264
1265	return 0;
1266}
1267
1268static int sprd_resume(struct device *dev)
1269{
1270	struct sprd_uart_port *sup = dev_get_drvdata(dev);
1271
1272	uart_resume_port(&sprd_uart_driver, &sup->port);
1273
1274	return 0;
1275}
1276#endif
1277
1278static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
1279
1280static const struct of_device_id serial_ids[] = {
1281	{.compatible = "sprd,sc9836-uart", .data = &sc9836_data},
1282	{.compatible = "sprd,sc9632-uart", .data = &sc9632_data},
1283	{}
1284};
1285MODULE_DEVICE_TABLE(of, serial_ids);
1286
1287static struct platform_driver sprd_platform_driver = {
1288	.probe		= sprd_probe,
1289	.remove		= sprd_remove,
1290	.driver		= {
1291		.name	= "sprd_serial",
1292		.of_match_table = serial_ids,
1293		.pm	= &sprd_pm_ops,
1294	},
1295};
1296
1297module_platform_driver(sprd_platform_driver);
1298
1299MODULE_LICENSE("GPL v2");
1300MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");