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1/*
2 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
3 *
4 * Copyright (C) 2011-2013 ASIX
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/module.h>
21#include <linux/etherdevice.h>
22#include <linux/mii.h>
23#include <linux/usb.h>
24#include <linux/crc32.h>
25#include <linux/usb/usbnet.h>
26#include <uapi/linux/mdio.h>
27#include <linux/mdio.h>
28
29#define AX88179_PHY_ID 0x03
30#define AX_EEPROM_LEN 0x100
31#define AX88179_EEPROM_MAGIC 0x17900b95
32#define AX_MCAST_FLTSIZE 8
33#define AX_MAX_MCAST 64
34#define AX_INT_PPLS_LINK ((u32)BIT(16))
35#define AX_RXHDR_L4_TYPE_MASK 0x1c
36#define AX_RXHDR_L4_TYPE_UDP 4
37#define AX_RXHDR_L4_TYPE_TCP 16
38#define AX_RXHDR_L3CSUM_ERR 2
39#define AX_RXHDR_L4CSUM_ERR 1
40#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
41#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
42#define AX_ACCESS_MAC 0x01
43#define AX_ACCESS_PHY 0x02
44#define AX_ACCESS_EEPROM 0x04
45#define AX_ACCESS_EFUS 0x05
46#define AX_PAUSE_WATERLVL_HIGH 0x54
47#define AX_PAUSE_WATERLVL_LOW 0x55
48
49#define PHYSICAL_LINK_STATUS 0x02
50 #define AX_USB_SS 0x04
51 #define AX_USB_HS 0x02
52
53#define GENERAL_STATUS 0x03
54/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
55 #define AX_SECLD 0x04
56
57#define AX_SROM_ADDR 0x07
58#define AX_SROM_CMD 0x0a
59 #define EEP_RD 0x04
60 #define EEP_BUSY 0x10
61
62#define AX_SROM_DATA_LOW 0x08
63#define AX_SROM_DATA_HIGH 0x09
64
65#define AX_RX_CTL 0x0b
66 #define AX_RX_CTL_DROPCRCERR 0x0100
67 #define AX_RX_CTL_IPE 0x0200
68 #define AX_RX_CTL_START 0x0080
69 #define AX_RX_CTL_AP 0x0020
70 #define AX_RX_CTL_AM 0x0010
71 #define AX_RX_CTL_AB 0x0008
72 #define AX_RX_CTL_AMALL 0x0002
73 #define AX_RX_CTL_PRO 0x0001
74 #define AX_RX_CTL_STOP 0x0000
75
76#define AX_NODE_ID 0x10
77#define AX_MULFLTARY 0x16
78
79#define AX_MEDIUM_STATUS_MODE 0x22
80 #define AX_MEDIUM_GIGAMODE 0x01
81 #define AX_MEDIUM_FULL_DUPLEX 0x02
82 #define AX_MEDIUM_EN_125MHZ 0x08
83 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
84 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
85 #define AX_MEDIUM_RECEIVE_EN 0x100
86 #define AX_MEDIUM_PS 0x200
87 #define AX_MEDIUM_JUMBO_EN 0x8040
88
89#define AX_MONITOR_MOD 0x24
90 #define AX_MONITOR_MODE_RWLC 0x02
91 #define AX_MONITOR_MODE_RWMP 0x04
92 #define AX_MONITOR_MODE_PMEPOL 0x20
93 #define AX_MONITOR_MODE_PMETYPE 0x40
94
95#define AX_GPIO_CTRL 0x25
96 #define AX_GPIO_CTRL_GPIO3EN 0x80
97 #define AX_GPIO_CTRL_GPIO2EN 0x40
98 #define AX_GPIO_CTRL_GPIO1EN 0x20
99
100#define AX_PHYPWR_RSTCTL 0x26
101 #define AX_PHYPWR_RSTCTL_BZ 0x0010
102 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
103 #define AX_PHYPWR_RSTCTL_AT 0x1000
104
105#define AX_RX_BULKIN_QCTRL 0x2e
106#define AX_CLK_SELECT 0x33
107 #define AX_CLK_SELECT_BCS 0x01
108 #define AX_CLK_SELECT_ACS 0x02
109 #define AX_CLK_SELECT_ULR 0x08
110
111#define AX_RXCOE_CTL 0x34
112 #define AX_RXCOE_IP 0x01
113 #define AX_RXCOE_TCP 0x02
114 #define AX_RXCOE_UDP 0x04
115 #define AX_RXCOE_TCPV6 0x20
116 #define AX_RXCOE_UDPV6 0x40
117
118#define AX_TXCOE_CTL 0x35
119 #define AX_TXCOE_IP 0x01
120 #define AX_TXCOE_TCP 0x02
121 #define AX_TXCOE_UDP 0x04
122 #define AX_TXCOE_TCPV6 0x20
123 #define AX_TXCOE_UDPV6 0x40
124
125#define AX_LEDCTRL 0x73
126
127#define GMII_PHY_PHYSR 0x11
128 #define GMII_PHY_PHYSR_SMASK 0xc000
129 #define GMII_PHY_PHYSR_GIGA 0x8000
130 #define GMII_PHY_PHYSR_100 0x4000
131 #define GMII_PHY_PHYSR_FULL 0x2000
132 #define GMII_PHY_PHYSR_LINK 0x400
133
134#define GMII_LED_ACT 0x1a
135 #define GMII_LED_ACTIVE_MASK 0xff8f
136 #define GMII_LED0_ACTIVE BIT(4)
137 #define GMII_LED1_ACTIVE BIT(5)
138 #define GMII_LED2_ACTIVE BIT(6)
139
140#define GMII_LED_LINK 0x1c
141 #define GMII_LED_LINK_MASK 0xf888
142 #define GMII_LED0_LINK_10 BIT(0)
143 #define GMII_LED0_LINK_100 BIT(1)
144 #define GMII_LED0_LINK_1000 BIT(2)
145 #define GMII_LED1_LINK_10 BIT(4)
146 #define GMII_LED1_LINK_100 BIT(5)
147 #define GMII_LED1_LINK_1000 BIT(6)
148 #define GMII_LED2_LINK_10 BIT(8)
149 #define GMII_LED2_LINK_100 BIT(9)
150 #define GMII_LED2_LINK_1000 BIT(10)
151 #define LED0_ACTIVE BIT(0)
152 #define LED0_LINK_10 BIT(1)
153 #define LED0_LINK_100 BIT(2)
154 #define LED0_LINK_1000 BIT(3)
155 #define LED0_FD BIT(4)
156 #define LED0_USB3_MASK 0x001f
157 #define LED1_ACTIVE BIT(5)
158 #define LED1_LINK_10 BIT(6)
159 #define LED1_LINK_100 BIT(7)
160 #define LED1_LINK_1000 BIT(8)
161 #define LED1_FD BIT(9)
162 #define LED1_USB3_MASK 0x03e0
163 #define LED2_ACTIVE BIT(10)
164 #define LED2_LINK_1000 BIT(13)
165 #define LED2_LINK_100 BIT(12)
166 #define LED2_LINK_10 BIT(11)
167 #define LED2_FD BIT(14)
168 #define LED_VALID BIT(15)
169 #define LED2_USB3_MASK 0x7c00
170
171#define GMII_PHYPAGE 0x1e
172#define GMII_PHY_PAGE_SELECT 0x1f
173 #define GMII_PHY_PGSEL_EXT 0x0007
174 #define GMII_PHY_PGSEL_PAGE0 0x0000
175 #define GMII_PHY_PGSEL_PAGE3 0x0003
176 #define GMII_PHY_PGSEL_PAGE5 0x0005
177
178struct ax88179_data {
179 u8 eee_enabled;
180 u8 eee_active;
181 u16 rxctl;
182 u16 reserved;
183};
184
185struct ax88179_int_data {
186 __le32 intdata1;
187 __le32 intdata2;
188};
189
190static const struct {
191 unsigned char ctrl, timer_l, timer_h, size, ifg;
192} AX88179_BULKIN_SIZE[] = {
193 {7, 0x4f, 0, 0x12, 0xff},
194 {7, 0x20, 3, 0x16, 0xff},
195 {7, 0xae, 7, 0x18, 0xff},
196 {7, 0xcc, 0x4c, 0x18, 8},
197};
198
199static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
200 u16 size, void *data, int in_pm)
201{
202 int ret;
203 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
204
205 BUG_ON(!dev);
206
207 if (!in_pm)
208 fn = usbnet_read_cmd;
209 else
210 fn = usbnet_read_cmd_nopm;
211
212 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
213 value, index, data, size);
214
215 if (unlikely(ret < 0))
216 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
217 index, ret);
218
219 return ret;
220}
221
222static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
223 u16 size, void *data, int in_pm)
224{
225 int ret;
226 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
227
228 BUG_ON(!dev);
229
230 if (!in_pm)
231 fn = usbnet_write_cmd;
232 else
233 fn = usbnet_write_cmd_nopm;
234
235 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
236 value, index, data, size);
237
238 if (unlikely(ret < 0))
239 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
240 index, ret);
241
242 return ret;
243}
244
245static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
246 u16 index, u16 size, void *data)
247{
248 u16 buf;
249
250 if (2 == size) {
251 buf = *((u16 *)data);
252 cpu_to_le16s(&buf);
253 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
254 USB_RECIP_DEVICE, value, index, &buf,
255 size);
256 } else {
257 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
258 USB_RECIP_DEVICE, value, index, data,
259 size);
260 }
261}
262
263static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
264 u16 index, u16 size, void *data)
265{
266 int ret;
267
268 if (2 == size) {
269 u16 buf;
270 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
271 le16_to_cpus(&buf);
272 *((u16 *)data) = buf;
273 } else if (4 == size) {
274 u32 buf;
275 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
276 le32_to_cpus(&buf);
277 *((u32 *)data) = buf;
278 } else {
279 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
280 }
281
282 return ret;
283}
284
285static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
286 u16 index, u16 size, void *data)
287{
288 int ret;
289
290 if (2 == size) {
291 u16 buf;
292 buf = *((u16 *)data);
293 cpu_to_le16s(&buf);
294 ret = __ax88179_write_cmd(dev, cmd, value, index,
295 size, &buf, 1);
296 } else {
297 ret = __ax88179_write_cmd(dev, cmd, value, index,
298 size, data, 1);
299 }
300
301 return ret;
302}
303
304static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
305 u16 size, void *data)
306{
307 int ret;
308
309 if (2 == size) {
310 u16 buf;
311 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
312 le16_to_cpus(&buf);
313 *((u16 *)data) = buf;
314 } else if (4 == size) {
315 u32 buf;
316 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
317 le32_to_cpus(&buf);
318 *((u32 *)data) = buf;
319 } else {
320 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
321 }
322
323 return ret;
324}
325
326static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
327 u16 size, void *data)
328{
329 int ret;
330
331 if (2 == size) {
332 u16 buf;
333 buf = *((u16 *)data);
334 cpu_to_le16s(&buf);
335 ret = __ax88179_write_cmd(dev, cmd, value, index,
336 size, &buf, 0);
337 } else {
338 ret = __ax88179_write_cmd(dev, cmd, value, index,
339 size, data, 0);
340 }
341
342 return ret;
343}
344
345static void ax88179_status(struct usbnet *dev, struct urb *urb)
346{
347 struct ax88179_int_data *event;
348 u32 link;
349
350 if (urb->actual_length < 8)
351 return;
352
353 event = urb->transfer_buffer;
354 le32_to_cpus((void *)&event->intdata1);
355
356 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
357
358 if (netif_carrier_ok(dev->net) != link) {
359 usbnet_link_change(dev, link, 1);
360 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
361 }
362}
363
364static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
365{
366 struct usbnet *dev = netdev_priv(netdev);
367 u16 res;
368
369 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
370 return res;
371}
372
373static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
374 int val)
375{
376 struct usbnet *dev = netdev_priv(netdev);
377 u16 res = (u16) val;
378
379 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
380}
381
382static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
383 u16 devad)
384{
385 u16 tmp16;
386 int ret;
387
388 tmp16 = devad;
389 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
390 MII_MMD_CTRL, 2, &tmp16);
391
392 tmp16 = prtad;
393 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
394 MII_MMD_DATA, 2, &tmp16);
395
396 tmp16 = devad | MII_MMD_CTRL_NOINCR;
397 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
398 MII_MMD_CTRL, 2, &tmp16);
399
400 return ret;
401}
402
403static int
404ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
405{
406 int ret;
407 u16 tmp16;
408
409 ax88179_phy_mmd_indirect(dev, prtad, devad);
410
411 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
412 MII_MMD_DATA, 2, &tmp16);
413 if (ret < 0)
414 return ret;
415
416 return tmp16;
417}
418
419static int
420ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
421 u16 data)
422{
423 int ret;
424
425 ax88179_phy_mmd_indirect(dev, prtad, devad);
426
427 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
428 MII_MMD_DATA, 2, &data);
429
430 if (ret < 0)
431 return ret;
432
433 return 0;
434}
435
436static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
437{
438 struct usbnet *dev = usb_get_intfdata(intf);
439 u16 tmp16;
440 u8 tmp8;
441
442 usbnet_suspend(intf, message);
443
444 /* Disable RX path */
445 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
446 2, 2, &tmp16);
447 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
448 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
449 2, 2, &tmp16);
450
451 /* Force bulk-in zero length */
452 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
453 2, 2, &tmp16);
454
455 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
456 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
457 2, 2, &tmp16);
458
459 /* change clock */
460 tmp8 = 0;
461 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
462
463 /* Configure RX control register => stop operation */
464 tmp16 = AX_RX_CTL_STOP;
465 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
466
467 return 0;
468}
469
470/* This function is used to enable the autodetach function. */
471/* This function is determined by offset 0x43 of EEPROM */
472static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
473{
474 u16 tmp16;
475 u8 tmp8;
476 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
477 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
478
479 if (!in_pm) {
480 fnr = ax88179_read_cmd;
481 fnw = ax88179_write_cmd;
482 } else {
483 fnr = ax88179_read_cmd_nopm;
484 fnw = ax88179_write_cmd_nopm;
485 }
486
487 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
488 return 0;
489
490 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
491 return 0;
492
493 /* Enable Auto Detach bit */
494 tmp8 = 0;
495 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
496 tmp8 |= AX_CLK_SELECT_ULR;
497 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
498
499 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
500 tmp16 |= AX_PHYPWR_RSTCTL_AT;
501 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
502
503 return 0;
504}
505
506static int ax88179_resume(struct usb_interface *intf)
507{
508 struct usbnet *dev = usb_get_intfdata(intf);
509 u16 tmp16;
510 u8 tmp8;
511
512 usbnet_link_change(dev, 0, 0);
513
514 /* Power up ethernet PHY */
515 tmp16 = 0;
516 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
517 2, 2, &tmp16);
518 udelay(1000);
519
520 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
521 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
522 2, 2, &tmp16);
523 msleep(200);
524
525 /* Ethernet PHY Auto Detach*/
526 ax88179_auto_detach(dev, 1);
527
528 /* Enable clock */
529 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
530 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
531 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
532 msleep(100);
533
534 /* Configure RX control register => start operation */
535 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
536 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
537 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
538
539 return usbnet_resume(intf);
540}
541
542static void
543ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
544{
545 struct usbnet *dev = netdev_priv(net);
546 u8 opt;
547
548 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
549 1, 1, &opt) < 0) {
550 wolinfo->supported = 0;
551 wolinfo->wolopts = 0;
552 return;
553 }
554
555 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
556 wolinfo->wolopts = 0;
557 if (opt & AX_MONITOR_MODE_RWLC)
558 wolinfo->wolopts |= WAKE_PHY;
559 if (opt & AX_MONITOR_MODE_RWMP)
560 wolinfo->wolopts |= WAKE_MAGIC;
561}
562
563static int
564ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
565{
566 struct usbnet *dev = netdev_priv(net);
567 u8 opt = 0;
568
569 if (wolinfo->wolopts & WAKE_PHY)
570 opt |= AX_MONITOR_MODE_RWLC;
571 if (wolinfo->wolopts & WAKE_MAGIC)
572 opt |= AX_MONITOR_MODE_RWMP;
573
574 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
575 1, 1, &opt) < 0)
576 return -EINVAL;
577
578 return 0;
579}
580
581static int ax88179_get_eeprom_len(struct net_device *net)
582{
583 return AX_EEPROM_LEN;
584}
585
586static int
587ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
588 u8 *data)
589{
590 struct usbnet *dev = netdev_priv(net);
591 u16 *eeprom_buff;
592 int first_word, last_word;
593 int i, ret;
594
595 if (eeprom->len == 0)
596 return -EINVAL;
597
598 eeprom->magic = AX88179_EEPROM_MAGIC;
599
600 first_word = eeprom->offset >> 1;
601 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
602 eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
603 GFP_KERNEL);
604 if (!eeprom_buff)
605 return -ENOMEM;
606
607 /* ax88179/178A returns 2 bytes from eeprom on read */
608 for (i = first_word; i <= last_word; i++) {
609 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
610 &eeprom_buff[i - first_word],
611 0);
612 if (ret < 0) {
613 kfree(eeprom_buff);
614 return -EIO;
615 }
616 }
617
618 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
619 kfree(eeprom_buff);
620 return 0;
621}
622
623static int ax88179_get_link_ksettings(struct net_device *net,
624 struct ethtool_link_ksettings *cmd)
625{
626 struct usbnet *dev = netdev_priv(net);
627
628 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
629
630 return 0;
631}
632
633static int ax88179_set_link_ksettings(struct net_device *net,
634 const struct ethtool_link_ksettings *cmd)
635{
636 struct usbnet *dev = netdev_priv(net);
637 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
638}
639
640static int
641ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
642{
643 int val;
644
645 /* Get Supported EEE */
646 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
647 MDIO_MMD_PCS);
648 if (val < 0)
649 return val;
650 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
651
652 /* Get advertisement EEE */
653 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
654 MDIO_MMD_AN);
655 if (val < 0)
656 return val;
657 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
658
659 /* Get LP advertisement EEE */
660 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
661 MDIO_MMD_AN);
662 if (val < 0)
663 return val;
664 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
665
666 return 0;
667}
668
669static int
670ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
671{
672 u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
673
674 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
675 MDIO_MMD_AN, tmp16);
676}
677
678static int ax88179_chk_eee(struct usbnet *dev)
679{
680 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
681 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
682
683 mii_ethtool_gset(&dev->mii, &ecmd);
684
685 if (ecmd.duplex & DUPLEX_FULL) {
686 int eee_lp, eee_cap, eee_adv;
687 u32 lp, cap, adv, supported = 0;
688
689 eee_cap = ax88179_phy_read_mmd_indirect(dev,
690 MDIO_PCS_EEE_ABLE,
691 MDIO_MMD_PCS);
692 if (eee_cap < 0) {
693 priv->eee_active = 0;
694 return false;
695 }
696
697 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
698 if (!cap) {
699 priv->eee_active = 0;
700 return false;
701 }
702
703 eee_lp = ax88179_phy_read_mmd_indirect(dev,
704 MDIO_AN_EEE_LPABLE,
705 MDIO_MMD_AN);
706 if (eee_lp < 0) {
707 priv->eee_active = 0;
708 return false;
709 }
710
711 eee_adv = ax88179_phy_read_mmd_indirect(dev,
712 MDIO_AN_EEE_ADV,
713 MDIO_MMD_AN);
714
715 if (eee_adv < 0) {
716 priv->eee_active = 0;
717 return false;
718 }
719
720 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
721 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
722 supported = (ecmd.speed == SPEED_1000) ?
723 SUPPORTED_1000baseT_Full :
724 SUPPORTED_100baseT_Full;
725
726 if (!(lp & adv & supported)) {
727 priv->eee_active = 0;
728 return false;
729 }
730
731 priv->eee_active = 1;
732 return true;
733 }
734
735 priv->eee_active = 0;
736 return false;
737}
738
739static void ax88179_disable_eee(struct usbnet *dev)
740{
741 u16 tmp16;
742
743 tmp16 = GMII_PHY_PGSEL_PAGE3;
744 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
745 GMII_PHY_PAGE_SELECT, 2, &tmp16);
746
747 tmp16 = 0x3246;
748 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
749 MII_PHYADDR, 2, &tmp16);
750
751 tmp16 = GMII_PHY_PGSEL_PAGE0;
752 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
753 GMII_PHY_PAGE_SELECT, 2, &tmp16);
754}
755
756static void ax88179_enable_eee(struct usbnet *dev)
757{
758 u16 tmp16;
759
760 tmp16 = GMII_PHY_PGSEL_PAGE3;
761 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
762 GMII_PHY_PAGE_SELECT, 2, &tmp16);
763
764 tmp16 = 0x3247;
765 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
766 MII_PHYADDR, 2, &tmp16);
767
768 tmp16 = GMII_PHY_PGSEL_PAGE5;
769 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
770 GMII_PHY_PAGE_SELECT, 2, &tmp16);
771
772 tmp16 = 0x0680;
773 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
774 MII_BMSR, 2, &tmp16);
775
776 tmp16 = GMII_PHY_PGSEL_PAGE0;
777 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
778 GMII_PHY_PAGE_SELECT, 2, &tmp16);
779}
780
781static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
782{
783 struct usbnet *dev = netdev_priv(net);
784 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
785
786 edata->eee_enabled = priv->eee_enabled;
787 edata->eee_active = priv->eee_active;
788
789 return ax88179_ethtool_get_eee(dev, edata);
790}
791
792static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
793{
794 struct usbnet *dev = netdev_priv(net);
795 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
796 int ret = -EOPNOTSUPP;
797
798 priv->eee_enabled = edata->eee_enabled;
799 if (!priv->eee_enabled) {
800 ax88179_disable_eee(dev);
801 } else {
802 priv->eee_enabled = ax88179_chk_eee(dev);
803 if (!priv->eee_enabled)
804 return -EOPNOTSUPP;
805
806 ax88179_enable_eee(dev);
807 }
808
809 ret = ax88179_ethtool_set_eee(dev, edata);
810 if (ret)
811 return ret;
812
813 mii_nway_restart(&dev->mii);
814
815 usbnet_link_change(dev, 0, 0);
816
817 return ret;
818}
819
820static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
821{
822 struct usbnet *dev = netdev_priv(net);
823 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
824}
825
826static const struct ethtool_ops ax88179_ethtool_ops = {
827 .get_link = ethtool_op_get_link,
828 .get_msglevel = usbnet_get_msglevel,
829 .set_msglevel = usbnet_set_msglevel,
830 .get_wol = ax88179_get_wol,
831 .set_wol = ax88179_set_wol,
832 .get_eeprom_len = ax88179_get_eeprom_len,
833 .get_eeprom = ax88179_get_eeprom,
834 .get_eee = ax88179_get_eee,
835 .set_eee = ax88179_set_eee,
836 .nway_reset = usbnet_nway_reset,
837 .get_link_ksettings = ax88179_get_link_ksettings,
838 .set_link_ksettings = ax88179_set_link_ksettings,
839};
840
841static void ax88179_set_multicast(struct net_device *net)
842{
843 struct usbnet *dev = netdev_priv(net);
844 struct ax88179_data *data = (struct ax88179_data *)dev->data;
845 u8 *m_filter = ((u8 *)dev->data) + 12;
846
847 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
848
849 if (net->flags & IFF_PROMISC) {
850 data->rxctl |= AX_RX_CTL_PRO;
851 } else if (net->flags & IFF_ALLMULTI ||
852 netdev_mc_count(net) > AX_MAX_MCAST) {
853 data->rxctl |= AX_RX_CTL_AMALL;
854 } else if (netdev_mc_empty(net)) {
855 /* just broadcast and directed */
856 } else {
857 /* We use the 20 byte dev->data for our 8 byte filter buffer
858 * to avoid allocating memory that is tricky to free later
859 */
860 u32 crc_bits;
861 struct netdev_hw_addr *ha;
862
863 memset(m_filter, 0, AX_MCAST_FLTSIZE);
864
865 netdev_for_each_mc_addr(ha, net) {
866 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
867 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
868 }
869
870 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
871 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
872 m_filter);
873
874 data->rxctl |= AX_RX_CTL_AM;
875 }
876
877 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
878 2, 2, &data->rxctl);
879}
880
881static int
882ax88179_set_features(struct net_device *net, netdev_features_t features)
883{
884 u8 tmp;
885 struct usbnet *dev = netdev_priv(net);
886 netdev_features_t changed = net->features ^ features;
887
888 if (changed & NETIF_F_IP_CSUM) {
889 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
890 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
891 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
892 }
893
894 if (changed & NETIF_F_IPV6_CSUM) {
895 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
896 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
897 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
898 }
899
900 if (changed & NETIF_F_RXCSUM) {
901 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
902 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
903 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
904 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
905 }
906
907 return 0;
908}
909
910static int ax88179_change_mtu(struct net_device *net, int new_mtu)
911{
912 struct usbnet *dev = netdev_priv(net);
913 u16 tmp16;
914
915 net->mtu = new_mtu;
916 dev->hard_mtu = net->mtu + net->hard_header_len;
917
918 if (net->mtu > 1500) {
919 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
920 2, 2, &tmp16);
921 tmp16 |= AX_MEDIUM_JUMBO_EN;
922 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
923 2, 2, &tmp16);
924 } else {
925 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
926 2, 2, &tmp16);
927 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
928 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
929 2, 2, &tmp16);
930 }
931
932 /* max qlen depend on hard_mtu and rx_urb_size */
933 usbnet_update_max_qlen(dev);
934
935 return 0;
936}
937
938static int ax88179_set_mac_addr(struct net_device *net, void *p)
939{
940 struct usbnet *dev = netdev_priv(net);
941 struct sockaddr *addr = p;
942 int ret;
943
944 if (netif_running(net))
945 return -EBUSY;
946 if (!is_valid_ether_addr(addr->sa_data))
947 return -EADDRNOTAVAIL;
948
949 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
950
951 /* Set the MAC address */
952 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
953 ETH_ALEN, net->dev_addr);
954 if (ret < 0)
955 return ret;
956
957 return 0;
958}
959
960static const struct net_device_ops ax88179_netdev_ops = {
961 .ndo_open = usbnet_open,
962 .ndo_stop = usbnet_stop,
963 .ndo_start_xmit = usbnet_start_xmit,
964 .ndo_tx_timeout = usbnet_tx_timeout,
965 .ndo_get_stats64 = usbnet_get_stats64,
966 .ndo_change_mtu = ax88179_change_mtu,
967 .ndo_set_mac_address = ax88179_set_mac_addr,
968 .ndo_validate_addr = eth_validate_addr,
969 .ndo_do_ioctl = ax88179_ioctl,
970 .ndo_set_rx_mode = ax88179_set_multicast,
971 .ndo_set_features = ax88179_set_features,
972};
973
974static int ax88179_check_eeprom(struct usbnet *dev)
975{
976 u8 i, buf, eeprom[20];
977 u16 csum, delay = HZ / 10;
978 unsigned long jtimeout;
979
980 /* Read EEPROM content */
981 for (i = 0; i < 6; i++) {
982 buf = i;
983 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
984 1, 1, &buf) < 0)
985 return -EINVAL;
986
987 buf = EEP_RD;
988 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
989 1, 1, &buf) < 0)
990 return -EINVAL;
991
992 jtimeout = jiffies + delay;
993 do {
994 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
995 1, 1, &buf);
996
997 if (time_after(jiffies, jtimeout))
998 return -EINVAL;
999
1000 } while (buf & EEP_BUSY);
1001
1002 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1003 2, 2, &eeprom[i * 2], 0);
1004
1005 if ((i == 0) && (eeprom[0] == 0xFF))
1006 return -EINVAL;
1007 }
1008
1009 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1010 csum = (csum >> 8) + (csum & 0xff);
1011 if ((csum + eeprom[10]) != 0xff)
1012 return -EINVAL;
1013
1014 return 0;
1015}
1016
1017static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1018{
1019 u8 i;
1020 u8 efuse[64];
1021 u16 csum = 0;
1022
1023 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1024 return -EINVAL;
1025
1026 if (*efuse == 0xFF)
1027 return -EINVAL;
1028
1029 for (i = 0; i < 64; i++)
1030 csum = csum + efuse[i];
1031
1032 while (csum > 255)
1033 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1034
1035 if (csum != 0xFF)
1036 return -EINVAL;
1037
1038 *ledmode = (efuse[51] << 8) | efuse[52];
1039
1040 return 0;
1041}
1042
1043static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1044{
1045 u16 led;
1046
1047 /* Loaded the old eFuse LED Mode */
1048 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1049 return -EINVAL;
1050
1051 led >>= 8;
1052 switch (led) {
1053 case 0xFF:
1054 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1055 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1056 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1057 break;
1058 case 0xFE:
1059 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1060 break;
1061 case 0xFD:
1062 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1063 LED2_LINK_10 | LED_VALID;
1064 break;
1065 case 0xFC:
1066 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1067 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1068 break;
1069 default:
1070 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1071 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1072 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1073 break;
1074 }
1075
1076 *ledvalue = led;
1077
1078 return 0;
1079}
1080
1081static int ax88179_led_setting(struct usbnet *dev)
1082{
1083 u8 ledfd, value = 0;
1084 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1085 unsigned long jtimeout;
1086
1087 /* Check AX88179 version. UA1 or UA2*/
1088 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1089
1090 if (!(value & AX_SECLD)) { /* UA1 */
1091 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1092 AX_GPIO_CTRL_GPIO1EN;
1093 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1094 1, 1, &value) < 0)
1095 return -EINVAL;
1096 }
1097
1098 /* Check EEPROM */
1099 if (!ax88179_check_eeprom(dev)) {
1100 value = 0x42;
1101 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1102 1, 1, &value) < 0)
1103 return -EINVAL;
1104
1105 value = EEP_RD;
1106 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1107 1, 1, &value) < 0)
1108 return -EINVAL;
1109
1110 jtimeout = jiffies + delay;
1111 do {
1112 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1113 1, 1, &value);
1114
1115 if (time_after(jiffies, jtimeout))
1116 return -EINVAL;
1117
1118 } while (value & EEP_BUSY);
1119
1120 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1121 1, 1, &value);
1122 ledvalue = (value << 8);
1123
1124 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1125 1, 1, &value);
1126 ledvalue |= value;
1127
1128 /* load internal ROM for defaule setting */
1129 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1130 ax88179_convert_old_led(dev, &ledvalue);
1131
1132 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1133 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1134 ax88179_convert_old_led(dev, &ledvalue);
1135 } else {
1136 ax88179_convert_old_led(dev, &ledvalue);
1137 }
1138
1139 tmp = GMII_PHY_PGSEL_EXT;
1140 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1141 GMII_PHY_PAGE_SELECT, 2, &tmp);
1142
1143 tmp = 0x2c;
1144 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1145 GMII_PHYPAGE, 2, &tmp);
1146
1147 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1148 GMII_LED_ACT, 2, &ledact);
1149
1150 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1151 GMII_LED_LINK, 2, &ledlink);
1152
1153 ledact &= GMII_LED_ACTIVE_MASK;
1154 ledlink &= GMII_LED_LINK_MASK;
1155
1156 if (ledvalue & LED0_ACTIVE)
1157 ledact |= GMII_LED0_ACTIVE;
1158
1159 if (ledvalue & LED1_ACTIVE)
1160 ledact |= GMII_LED1_ACTIVE;
1161
1162 if (ledvalue & LED2_ACTIVE)
1163 ledact |= GMII_LED2_ACTIVE;
1164
1165 if (ledvalue & LED0_LINK_10)
1166 ledlink |= GMII_LED0_LINK_10;
1167
1168 if (ledvalue & LED1_LINK_10)
1169 ledlink |= GMII_LED1_LINK_10;
1170
1171 if (ledvalue & LED2_LINK_10)
1172 ledlink |= GMII_LED2_LINK_10;
1173
1174 if (ledvalue & LED0_LINK_100)
1175 ledlink |= GMII_LED0_LINK_100;
1176
1177 if (ledvalue & LED1_LINK_100)
1178 ledlink |= GMII_LED1_LINK_100;
1179
1180 if (ledvalue & LED2_LINK_100)
1181 ledlink |= GMII_LED2_LINK_100;
1182
1183 if (ledvalue & LED0_LINK_1000)
1184 ledlink |= GMII_LED0_LINK_1000;
1185
1186 if (ledvalue & LED1_LINK_1000)
1187 ledlink |= GMII_LED1_LINK_1000;
1188
1189 if (ledvalue & LED2_LINK_1000)
1190 ledlink |= GMII_LED2_LINK_1000;
1191
1192 tmp = ledact;
1193 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1194 GMII_LED_ACT, 2, &tmp);
1195
1196 tmp = ledlink;
1197 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1198 GMII_LED_LINK, 2, &tmp);
1199
1200 tmp = GMII_PHY_PGSEL_PAGE0;
1201 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1202 GMII_PHY_PAGE_SELECT, 2, &tmp);
1203
1204 /* LED full duplex setting */
1205 ledfd = 0;
1206 if (ledvalue & LED0_FD)
1207 ledfd |= 0x01;
1208 else if ((ledvalue & LED0_USB3_MASK) == 0)
1209 ledfd |= 0x02;
1210
1211 if (ledvalue & LED1_FD)
1212 ledfd |= 0x04;
1213 else if ((ledvalue & LED1_USB3_MASK) == 0)
1214 ledfd |= 0x08;
1215
1216 if (ledvalue & LED2_FD)
1217 ledfd |= 0x10;
1218 else if ((ledvalue & LED2_USB3_MASK) == 0)
1219 ledfd |= 0x20;
1220
1221 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1222
1223 return 0;
1224}
1225
1226static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1227{
1228 u8 buf[5];
1229 u16 *tmp16;
1230 u8 *tmp;
1231 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1232 struct ethtool_eee eee_data;
1233
1234 usbnet_get_endpoints(dev, intf);
1235
1236 tmp16 = (u16 *)buf;
1237 tmp = (u8 *)buf;
1238
1239 memset(ax179_data, 0, sizeof(*ax179_data));
1240
1241 /* Power up ethernet PHY */
1242 *tmp16 = 0;
1243 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1244 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1245 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1246 msleep(200);
1247
1248 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1249 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1250 msleep(100);
1251
1252 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1253 ETH_ALEN, dev->net->dev_addr);
1254 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1255
1256 /* RX bulk configuration */
1257 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1258 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1259
1260 dev->rx_urb_size = 1024 * 20;
1261
1262 *tmp = 0x34;
1263 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1264
1265 *tmp = 0x52;
1266 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1267 1, 1, tmp);
1268
1269 dev->net->netdev_ops = &ax88179_netdev_ops;
1270 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1271 dev->net->needed_headroom = 8;
1272 dev->net->max_mtu = 4088;
1273
1274 /* Initialize MII structure */
1275 dev->mii.dev = dev->net;
1276 dev->mii.mdio_read = ax88179_mdio_read;
1277 dev->mii.mdio_write = ax88179_mdio_write;
1278 dev->mii.phy_id_mask = 0xff;
1279 dev->mii.reg_num_mask = 0xff;
1280 dev->mii.phy_id = 0x03;
1281 dev->mii.supports_gmii = 1;
1282
1283 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1284 NETIF_F_RXCSUM;
1285
1286 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1287 NETIF_F_RXCSUM;
1288
1289 /* Enable checksum offload */
1290 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1291 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1292 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1293
1294 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1295 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1296 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1297
1298 /* Configure RX control register => start operation */
1299 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1300 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1301 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1302
1303 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1304 AX_MONITOR_MODE_RWMP;
1305 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1306
1307 /* Configure default medium type => giga */
1308 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1309 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1310 AX_MEDIUM_GIGAMODE;
1311 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1312 2, 2, tmp16);
1313
1314 ax88179_led_setting(dev);
1315
1316 ax179_data->eee_enabled = 0;
1317 ax179_data->eee_active = 0;
1318
1319 ax88179_disable_eee(dev);
1320
1321 ax88179_ethtool_get_eee(dev, &eee_data);
1322 eee_data.advertised = 0;
1323 ax88179_ethtool_set_eee(dev, &eee_data);
1324
1325 /* Restart autoneg */
1326 mii_nway_restart(&dev->mii);
1327
1328 usbnet_link_change(dev, 0, 0);
1329
1330 return 0;
1331}
1332
1333static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1334{
1335 u16 tmp16;
1336
1337 /* Configure RX control register => stop operation */
1338 tmp16 = AX_RX_CTL_STOP;
1339 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1340
1341 tmp16 = 0;
1342 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1343
1344 /* Power down ethernet PHY */
1345 tmp16 = 0;
1346 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1347}
1348
1349static void
1350ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1351{
1352 skb->ip_summed = CHECKSUM_NONE;
1353
1354 /* checksum error bit is set */
1355 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1356 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1357 return;
1358
1359 /* It must be a TCP or UDP packet with a valid checksum */
1360 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1361 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1362 skb->ip_summed = CHECKSUM_UNNECESSARY;
1363}
1364
1365static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1366{
1367 struct sk_buff *ax_skb;
1368 int pkt_cnt;
1369 u32 rx_hdr;
1370 u16 hdr_off;
1371 u32 *pkt_hdr;
1372
1373 /* This check is no longer done by usbnet */
1374 if (skb->len < dev->net->hard_header_len)
1375 return 0;
1376
1377 skb_trim(skb, skb->len - 4);
1378 memcpy(&rx_hdr, skb_tail_pointer(skb), 4);
1379 le32_to_cpus(&rx_hdr);
1380
1381 pkt_cnt = (u16)rx_hdr;
1382 hdr_off = (u16)(rx_hdr >> 16);
1383 pkt_hdr = (u32 *)(skb->data + hdr_off);
1384
1385 while (pkt_cnt--) {
1386 u16 pkt_len;
1387
1388 le32_to_cpus(pkt_hdr);
1389 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1390
1391 /* Check CRC or runt packet */
1392 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1393 (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1394 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1395 pkt_hdr++;
1396 continue;
1397 }
1398
1399 if (pkt_cnt == 0) {
1400 /* Skip IP alignment psudo header */
1401 skb_pull(skb, 2);
1402 skb->len = pkt_len;
1403 skb_set_tail_pointer(skb, pkt_len);
1404 skb->truesize = pkt_len + sizeof(struct sk_buff);
1405 ax88179_rx_checksum(skb, pkt_hdr);
1406 return 1;
1407 }
1408
1409 ax_skb = skb_clone(skb, GFP_ATOMIC);
1410 if (ax_skb) {
1411 ax_skb->len = pkt_len;
1412 ax_skb->data = skb->data + 2;
1413 skb_set_tail_pointer(ax_skb, pkt_len);
1414 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1415 ax88179_rx_checksum(ax_skb, pkt_hdr);
1416 usbnet_skb_return(dev, ax_skb);
1417 } else {
1418 return 0;
1419 }
1420
1421 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1422 pkt_hdr++;
1423 }
1424 return 1;
1425}
1426
1427static struct sk_buff *
1428ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1429{
1430 u32 tx_hdr1, tx_hdr2;
1431 int frame_size = dev->maxpacket;
1432 int mss = skb_shinfo(skb)->gso_size;
1433 int headroom;
1434
1435 tx_hdr1 = skb->len;
1436 tx_hdr2 = mss;
1437 if (((skb->len + 8) % frame_size) == 0)
1438 tx_hdr2 |= 0x80008000; /* Enable padding */
1439
1440 headroom = skb_headroom(skb) - 8;
1441
1442 if ((skb_header_cloned(skb) || headroom < 0) &&
1443 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1444 dev_kfree_skb_any(skb);
1445 return NULL;
1446 }
1447
1448 skb_push(skb, 4);
1449 cpu_to_le32s(&tx_hdr2);
1450 skb_copy_to_linear_data(skb, &tx_hdr2, 4);
1451
1452 skb_push(skb, 4);
1453 cpu_to_le32s(&tx_hdr1);
1454 skb_copy_to_linear_data(skb, &tx_hdr1, 4);
1455
1456 return skb;
1457}
1458
1459static int ax88179_link_reset(struct usbnet *dev)
1460{
1461 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1462 u8 tmp[5], link_sts;
1463 u16 mode, tmp16, delay = HZ / 10;
1464 u32 tmp32 = 0x40000000;
1465 unsigned long jtimeout;
1466
1467 jtimeout = jiffies + delay;
1468 while (tmp32 & 0x40000000) {
1469 mode = 0;
1470 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1471 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1472 &ax179_data->rxctl);
1473
1474 /*link up, check the usb device control TX FIFO full or empty*/
1475 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1476
1477 if (time_after(jiffies, jtimeout))
1478 return 0;
1479 }
1480
1481 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1482 AX_MEDIUM_RXFLOW_CTRLEN;
1483
1484 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1485 1, 1, &link_sts);
1486
1487 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1488 GMII_PHY_PHYSR, 2, &tmp16);
1489
1490 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1491 return 0;
1492 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1493 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1494 if (dev->net->mtu > 1500)
1495 mode |= AX_MEDIUM_JUMBO_EN;
1496
1497 if (link_sts & AX_USB_SS)
1498 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1499 else if (link_sts & AX_USB_HS)
1500 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1501 else
1502 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1503 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1504 mode |= AX_MEDIUM_PS;
1505
1506 if (link_sts & (AX_USB_SS | AX_USB_HS))
1507 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1508 else
1509 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1510 } else {
1511 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1512 }
1513
1514 /* RX bulk configuration */
1515 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1516
1517 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1518
1519 if (tmp16 & GMII_PHY_PHYSR_FULL)
1520 mode |= AX_MEDIUM_FULL_DUPLEX;
1521 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1522 2, 2, &mode);
1523
1524 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1525
1526 netif_carrier_on(dev->net);
1527
1528 return 0;
1529}
1530
1531static int ax88179_reset(struct usbnet *dev)
1532{
1533 u8 buf[5];
1534 u16 *tmp16;
1535 u8 *tmp;
1536 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1537 struct ethtool_eee eee_data;
1538
1539 tmp16 = (u16 *)buf;
1540 tmp = (u8 *)buf;
1541
1542 /* Power up ethernet PHY */
1543 *tmp16 = 0;
1544 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1545
1546 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1547 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1548 msleep(200);
1549
1550 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1551 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1552 msleep(100);
1553
1554 /* Ethernet PHY Auto Detach*/
1555 ax88179_auto_detach(dev, 0);
1556
1557 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1558 dev->net->dev_addr);
1559
1560 /* RX bulk configuration */
1561 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1562 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1563
1564 dev->rx_urb_size = 1024 * 20;
1565
1566 *tmp = 0x34;
1567 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1568
1569 *tmp = 0x52;
1570 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1571 1, 1, tmp);
1572
1573 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1574 NETIF_F_RXCSUM;
1575
1576 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1577 NETIF_F_RXCSUM;
1578
1579 /* Enable checksum offload */
1580 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1581 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1582 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1583
1584 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1585 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1586 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1587
1588 /* Configure RX control register => start operation */
1589 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1590 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1591 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1592
1593 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1594 AX_MONITOR_MODE_RWMP;
1595 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1596
1597 /* Configure default medium type => giga */
1598 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1599 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1600 AX_MEDIUM_GIGAMODE;
1601 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1602 2, 2, tmp16);
1603
1604 ax88179_led_setting(dev);
1605
1606 ax179_data->eee_enabled = 0;
1607 ax179_data->eee_active = 0;
1608
1609 ax88179_disable_eee(dev);
1610
1611 ax88179_ethtool_get_eee(dev, &eee_data);
1612 eee_data.advertised = 0;
1613 ax88179_ethtool_set_eee(dev, &eee_data);
1614
1615 /* Restart autoneg */
1616 mii_nway_restart(&dev->mii);
1617
1618 usbnet_link_change(dev, 0, 0);
1619
1620 return 0;
1621}
1622
1623static int ax88179_stop(struct usbnet *dev)
1624{
1625 u16 tmp16;
1626
1627 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1628 2, 2, &tmp16);
1629 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1630 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1631 2, 2, &tmp16);
1632
1633 return 0;
1634}
1635
1636static const struct driver_info ax88179_info = {
1637 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1638 .bind = ax88179_bind,
1639 .unbind = ax88179_unbind,
1640 .status = ax88179_status,
1641 .link_reset = ax88179_link_reset,
1642 .reset = ax88179_reset,
1643 .stop = ax88179_stop,
1644 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1645 .rx_fixup = ax88179_rx_fixup,
1646 .tx_fixup = ax88179_tx_fixup,
1647};
1648
1649static const struct driver_info ax88178a_info = {
1650 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1651 .bind = ax88179_bind,
1652 .unbind = ax88179_unbind,
1653 .status = ax88179_status,
1654 .link_reset = ax88179_link_reset,
1655 .reset = ax88179_reset,
1656 .stop = ax88179_stop,
1657 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1658 .rx_fixup = ax88179_rx_fixup,
1659 .tx_fixup = ax88179_tx_fixup,
1660};
1661
1662static const struct driver_info cypress_GX3_info = {
1663 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1664 .bind = ax88179_bind,
1665 .unbind = ax88179_unbind,
1666 .status = ax88179_status,
1667 .link_reset = ax88179_link_reset,
1668 .reset = ax88179_reset,
1669 .stop = ax88179_stop,
1670 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1671 .rx_fixup = ax88179_rx_fixup,
1672 .tx_fixup = ax88179_tx_fixup,
1673};
1674
1675static const struct driver_info dlink_dub1312_info = {
1676 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1677 .bind = ax88179_bind,
1678 .unbind = ax88179_unbind,
1679 .status = ax88179_status,
1680 .link_reset = ax88179_link_reset,
1681 .reset = ax88179_reset,
1682 .stop = ax88179_stop,
1683 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1684 .rx_fixup = ax88179_rx_fixup,
1685 .tx_fixup = ax88179_tx_fixup,
1686};
1687
1688static const struct driver_info sitecom_info = {
1689 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1690 .bind = ax88179_bind,
1691 .unbind = ax88179_unbind,
1692 .status = ax88179_status,
1693 .link_reset = ax88179_link_reset,
1694 .reset = ax88179_reset,
1695 .stop = ax88179_stop,
1696 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1697 .rx_fixup = ax88179_rx_fixup,
1698 .tx_fixup = ax88179_tx_fixup,
1699};
1700
1701static const struct driver_info samsung_info = {
1702 .description = "Samsung USB Ethernet Adapter",
1703 .bind = ax88179_bind,
1704 .unbind = ax88179_unbind,
1705 .status = ax88179_status,
1706 .link_reset = ax88179_link_reset,
1707 .reset = ax88179_reset,
1708 .stop = ax88179_stop,
1709 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1710 .rx_fixup = ax88179_rx_fixup,
1711 .tx_fixup = ax88179_tx_fixup,
1712};
1713
1714static const struct driver_info lenovo_info = {
1715 .description = "Lenovo OneLinkDock Gigabit LAN",
1716 .bind = ax88179_bind,
1717 .unbind = ax88179_unbind,
1718 .status = ax88179_status,
1719 .link_reset = ax88179_link_reset,
1720 .reset = ax88179_reset,
1721 .stop = ax88179_stop,
1722 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1723 .rx_fixup = ax88179_rx_fixup,
1724 .tx_fixup = ax88179_tx_fixup,
1725};
1726
1727static const struct driver_info belkin_info = {
1728 .description = "Belkin USB Ethernet Adapter",
1729 .bind = ax88179_bind,
1730 .unbind = ax88179_unbind,
1731 .status = ax88179_status,
1732 .link_reset = ax88179_link_reset,
1733 .reset = ax88179_reset,
1734 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1735 .rx_fixup = ax88179_rx_fixup,
1736 .tx_fixup = ax88179_tx_fixup,
1737};
1738
1739static const struct usb_device_id products[] = {
1740{
1741 /* ASIX AX88179 10/100/1000 */
1742 USB_DEVICE(0x0b95, 0x1790),
1743 .driver_info = (unsigned long)&ax88179_info,
1744}, {
1745 /* ASIX AX88178A 10/100/1000 */
1746 USB_DEVICE(0x0b95, 0x178a),
1747 .driver_info = (unsigned long)&ax88178a_info,
1748}, {
1749 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1750 USB_DEVICE(0x04b4, 0x3610),
1751 .driver_info = (unsigned long)&cypress_GX3_info,
1752}, {
1753 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1754 USB_DEVICE(0x2001, 0x4a00),
1755 .driver_info = (unsigned long)&dlink_dub1312_info,
1756}, {
1757 /* Sitecom USB 3.0 to Gigabit Adapter */
1758 USB_DEVICE(0x0df6, 0x0072),
1759 .driver_info = (unsigned long)&sitecom_info,
1760}, {
1761 /* Samsung USB Ethernet Adapter */
1762 USB_DEVICE(0x04e8, 0xa100),
1763 .driver_info = (unsigned long)&samsung_info,
1764}, {
1765 /* Lenovo OneLinkDock Gigabit LAN */
1766 USB_DEVICE(0x17ef, 0x304b),
1767 .driver_info = (unsigned long)&lenovo_info,
1768}, {
1769 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1770 USB_DEVICE(0x050d, 0x0128),
1771 .driver_info = (unsigned long)&belkin_info,
1772},
1773 { },
1774};
1775MODULE_DEVICE_TABLE(usb, products);
1776
1777static struct usb_driver ax88179_178a_driver = {
1778 .name = "ax88179_178a",
1779 .id_table = products,
1780 .probe = usbnet_probe,
1781 .suspend = ax88179_suspend,
1782 .resume = ax88179_resume,
1783 .reset_resume = ax88179_resume,
1784 .disconnect = usbnet_disconnect,
1785 .supports_autosuspend = 1,
1786 .disable_hub_initiated_lpm = 1,
1787};
1788
1789module_usb_driver(ax88179_178a_driver);
1790
1791MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1792MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 *
5 * Copyright (C) 2011-2013 ASIX
6 */
7
8#include <linux/module.h>
9#include <linux/etherdevice.h>
10#include <linux/mii.h>
11#include <linux/usb.h>
12#include <linux/crc32.h>
13#include <linux/usb/usbnet.h>
14#include <uapi/linux/mdio.h>
15#include <linux/mdio.h>
16
17#define AX88179_PHY_ID 0x03
18#define AX_EEPROM_LEN 0x100
19#define AX88179_EEPROM_MAGIC 0x17900b95
20#define AX_MCAST_FLTSIZE 8
21#define AX_MAX_MCAST 64
22#define AX_INT_PPLS_LINK ((u32)BIT(16))
23#define AX_RXHDR_L4_TYPE_MASK 0x1c
24#define AX_RXHDR_L4_TYPE_UDP 4
25#define AX_RXHDR_L4_TYPE_TCP 16
26#define AX_RXHDR_L3CSUM_ERR 2
27#define AX_RXHDR_L4CSUM_ERR 1
28#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
29#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
30#define AX_ACCESS_MAC 0x01
31#define AX_ACCESS_PHY 0x02
32#define AX_ACCESS_EEPROM 0x04
33#define AX_ACCESS_EFUS 0x05
34#define AX_RELOAD_EEPROM_EFUSE 0x06
35#define AX_PAUSE_WATERLVL_HIGH 0x54
36#define AX_PAUSE_WATERLVL_LOW 0x55
37
38#define PHYSICAL_LINK_STATUS 0x02
39 #define AX_USB_SS 0x04
40 #define AX_USB_HS 0x02
41
42#define GENERAL_STATUS 0x03
43/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
44 #define AX_SECLD 0x04
45
46#define AX_SROM_ADDR 0x07
47#define AX_SROM_CMD 0x0a
48 #define EEP_RD 0x04
49 #define EEP_BUSY 0x10
50
51#define AX_SROM_DATA_LOW 0x08
52#define AX_SROM_DATA_HIGH 0x09
53
54#define AX_RX_CTL 0x0b
55 #define AX_RX_CTL_DROPCRCERR 0x0100
56 #define AX_RX_CTL_IPE 0x0200
57 #define AX_RX_CTL_START 0x0080
58 #define AX_RX_CTL_AP 0x0020
59 #define AX_RX_CTL_AM 0x0010
60 #define AX_RX_CTL_AB 0x0008
61 #define AX_RX_CTL_AMALL 0x0002
62 #define AX_RX_CTL_PRO 0x0001
63 #define AX_RX_CTL_STOP 0x0000
64
65#define AX_NODE_ID 0x10
66#define AX_MULFLTARY 0x16
67
68#define AX_MEDIUM_STATUS_MODE 0x22
69 #define AX_MEDIUM_GIGAMODE 0x01
70 #define AX_MEDIUM_FULL_DUPLEX 0x02
71 #define AX_MEDIUM_EN_125MHZ 0x08
72 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
73 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
74 #define AX_MEDIUM_RECEIVE_EN 0x100
75 #define AX_MEDIUM_PS 0x200
76 #define AX_MEDIUM_JUMBO_EN 0x8040
77
78#define AX_MONITOR_MOD 0x24
79 #define AX_MONITOR_MODE_RWLC 0x02
80 #define AX_MONITOR_MODE_RWMP 0x04
81 #define AX_MONITOR_MODE_PMEPOL 0x20
82 #define AX_MONITOR_MODE_PMETYPE 0x40
83
84#define AX_GPIO_CTRL 0x25
85 #define AX_GPIO_CTRL_GPIO3EN 0x80
86 #define AX_GPIO_CTRL_GPIO2EN 0x40
87 #define AX_GPIO_CTRL_GPIO1EN 0x20
88
89#define AX_PHYPWR_RSTCTL 0x26
90 #define AX_PHYPWR_RSTCTL_BZ 0x0010
91 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
92 #define AX_PHYPWR_RSTCTL_AT 0x1000
93
94#define AX_RX_BULKIN_QCTRL 0x2e
95#define AX_CLK_SELECT 0x33
96 #define AX_CLK_SELECT_BCS 0x01
97 #define AX_CLK_SELECT_ACS 0x02
98 #define AX_CLK_SELECT_ULR 0x08
99
100#define AX_RXCOE_CTL 0x34
101 #define AX_RXCOE_IP 0x01
102 #define AX_RXCOE_TCP 0x02
103 #define AX_RXCOE_UDP 0x04
104 #define AX_RXCOE_TCPV6 0x20
105 #define AX_RXCOE_UDPV6 0x40
106
107#define AX_TXCOE_CTL 0x35
108 #define AX_TXCOE_IP 0x01
109 #define AX_TXCOE_TCP 0x02
110 #define AX_TXCOE_UDP 0x04
111 #define AX_TXCOE_TCPV6 0x20
112 #define AX_TXCOE_UDPV6 0x40
113
114#define AX_LEDCTRL 0x73
115
116#define GMII_PHY_PHYSR 0x11
117 #define GMII_PHY_PHYSR_SMASK 0xc000
118 #define GMII_PHY_PHYSR_GIGA 0x8000
119 #define GMII_PHY_PHYSR_100 0x4000
120 #define GMII_PHY_PHYSR_FULL 0x2000
121 #define GMII_PHY_PHYSR_LINK 0x400
122
123#define GMII_LED_ACT 0x1a
124 #define GMII_LED_ACTIVE_MASK 0xff8f
125 #define GMII_LED0_ACTIVE BIT(4)
126 #define GMII_LED1_ACTIVE BIT(5)
127 #define GMII_LED2_ACTIVE BIT(6)
128
129#define GMII_LED_LINK 0x1c
130 #define GMII_LED_LINK_MASK 0xf888
131 #define GMII_LED0_LINK_10 BIT(0)
132 #define GMII_LED0_LINK_100 BIT(1)
133 #define GMII_LED0_LINK_1000 BIT(2)
134 #define GMII_LED1_LINK_10 BIT(4)
135 #define GMII_LED1_LINK_100 BIT(5)
136 #define GMII_LED1_LINK_1000 BIT(6)
137 #define GMII_LED2_LINK_10 BIT(8)
138 #define GMII_LED2_LINK_100 BIT(9)
139 #define GMII_LED2_LINK_1000 BIT(10)
140 #define LED0_ACTIVE BIT(0)
141 #define LED0_LINK_10 BIT(1)
142 #define LED0_LINK_100 BIT(2)
143 #define LED0_LINK_1000 BIT(3)
144 #define LED0_FD BIT(4)
145 #define LED0_USB3_MASK 0x001f
146 #define LED1_ACTIVE BIT(5)
147 #define LED1_LINK_10 BIT(6)
148 #define LED1_LINK_100 BIT(7)
149 #define LED1_LINK_1000 BIT(8)
150 #define LED1_FD BIT(9)
151 #define LED1_USB3_MASK 0x03e0
152 #define LED2_ACTIVE BIT(10)
153 #define LED2_LINK_1000 BIT(13)
154 #define LED2_LINK_100 BIT(12)
155 #define LED2_LINK_10 BIT(11)
156 #define LED2_FD BIT(14)
157 #define LED_VALID BIT(15)
158 #define LED2_USB3_MASK 0x7c00
159
160#define GMII_PHYPAGE 0x1e
161#define GMII_PHY_PAGE_SELECT 0x1f
162 #define GMII_PHY_PGSEL_EXT 0x0007
163 #define GMII_PHY_PGSEL_PAGE0 0x0000
164 #define GMII_PHY_PGSEL_PAGE3 0x0003
165 #define GMII_PHY_PGSEL_PAGE5 0x0005
166
167static int ax88179_reset(struct usbnet *dev);
168
169struct ax88179_data {
170 u8 eee_enabled;
171 u8 eee_active;
172 u16 rxctl;
173 u8 in_pm;
174 u32 wol_supported;
175 u32 wolopts;
176 u8 disconnecting;
177};
178
179struct ax88179_int_data {
180 __le32 intdata1;
181 __le32 intdata2;
182};
183
184static const struct {
185 unsigned char ctrl, timer_l, timer_h, size, ifg;
186} AX88179_BULKIN_SIZE[] = {
187 {7, 0x4f, 0, 0x12, 0xff},
188 {7, 0x20, 3, 0x16, 0xff},
189 {7, 0xae, 7, 0x18, 0xff},
190 {7, 0xcc, 0x4c, 0x18, 8},
191};
192
193static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
194{
195 struct ax88179_data *ax179_data = dev->driver_priv;
196
197 ax179_data->in_pm = pm_mode;
198}
199
200static int ax88179_in_pm(struct usbnet *dev)
201{
202 struct ax88179_data *ax179_data = dev->driver_priv;
203
204 return ax179_data->in_pm;
205}
206
207static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
208 u16 size, void *data)
209{
210 int ret;
211 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
212 struct ax88179_data *ax179_data = dev->driver_priv;
213
214 BUG_ON(!dev);
215
216 if (!ax88179_in_pm(dev))
217 fn = usbnet_read_cmd;
218 else
219 fn = usbnet_read_cmd_nopm;
220
221 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
222 value, index, data, size);
223
224 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
225 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
226 index, ret);
227
228 return ret;
229}
230
231static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
232 u16 size, const void *data)
233{
234 int ret;
235 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
236 struct ax88179_data *ax179_data = dev->driver_priv;
237
238 BUG_ON(!dev);
239
240 if (!ax88179_in_pm(dev))
241 fn = usbnet_write_cmd;
242 else
243 fn = usbnet_write_cmd_nopm;
244
245 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
246 value, index, data, size);
247
248 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
249 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
250 index, ret);
251
252 return ret;
253}
254
255static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
256 u16 index, u16 size, void *data)
257{
258 u16 buf;
259
260 if (2 == size) {
261 buf = *((u16 *)data);
262 cpu_to_le16s(&buf);
263 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
264 USB_RECIP_DEVICE, value, index, &buf,
265 size);
266 } else {
267 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
268 USB_RECIP_DEVICE, value, index, data,
269 size);
270 }
271}
272
273static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
274 u16 size, void *data)
275{
276 int ret;
277
278 if (2 == size) {
279 u16 buf = 0;
280 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
281 le16_to_cpus(&buf);
282 *((u16 *)data) = buf;
283 } else if (4 == size) {
284 u32 buf = 0;
285 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
286 le32_to_cpus(&buf);
287 *((u32 *)data) = buf;
288 } else {
289 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
290 }
291
292 return ret;
293}
294
295static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
296 u16 size, const void *data)
297{
298 int ret;
299
300 if (2 == size) {
301 u16 buf;
302 buf = *((u16 *)data);
303 cpu_to_le16s(&buf);
304 ret = __ax88179_write_cmd(dev, cmd, value, index,
305 size, &buf);
306 } else {
307 ret = __ax88179_write_cmd(dev, cmd, value, index,
308 size, data);
309 }
310
311 return ret;
312}
313
314static void ax88179_status(struct usbnet *dev, struct urb *urb)
315{
316 struct ax88179_int_data *event;
317 u32 link;
318
319 if (urb->actual_length < 8)
320 return;
321
322 event = urb->transfer_buffer;
323 le32_to_cpus((void *)&event->intdata1);
324
325 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
326
327 if (netif_carrier_ok(dev->net) != link) {
328 usbnet_link_change(dev, link, 1);
329 if (!link)
330 netdev_info(dev->net, "ax88179 - Link status is: 0\n");
331 }
332}
333
334static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
335{
336 struct usbnet *dev = netdev_priv(netdev);
337 u16 res;
338
339 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
340 return res;
341}
342
343static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
344 int val)
345{
346 struct usbnet *dev = netdev_priv(netdev);
347 u16 res = (u16) val;
348
349 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
350}
351
352static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
353 u16 devad)
354{
355 u16 tmp16;
356 int ret;
357
358 tmp16 = devad;
359 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
360 MII_MMD_CTRL, 2, &tmp16);
361
362 tmp16 = prtad;
363 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
364 MII_MMD_DATA, 2, &tmp16);
365
366 tmp16 = devad | MII_MMD_CTRL_NOINCR;
367 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
368 MII_MMD_CTRL, 2, &tmp16);
369
370 return ret;
371}
372
373static int
374ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
375{
376 int ret;
377 u16 tmp16;
378
379 ax88179_phy_mmd_indirect(dev, prtad, devad);
380
381 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
382 MII_MMD_DATA, 2, &tmp16);
383 if (ret < 0)
384 return ret;
385
386 return tmp16;
387}
388
389static int
390ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
391 u16 data)
392{
393 int ret;
394
395 ax88179_phy_mmd_indirect(dev, prtad, devad);
396
397 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
398 MII_MMD_DATA, 2, &data);
399
400 if (ret < 0)
401 return ret;
402
403 return 0;
404}
405
406static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
407{
408 struct usbnet *dev = usb_get_intfdata(intf);
409 struct ax88179_data *priv = dev->driver_priv;
410 u16 tmp16;
411 u8 tmp8;
412
413 ax88179_set_pm_mode(dev, true);
414
415 usbnet_suspend(intf, message);
416
417 /* Enable WoL */
418 if (priv->wolopts) {
419 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
420 1, 1, &tmp8);
421 if (priv->wolopts & WAKE_PHY)
422 tmp8 |= AX_MONITOR_MODE_RWLC;
423 if (priv->wolopts & WAKE_MAGIC)
424 tmp8 |= AX_MONITOR_MODE_RWMP;
425
426 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
427 1, 1, &tmp8);
428 }
429
430 /* Disable RX path */
431 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
432 2, 2, &tmp16);
433 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
434 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
435 2, 2, &tmp16);
436
437 /* Force bulk-in zero length */
438 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
439 2, 2, &tmp16);
440
441 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
442 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
443 2, 2, &tmp16);
444
445 /* change clock */
446 tmp8 = 0;
447 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
448
449 /* Configure RX control register => stop operation */
450 tmp16 = AX_RX_CTL_STOP;
451 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
452
453 ax88179_set_pm_mode(dev, false);
454
455 return 0;
456}
457
458/* This function is used to enable the autodetach function. */
459/* This function is determined by offset 0x43 of EEPROM */
460static int ax88179_auto_detach(struct usbnet *dev)
461{
462 u16 tmp16;
463 u8 tmp8;
464
465 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
466 return 0;
467
468 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
469 return 0;
470
471 /* Enable Auto Detach bit */
472 tmp8 = 0;
473 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
474 tmp8 |= AX_CLK_SELECT_ULR;
475 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
476
477 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
478 tmp16 |= AX_PHYPWR_RSTCTL_AT;
479 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
480
481 return 0;
482}
483
484static int ax88179_resume(struct usb_interface *intf)
485{
486 struct usbnet *dev = usb_get_intfdata(intf);
487
488 ax88179_set_pm_mode(dev, true);
489
490 usbnet_link_change(dev, 0, 0);
491
492 ax88179_reset(dev);
493
494 ax88179_set_pm_mode(dev, false);
495
496 return usbnet_resume(intf);
497}
498
499static void ax88179_disconnect(struct usb_interface *intf)
500{
501 struct usbnet *dev = usb_get_intfdata(intf);
502 struct ax88179_data *ax179_data;
503
504 if (!dev)
505 return;
506
507 ax179_data = dev->driver_priv;
508 ax179_data->disconnecting = 1;
509
510 usbnet_disconnect(intf);
511}
512
513static void
514ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
515{
516 struct usbnet *dev = netdev_priv(net);
517 struct ax88179_data *priv = dev->driver_priv;
518
519 wolinfo->supported = priv->wol_supported;
520 wolinfo->wolopts = priv->wolopts;
521}
522
523static int
524ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
525{
526 struct usbnet *dev = netdev_priv(net);
527 struct ax88179_data *priv = dev->driver_priv;
528
529 if (wolinfo->wolopts & ~(priv->wol_supported))
530 return -EINVAL;
531
532 priv->wolopts = wolinfo->wolopts;
533
534 return 0;
535}
536
537static int ax88179_get_eeprom_len(struct net_device *net)
538{
539 return AX_EEPROM_LEN;
540}
541
542static int
543ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
544 u8 *data)
545{
546 struct usbnet *dev = netdev_priv(net);
547 u16 *eeprom_buff;
548 int first_word, last_word;
549 int i, ret;
550
551 if (eeprom->len == 0)
552 return -EINVAL;
553
554 eeprom->magic = AX88179_EEPROM_MAGIC;
555
556 first_word = eeprom->offset >> 1;
557 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
558 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
559 GFP_KERNEL);
560 if (!eeprom_buff)
561 return -ENOMEM;
562
563 /* ax88179/178A returns 2 bytes from eeprom on read */
564 for (i = first_word; i <= last_word; i++) {
565 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
566 &eeprom_buff[i - first_word]);
567 if (ret < 0) {
568 kfree(eeprom_buff);
569 return -EIO;
570 }
571 }
572
573 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
574 kfree(eeprom_buff);
575 return 0;
576}
577
578static int
579ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
580 u8 *data)
581{
582 struct usbnet *dev = netdev_priv(net);
583 u16 *eeprom_buff;
584 int first_word;
585 int last_word;
586 int ret;
587 int i;
588
589 netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
590 eeprom->len, eeprom->offset, eeprom->magic);
591
592 if (eeprom->len == 0)
593 return -EINVAL;
594
595 if (eeprom->magic != AX88179_EEPROM_MAGIC)
596 return -EINVAL;
597
598 first_word = eeprom->offset >> 1;
599 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
600
601 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
602 GFP_KERNEL);
603 if (!eeprom_buff)
604 return -ENOMEM;
605
606 /* align data to 16 bit boundaries, read the missing data from
607 the EEPROM */
608 if (eeprom->offset & 1) {
609 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
610 &eeprom_buff[0]);
611 if (ret < 0) {
612 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
613 goto free;
614 }
615 }
616
617 if ((eeprom->offset + eeprom->len) & 1) {
618 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
619 &eeprom_buff[last_word - first_word]);
620 if (ret < 0) {
621 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
622 goto free;
623 }
624 }
625
626 memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
627
628 for (i = first_word; i <= last_word; i++) {
629 netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
630 i, eeprom_buff[i - first_word]);
631 ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
632 &eeprom_buff[i - first_word]);
633 if (ret < 0) {
634 netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
635 goto free;
636 }
637 msleep(20);
638 }
639
640 /* reload EEPROM data */
641 ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
642 if (ret < 0) {
643 netdev_err(net, "Failed to reload EEPROM data\n");
644 goto free;
645 }
646
647 ret = 0;
648free:
649 kfree(eeprom_buff);
650 return ret;
651}
652
653static int ax88179_get_link_ksettings(struct net_device *net,
654 struct ethtool_link_ksettings *cmd)
655{
656 struct usbnet *dev = netdev_priv(net);
657
658 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
659
660 return 0;
661}
662
663static int ax88179_set_link_ksettings(struct net_device *net,
664 const struct ethtool_link_ksettings *cmd)
665{
666 struct usbnet *dev = netdev_priv(net);
667 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
668}
669
670static int
671ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_keee *data)
672{
673 int val;
674
675 /* Get Supported EEE */
676 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
677 MDIO_MMD_PCS);
678 if (val < 0)
679 return val;
680 mii_eee_cap1_mod_linkmode_t(data->supported, val);
681
682 /* Get advertisement EEE */
683 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
684 MDIO_MMD_AN);
685 if (val < 0)
686 return val;
687 mii_eee_cap1_mod_linkmode_t(data->advertised, val);
688
689 /* Get LP advertisement EEE */
690 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
691 MDIO_MMD_AN);
692 if (val < 0)
693 return val;
694 mii_eee_cap1_mod_linkmode_t(data->lp_advertised, val);
695
696 return 0;
697}
698
699static int
700ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_keee *data)
701{
702 u16 tmp16 = linkmode_to_mii_eee_cap1_t(data->advertised);
703
704 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
705 MDIO_MMD_AN, tmp16);
706}
707
708static int ax88179_chk_eee(struct usbnet *dev)
709{
710 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
711 struct ax88179_data *priv = dev->driver_priv;
712
713 mii_ethtool_gset(&dev->mii, &ecmd);
714
715 if (ecmd.duplex & DUPLEX_FULL) {
716 int eee_lp, eee_cap, eee_adv;
717 u32 lp, cap, adv, supported = 0;
718
719 eee_cap = ax88179_phy_read_mmd_indirect(dev,
720 MDIO_PCS_EEE_ABLE,
721 MDIO_MMD_PCS);
722 if (eee_cap < 0) {
723 priv->eee_active = 0;
724 return false;
725 }
726
727 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
728 if (!cap) {
729 priv->eee_active = 0;
730 return false;
731 }
732
733 eee_lp = ax88179_phy_read_mmd_indirect(dev,
734 MDIO_AN_EEE_LPABLE,
735 MDIO_MMD_AN);
736 if (eee_lp < 0) {
737 priv->eee_active = 0;
738 return false;
739 }
740
741 eee_adv = ax88179_phy_read_mmd_indirect(dev,
742 MDIO_AN_EEE_ADV,
743 MDIO_MMD_AN);
744
745 if (eee_adv < 0) {
746 priv->eee_active = 0;
747 return false;
748 }
749
750 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
751 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
752 supported = (ecmd.speed == SPEED_1000) ?
753 SUPPORTED_1000baseT_Full :
754 SUPPORTED_100baseT_Full;
755
756 if (!(lp & adv & supported)) {
757 priv->eee_active = 0;
758 return false;
759 }
760
761 priv->eee_active = 1;
762 return true;
763 }
764
765 priv->eee_active = 0;
766 return false;
767}
768
769static void ax88179_disable_eee(struct usbnet *dev)
770{
771 u16 tmp16;
772
773 tmp16 = GMII_PHY_PGSEL_PAGE3;
774 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
775 GMII_PHY_PAGE_SELECT, 2, &tmp16);
776
777 tmp16 = 0x3246;
778 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
779 MII_PHYADDR, 2, &tmp16);
780
781 tmp16 = GMII_PHY_PGSEL_PAGE0;
782 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
783 GMII_PHY_PAGE_SELECT, 2, &tmp16);
784}
785
786static void ax88179_enable_eee(struct usbnet *dev)
787{
788 u16 tmp16;
789
790 tmp16 = GMII_PHY_PGSEL_PAGE3;
791 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
792 GMII_PHY_PAGE_SELECT, 2, &tmp16);
793
794 tmp16 = 0x3247;
795 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
796 MII_PHYADDR, 2, &tmp16);
797
798 tmp16 = GMII_PHY_PGSEL_PAGE5;
799 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
800 GMII_PHY_PAGE_SELECT, 2, &tmp16);
801
802 tmp16 = 0x0680;
803 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
804 MII_BMSR, 2, &tmp16);
805
806 tmp16 = GMII_PHY_PGSEL_PAGE0;
807 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
808 GMII_PHY_PAGE_SELECT, 2, &tmp16);
809}
810
811static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)
812{
813 struct usbnet *dev = netdev_priv(net);
814 struct ax88179_data *priv = dev->driver_priv;
815
816 edata->eee_enabled = priv->eee_enabled;
817 edata->eee_active = priv->eee_active;
818
819 return ax88179_ethtool_get_eee(dev, edata);
820}
821
822static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)
823{
824 struct usbnet *dev = netdev_priv(net);
825 struct ax88179_data *priv = dev->driver_priv;
826 int ret;
827
828 priv->eee_enabled = edata->eee_enabled;
829 if (!priv->eee_enabled) {
830 ax88179_disable_eee(dev);
831 } else {
832 priv->eee_enabled = ax88179_chk_eee(dev);
833 if (!priv->eee_enabled)
834 return -EOPNOTSUPP;
835
836 ax88179_enable_eee(dev);
837 }
838
839 ret = ax88179_ethtool_set_eee(dev, edata);
840 if (ret)
841 return ret;
842
843 mii_nway_restart(&dev->mii);
844
845 usbnet_link_change(dev, 0, 0);
846
847 return ret;
848}
849
850static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
851{
852 struct usbnet *dev = netdev_priv(net);
853 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
854}
855
856static const struct ethtool_ops ax88179_ethtool_ops = {
857 .get_link = ethtool_op_get_link,
858 .get_msglevel = usbnet_get_msglevel,
859 .set_msglevel = usbnet_set_msglevel,
860 .get_wol = ax88179_get_wol,
861 .set_wol = ax88179_set_wol,
862 .get_eeprom_len = ax88179_get_eeprom_len,
863 .get_eeprom = ax88179_get_eeprom,
864 .set_eeprom = ax88179_set_eeprom,
865 .get_eee = ax88179_get_eee,
866 .set_eee = ax88179_set_eee,
867 .nway_reset = usbnet_nway_reset,
868 .get_link_ksettings = ax88179_get_link_ksettings,
869 .set_link_ksettings = ax88179_set_link_ksettings,
870 .get_ts_info = ethtool_op_get_ts_info,
871};
872
873static void ax88179_set_multicast(struct net_device *net)
874{
875 struct usbnet *dev = netdev_priv(net);
876 struct ax88179_data *data = dev->driver_priv;
877 u8 *m_filter = ((u8 *)dev->data);
878
879 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
880
881 if (net->flags & IFF_PROMISC) {
882 data->rxctl |= AX_RX_CTL_PRO;
883 } else if (net->flags & IFF_ALLMULTI ||
884 netdev_mc_count(net) > AX_MAX_MCAST) {
885 data->rxctl |= AX_RX_CTL_AMALL;
886 } else if (netdev_mc_empty(net)) {
887 /* just broadcast and directed */
888 } else {
889 /* We use dev->data for our 8 byte filter buffer
890 * to avoid allocating memory that is tricky to free later
891 */
892 u32 crc_bits;
893 struct netdev_hw_addr *ha;
894
895 memset(m_filter, 0, AX_MCAST_FLTSIZE);
896
897 netdev_for_each_mc_addr(ha, net) {
898 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
899 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
900 }
901
902 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
903 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
904 m_filter);
905
906 data->rxctl |= AX_RX_CTL_AM;
907 }
908
909 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
910 2, 2, &data->rxctl);
911}
912
913static int
914ax88179_set_features(struct net_device *net, netdev_features_t features)
915{
916 u8 tmp;
917 struct usbnet *dev = netdev_priv(net);
918 netdev_features_t changed = net->features ^ features;
919
920 if (changed & NETIF_F_IP_CSUM) {
921 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
922 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
923 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
924 }
925
926 if (changed & NETIF_F_IPV6_CSUM) {
927 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
928 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
929 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
930 }
931
932 if (changed & NETIF_F_RXCSUM) {
933 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
934 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
935 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
936 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
937 }
938
939 return 0;
940}
941
942static int ax88179_change_mtu(struct net_device *net, int new_mtu)
943{
944 struct usbnet *dev = netdev_priv(net);
945 u16 tmp16;
946
947 WRITE_ONCE(net->mtu, new_mtu);
948 dev->hard_mtu = net->mtu + net->hard_header_len;
949
950 if (net->mtu > 1500) {
951 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
952 2, 2, &tmp16);
953 tmp16 |= AX_MEDIUM_JUMBO_EN;
954 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
955 2, 2, &tmp16);
956 } else {
957 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
958 2, 2, &tmp16);
959 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
960 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
961 2, 2, &tmp16);
962 }
963
964 /* max qlen depend on hard_mtu and rx_urb_size */
965 usbnet_update_max_qlen(dev);
966
967 return 0;
968}
969
970static int ax88179_set_mac_addr(struct net_device *net, void *p)
971{
972 struct usbnet *dev = netdev_priv(net);
973 struct sockaddr *addr = p;
974 int ret;
975
976 if (netif_running(net))
977 return -EBUSY;
978 if (!is_valid_ether_addr(addr->sa_data))
979 return -EADDRNOTAVAIL;
980
981 eth_hw_addr_set(net, addr->sa_data);
982
983 /* Set the MAC address */
984 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
985 ETH_ALEN, net->dev_addr);
986 if (ret < 0)
987 return ret;
988
989 return 0;
990}
991
992static const struct net_device_ops ax88179_netdev_ops = {
993 .ndo_open = usbnet_open,
994 .ndo_stop = usbnet_stop,
995 .ndo_start_xmit = usbnet_start_xmit,
996 .ndo_tx_timeout = usbnet_tx_timeout,
997 .ndo_get_stats64 = dev_get_tstats64,
998 .ndo_change_mtu = ax88179_change_mtu,
999 .ndo_set_mac_address = ax88179_set_mac_addr,
1000 .ndo_validate_addr = eth_validate_addr,
1001 .ndo_eth_ioctl = ax88179_ioctl,
1002 .ndo_set_rx_mode = ax88179_set_multicast,
1003 .ndo_set_features = ax88179_set_features,
1004};
1005
1006static int ax88179_check_eeprom(struct usbnet *dev)
1007{
1008 u8 i, buf, eeprom[20];
1009 u16 csum, delay = HZ / 10;
1010 unsigned long jtimeout;
1011
1012 /* Read EEPROM content */
1013 for (i = 0; i < 6; i++) {
1014 buf = i;
1015 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1016 1, 1, &buf) < 0)
1017 return -EINVAL;
1018
1019 buf = EEP_RD;
1020 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1021 1, 1, &buf) < 0)
1022 return -EINVAL;
1023
1024 jtimeout = jiffies + delay;
1025 do {
1026 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1027 1, 1, &buf);
1028
1029 if (time_after(jiffies, jtimeout))
1030 return -EINVAL;
1031
1032 } while (buf & EEP_BUSY);
1033
1034 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1035 2, 2, &eeprom[i * 2]);
1036
1037 if ((i == 0) && (eeprom[0] == 0xFF))
1038 return -EINVAL;
1039 }
1040
1041 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1042 csum = (csum >> 8) + (csum & 0xff);
1043 if ((csum + eeprom[10]) != 0xff)
1044 return -EINVAL;
1045
1046 return 0;
1047}
1048
1049static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1050{
1051 u8 i;
1052 u8 efuse[64];
1053 u16 csum = 0;
1054
1055 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1056 return -EINVAL;
1057
1058 if (*efuse == 0xFF)
1059 return -EINVAL;
1060
1061 for (i = 0; i < 64; i++)
1062 csum = csum + efuse[i];
1063
1064 while (csum > 255)
1065 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1066
1067 if (csum != 0xFF)
1068 return -EINVAL;
1069
1070 *ledmode = (efuse[51] << 8) | efuse[52];
1071
1072 return 0;
1073}
1074
1075static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1076{
1077 u16 led;
1078
1079 /* Loaded the old eFuse LED Mode */
1080 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1081 return -EINVAL;
1082
1083 led >>= 8;
1084 switch (led) {
1085 case 0xFF:
1086 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1087 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1088 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1089 break;
1090 case 0xFE:
1091 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1092 break;
1093 case 0xFD:
1094 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1095 LED2_LINK_10 | LED_VALID;
1096 break;
1097 case 0xFC:
1098 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1099 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1100 break;
1101 default:
1102 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1103 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1104 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1105 break;
1106 }
1107
1108 *ledvalue = led;
1109
1110 return 0;
1111}
1112
1113static int ax88179_led_setting(struct usbnet *dev)
1114{
1115 u8 ledfd, value = 0;
1116 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1117 unsigned long jtimeout;
1118
1119 /* Check AX88179 version. UA1 or UA2*/
1120 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1121
1122 if (!(value & AX_SECLD)) { /* UA1 */
1123 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1124 AX_GPIO_CTRL_GPIO1EN;
1125 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1126 1, 1, &value) < 0)
1127 return -EINVAL;
1128 }
1129
1130 /* Check EEPROM */
1131 if (!ax88179_check_eeprom(dev)) {
1132 value = 0x42;
1133 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1134 1, 1, &value) < 0)
1135 return -EINVAL;
1136
1137 value = EEP_RD;
1138 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1139 1, 1, &value) < 0)
1140 return -EINVAL;
1141
1142 jtimeout = jiffies + delay;
1143 do {
1144 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1145 1, 1, &value);
1146
1147 if (time_after(jiffies, jtimeout))
1148 return -EINVAL;
1149
1150 } while (value & EEP_BUSY);
1151
1152 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1153 1, 1, &value);
1154 ledvalue = (value << 8);
1155
1156 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1157 1, 1, &value);
1158 ledvalue |= value;
1159
1160 /* load internal ROM for defaule setting */
1161 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1162 ax88179_convert_old_led(dev, &ledvalue);
1163
1164 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1165 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1166 ax88179_convert_old_led(dev, &ledvalue);
1167 } else {
1168 ax88179_convert_old_led(dev, &ledvalue);
1169 }
1170
1171 tmp = GMII_PHY_PGSEL_EXT;
1172 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1173 GMII_PHY_PAGE_SELECT, 2, &tmp);
1174
1175 tmp = 0x2c;
1176 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1177 GMII_PHYPAGE, 2, &tmp);
1178
1179 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1180 GMII_LED_ACT, 2, &ledact);
1181
1182 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1183 GMII_LED_LINK, 2, &ledlink);
1184
1185 ledact &= GMII_LED_ACTIVE_MASK;
1186 ledlink &= GMII_LED_LINK_MASK;
1187
1188 if (ledvalue & LED0_ACTIVE)
1189 ledact |= GMII_LED0_ACTIVE;
1190
1191 if (ledvalue & LED1_ACTIVE)
1192 ledact |= GMII_LED1_ACTIVE;
1193
1194 if (ledvalue & LED2_ACTIVE)
1195 ledact |= GMII_LED2_ACTIVE;
1196
1197 if (ledvalue & LED0_LINK_10)
1198 ledlink |= GMII_LED0_LINK_10;
1199
1200 if (ledvalue & LED1_LINK_10)
1201 ledlink |= GMII_LED1_LINK_10;
1202
1203 if (ledvalue & LED2_LINK_10)
1204 ledlink |= GMII_LED2_LINK_10;
1205
1206 if (ledvalue & LED0_LINK_100)
1207 ledlink |= GMII_LED0_LINK_100;
1208
1209 if (ledvalue & LED1_LINK_100)
1210 ledlink |= GMII_LED1_LINK_100;
1211
1212 if (ledvalue & LED2_LINK_100)
1213 ledlink |= GMII_LED2_LINK_100;
1214
1215 if (ledvalue & LED0_LINK_1000)
1216 ledlink |= GMII_LED0_LINK_1000;
1217
1218 if (ledvalue & LED1_LINK_1000)
1219 ledlink |= GMII_LED1_LINK_1000;
1220
1221 if (ledvalue & LED2_LINK_1000)
1222 ledlink |= GMII_LED2_LINK_1000;
1223
1224 tmp = ledact;
1225 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1226 GMII_LED_ACT, 2, &tmp);
1227
1228 tmp = ledlink;
1229 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1230 GMII_LED_LINK, 2, &tmp);
1231
1232 tmp = GMII_PHY_PGSEL_PAGE0;
1233 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1234 GMII_PHY_PAGE_SELECT, 2, &tmp);
1235
1236 /* LED full duplex setting */
1237 ledfd = 0;
1238 if (ledvalue & LED0_FD)
1239 ledfd |= 0x01;
1240 else if ((ledvalue & LED0_USB3_MASK) == 0)
1241 ledfd |= 0x02;
1242
1243 if (ledvalue & LED1_FD)
1244 ledfd |= 0x04;
1245 else if ((ledvalue & LED1_USB3_MASK) == 0)
1246 ledfd |= 0x08;
1247
1248 if (ledvalue & LED2_FD)
1249 ledfd |= 0x10;
1250 else if ((ledvalue & LED2_USB3_MASK) == 0)
1251 ledfd |= 0x20;
1252
1253 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1254
1255 return 0;
1256}
1257
1258static void ax88179_get_mac_addr(struct usbnet *dev)
1259{
1260 u8 mac[ETH_ALEN];
1261
1262 memset(mac, 0, sizeof(mac));
1263
1264 /* Maybe the boot loader passed the MAC address via device tree */
1265 if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
1266 netif_dbg(dev, ifup, dev->net,
1267 "MAC address read from device tree");
1268 } else {
1269 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1270 ETH_ALEN, mac);
1271 netif_dbg(dev, ifup, dev->net,
1272 "MAC address read from ASIX chip");
1273 }
1274
1275 if (is_valid_ether_addr(mac)) {
1276 eth_hw_addr_set(dev->net, mac);
1277 if (!is_local_ether_addr(mac))
1278 dev->net->addr_assign_type = NET_ADDR_PERM;
1279 } else {
1280 netdev_info(dev->net, "invalid MAC address, using random\n");
1281 }
1282
1283 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1284 dev->net->dev_addr);
1285}
1286
1287static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1288{
1289 struct ax88179_data *ax179_data;
1290 int ret;
1291
1292 ret = usbnet_get_endpoints(dev, intf);
1293 if (ret < 0)
1294 return ret;
1295
1296 ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
1297 if (!ax179_data)
1298 return -ENOMEM;
1299
1300 dev->driver_priv = ax179_data;
1301
1302 dev->net->netdev_ops = &ax88179_netdev_ops;
1303 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1304 dev->net->needed_headroom = 8;
1305 dev->net->max_mtu = 4088;
1306
1307 /* Initialize MII structure */
1308 dev->mii.dev = dev->net;
1309 dev->mii.mdio_read = ax88179_mdio_read;
1310 dev->mii.mdio_write = ax88179_mdio_write;
1311 dev->mii.phy_id_mask = 0xff;
1312 dev->mii.reg_num_mask = 0xff;
1313 dev->mii.phy_id = 0x03;
1314 dev->mii.supports_gmii = 1;
1315
1316 dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
1317 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
1318
1319 dev->net->hw_features |= dev->net->features;
1320
1321 netif_set_tso_max_size(dev->net, 16384);
1322
1323 ax88179_reset(dev);
1324
1325 return 0;
1326}
1327
1328static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1329{
1330 struct ax88179_data *ax179_data = dev->driver_priv;
1331 u16 tmp16;
1332
1333 /* Configure RX control register => stop operation */
1334 tmp16 = AX_RX_CTL_STOP;
1335 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1336
1337 tmp16 = 0;
1338 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1339
1340 /* Power down ethernet PHY */
1341 tmp16 = 0;
1342 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1343
1344 kfree(ax179_data);
1345}
1346
1347static void
1348ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1349{
1350 skb->ip_summed = CHECKSUM_NONE;
1351
1352 /* checksum error bit is set */
1353 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1354 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1355 return;
1356
1357 /* It must be a TCP or UDP packet with a valid checksum */
1358 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1359 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1360 skb->ip_summed = CHECKSUM_UNNECESSARY;
1361}
1362
1363static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1364{
1365 struct sk_buff *ax_skb;
1366 int pkt_cnt;
1367 u32 rx_hdr;
1368 u16 hdr_off;
1369 u32 *pkt_hdr;
1370
1371 /* At the end of the SKB, there's a header telling us how many packets
1372 * are bundled into this buffer and where we can find an array of
1373 * per-packet metadata (which contains elements encoded into u16).
1374 */
1375
1376 /* SKB contents for current firmware:
1377 * <packet 1> <padding>
1378 * ...
1379 * <packet N> <padding>
1380 * <per-packet metadata entry 1> <dummy header>
1381 * ...
1382 * <per-packet metadata entry N> <dummy header>
1383 * <padding2> <rx_hdr>
1384 *
1385 * where:
1386 * <packet N> contains pkt_len bytes:
1387 * 2 bytes of IP alignment pseudo header
1388 * packet received
1389 * <per-packet metadata entry N> contains 4 bytes:
1390 * pkt_len and fields AX_RXHDR_*
1391 * <padding> 0-7 bytes to terminate at
1392 * 8 bytes boundary (64-bit).
1393 * <padding2> 4 bytes to make rx_hdr terminate at
1394 * 8 bytes boundary (64-bit)
1395 * <dummy-header> contains 4 bytes:
1396 * pkt_len=0 and AX_RXHDR_DROP_ERR
1397 * <rx-hdr> contains 4 bytes:
1398 * pkt_cnt and hdr_off (offset of
1399 * <per-packet metadata entry 1>)
1400 *
1401 * pkt_cnt is number of entrys in the per-packet metadata.
1402 * In current firmware there is 2 entrys per packet.
1403 * The first points to the packet and the
1404 * second is a dummy header.
1405 * This was done probably to align fields in 64-bit and
1406 * maintain compatibility with old firmware.
1407 * This code assumes that <dummy header> and <padding2> are
1408 * optional.
1409 */
1410
1411 if (skb->len < 4)
1412 return 0;
1413 skb_trim(skb, skb->len - 4);
1414 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1415 pkt_cnt = (u16)rx_hdr;
1416 hdr_off = (u16)(rx_hdr >> 16);
1417
1418 if (pkt_cnt == 0)
1419 return 0;
1420
1421 /* Make sure that the bounds of the metadata array are inside the SKB
1422 * (and in front of the counter at the end).
1423 */
1424 if (pkt_cnt * 4 + hdr_off > skb->len)
1425 return 0;
1426 pkt_hdr = (u32 *)(skb->data + hdr_off);
1427
1428 /* Packets must not overlap the metadata array */
1429 skb_trim(skb, hdr_off);
1430
1431 for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1432 u16 pkt_len_plus_padd;
1433 u16 pkt_len;
1434
1435 le32_to_cpus(pkt_hdr);
1436 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1437 pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1438
1439 /* Skip dummy header used for alignment
1440 */
1441 if (pkt_len == 0)
1442 continue;
1443
1444 if (pkt_len_plus_padd > skb->len)
1445 return 0;
1446
1447 /* Check CRC or runt packet */
1448 if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1449 pkt_len < 2 + ETH_HLEN) {
1450 dev->net->stats.rx_errors++;
1451 skb_pull(skb, pkt_len_plus_padd);
1452 continue;
1453 }
1454
1455 /* last packet */
1456 if (pkt_len_plus_padd == skb->len) {
1457 skb_trim(skb, pkt_len);
1458
1459 /* Skip IP alignment pseudo header */
1460 skb_pull(skb, 2);
1461
1462 ax88179_rx_checksum(skb, pkt_hdr);
1463 return 1;
1464 }
1465
1466 ax_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len);
1467 if (!ax_skb)
1468 return 0;
1469 skb_put(ax_skb, pkt_len);
1470 memcpy(ax_skb->data, skb->data + 2, pkt_len);
1471
1472 ax88179_rx_checksum(ax_skb, pkt_hdr);
1473 usbnet_skb_return(dev, ax_skb);
1474
1475 skb_pull(skb, pkt_len_plus_padd);
1476 }
1477
1478 return 0;
1479}
1480
1481static struct sk_buff *
1482ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1483{
1484 u32 tx_hdr1, tx_hdr2;
1485 int frame_size = dev->maxpacket;
1486 int headroom;
1487 void *ptr;
1488
1489 tx_hdr1 = skb->len;
1490 tx_hdr2 = skb_shinfo(skb)->gso_size; /* Set TSO mss */
1491 if (((skb->len + 8) % frame_size) == 0)
1492 tx_hdr2 |= 0x80008000; /* Enable padding */
1493
1494 headroom = skb_headroom(skb) - 8;
1495
1496 if ((dev->net->features & NETIF_F_SG) && skb_linearize(skb))
1497 return NULL;
1498
1499 if ((skb_header_cloned(skb) || headroom < 0) &&
1500 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1501 dev_kfree_skb_any(skb);
1502 return NULL;
1503 }
1504
1505 ptr = skb_push(skb, 8);
1506 put_unaligned_le32(tx_hdr1, ptr);
1507 put_unaligned_le32(tx_hdr2, ptr + 4);
1508
1509 usbnet_set_skb_tx_stats(skb, (skb_shinfo(skb)->gso_segs ?: 1), 0);
1510
1511 return skb;
1512}
1513
1514static int ax88179_link_reset(struct usbnet *dev)
1515{
1516 struct ax88179_data *ax179_data = dev->driver_priv;
1517 u8 tmp[5], link_sts;
1518 u16 mode, tmp16, delay = HZ / 10;
1519 u32 tmp32 = 0x40000000;
1520 unsigned long jtimeout;
1521
1522 jtimeout = jiffies + delay;
1523 while (tmp32 & 0x40000000) {
1524 mode = 0;
1525 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1526 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1527 &ax179_data->rxctl);
1528
1529 /*link up, check the usb device control TX FIFO full or empty*/
1530 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1531
1532 if (time_after(jiffies, jtimeout))
1533 return 0;
1534 }
1535
1536 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1537 AX_MEDIUM_RXFLOW_CTRLEN;
1538
1539 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1540 1, 1, &link_sts);
1541
1542 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1543 GMII_PHY_PHYSR, 2, &tmp16);
1544
1545 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1546 netdev_info(dev->net, "ax88179 - Link status is: 0\n");
1547 return 0;
1548 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1549 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1550 if (dev->net->mtu > 1500)
1551 mode |= AX_MEDIUM_JUMBO_EN;
1552
1553 if (link_sts & AX_USB_SS)
1554 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1555 else if (link_sts & AX_USB_HS)
1556 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1557 else
1558 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1559 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1560 mode |= AX_MEDIUM_PS;
1561
1562 if (link_sts & (AX_USB_SS | AX_USB_HS))
1563 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1564 else
1565 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1566 } else {
1567 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1568 }
1569
1570 /* RX bulk configuration */
1571 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1572
1573 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1574
1575 if (tmp16 & GMII_PHY_PHYSR_FULL)
1576 mode |= AX_MEDIUM_FULL_DUPLEX;
1577 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1578 2, 2, &mode);
1579
1580 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1581
1582 netif_carrier_on(dev->net);
1583
1584 netdev_info(dev->net, "ax88179 - Link status is: 1\n");
1585
1586 return 0;
1587}
1588
1589static int ax88179_reset(struct usbnet *dev)
1590{
1591 u8 buf[5];
1592 u16 *tmp16;
1593 u8 *tmp;
1594 struct ax88179_data *ax179_data = dev->driver_priv;
1595 struct ethtool_keee eee_data;
1596
1597 tmp16 = (u16 *)buf;
1598 tmp = (u8 *)buf;
1599
1600 /* Power up ethernet PHY */
1601 *tmp16 = 0;
1602 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1603
1604 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1605 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1606 msleep(500);
1607
1608 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1609 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1610 msleep(200);
1611
1612 /* Ethernet PHY Auto Detach*/
1613 ax88179_auto_detach(dev);
1614
1615 /* Read MAC address from DTB or asix chip */
1616 ax88179_get_mac_addr(dev);
1617 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1618
1619 /* RX bulk configuration */
1620 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1621 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1622
1623 dev->rx_urb_size = 1024 * 20;
1624
1625 *tmp = 0x34;
1626 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1627
1628 *tmp = 0x52;
1629 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1630 1, 1, tmp);
1631
1632 /* Enable checksum offload */
1633 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1634 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1635 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1636
1637 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1638 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1639 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1640
1641 /* Configure RX control register => start operation */
1642 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1643 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1644 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1645
1646 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1647 AX_MONITOR_MODE_RWMP;
1648 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1649
1650 /* Configure default medium type => giga */
1651 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1652 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1653 AX_MEDIUM_GIGAMODE;
1654 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1655 2, 2, tmp16);
1656
1657 /* Check if WoL is supported */
1658 ax179_data->wol_supported = 0;
1659 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
1660 1, 1, &tmp) > 0)
1661 ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
1662
1663 ax88179_led_setting(dev);
1664
1665 ax179_data->eee_enabled = 0;
1666 ax179_data->eee_active = 0;
1667
1668 ax88179_disable_eee(dev);
1669
1670 ax88179_ethtool_get_eee(dev, &eee_data);
1671 linkmode_zero(eee_data.advertised);
1672 ax88179_ethtool_set_eee(dev, &eee_data);
1673
1674 /* Restart autoneg */
1675 mii_nway_restart(&dev->mii);
1676
1677 usbnet_link_change(dev, 0, 0);
1678
1679 return 0;
1680}
1681
1682static int ax88179_net_reset(struct usbnet *dev)
1683{
1684 u16 tmp16;
1685
1686 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, GMII_PHY_PHYSR,
1687 2, &tmp16);
1688 if (tmp16) {
1689 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1690 2, 2, &tmp16);
1691 if (!(tmp16 & AX_MEDIUM_RECEIVE_EN)) {
1692 tmp16 |= AX_MEDIUM_RECEIVE_EN;
1693 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1694 2, 2, &tmp16);
1695 }
1696 } else {
1697 ax88179_reset(dev);
1698 }
1699
1700 return 0;
1701}
1702
1703static int ax88179_stop(struct usbnet *dev)
1704{
1705 u16 tmp16;
1706
1707 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1708 2, 2, &tmp16);
1709 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1710 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1711 2, 2, &tmp16);
1712
1713 return 0;
1714}
1715
1716static const struct driver_info ax88179_info = {
1717 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1718 .bind = ax88179_bind,
1719 .unbind = ax88179_unbind,
1720 .status = ax88179_status,
1721 .link_reset = ax88179_link_reset,
1722 .reset = ax88179_net_reset,
1723 .stop = ax88179_stop,
1724 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1725 .rx_fixup = ax88179_rx_fixup,
1726 .tx_fixup = ax88179_tx_fixup,
1727};
1728
1729static const struct driver_info ax88178a_info = {
1730 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1731 .bind = ax88179_bind,
1732 .unbind = ax88179_unbind,
1733 .status = ax88179_status,
1734 .link_reset = ax88179_link_reset,
1735 .reset = ax88179_net_reset,
1736 .stop = ax88179_stop,
1737 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1738 .rx_fixup = ax88179_rx_fixup,
1739 .tx_fixup = ax88179_tx_fixup,
1740};
1741
1742static const struct driver_info cypress_GX3_info = {
1743 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1744 .bind = ax88179_bind,
1745 .unbind = ax88179_unbind,
1746 .status = ax88179_status,
1747 .link_reset = ax88179_link_reset,
1748 .reset = ax88179_net_reset,
1749 .stop = ax88179_stop,
1750 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1751 .rx_fixup = ax88179_rx_fixup,
1752 .tx_fixup = ax88179_tx_fixup,
1753};
1754
1755static const struct driver_info dlink_dub1312_info = {
1756 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1757 .bind = ax88179_bind,
1758 .unbind = ax88179_unbind,
1759 .status = ax88179_status,
1760 .link_reset = ax88179_link_reset,
1761 .reset = ax88179_net_reset,
1762 .stop = ax88179_stop,
1763 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1764 .rx_fixup = ax88179_rx_fixup,
1765 .tx_fixup = ax88179_tx_fixup,
1766};
1767
1768static const struct driver_info sitecom_info = {
1769 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1770 .bind = ax88179_bind,
1771 .unbind = ax88179_unbind,
1772 .status = ax88179_status,
1773 .link_reset = ax88179_link_reset,
1774 .reset = ax88179_net_reset,
1775 .stop = ax88179_stop,
1776 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1777 .rx_fixup = ax88179_rx_fixup,
1778 .tx_fixup = ax88179_tx_fixup,
1779};
1780
1781static const struct driver_info samsung_info = {
1782 .description = "Samsung USB Ethernet Adapter",
1783 .bind = ax88179_bind,
1784 .unbind = ax88179_unbind,
1785 .status = ax88179_status,
1786 .link_reset = ax88179_link_reset,
1787 .reset = ax88179_net_reset,
1788 .stop = ax88179_stop,
1789 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1790 .rx_fixup = ax88179_rx_fixup,
1791 .tx_fixup = ax88179_tx_fixup,
1792};
1793
1794static const struct driver_info lenovo_info = {
1795 .description = "Lenovo OneLinkDock Gigabit LAN",
1796 .bind = ax88179_bind,
1797 .unbind = ax88179_unbind,
1798 .status = ax88179_status,
1799 .link_reset = ax88179_link_reset,
1800 .reset = ax88179_net_reset,
1801 .stop = ax88179_stop,
1802 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1803 .rx_fixup = ax88179_rx_fixup,
1804 .tx_fixup = ax88179_tx_fixup,
1805};
1806
1807static const struct driver_info belkin_info = {
1808 .description = "Belkin USB Ethernet Adapter",
1809 .bind = ax88179_bind,
1810 .unbind = ax88179_unbind,
1811 .status = ax88179_status,
1812 .link_reset = ax88179_link_reset,
1813 .reset = ax88179_net_reset,
1814 .stop = ax88179_stop,
1815 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1816 .rx_fixup = ax88179_rx_fixup,
1817 .tx_fixup = ax88179_tx_fixup,
1818};
1819
1820static const struct driver_info toshiba_info = {
1821 .description = "Toshiba USB Ethernet Adapter",
1822 .bind = ax88179_bind,
1823 .unbind = ax88179_unbind,
1824 .status = ax88179_status,
1825 .link_reset = ax88179_link_reset,
1826 .reset = ax88179_net_reset,
1827 .stop = ax88179_stop,
1828 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1829 .rx_fixup = ax88179_rx_fixup,
1830 .tx_fixup = ax88179_tx_fixup,
1831};
1832
1833static const struct driver_info mct_info = {
1834 .description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1835 .bind = ax88179_bind,
1836 .unbind = ax88179_unbind,
1837 .status = ax88179_status,
1838 .link_reset = ax88179_link_reset,
1839 .reset = ax88179_net_reset,
1840 .stop = ax88179_stop,
1841 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1842 .rx_fixup = ax88179_rx_fixup,
1843 .tx_fixup = ax88179_tx_fixup,
1844};
1845
1846static const struct driver_info at_umc2000_info = {
1847 .description = "AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1848 .bind = ax88179_bind,
1849 .unbind = ax88179_unbind,
1850 .status = ax88179_status,
1851 .link_reset = ax88179_link_reset,
1852 .reset = ax88179_net_reset,
1853 .stop = ax88179_stop,
1854 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1855 .rx_fixup = ax88179_rx_fixup,
1856 .tx_fixup = ax88179_tx_fixup,
1857};
1858
1859static const struct driver_info at_umc200_info = {
1860 .description = "AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter",
1861 .bind = ax88179_bind,
1862 .unbind = ax88179_unbind,
1863 .status = ax88179_status,
1864 .link_reset = ax88179_link_reset,
1865 .reset = ax88179_net_reset,
1866 .stop = ax88179_stop,
1867 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1868 .rx_fixup = ax88179_rx_fixup,
1869 .tx_fixup = ax88179_tx_fixup,
1870};
1871
1872static const struct driver_info at_umc2000sp_info = {
1873 .description = "AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1874 .bind = ax88179_bind,
1875 .unbind = ax88179_unbind,
1876 .status = ax88179_status,
1877 .link_reset = ax88179_link_reset,
1878 .reset = ax88179_net_reset,
1879 .stop = ax88179_stop,
1880 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1881 .rx_fixup = ax88179_rx_fixup,
1882 .tx_fixup = ax88179_tx_fixup,
1883};
1884
1885static const struct usb_device_id products[] = {
1886{
1887 /* ASIX AX88179 10/100/1000 */
1888 USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
1889 .driver_info = (unsigned long)&ax88179_info,
1890}, {
1891 /* ASIX AX88178A 10/100/1000 */
1892 USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x178a, 0xff, 0xff, 0),
1893 .driver_info = (unsigned long)&ax88178a_info,
1894}, {
1895 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1896 USB_DEVICE_AND_INTERFACE_INFO(0x04b4, 0x3610, 0xff, 0xff, 0),
1897 .driver_info = (unsigned long)&cypress_GX3_info,
1898}, {
1899 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1900 USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x4a00, 0xff, 0xff, 0),
1901 .driver_info = (unsigned long)&dlink_dub1312_info,
1902}, {
1903 /* Sitecom USB 3.0 to Gigabit Adapter */
1904 USB_DEVICE_AND_INTERFACE_INFO(0x0df6, 0x0072, 0xff, 0xff, 0),
1905 .driver_info = (unsigned long)&sitecom_info,
1906}, {
1907 /* Samsung USB Ethernet Adapter */
1908 USB_DEVICE_AND_INTERFACE_INFO(0x04e8, 0xa100, 0xff, 0xff, 0),
1909 .driver_info = (unsigned long)&samsung_info,
1910}, {
1911 /* Lenovo OneLinkDock Gigabit LAN */
1912 USB_DEVICE_AND_INTERFACE_INFO(0x17ef, 0x304b, 0xff, 0xff, 0),
1913 .driver_info = (unsigned long)&lenovo_info,
1914}, {
1915 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1916 USB_DEVICE_AND_INTERFACE_INFO(0x050d, 0x0128, 0xff, 0xff, 0),
1917 .driver_info = (unsigned long)&belkin_info,
1918}, {
1919 /* Toshiba USB 3.0 GBit Ethernet Adapter */
1920 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x0a13, 0xff, 0xff, 0),
1921 .driver_info = (unsigned long)&toshiba_info,
1922}, {
1923 /* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1924 USB_DEVICE_AND_INTERFACE_INFO(0x0711, 0x0179, 0xff, 0xff, 0),
1925 .driver_info = (unsigned long)&mct_info,
1926}, {
1927 /* Allied Telesis AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1928 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000e, 0xff, 0xff, 0),
1929 .driver_info = (unsigned long)&at_umc2000_info,
1930}, {
1931 /* Allied Telesis AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter */
1932 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000f, 0xff, 0xff, 0),
1933 .driver_info = (unsigned long)&at_umc200_info,
1934}, {
1935 /* Allied Telesis AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1936 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x0010, 0xff, 0xff, 0),
1937 .driver_info = (unsigned long)&at_umc2000sp_info,
1938},
1939 { },
1940};
1941MODULE_DEVICE_TABLE(usb, products);
1942
1943static struct usb_driver ax88179_178a_driver = {
1944 .name = "ax88179_178a",
1945 .id_table = products,
1946 .probe = usbnet_probe,
1947 .suspend = ax88179_suspend,
1948 .resume = ax88179_resume,
1949 .reset_resume = ax88179_resume,
1950 .disconnect = ax88179_disconnect,
1951 .supports_autosuspend = 1,
1952 .disable_hub_initiated_lpm = 1,
1953};
1954
1955module_usb_driver(ax88179_178a_driver);
1956
1957MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1958MODULE_LICENSE("GPL");