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1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/* Copyright 2017-2019 NXP */
3
4#include <linux/ethtool_netlink.h>
5#include <linux/net_tstamp.h>
6#include <linux/module.h>
7#include "enetc.h"
8
9static const u32 enetc_si_regs[] = {
10 ENETC_SIMR, ENETC_SIPMAR0, ENETC_SIPMAR1, ENETC_SICBDRMR,
11 ENETC_SICBDRSR, ENETC_SICBDRBAR0, ENETC_SICBDRBAR1, ENETC_SICBDRPIR,
12 ENETC_SICBDRCIR, ENETC_SICBDRLENR, ENETC_SICAPR0, ENETC_SICAPR1,
13 ENETC_SIUEFDCR
14};
15
16static const u32 enetc_txbdr_regs[] = {
17 ENETC_TBMR, ENETC_TBSR, ENETC_TBBAR0, ENETC_TBBAR1,
18 ENETC_TBPIR, ENETC_TBCIR, ENETC_TBLENR, ENETC_TBIER, ENETC_TBICR0,
19 ENETC_TBICR1
20};
21
22static const u32 enetc_rxbdr_regs[] = {
23 ENETC_RBMR, ENETC_RBSR, ENETC_RBBSR, ENETC_RBCIR, ENETC_RBBAR0,
24 ENETC_RBBAR1, ENETC_RBPIR, ENETC_RBLENR, ENETC_RBIER, ENETC_RBICR0,
25 ENETC_RBICR1
26};
27
28static const u32 enetc_port_regs[] = {
29 ENETC_PMR, ENETC_PSR, ENETC_PSIPMR, ENETC_PSIPMAR0(0),
30 ENETC_PSIPMAR1(0), ENETC_PTXMBAR, ENETC_PCAPR0, ENETC_PCAPR1,
31 ENETC_PSICFGR0(0), ENETC_PRFSCAPR, ENETC_PTCMSDUR(0),
32 ENETC_PM0_CMD_CFG, ENETC_PM0_MAXFRM, ENETC_PM0_IF_MODE
33};
34
35static const u32 enetc_port_mm_regs[] = {
36 ENETC_MMCSR, ENETC_PFPMR, ENETC_PTCFPR(0), ENETC_PTCFPR(1),
37 ENETC_PTCFPR(2), ENETC_PTCFPR(3), ENETC_PTCFPR(4), ENETC_PTCFPR(5),
38 ENETC_PTCFPR(6), ENETC_PTCFPR(7),
39};
40
41static int enetc_get_reglen(struct net_device *ndev)
42{
43 struct enetc_ndev_priv *priv = netdev_priv(ndev);
44 struct enetc_hw *hw = &priv->si->hw;
45 int len;
46
47 len = ARRAY_SIZE(enetc_si_regs);
48 len += ARRAY_SIZE(enetc_txbdr_regs) * priv->num_tx_rings;
49 len += ARRAY_SIZE(enetc_rxbdr_regs) * priv->num_rx_rings;
50
51 if (hw->port)
52 len += ARRAY_SIZE(enetc_port_regs);
53
54 if (hw->port && !!(priv->si->hw_features & ENETC_SI_F_QBU))
55 len += ARRAY_SIZE(enetc_port_mm_regs);
56
57 len *= sizeof(u32) * 2; /* store 2 entries per reg: addr and value */
58
59 return len;
60}
61
62static void enetc_get_regs(struct net_device *ndev, struct ethtool_regs *regs,
63 void *regbuf)
64{
65 struct enetc_ndev_priv *priv = netdev_priv(ndev);
66 struct enetc_hw *hw = &priv->si->hw;
67 u32 *buf = (u32 *)regbuf;
68 int i, j;
69 u32 addr;
70
71 for (i = 0; i < ARRAY_SIZE(enetc_si_regs); i++) {
72 *buf++ = enetc_si_regs[i];
73 *buf++ = enetc_rd(hw, enetc_si_regs[i]);
74 }
75
76 for (i = 0; i < priv->num_tx_rings; i++) {
77 for (j = 0; j < ARRAY_SIZE(enetc_txbdr_regs); j++) {
78 addr = ENETC_BDR(TX, i, enetc_txbdr_regs[j]);
79
80 *buf++ = addr;
81 *buf++ = enetc_rd(hw, addr);
82 }
83 }
84
85 for (i = 0; i < priv->num_rx_rings; i++) {
86 for (j = 0; j < ARRAY_SIZE(enetc_rxbdr_regs); j++) {
87 addr = ENETC_BDR(RX, i, enetc_rxbdr_regs[j]);
88
89 *buf++ = addr;
90 *buf++ = enetc_rd(hw, addr);
91 }
92 }
93
94 if (!hw->port)
95 return;
96
97 for (i = 0; i < ARRAY_SIZE(enetc_port_regs); i++) {
98 addr = ENETC_PORT_BASE + enetc_port_regs[i];
99 *buf++ = addr;
100 *buf++ = enetc_rd(hw, addr);
101 }
102
103 if (priv->si->hw_features & ENETC_SI_F_QBU) {
104 for (i = 0; i < ARRAY_SIZE(enetc_port_mm_regs); i++) {
105 addr = ENETC_PORT_BASE + enetc_port_mm_regs[i];
106 *buf++ = addr;
107 *buf++ = enetc_rd(hw, addr);
108 }
109 }
110}
111
112static const struct {
113 int reg;
114 char name[ETH_GSTRING_LEN];
115} enetc_si_counters[] = {
116 { ENETC_SIROCT, "SI rx octets" },
117 { ENETC_SIRFRM, "SI rx frames" },
118 { ENETC_SIRUCA, "SI rx u-cast frames" },
119 { ENETC_SIRMCA, "SI rx m-cast frames" },
120 { ENETC_SITOCT, "SI tx octets" },
121 { ENETC_SITFRM, "SI tx frames" },
122 { ENETC_SITUCA, "SI tx u-cast frames" },
123 { ENETC_SITMCA, "SI tx m-cast frames" },
124 { ENETC_RBDCR(0), "Rx ring 0 discarded frames" },
125 { ENETC_RBDCR(1), "Rx ring 1 discarded frames" },
126 { ENETC_RBDCR(2), "Rx ring 2 discarded frames" },
127 { ENETC_RBDCR(3), "Rx ring 3 discarded frames" },
128 { ENETC_RBDCR(4), "Rx ring 4 discarded frames" },
129 { ENETC_RBDCR(5), "Rx ring 5 discarded frames" },
130 { ENETC_RBDCR(6), "Rx ring 6 discarded frames" },
131 { ENETC_RBDCR(7), "Rx ring 7 discarded frames" },
132 { ENETC_RBDCR(8), "Rx ring 8 discarded frames" },
133 { ENETC_RBDCR(9), "Rx ring 9 discarded frames" },
134 { ENETC_RBDCR(10), "Rx ring 10 discarded frames" },
135 { ENETC_RBDCR(11), "Rx ring 11 discarded frames" },
136 { ENETC_RBDCR(12), "Rx ring 12 discarded frames" },
137 { ENETC_RBDCR(13), "Rx ring 13 discarded frames" },
138 { ENETC_RBDCR(14), "Rx ring 14 discarded frames" },
139 { ENETC_RBDCR(15), "Rx ring 15 discarded frames" },
140};
141
142static const struct {
143 int reg;
144 char name[ETH_GSTRING_LEN];
145} enetc_port_counters[] = {
146 { ENETC_PM_REOCT(0), "MAC rx ethernet octets" },
147 { ENETC_PM_RALN(0), "MAC rx alignment errors" },
148 { ENETC_PM_RXPF(0), "MAC rx valid pause frames" },
149 { ENETC_PM_RFRM(0), "MAC rx valid frames" },
150 { ENETC_PM_RFCS(0), "MAC rx fcs errors" },
151 { ENETC_PM_RVLAN(0), "MAC rx VLAN frames" },
152 { ENETC_PM_RERR(0), "MAC rx frame errors" },
153 { ENETC_PM_RUCA(0), "MAC rx unicast frames" },
154 { ENETC_PM_RMCA(0), "MAC rx multicast frames" },
155 { ENETC_PM_RBCA(0), "MAC rx broadcast frames" },
156 { ENETC_PM_RDRP(0), "MAC rx dropped packets" },
157 { ENETC_PM_RPKT(0), "MAC rx packets" },
158 { ENETC_PM_RUND(0), "MAC rx undersized packets" },
159 { ENETC_PM_R64(0), "MAC rx 64 byte packets" },
160 { ENETC_PM_R127(0), "MAC rx 65-127 byte packets" },
161 { ENETC_PM_R255(0), "MAC rx 128-255 byte packets" },
162 { ENETC_PM_R511(0), "MAC rx 256-511 byte packets" },
163 { ENETC_PM_R1023(0), "MAC rx 512-1023 byte packets" },
164 { ENETC_PM_R1522(0), "MAC rx 1024-1522 byte packets" },
165 { ENETC_PM_R1523X(0), "MAC rx 1523 to max-octet packets" },
166 { ENETC_PM_ROVR(0), "MAC rx oversized packets" },
167 { ENETC_PM_RJBR(0), "MAC rx jabber packets" },
168 { ENETC_PM_RFRG(0), "MAC rx fragment packets" },
169 { ENETC_PM_RCNP(0), "MAC rx control packets" },
170 { ENETC_PM_RDRNTP(0), "MAC rx fifo drop" },
171 { ENETC_PM_TEOCT(0), "MAC tx ethernet octets" },
172 { ENETC_PM_TOCT(0), "MAC tx octets" },
173 { ENETC_PM_TCRSE(0), "MAC tx carrier sense errors" },
174 { ENETC_PM_TXPF(0), "MAC tx valid pause frames" },
175 { ENETC_PM_TFRM(0), "MAC tx frames" },
176 { ENETC_PM_TFCS(0), "MAC tx fcs errors" },
177 { ENETC_PM_TVLAN(0), "MAC tx VLAN frames" },
178 { ENETC_PM_TERR(0), "MAC tx frame errors" },
179 { ENETC_PM_TUCA(0), "MAC tx unicast frames" },
180 { ENETC_PM_TMCA(0), "MAC tx multicast frames" },
181 { ENETC_PM_TBCA(0), "MAC tx broadcast frames" },
182 { ENETC_PM_TPKT(0), "MAC tx packets" },
183 { ENETC_PM_TUND(0), "MAC tx undersized packets" },
184 { ENETC_PM_T64(0), "MAC tx 64 byte packets" },
185 { ENETC_PM_T127(0), "MAC tx 65-127 byte packets" },
186 { ENETC_PM_T255(0), "MAC tx 128-255 byte packets" },
187 { ENETC_PM_T511(0), "MAC tx 256-511 byte packets" },
188 { ENETC_PM_T1023(0), "MAC tx 512-1023 byte packets" },
189 { ENETC_PM_T1522(0), "MAC tx 1024-1522 byte packets" },
190 { ENETC_PM_T1523X(0), "MAC tx 1523 to max-octet packets" },
191 { ENETC_PM_TCNP(0), "MAC tx control packets" },
192 { ENETC_PM_TDFR(0), "MAC tx deferred packets" },
193 { ENETC_PM_TMCOL(0), "MAC tx multiple collisions" },
194 { ENETC_PM_TSCOL(0), "MAC tx single collisions" },
195 { ENETC_PM_TLCOL(0), "MAC tx late collisions" },
196 { ENETC_PM_TECOL(0), "MAC tx excessive collisions" },
197 { ENETC_UFDMF, "SI MAC nomatch u-cast discards" },
198 { ENETC_MFDMF, "SI MAC nomatch m-cast discards" },
199 { ENETC_PBFDSIR, "SI MAC nomatch b-cast discards" },
200 { ENETC_PUFDVFR, "SI VLAN nomatch u-cast discards" },
201 { ENETC_PMFDVFR, "SI VLAN nomatch m-cast discards" },
202 { ENETC_PBFDVFR, "SI VLAN nomatch b-cast discards" },
203 { ENETC_PFDMSAPR, "SI pruning discarded frames" },
204 { ENETC_PICDR(0), "ICM DR0 discarded frames" },
205 { ENETC_PICDR(1), "ICM DR1 discarded frames" },
206 { ENETC_PICDR(2), "ICM DR2 discarded frames" },
207 { ENETC_PICDR(3), "ICM DR3 discarded frames" },
208};
209
210static const char rx_ring_stats[][ETH_GSTRING_LEN] = {
211 "Rx ring %2d frames",
212 "Rx ring %2d alloc errors",
213 "Rx ring %2d XDP drops",
214 "Rx ring %2d recycles",
215 "Rx ring %2d recycle failures",
216 "Rx ring %2d redirects",
217 "Rx ring %2d redirect failures",
218};
219
220static const char tx_ring_stats[][ETH_GSTRING_LEN] = {
221 "Tx ring %2d frames",
222 "Tx ring %2d XDP frames",
223 "Tx ring %2d XDP drops",
224 "Tx window drop %2d frames",
225};
226
227static int enetc_get_sset_count(struct net_device *ndev, int sset)
228{
229 struct enetc_ndev_priv *priv = netdev_priv(ndev);
230 int len;
231
232 if (sset != ETH_SS_STATS)
233 return -EOPNOTSUPP;
234
235 len = ARRAY_SIZE(enetc_si_counters) +
236 ARRAY_SIZE(tx_ring_stats) * priv->num_tx_rings +
237 ARRAY_SIZE(rx_ring_stats) * priv->num_rx_rings;
238
239 if (!enetc_si_is_pf(priv->si))
240 return len;
241
242 len += ARRAY_SIZE(enetc_port_counters);
243
244 return len;
245}
246
247static void enetc_get_strings(struct net_device *ndev, u32 stringset, u8 *data)
248{
249 struct enetc_ndev_priv *priv = netdev_priv(ndev);
250 int i, j;
251
252 switch (stringset) {
253 case ETH_SS_STATS:
254 for (i = 0; i < ARRAY_SIZE(enetc_si_counters); i++)
255 ethtool_puts(&data, enetc_si_counters[i].name);
256 for (i = 0; i < priv->num_tx_rings; i++)
257 for (j = 0; j < ARRAY_SIZE(tx_ring_stats); j++)
258 ethtool_sprintf(&data, tx_ring_stats[j], i);
259 for (i = 0; i < priv->num_rx_rings; i++)
260 for (j = 0; j < ARRAY_SIZE(rx_ring_stats); j++)
261 ethtool_sprintf(&data, rx_ring_stats[j], i);
262
263 if (!enetc_si_is_pf(priv->si))
264 break;
265
266 for (i = 0; i < ARRAY_SIZE(enetc_port_counters); i++)
267 ethtool_puts(&data, enetc_port_counters[i].name);
268
269 break;
270 }
271}
272
273static void enetc_get_ethtool_stats(struct net_device *ndev,
274 struct ethtool_stats *stats, u64 *data)
275{
276 struct enetc_ndev_priv *priv = netdev_priv(ndev);
277 struct enetc_hw *hw = &priv->si->hw;
278 int i, o = 0;
279
280 for (i = 0; i < ARRAY_SIZE(enetc_si_counters); i++)
281 data[o++] = enetc_rd64(hw, enetc_si_counters[i].reg);
282
283 for (i = 0; i < priv->num_tx_rings; i++) {
284 data[o++] = priv->tx_ring[i]->stats.packets;
285 data[o++] = priv->tx_ring[i]->stats.xdp_tx;
286 data[o++] = priv->tx_ring[i]->stats.xdp_tx_drops;
287 data[o++] = priv->tx_ring[i]->stats.win_drop;
288 }
289
290 for (i = 0; i < priv->num_rx_rings; i++) {
291 data[o++] = priv->rx_ring[i]->stats.packets;
292 data[o++] = priv->rx_ring[i]->stats.rx_alloc_errs;
293 data[o++] = priv->rx_ring[i]->stats.xdp_drops;
294 data[o++] = priv->rx_ring[i]->stats.recycles;
295 data[o++] = priv->rx_ring[i]->stats.recycle_failures;
296 data[o++] = priv->rx_ring[i]->stats.xdp_redirect;
297 data[o++] = priv->rx_ring[i]->stats.xdp_redirect_failures;
298 }
299
300 if (!enetc_si_is_pf(priv->si))
301 return;
302
303 for (i = 0; i < ARRAY_SIZE(enetc_port_counters); i++)
304 data[o++] = enetc_port_rd(hw, enetc_port_counters[i].reg);
305}
306
307static void enetc_pause_stats(struct enetc_hw *hw, int mac,
308 struct ethtool_pause_stats *pause_stats)
309{
310 pause_stats->tx_pause_frames = enetc_port_rd(hw, ENETC_PM_TXPF(mac));
311 pause_stats->rx_pause_frames = enetc_port_rd(hw, ENETC_PM_RXPF(mac));
312}
313
314static void enetc_get_pause_stats(struct net_device *ndev,
315 struct ethtool_pause_stats *pause_stats)
316{
317 struct enetc_ndev_priv *priv = netdev_priv(ndev);
318 struct enetc_hw *hw = &priv->si->hw;
319 struct enetc_si *si = priv->si;
320
321 switch (pause_stats->src) {
322 case ETHTOOL_MAC_STATS_SRC_EMAC:
323 enetc_pause_stats(hw, 0, pause_stats);
324 break;
325 case ETHTOOL_MAC_STATS_SRC_PMAC:
326 if (si->hw_features & ENETC_SI_F_QBU)
327 enetc_pause_stats(hw, 1, pause_stats);
328 break;
329 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
330 ethtool_aggregate_pause_stats(ndev, pause_stats);
331 break;
332 }
333}
334
335static void enetc_mac_stats(struct enetc_hw *hw, int mac,
336 struct ethtool_eth_mac_stats *s)
337{
338 s->FramesTransmittedOK = enetc_port_rd(hw, ENETC_PM_TFRM(mac));
339 s->SingleCollisionFrames = enetc_port_rd(hw, ENETC_PM_TSCOL(mac));
340 s->MultipleCollisionFrames = enetc_port_rd(hw, ENETC_PM_TMCOL(mac));
341 s->FramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RFRM(mac));
342 s->FrameCheckSequenceErrors = enetc_port_rd(hw, ENETC_PM_RFCS(mac));
343 s->AlignmentErrors = enetc_port_rd(hw, ENETC_PM_RALN(mac));
344 s->OctetsTransmittedOK = enetc_port_rd(hw, ENETC_PM_TEOCT(mac));
345 s->FramesWithDeferredXmissions = enetc_port_rd(hw, ENETC_PM_TDFR(mac));
346 s->LateCollisions = enetc_port_rd(hw, ENETC_PM_TLCOL(mac));
347 s->FramesAbortedDueToXSColls = enetc_port_rd(hw, ENETC_PM_TECOL(mac));
348 s->FramesLostDueToIntMACXmitError = enetc_port_rd(hw, ENETC_PM_TERR(mac));
349 s->CarrierSenseErrors = enetc_port_rd(hw, ENETC_PM_TCRSE(mac));
350 s->OctetsReceivedOK = enetc_port_rd(hw, ENETC_PM_REOCT(mac));
351 s->FramesLostDueToIntMACRcvError = enetc_port_rd(hw, ENETC_PM_RDRNTP(mac));
352 s->MulticastFramesXmittedOK = enetc_port_rd(hw, ENETC_PM_TMCA(mac));
353 s->BroadcastFramesXmittedOK = enetc_port_rd(hw, ENETC_PM_TBCA(mac));
354 s->MulticastFramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RMCA(mac));
355 s->BroadcastFramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RBCA(mac));
356}
357
358static void enetc_ctrl_stats(struct enetc_hw *hw, int mac,
359 struct ethtool_eth_ctrl_stats *s)
360{
361 s->MACControlFramesTransmitted = enetc_port_rd(hw, ENETC_PM_TCNP(mac));
362 s->MACControlFramesReceived = enetc_port_rd(hw, ENETC_PM_RCNP(mac));
363}
364
365static const struct ethtool_rmon_hist_range enetc_rmon_ranges[] = {
366 { 64, 64 },
367 { 65, 127 },
368 { 128, 255 },
369 { 256, 511 },
370 { 512, 1023 },
371 { 1024, 1522 },
372 { 1523, ENETC_MAC_MAXFRM_SIZE },
373 {},
374};
375
376static void enetc_rmon_stats(struct enetc_hw *hw, int mac,
377 struct ethtool_rmon_stats *s)
378{
379 s->undersize_pkts = enetc_port_rd(hw, ENETC_PM_RUND(mac));
380 s->oversize_pkts = enetc_port_rd(hw, ENETC_PM_ROVR(mac));
381 s->fragments = enetc_port_rd(hw, ENETC_PM_RFRG(mac));
382 s->jabbers = enetc_port_rd(hw, ENETC_PM_RJBR(mac));
383
384 s->hist[0] = enetc_port_rd(hw, ENETC_PM_R64(mac));
385 s->hist[1] = enetc_port_rd(hw, ENETC_PM_R127(mac));
386 s->hist[2] = enetc_port_rd(hw, ENETC_PM_R255(mac));
387 s->hist[3] = enetc_port_rd(hw, ENETC_PM_R511(mac));
388 s->hist[4] = enetc_port_rd(hw, ENETC_PM_R1023(mac));
389 s->hist[5] = enetc_port_rd(hw, ENETC_PM_R1522(mac));
390 s->hist[6] = enetc_port_rd(hw, ENETC_PM_R1523X(mac));
391
392 s->hist_tx[0] = enetc_port_rd(hw, ENETC_PM_T64(mac));
393 s->hist_tx[1] = enetc_port_rd(hw, ENETC_PM_T127(mac));
394 s->hist_tx[2] = enetc_port_rd(hw, ENETC_PM_T255(mac));
395 s->hist_tx[3] = enetc_port_rd(hw, ENETC_PM_T511(mac));
396 s->hist_tx[4] = enetc_port_rd(hw, ENETC_PM_T1023(mac));
397 s->hist_tx[5] = enetc_port_rd(hw, ENETC_PM_T1522(mac));
398 s->hist_tx[6] = enetc_port_rd(hw, ENETC_PM_T1523X(mac));
399}
400
401static void enetc_get_eth_mac_stats(struct net_device *ndev,
402 struct ethtool_eth_mac_stats *mac_stats)
403{
404 struct enetc_ndev_priv *priv = netdev_priv(ndev);
405 struct enetc_hw *hw = &priv->si->hw;
406 struct enetc_si *si = priv->si;
407
408 switch (mac_stats->src) {
409 case ETHTOOL_MAC_STATS_SRC_EMAC:
410 enetc_mac_stats(hw, 0, mac_stats);
411 break;
412 case ETHTOOL_MAC_STATS_SRC_PMAC:
413 if (si->hw_features & ENETC_SI_F_QBU)
414 enetc_mac_stats(hw, 1, mac_stats);
415 break;
416 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
417 ethtool_aggregate_mac_stats(ndev, mac_stats);
418 break;
419 }
420}
421
422static void enetc_get_eth_ctrl_stats(struct net_device *ndev,
423 struct ethtool_eth_ctrl_stats *ctrl_stats)
424{
425 struct enetc_ndev_priv *priv = netdev_priv(ndev);
426 struct enetc_hw *hw = &priv->si->hw;
427 struct enetc_si *si = priv->si;
428
429 switch (ctrl_stats->src) {
430 case ETHTOOL_MAC_STATS_SRC_EMAC:
431 enetc_ctrl_stats(hw, 0, ctrl_stats);
432 break;
433 case ETHTOOL_MAC_STATS_SRC_PMAC:
434 if (si->hw_features & ENETC_SI_F_QBU)
435 enetc_ctrl_stats(hw, 1, ctrl_stats);
436 break;
437 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
438 ethtool_aggregate_ctrl_stats(ndev, ctrl_stats);
439 break;
440 }
441}
442
443static void enetc_get_rmon_stats(struct net_device *ndev,
444 struct ethtool_rmon_stats *rmon_stats,
445 const struct ethtool_rmon_hist_range **ranges)
446{
447 struct enetc_ndev_priv *priv = netdev_priv(ndev);
448 struct enetc_hw *hw = &priv->si->hw;
449 struct enetc_si *si = priv->si;
450
451 *ranges = enetc_rmon_ranges;
452
453 switch (rmon_stats->src) {
454 case ETHTOOL_MAC_STATS_SRC_EMAC:
455 enetc_rmon_stats(hw, 0, rmon_stats);
456 break;
457 case ETHTOOL_MAC_STATS_SRC_PMAC:
458 if (si->hw_features & ENETC_SI_F_QBU)
459 enetc_rmon_stats(hw, 1, rmon_stats);
460 break;
461 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
462 ethtool_aggregate_rmon_stats(ndev, rmon_stats);
463 break;
464 }
465}
466
467#define ENETC_RSSHASH_L3 (RXH_L2DA | RXH_VLAN | RXH_L3_PROTO | RXH_IP_SRC | \
468 RXH_IP_DST)
469#define ENETC_RSSHASH_L4 (ENETC_RSSHASH_L3 | RXH_L4_B_0_1 | RXH_L4_B_2_3)
470static int enetc_get_rsshash(struct ethtool_rxnfc *rxnfc)
471{
472 static const u32 rsshash[] = {
473 [TCP_V4_FLOW] = ENETC_RSSHASH_L4,
474 [UDP_V4_FLOW] = ENETC_RSSHASH_L4,
475 [SCTP_V4_FLOW] = ENETC_RSSHASH_L4,
476 [AH_ESP_V4_FLOW] = ENETC_RSSHASH_L3,
477 [IPV4_FLOW] = ENETC_RSSHASH_L3,
478 [TCP_V6_FLOW] = ENETC_RSSHASH_L4,
479 [UDP_V6_FLOW] = ENETC_RSSHASH_L4,
480 [SCTP_V6_FLOW] = ENETC_RSSHASH_L4,
481 [AH_ESP_V6_FLOW] = ENETC_RSSHASH_L3,
482 [IPV6_FLOW] = ENETC_RSSHASH_L3,
483 [ETHER_FLOW] = 0,
484 };
485
486 if (rxnfc->flow_type >= ARRAY_SIZE(rsshash))
487 return -EINVAL;
488
489 rxnfc->data = rsshash[rxnfc->flow_type];
490
491 return 0;
492}
493
494/* current HW spec does byte reversal on everything including MAC addresses */
495static void ether_addr_copy_swap(u8 *dst, const u8 *src)
496{
497 int i;
498
499 for (i = 0; i < ETH_ALEN; i++)
500 dst[i] = src[ETH_ALEN - i - 1];
501}
502
503static int enetc_set_cls_entry(struct enetc_si *si,
504 struct ethtool_rx_flow_spec *fs, bool en)
505{
506 struct ethtool_tcpip4_spec *l4ip4_h, *l4ip4_m;
507 struct ethtool_usrip4_spec *l3ip4_h, *l3ip4_m;
508 struct ethhdr *eth_h, *eth_m;
509 struct enetc_cmd_rfse rfse = { {0} };
510
511 if (!en)
512 goto done;
513
514 switch (fs->flow_type & 0xff) {
515 case TCP_V4_FLOW:
516 l4ip4_h = &fs->h_u.tcp_ip4_spec;
517 l4ip4_m = &fs->m_u.tcp_ip4_spec;
518 goto l4ip4;
519 case UDP_V4_FLOW:
520 l4ip4_h = &fs->h_u.udp_ip4_spec;
521 l4ip4_m = &fs->m_u.udp_ip4_spec;
522 goto l4ip4;
523 case SCTP_V4_FLOW:
524 l4ip4_h = &fs->h_u.sctp_ip4_spec;
525 l4ip4_m = &fs->m_u.sctp_ip4_spec;
526l4ip4:
527 rfse.sip_h[0] = l4ip4_h->ip4src;
528 rfse.sip_m[0] = l4ip4_m->ip4src;
529 rfse.dip_h[0] = l4ip4_h->ip4dst;
530 rfse.dip_m[0] = l4ip4_m->ip4dst;
531 rfse.sport_h = ntohs(l4ip4_h->psrc);
532 rfse.sport_m = ntohs(l4ip4_m->psrc);
533 rfse.dport_h = ntohs(l4ip4_h->pdst);
534 rfse.dport_m = ntohs(l4ip4_m->pdst);
535 if (l4ip4_m->tos)
536 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n");
537 rfse.ethtype_h = ETH_P_IP; /* IPv4 */
538 rfse.ethtype_m = 0xffff;
539 break;
540 case IP_USER_FLOW:
541 l3ip4_h = &fs->h_u.usr_ip4_spec;
542 l3ip4_m = &fs->m_u.usr_ip4_spec;
543
544 rfse.sip_h[0] = l3ip4_h->ip4src;
545 rfse.sip_m[0] = l3ip4_m->ip4src;
546 rfse.dip_h[0] = l3ip4_h->ip4dst;
547 rfse.dip_m[0] = l3ip4_m->ip4dst;
548 if (l3ip4_m->tos)
549 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n");
550 rfse.ethtype_h = ETH_P_IP; /* IPv4 */
551 rfse.ethtype_m = 0xffff;
552 break;
553 case ETHER_FLOW:
554 eth_h = &fs->h_u.ether_spec;
555 eth_m = &fs->m_u.ether_spec;
556
557 ether_addr_copy_swap(rfse.smac_h, eth_h->h_source);
558 ether_addr_copy_swap(rfse.smac_m, eth_m->h_source);
559 ether_addr_copy_swap(rfse.dmac_h, eth_h->h_dest);
560 ether_addr_copy_swap(rfse.dmac_m, eth_m->h_dest);
561 rfse.ethtype_h = ntohs(eth_h->h_proto);
562 rfse.ethtype_m = ntohs(eth_m->h_proto);
563 break;
564 default:
565 return -EOPNOTSUPP;
566 }
567
568 rfse.mode |= ENETC_RFSE_EN;
569 if (fs->ring_cookie != RX_CLS_FLOW_DISC) {
570 rfse.mode |= ENETC_RFSE_MODE_BD;
571 rfse.result = fs->ring_cookie;
572 }
573done:
574 return enetc_set_fs_entry(si, &rfse, fs->location);
575}
576
577static int enetc_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc,
578 u32 *rule_locs)
579{
580 struct enetc_ndev_priv *priv = netdev_priv(ndev);
581 int i, j;
582
583 switch (rxnfc->cmd) {
584 case ETHTOOL_GRXRINGS:
585 rxnfc->data = priv->num_rx_rings;
586 break;
587 case ETHTOOL_GRXFH:
588 /* get RSS hash config */
589 return enetc_get_rsshash(rxnfc);
590 case ETHTOOL_GRXCLSRLCNT:
591 /* total number of entries */
592 rxnfc->data = priv->si->num_fs_entries;
593 /* number of entries in use */
594 rxnfc->rule_cnt = 0;
595 for (i = 0; i < priv->si->num_fs_entries; i++)
596 if (priv->cls_rules[i].used)
597 rxnfc->rule_cnt++;
598 break;
599 case ETHTOOL_GRXCLSRULE:
600 if (rxnfc->fs.location >= priv->si->num_fs_entries)
601 return -EINVAL;
602
603 /* get entry x */
604 rxnfc->fs = priv->cls_rules[rxnfc->fs.location].fs;
605 break;
606 case ETHTOOL_GRXCLSRLALL:
607 /* total number of entries */
608 rxnfc->data = priv->si->num_fs_entries;
609 /* array of indexes of used entries */
610 j = 0;
611 for (i = 0; i < priv->si->num_fs_entries; i++) {
612 if (!priv->cls_rules[i].used)
613 continue;
614 if (j == rxnfc->rule_cnt)
615 return -EMSGSIZE;
616 rule_locs[j++] = i;
617 }
618 /* number of entries in use */
619 rxnfc->rule_cnt = j;
620 break;
621 default:
622 return -EOPNOTSUPP;
623 }
624
625 return 0;
626}
627
628static int enetc_set_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc)
629{
630 struct enetc_ndev_priv *priv = netdev_priv(ndev);
631 int err;
632
633 switch (rxnfc->cmd) {
634 case ETHTOOL_SRXCLSRLINS:
635 if (rxnfc->fs.location >= priv->si->num_fs_entries)
636 return -EINVAL;
637
638 if (rxnfc->fs.ring_cookie >= priv->num_rx_rings &&
639 rxnfc->fs.ring_cookie != RX_CLS_FLOW_DISC)
640 return -EINVAL;
641
642 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, true);
643 if (err)
644 return err;
645 priv->cls_rules[rxnfc->fs.location].fs = rxnfc->fs;
646 priv->cls_rules[rxnfc->fs.location].used = 1;
647 break;
648 case ETHTOOL_SRXCLSRLDEL:
649 if (rxnfc->fs.location >= priv->si->num_fs_entries)
650 return -EINVAL;
651
652 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, false);
653 if (err)
654 return err;
655 priv->cls_rules[rxnfc->fs.location].used = 0;
656 break;
657 default:
658 return -EOPNOTSUPP;
659 }
660
661 return 0;
662}
663
664static u32 enetc_get_rxfh_key_size(struct net_device *ndev)
665{
666 struct enetc_ndev_priv *priv = netdev_priv(ndev);
667
668 /* return the size of the RX flow hash key. PF only */
669 return (priv->si->hw.port) ? ENETC_RSSHASH_KEY_SIZE : 0;
670}
671
672static u32 enetc_get_rxfh_indir_size(struct net_device *ndev)
673{
674 struct enetc_ndev_priv *priv = netdev_priv(ndev);
675
676 /* return the size of the RX flow hash indirection table */
677 return priv->si->num_rss;
678}
679
680static int enetc_get_rxfh(struct net_device *ndev,
681 struct ethtool_rxfh_param *rxfh)
682{
683 struct enetc_ndev_priv *priv = netdev_priv(ndev);
684 struct enetc_hw *hw = &priv->si->hw;
685 int err = 0, i;
686
687 /* return hash function */
688 rxfh->hfunc = ETH_RSS_HASH_TOP;
689
690 /* return hash key */
691 if (rxfh->key && hw->port)
692 for (i = 0; i < ENETC_RSSHASH_KEY_SIZE / 4; i++)
693 ((u32 *)rxfh->key)[i] = enetc_port_rd(hw,
694 ENETC_PRSSK(i));
695
696 /* return RSS table */
697 if (rxfh->indir)
698 err = enetc_get_rss_table(priv->si, rxfh->indir,
699 priv->si->num_rss);
700
701 return err;
702}
703
704void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes)
705{
706 int i;
707
708 for (i = 0; i < ENETC_RSSHASH_KEY_SIZE / 4; i++)
709 enetc_port_wr(hw, ENETC_PRSSK(i), ((u32 *)bytes)[i]);
710}
711EXPORT_SYMBOL_GPL(enetc_set_rss_key);
712
713static int enetc_set_rxfh(struct net_device *ndev,
714 struct ethtool_rxfh_param *rxfh,
715 struct netlink_ext_ack *extack)
716{
717 struct enetc_ndev_priv *priv = netdev_priv(ndev);
718 struct enetc_hw *hw = &priv->si->hw;
719 int err = 0;
720
721 /* set hash key, if PF */
722 if (rxfh->key && hw->port)
723 enetc_set_rss_key(hw, rxfh->key);
724
725 /* set RSS table */
726 if (rxfh->indir)
727 err = enetc_set_rss_table(priv->si, rxfh->indir,
728 priv->si->num_rss);
729
730 return err;
731}
732
733static void enetc_get_ringparam(struct net_device *ndev,
734 struct ethtool_ringparam *ring,
735 struct kernel_ethtool_ringparam *kernel_ring,
736 struct netlink_ext_ack *extack)
737{
738 struct enetc_ndev_priv *priv = netdev_priv(ndev);
739
740 ring->rx_pending = priv->rx_bd_count;
741 ring->tx_pending = priv->tx_bd_count;
742
743 /* do some h/w sanity checks for BDR length */
744 if (netif_running(ndev)) {
745 struct enetc_hw *hw = &priv->si->hw;
746 u32 val = enetc_rxbdr_rd(hw, 0, ENETC_RBLENR);
747
748 if (val != priv->rx_bd_count)
749 netif_err(priv, hw, ndev, "RxBDR[RBLENR] = %d!\n", val);
750
751 val = enetc_txbdr_rd(hw, 0, ENETC_TBLENR);
752
753 if (val != priv->tx_bd_count)
754 netif_err(priv, hw, ndev, "TxBDR[TBLENR] = %d!\n", val);
755 }
756}
757
758static int enetc_get_coalesce(struct net_device *ndev,
759 struct ethtool_coalesce *ic,
760 struct kernel_ethtool_coalesce *kernel_coal,
761 struct netlink_ext_ack *extack)
762{
763 struct enetc_ndev_priv *priv = netdev_priv(ndev);
764 struct enetc_int_vector *v = priv->int_vector[0];
765 u64 clk_freq = priv->sysclk_freq;
766
767 ic->tx_coalesce_usecs = enetc_cycles_to_usecs(priv->tx_ictt, clk_freq);
768 ic->rx_coalesce_usecs = enetc_cycles_to_usecs(v->rx_ictt, clk_freq);
769
770 ic->tx_max_coalesced_frames = ENETC_TXIC_PKTTHR;
771 ic->rx_max_coalesced_frames = ENETC_RXIC_PKTTHR;
772
773 ic->use_adaptive_rx_coalesce = priv->ic_mode & ENETC_IC_RX_ADAPTIVE;
774
775 return 0;
776}
777
778static int enetc_set_coalesce(struct net_device *ndev,
779 struct ethtool_coalesce *ic,
780 struct kernel_ethtool_coalesce *kernel_coal,
781 struct netlink_ext_ack *extack)
782{
783 struct enetc_ndev_priv *priv = netdev_priv(ndev);
784 u64 clk_freq = priv->sysclk_freq;
785 u32 rx_ictt, tx_ictt;
786 int i, ic_mode;
787 bool changed;
788
789 tx_ictt = enetc_usecs_to_cycles(ic->tx_coalesce_usecs, clk_freq);
790 rx_ictt = enetc_usecs_to_cycles(ic->rx_coalesce_usecs, clk_freq);
791
792 if (ic->rx_max_coalesced_frames != ENETC_RXIC_PKTTHR)
793 return -EOPNOTSUPP;
794
795 if (ic->tx_max_coalesced_frames != ENETC_TXIC_PKTTHR)
796 return -EOPNOTSUPP;
797
798 ic_mode = ENETC_IC_NONE;
799 if (ic->use_adaptive_rx_coalesce) {
800 ic_mode |= ENETC_IC_RX_ADAPTIVE;
801 rx_ictt = 0x1;
802 } else {
803 ic_mode |= rx_ictt ? ENETC_IC_RX_MANUAL : 0;
804 }
805
806 ic_mode |= tx_ictt ? ENETC_IC_TX_MANUAL : 0;
807
808 /* commit the settings */
809 changed = (ic_mode != priv->ic_mode) || (priv->tx_ictt != tx_ictt);
810
811 priv->ic_mode = ic_mode;
812 priv->tx_ictt = tx_ictt;
813
814 for (i = 0; i < priv->bdr_int_num; i++) {
815 struct enetc_int_vector *v = priv->int_vector[i];
816
817 v->rx_ictt = rx_ictt;
818 v->rx_dim_en = !!(ic_mode & ENETC_IC_RX_ADAPTIVE);
819 }
820
821 if (netif_running(ndev) && changed) {
822 /* reconfigure the operation mode of h/w interrupts,
823 * traffic needs to be paused in the process
824 */
825 enetc_stop(ndev);
826 enetc_start(ndev);
827 }
828
829 return 0;
830}
831
832static int enetc_get_ts_info(struct net_device *ndev,
833 struct kernel_ethtool_ts_info *info)
834{
835 struct enetc_ndev_priv *priv = netdev_priv(ndev);
836 int *phc_idx;
837
838 phc_idx = symbol_get(enetc_phc_index);
839 if (phc_idx) {
840 info->phc_index = *phc_idx;
841 symbol_put(enetc_phc_index);
842 }
843
844 if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK)) {
845 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;
846
847 return 0;
848 }
849
850 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
851 SOF_TIMESTAMPING_RX_HARDWARE |
852 SOF_TIMESTAMPING_RAW_HARDWARE |
853 SOF_TIMESTAMPING_TX_SOFTWARE;
854
855 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
856 (1 << HWTSTAMP_TX_ON);
857
858 if (enetc_si_is_pf(priv->si))
859 info->tx_types |= (1 << HWTSTAMP_TX_ONESTEP_SYNC);
860
861 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
862 (1 << HWTSTAMP_FILTER_ALL);
863
864 return 0;
865}
866
867static void enetc_get_wol(struct net_device *dev,
868 struct ethtool_wolinfo *wol)
869{
870 wol->supported = 0;
871 wol->wolopts = 0;
872
873 if (dev->phydev)
874 phy_ethtool_get_wol(dev->phydev, wol);
875}
876
877static int enetc_set_wol(struct net_device *dev,
878 struct ethtool_wolinfo *wol)
879{
880 int ret;
881
882 if (!dev->phydev)
883 return -EOPNOTSUPP;
884
885 ret = phy_ethtool_set_wol(dev->phydev, wol);
886 if (!ret)
887 device_set_wakeup_enable(&dev->dev, wol->wolopts);
888
889 return ret;
890}
891
892static void enetc_get_pauseparam(struct net_device *dev,
893 struct ethtool_pauseparam *pause)
894{
895 struct enetc_ndev_priv *priv = netdev_priv(dev);
896
897 phylink_ethtool_get_pauseparam(priv->phylink, pause);
898}
899
900static int enetc_set_pauseparam(struct net_device *dev,
901 struct ethtool_pauseparam *pause)
902{
903 struct enetc_ndev_priv *priv = netdev_priv(dev);
904
905 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
906}
907
908static int enetc_get_link_ksettings(struct net_device *dev,
909 struct ethtool_link_ksettings *cmd)
910{
911 struct enetc_ndev_priv *priv = netdev_priv(dev);
912
913 if (!priv->phylink)
914 return -EOPNOTSUPP;
915
916 return phylink_ethtool_ksettings_get(priv->phylink, cmd);
917}
918
919static int enetc_set_link_ksettings(struct net_device *dev,
920 const struct ethtool_link_ksettings *cmd)
921{
922 struct enetc_ndev_priv *priv = netdev_priv(dev);
923
924 if (!priv->phylink)
925 return -EOPNOTSUPP;
926
927 return phylink_ethtool_ksettings_set(priv->phylink, cmd);
928}
929
930static void enetc_get_mm_stats(struct net_device *ndev,
931 struct ethtool_mm_stats *s)
932{
933 struct enetc_ndev_priv *priv = netdev_priv(ndev);
934 struct enetc_hw *hw = &priv->si->hw;
935 struct enetc_si *si = priv->si;
936
937 if (!(si->hw_features & ENETC_SI_F_QBU))
938 return;
939
940 s->MACMergeFrameAssErrorCount = enetc_port_rd(hw, ENETC_MMFAECR);
941 s->MACMergeFrameSmdErrorCount = enetc_port_rd(hw, ENETC_MMFSECR);
942 s->MACMergeFrameAssOkCount = enetc_port_rd(hw, ENETC_MMFAOCR);
943 s->MACMergeFragCountRx = enetc_port_rd(hw, ENETC_MMFCRXR);
944 s->MACMergeFragCountTx = enetc_port_rd(hw, ENETC_MMFCTXR);
945 s->MACMergeHoldCount = enetc_port_rd(hw, ENETC_MMHCR);
946}
947
948static int enetc_get_mm(struct net_device *ndev, struct ethtool_mm_state *state)
949{
950 struct enetc_ndev_priv *priv = netdev_priv(ndev);
951 struct enetc_si *si = priv->si;
952 struct enetc_hw *hw = &si->hw;
953 u32 lafs, rafs, val;
954
955 if (!(si->hw_features & ENETC_SI_F_QBU))
956 return -EOPNOTSUPP;
957
958 mutex_lock(&priv->mm_lock);
959
960 val = enetc_port_rd(hw, ENETC_PFPMR);
961 state->pmac_enabled = !!(val & ENETC_PFPMR_PMACE);
962
963 val = enetc_port_rd(hw, ENETC_MMCSR);
964
965 switch (ENETC_MMCSR_GET_VSTS(val)) {
966 case 0:
967 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_DISABLED;
968 break;
969 case 2:
970 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING;
971 break;
972 case 3:
973 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED;
974 break;
975 case 4:
976 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_FAILED;
977 break;
978 case 5:
979 default:
980 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_UNKNOWN;
981 break;
982 }
983
984 rafs = ENETC_MMCSR_GET_RAFS(val);
985 state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(rafs);
986 lafs = ENETC_MMCSR_GET_LAFS(val);
987 state->rx_min_frag_size = ethtool_mm_frag_size_add_to_min(lafs);
988 state->tx_enabled = !!(val & ENETC_MMCSR_LPE); /* mirror of MMCSR_ME */
989 state->tx_active = state->tx_enabled &&
990 (state->verify_status == ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED ||
991 state->verify_status == ETHTOOL_MM_VERIFY_STATUS_DISABLED);
992 state->verify_enabled = !(val & ENETC_MMCSR_VDIS);
993 state->verify_time = ENETC_MMCSR_GET_VT(val);
994 /* A verifyTime of 128 ms would exceed the 7 bit width
995 * of the ENETC_MMCSR_VT field
996 */
997 state->max_verify_time = 127;
998
999 mutex_unlock(&priv->mm_lock);
1000
1001 return 0;
1002}
1003
1004static int enetc_mm_wait_tx_active(struct enetc_hw *hw, int verify_time)
1005{
1006 int timeout = verify_time * USEC_PER_MSEC * ENETC_MM_VERIFY_RETRIES;
1007 u32 val;
1008
1009 /* This will time out after the standard value of 3 verification
1010 * attempts. To not sleep forever, it relies on a non-zero verify_time,
1011 * guarantee which is provided by the ethtool nlattr policy.
1012 */
1013 return read_poll_timeout(enetc_port_rd, val,
1014 ENETC_MMCSR_GET_VSTS(val) == 3,
1015 ENETC_MM_VERIFY_SLEEP_US, timeout,
1016 true, hw, ENETC_MMCSR);
1017}
1018
1019static void enetc_set_ptcfpr(struct enetc_hw *hw, u8 preemptible_tcs)
1020{
1021 u32 val;
1022 int tc;
1023
1024 for (tc = 0; tc < 8; tc++) {
1025 val = enetc_port_rd(hw, ENETC_PTCFPR(tc));
1026
1027 if (preemptible_tcs & BIT(tc))
1028 val |= ENETC_PTCFPR_FPE;
1029 else
1030 val &= ~ENETC_PTCFPR_FPE;
1031
1032 enetc_port_wr(hw, ENETC_PTCFPR(tc), val);
1033 }
1034}
1035
1036/* ENETC does not have an IRQ to notify changes to the MAC Merge TX status
1037 * (active/inactive), but the preemptible traffic classes should only be
1038 * committed to hardware once TX is active. Resort to polling.
1039 */
1040void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv)
1041{
1042 struct enetc_hw *hw = &priv->si->hw;
1043 u8 preemptible_tcs = 0;
1044 u32 val;
1045 int err;
1046
1047 val = enetc_port_rd(hw, ENETC_MMCSR);
1048 if (!(val & ENETC_MMCSR_ME))
1049 goto out;
1050
1051 if (!(val & ENETC_MMCSR_VDIS)) {
1052 err = enetc_mm_wait_tx_active(hw, ENETC_MMCSR_GET_VT(val));
1053 if (err)
1054 goto out;
1055 }
1056
1057 preemptible_tcs = priv->preemptible_tcs;
1058out:
1059 enetc_set_ptcfpr(hw, preemptible_tcs);
1060}
1061
1062/* FIXME: Workaround for the link partner's verification failing if ENETC
1063 * priorly received too much express traffic. The documentation doesn't
1064 * suggest this is needed.
1065 */
1066static void enetc_restart_emac_rx(struct enetc_si *si)
1067{
1068 u32 val = enetc_port_rd(&si->hw, ENETC_PM0_CMD_CFG);
1069
1070 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val & ~ENETC_PM0_RX_EN);
1071
1072 if (val & ENETC_PM0_RX_EN)
1073 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val);
1074}
1075
1076static int enetc_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg,
1077 struct netlink_ext_ack *extack)
1078{
1079 struct enetc_ndev_priv *priv = netdev_priv(ndev);
1080 struct enetc_hw *hw = &priv->si->hw;
1081 struct enetc_si *si = priv->si;
1082 u32 val, add_frag_size;
1083 int err;
1084
1085 if (!(si->hw_features & ENETC_SI_F_QBU))
1086 return -EOPNOTSUPP;
1087
1088 err = ethtool_mm_frag_size_min_to_add(cfg->tx_min_frag_size,
1089 &add_frag_size, extack);
1090 if (err)
1091 return err;
1092
1093 mutex_lock(&priv->mm_lock);
1094
1095 val = enetc_port_rd(hw, ENETC_PFPMR);
1096 if (cfg->pmac_enabled)
1097 val |= ENETC_PFPMR_PMACE;
1098 else
1099 val &= ~ENETC_PFPMR_PMACE;
1100 enetc_port_wr(hw, ENETC_PFPMR, val);
1101
1102 val = enetc_port_rd(hw, ENETC_MMCSR);
1103
1104 if (cfg->verify_enabled)
1105 val &= ~ENETC_MMCSR_VDIS;
1106 else
1107 val |= ENETC_MMCSR_VDIS;
1108
1109 if (cfg->tx_enabled)
1110 priv->active_offloads |= ENETC_F_QBU;
1111 else
1112 priv->active_offloads &= ~ENETC_F_QBU;
1113
1114 /* If link is up, enable/disable MAC Merge right away */
1115 if (!(val & ENETC_MMCSR_LINK_FAIL)) {
1116 if (!!(priv->active_offloads & ENETC_F_QBU))
1117 val |= ENETC_MMCSR_ME;
1118 else
1119 val &= ~ENETC_MMCSR_ME;
1120 }
1121
1122 val &= ~ENETC_MMCSR_VT_MASK;
1123 val |= ENETC_MMCSR_VT(cfg->verify_time);
1124
1125 val &= ~ENETC_MMCSR_RAFS_MASK;
1126 val |= ENETC_MMCSR_RAFS(add_frag_size);
1127
1128 enetc_port_wr(hw, ENETC_MMCSR, val);
1129
1130 enetc_restart_emac_rx(priv->si);
1131
1132 enetc_mm_commit_preemptible_tcs(priv);
1133
1134 mutex_unlock(&priv->mm_lock);
1135
1136 return 0;
1137}
1138
1139/* When the link is lost, the verification state machine goes to the FAILED
1140 * state and doesn't restart on its own after a new link up event.
1141 * According to 802.3 Figure 99-8 - Verify state diagram, the LINK_FAIL bit
1142 * should have been sufficient to re-trigger verification, but for ENETC it
1143 * doesn't. As a workaround, we need to toggle the Merge Enable bit to
1144 * re-trigger verification when link comes up.
1145 */
1146void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link)
1147{
1148 struct enetc_hw *hw = &priv->si->hw;
1149 u32 val;
1150
1151 mutex_lock(&priv->mm_lock);
1152
1153 val = enetc_port_rd(hw, ENETC_MMCSR);
1154
1155 if (link) {
1156 val &= ~ENETC_MMCSR_LINK_FAIL;
1157 if (priv->active_offloads & ENETC_F_QBU)
1158 val |= ENETC_MMCSR_ME;
1159 } else {
1160 val |= ENETC_MMCSR_LINK_FAIL;
1161 if (priv->active_offloads & ENETC_F_QBU)
1162 val &= ~ENETC_MMCSR_ME;
1163 }
1164
1165 enetc_port_wr(hw, ENETC_MMCSR, val);
1166
1167 enetc_mm_commit_preemptible_tcs(priv);
1168
1169 mutex_unlock(&priv->mm_lock);
1170}
1171EXPORT_SYMBOL_GPL(enetc_mm_link_state_update);
1172
1173const struct ethtool_ops enetc_pf_ethtool_ops = {
1174 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1175 ETHTOOL_COALESCE_MAX_FRAMES |
1176 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1177 .get_regs_len = enetc_get_reglen,
1178 .get_regs = enetc_get_regs,
1179 .get_sset_count = enetc_get_sset_count,
1180 .get_strings = enetc_get_strings,
1181 .get_ethtool_stats = enetc_get_ethtool_stats,
1182 .get_pause_stats = enetc_get_pause_stats,
1183 .get_rmon_stats = enetc_get_rmon_stats,
1184 .get_eth_ctrl_stats = enetc_get_eth_ctrl_stats,
1185 .get_eth_mac_stats = enetc_get_eth_mac_stats,
1186 .get_rxnfc = enetc_get_rxnfc,
1187 .set_rxnfc = enetc_set_rxnfc,
1188 .get_rxfh_key_size = enetc_get_rxfh_key_size,
1189 .get_rxfh_indir_size = enetc_get_rxfh_indir_size,
1190 .get_rxfh = enetc_get_rxfh,
1191 .set_rxfh = enetc_set_rxfh,
1192 .get_ringparam = enetc_get_ringparam,
1193 .get_coalesce = enetc_get_coalesce,
1194 .set_coalesce = enetc_set_coalesce,
1195 .get_link_ksettings = enetc_get_link_ksettings,
1196 .set_link_ksettings = enetc_set_link_ksettings,
1197 .get_link = ethtool_op_get_link,
1198 .get_ts_info = enetc_get_ts_info,
1199 .get_wol = enetc_get_wol,
1200 .set_wol = enetc_set_wol,
1201 .get_pauseparam = enetc_get_pauseparam,
1202 .set_pauseparam = enetc_set_pauseparam,
1203 .get_mm = enetc_get_mm,
1204 .set_mm = enetc_set_mm,
1205 .get_mm_stats = enetc_get_mm_stats,
1206};
1207
1208const struct ethtool_ops enetc_vf_ethtool_ops = {
1209 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1210 ETHTOOL_COALESCE_MAX_FRAMES |
1211 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1212 .get_regs_len = enetc_get_reglen,
1213 .get_regs = enetc_get_regs,
1214 .get_sset_count = enetc_get_sset_count,
1215 .get_strings = enetc_get_strings,
1216 .get_ethtool_stats = enetc_get_ethtool_stats,
1217 .get_rxnfc = enetc_get_rxnfc,
1218 .set_rxnfc = enetc_set_rxnfc,
1219 .get_rxfh_indir_size = enetc_get_rxfh_indir_size,
1220 .get_rxfh = enetc_get_rxfh,
1221 .set_rxfh = enetc_set_rxfh,
1222 .get_ringparam = enetc_get_ringparam,
1223 .get_coalesce = enetc_get_coalesce,
1224 .set_coalesce = enetc_set_coalesce,
1225 .get_link = ethtool_op_get_link,
1226 .get_ts_info = enetc_get_ts_info,
1227};
1228
1229const struct ethtool_ops enetc4_pf_ethtool_ops = {
1230 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1231 ETHTOOL_COALESCE_MAX_FRAMES |
1232 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1233 .get_ringparam = enetc_get_ringparam,
1234 .get_coalesce = enetc_get_coalesce,
1235 .set_coalesce = enetc_set_coalesce,
1236 .get_link_ksettings = enetc_get_link_ksettings,
1237 .set_link_ksettings = enetc_set_link_ksettings,
1238 .get_link = ethtool_op_get_link,
1239 .get_wol = enetc_get_wol,
1240 .set_wol = enetc_set_wol,
1241 .get_pauseparam = enetc_get_pauseparam,
1242 .set_pauseparam = enetc_set_pauseparam,
1243};
1244
1245void enetc_set_ethtool_ops(struct net_device *ndev)
1246{
1247 struct enetc_ndev_priv *priv = netdev_priv(ndev);
1248
1249 ndev->ethtool_ops = priv->si->drvdata->eth_ops;
1250}
1251EXPORT_SYMBOL_GPL(enetc_set_ethtool_ops);