1/*
 2 * Marvell 88E6xxx PHY access
 3 *
 4 * Copyright (c) 2008 Marvell Semiconductor
 5 *
 6 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
 7 *
 8 * This program is free software; you can redistribute it and/or modify
 9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#ifndef _MV88E6XXX_PHY_H
15#define _MV88E6XXX_PHY_H
16
17#define MV88E6XXX_PHY_PAGE		0x16
18#define MV88E6XXX_PHY_PAGE_COPPER	0x00
19
20/* PHY Registers accesses implementations */
21int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
22		       int addr, int reg, u16 *val);
23int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
24			int addr, int reg, u16 val);
25int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
26			   int addr, int reg, u16 *val);
27int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
28			    int addr, int reg, u16 val);
29
30/* Generic PHY operations */
31int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
32		       int reg, u16 *val);
33int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
34			int reg, u16 val);
 
 
 
 
35int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
36			    u8 page, int reg, u16 *val);
37int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
38			     u8 page, int reg, u16 val);
39void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);
40void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);
41int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip);
42
43#endif /*_MV88E6XXX_PHY_H */

 1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 * Marvell 88E6xxx PHY access
 4 *
 5 * Copyright (c) 2008 Marvell Semiconductor
 6 *
 7 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
 
 
 
 
 
 8 */
 9
10#ifndef _MV88E6XXX_PHY_H
11#define _MV88E6XXX_PHY_H
12
13#define MV88E6XXX_PHY_PAGE		0x16
14#define MV88E6XXX_PHY_PAGE_COPPER	0x00
15
16/* PHY Registers accesses implementations */
17int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
18		       int addr, int reg, u16 *val);
19int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
20			int addr, int reg, u16 val);
21int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
22			   int addr, int reg, u16 *val);
23int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
24			    int addr, int reg, u16 val);
25
26/* Generic PHY operations */
27int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
28		       int reg, u16 *val);
29int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
30			int reg, u16 val);
31int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
32			   int reg, u16 *val);
33int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
34			    int reg, u16 val);
35int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
36			    u8 page, int reg, u16 *val);
37int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
38			     u8 page, int reg, u16 val);
39void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);
40void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);
41int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip);
42
43#endif /*_MV88E6XXX_PHY_H */