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Note: File does not exist in v6.13.7.
  1/*
  2 * Google Veyron (and derivatives) fragment for sdmmc cards
  3 *
  4 * Copyright 2015 Google, Inc
  5 *
  6 * This file is dual-licensed: you can use it either under the terms
  7 * of the GPL or the X11 license, at your option. Note that this dual
  8 * licensing only applies to this file, and not this project as a
  9 * whole.
 10 *
 11 *  a) This file is free software; you can redistribute it and/or
 12 *     modify it under the terms of the GNU General Public License as
 13 *     published by the Free Software Foundation; either version 2 of the
 14 *     License, or (at your option) any later version.
 15 *
 16 *     This file is distributed in the hope that it will be useful,
 17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 *     GNU General Public License for more details.
 20 *
 21 *  Or, alternatively,
 22 *
 23 *  b) Permission is hereby granted, free of charge, to any person
 24 *     obtaining a copy of this software and associated documentation
 25 *     files (the "Software"), to deal in the Software without
 26 *     restriction, including without limitation the rights to use,
 27 *     copy, modify, merge, publish, distribute, sublicense, and/or
 28 *     sell copies of the Software, and to permit persons to whom the
 29 *     Software is furnished to do so, subject to the following
 30 *     conditions:
 31 *
 32 *     The above copyright notice and this permission notice shall be
 33 *     included in all copies or substantial portions of the Software.
 34 *
 35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 42 *     OTHER DEALINGS IN THE SOFTWARE.
 43 */
 44
 45&io_domains {
 46	sdcard-supply = <&vccio_sd>;
 47};
 48
 49&pinctrl {
 50	sdmmc {
 51		/*
 52		 * We run sdmmc at max speed; bump up drive strength.
 53		 * We also have external pulls, so disable the internal ones.
 54		 */
 55		sdmmc_bus4: sdmmc-bus4 {
 56			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 57					<6 17 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 58					<6 18 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
 59					<6 19 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 60		};
 61
 62		sdmmc_clk: sdmmc-clk {
 63			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 64		};
 65
 66		sdmmc_cmd: sdmmc-cmd {
 67			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 68		};
 69
 70		/*
 71		 * Builtin CD line is hooked to ground to prevent JTAG at boot
 72		 * (and also to get the voltage rail correct).
 73		 * Configure gpio6_C6 as GPIO so dw_mmc builtin CD doesn't
 74		 * think there's a card inserted
 75		 */
 76		sdmmc_cd_disabled: sdmmc-cd-disabled {
 77			rockchip,pins = <6 22 RK_FUNC_GPIO &pcfg_pull_none>;
 78		};
 79
 80		/* This is where we actually hook up CD */
 81		sdmmc_cd_gpio: sdmmc-cd-gpio {
 82			rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_none>;
 83		};
 84	};
 85};
 86
 87&rk808 {
 88	vcc9-supply = <&vcc_5v>;
 89
 90	regulators {
 91		vccio_sd: LDO_REG4 {
 92			regulator-name = "vccio_sd";
 93			regulator-min-microvolt = <1800000>;
 94			regulator-max-microvolt = <3300000>;
 95			regulator-state-mem {
 96				regulator-off-in-suspend;
 97			};
 98		};
 99
100		vcc33_sd: LDO_REG5 {
101			regulator-name = "vcc33_sd";
102			regulator-min-microvolt = <3300000>;
103			regulator-max-microvolt = <3300000>;
104			regulator-state-mem {
105				regulator-off-in-suspend;
106			};
107		};
108	};
109};
110
111&sdmmc {
112	status = "okay";
113
114	bus-width = <4>;
115	cap-mmc-highspeed;
116	cap-sd-highspeed;
117	card-detect-delay = <200>;
118	cd-gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
119	rockchip,default-sample-phase = <90>;
120	sd-uhs-sdr12;
121	sd-uhs-sdr25;
122	sd-uhs-sdr50;
123	sd-uhs-sdr104;
124	vmmc-supply = <&vcc33_sd>;
125	vqmmc-supply = <&vccio_sd>;
126};