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1/*
2 * Device Tree Source for the r8a7790 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/power/r8a7790-sysc.h>
17
18/ {
19 compatible = "renesas,r8a7790";
20 #address-cells = <2>;
21 #size-cells = <2>;
22
23 aliases {
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 i2c3 = &i2c3;
28 i2c4 = &iic0;
29 i2c5 = &iic1;
30 i2c6 = &iic2;
31 i2c7 = &iic3;
32 spi0 = &qspi;
33 spi1 = &msiof0;
34 spi2 = &msiof1;
35 spi3 = &msiof2;
36 spi4 = &msiof3;
37 vin0 = &vin0;
38 vin1 = &vin1;
39 vin2 = &vin2;
40 vin3 = &vin3;
41 };
42
43 /*
44 * The external audio clocks are configured as 0 Hz fixed frequency
45 * clocks by default.
46 * Boards that provide audio clocks should override them.
47 */
48 audio_clk_a: audio_clk_a {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <0>;
52 };
53 audio_clk_b: audio_clk_b {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58 audio_clk_c: audio_clk_c {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63
64 /* External CAN clock */
65 can_clk: can {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 /* This value must be overridden by the board. */
69 clock-frequency = <0>;
70 };
71
72 cpus {
73 #address-cells = <1>;
74 #size-cells = <0>;
75 enable-method = "renesas,apmu";
76
77 cpu0: cpu@0 {
78 device_type = "cpu";
79 compatible = "arm,cortex-a15";
80 reg = <0>;
81 clock-frequency = <1300000000>;
82 voltage-tolerance = <1>; /* 1% */
83 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
84 clock-latency = <300000>; /* 300 us */
85 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
86 next-level-cache = <&L2_CA15>;
87 capacity-dmips-mhz = <1024>;
88
89 /* kHz - uV - OPPs unknown yet */
90 operating-points = <1400000 1000000>,
91 <1225000 1000000>,
92 <1050000 1000000>,
93 < 875000 1000000>,
94 < 700000 1000000>,
95 < 350000 1000000>;
96 };
97
98 cpu1: cpu@1 {
99 device_type = "cpu";
100 compatible = "arm,cortex-a15";
101 reg = <1>;
102 clock-frequency = <1300000000>;
103 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
104 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
105 next-level-cache = <&L2_CA15>;
106 capacity-dmips-mhz = <1024>;
107 };
108
109 cpu2: cpu@2 {
110 device_type = "cpu";
111 compatible = "arm,cortex-a15";
112 reg = <2>;
113 clock-frequency = <1300000000>;
114 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
115 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
116 next-level-cache = <&L2_CA15>;
117 capacity-dmips-mhz = <1024>;
118 };
119
120 cpu3: cpu@3 {
121 device_type = "cpu";
122 compatible = "arm,cortex-a15";
123 reg = <3>;
124 clock-frequency = <1300000000>;
125 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
126 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
127 next-level-cache = <&L2_CA15>;
128 capacity-dmips-mhz = <1024>;
129 };
130
131 cpu4: cpu@100 {
132 device_type = "cpu";
133 compatible = "arm,cortex-a7";
134 reg = <0x100>;
135 clock-frequency = <780000000>;
136 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
137 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
138 next-level-cache = <&L2_CA7>;
139 capacity-dmips-mhz = <539>;
140 };
141
142 cpu5: cpu@101 {
143 device_type = "cpu";
144 compatible = "arm,cortex-a7";
145 reg = <0x101>;
146 clock-frequency = <780000000>;
147 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
148 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
149 next-level-cache = <&L2_CA7>;
150 capacity-dmips-mhz = <539>;
151 };
152
153 cpu6: cpu@102 {
154 device_type = "cpu";
155 compatible = "arm,cortex-a7";
156 reg = <0x102>;
157 clock-frequency = <780000000>;
158 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
159 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
160 next-level-cache = <&L2_CA7>;
161 capacity-dmips-mhz = <539>;
162 };
163
164 cpu7: cpu@103 {
165 device_type = "cpu";
166 compatible = "arm,cortex-a7";
167 reg = <0x103>;
168 clock-frequency = <780000000>;
169 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
170 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
171 next-level-cache = <&L2_CA7>;
172 capacity-dmips-mhz = <539>;
173 };
174
175 L2_CA15: cache-controller-0 {
176 compatible = "cache";
177 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
178 cache-unified;
179 cache-level = <2>;
180 };
181
182 L2_CA7: cache-controller-1 {
183 compatible = "cache";
184 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
185 cache-unified;
186 cache-level = <2>;
187 };
188 };
189
190 /* External root clock */
191 extal_clk: extal {
192 compatible = "fixed-clock";
193 #clock-cells = <0>;
194 /* This value must be overridden by the board. */
195 clock-frequency = <0>;
196 };
197
198 /* External PCIe clock - can be overridden by the board */
199 pcie_bus_clk: pcie_bus {
200 compatible = "fixed-clock";
201 #clock-cells = <0>;
202 clock-frequency = <0>;
203 };
204
205 /* External SCIF clock */
206 scif_clk: scif {
207 compatible = "fixed-clock";
208 #clock-cells = <0>;
209 /* This value must be overridden by the board. */
210 clock-frequency = <0>;
211 };
212
213 soc {
214 compatible = "simple-bus";
215 interrupt-parent = <&gic>;
216
217 #address-cells = <2>;
218 #size-cells = <2>;
219 ranges;
220
221 gpio0: gpio@e6050000 {
222 compatible = "renesas,gpio-r8a7790",
223 "renesas,rcar-gen2-gpio";
224 reg = <0 0xe6050000 0 0x50>;
225 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
226 #gpio-cells = <2>;
227 gpio-controller;
228 gpio-ranges = <&pfc 0 0 32>;
229 #interrupt-cells = <2>;
230 interrupt-controller;
231 clocks = <&cpg CPG_MOD 912>;
232 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
233 resets = <&cpg 912>;
234 };
235
236 gpio1: gpio@e6051000 {
237 compatible = "renesas,gpio-r8a7790",
238 "renesas,rcar-gen2-gpio";
239 reg = <0 0xe6051000 0 0x50>;
240 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
241 #gpio-cells = <2>;
242 gpio-controller;
243 gpio-ranges = <&pfc 0 32 30>;
244 #interrupt-cells = <2>;
245 interrupt-controller;
246 clocks = <&cpg CPG_MOD 911>;
247 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
248 resets = <&cpg 911>;
249 };
250
251 gpio2: gpio@e6052000 {
252 compatible = "renesas,gpio-r8a7790",
253 "renesas,rcar-gen2-gpio";
254 reg = <0 0xe6052000 0 0x50>;
255 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
256 #gpio-cells = <2>;
257 gpio-controller;
258 gpio-ranges = <&pfc 0 64 30>;
259 #interrupt-cells = <2>;
260 interrupt-controller;
261 clocks = <&cpg CPG_MOD 910>;
262 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
263 resets = <&cpg 910>;
264 };
265
266 gpio3: gpio@e6053000 {
267 compatible = "renesas,gpio-r8a7790",
268 "renesas,rcar-gen2-gpio";
269 reg = <0 0xe6053000 0 0x50>;
270 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
271 #gpio-cells = <2>;
272 gpio-controller;
273 gpio-ranges = <&pfc 0 96 32>;
274 #interrupt-cells = <2>;
275 interrupt-controller;
276 clocks = <&cpg CPG_MOD 909>;
277 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
278 resets = <&cpg 909>;
279 };
280
281 gpio4: gpio@e6054000 {
282 compatible = "renesas,gpio-r8a7790",
283 "renesas,rcar-gen2-gpio";
284 reg = <0 0xe6054000 0 0x50>;
285 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
286 #gpio-cells = <2>;
287 gpio-controller;
288 gpio-ranges = <&pfc 0 128 32>;
289 #interrupt-cells = <2>;
290 interrupt-controller;
291 clocks = <&cpg CPG_MOD 908>;
292 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
293 resets = <&cpg 908>;
294 };
295
296 gpio5: gpio@e6055000 {
297 compatible = "renesas,gpio-r8a7790",
298 "renesas,rcar-gen2-gpio";
299 reg = <0 0xe6055000 0 0x50>;
300 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
301 #gpio-cells = <2>;
302 gpio-controller;
303 gpio-ranges = <&pfc 0 160 32>;
304 #interrupt-cells = <2>;
305 interrupt-controller;
306 clocks = <&cpg CPG_MOD 907>;
307 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
308 resets = <&cpg 907>;
309 };
310
311 pfc: pin-controller@e6060000 {
312 compatible = "renesas,pfc-r8a7790";
313 reg = <0 0xe6060000 0 0x250>;
314 };
315
316 cpg: clock-controller@e6150000 {
317 compatible = "renesas,r8a7790-cpg-mssr";
318 reg = <0 0xe6150000 0 0x1000>;
319 clocks = <&extal_clk>, <&usb_extal_clk>;
320 clock-names = "extal", "usb_extal";
321 #clock-cells = <2>;
322 #power-domain-cells = <0>;
323 #reset-cells = <1>;
324 };
325
326 apmu@e6151000 {
327 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
328 reg = <0 0xe6151000 0 0x188>;
329 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
330 };
331
332 apmu@e6152000 {
333 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
334 reg = <0 0xe6152000 0 0x188>;
335 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
336 };
337
338 rst: reset-controller@e6160000 {
339 compatible = "renesas,r8a7790-rst";
340 reg = <0 0xe6160000 0 0x0100>;
341 };
342
343 sysc: system-controller@e6180000 {
344 compatible = "renesas,r8a7790-sysc";
345 reg = <0 0xe6180000 0 0x0200>;
346 #power-domain-cells = <1>;
347 };
348
349 irqc0: interrupt-controller@e61c0000 {
350 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
351 #interrupt-cells = <2>;
352 interrupt-controller;
353 reg = <0 0xe61c0000 0 0x200>;
354 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
358 clocks = <&cpg CPG_MOD 407>;
359 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
360 resets = <&cpg 407>;
361 };
362
363 thermal: thermal@e61f0000 {
364 compatible = "renesas,thermal-r8a7790",
365 "renesas,rcar-gen2-thermal",
366 "renesas,rcar-thermal";
367 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
368 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 522>;
370 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
371 resets = <&cpg 522>;
372 #thermal-sensor-cells = <0>;
373 };
374
375 ipmmu_sy0: mmu@e6280000 {
376 compatible = "renesas,ipmmu-r8a7790",
377 "renesas,ipmmu-vmsa";
378 reg = <0 0xe6280000 0 0x1000>;
379 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
381 #iommu-cells = <1>;
382 status = "disabled";
383 };
384
385 ipmmu_sy1: mmu@e6290000 {
386 compatible = "renesas,ipmmu-r8a7790",
387 "renesas,ipmmu-vmsa";
388 reg = <0 0xe6290000 0 0x1000>;
389 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
390 #iommu-cells = <1>;
391 status = "disabled";
392 };
393
394 ipmmu_ds: mmu@e6740000 {
395 compatible = "renesas,ipmmu-r8a7790",
396 "renesas,ipmmu-vmsa";
397 reg = <0 0xe6740000 0 0x1000>;
398 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
399 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
400 #iommu-cells = <1>;
401 status = "disabled";
402 };
403
404 ipmmu_mp: mmu@ec680000 {
405 compatible = "renesas,ipmmu-r8a7790",
406 "renesas,ipmmu-vmsa";
407 reg = <0 0xec680000 0 0x1000>;
408 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
409 #iommu-cells = <1>;
410 status = "disabled";
411 };
412
413 ipmmu_mx: mmu@fe951000 {
414 compatible = "renesas,ipmmu-r8a7790",
415 "renesas,ipmmu-vmsa";
416 reg = <0 0xfe951000 0 0x1000>;
417 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
419 #iommu-cells = <1>;
420 status = "disabled";
421 };
422
423 ipmmu_rt: mmu@ffc80000 {
424 compatible = "renesas,ipmmu-r8a7790",
425 "renesas,ipmmu-vmsa";
426 reg = <0 0xffc80000 0 0x1000>;
427 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
428 #iommu-cells = <1>;
429 status = "disabled";
430 };
431
432 icram0: sram@e63a0000 {
433 compatible = "mmio-sram";
434 reg = <0 0xe63a0000 0 0x12000>;
435 };
436
437 icram1: sram@e63c0000 {
438 compatible = "mmio-sram";
439 reg = <0 0xe63c0000 0 0x1000>;
440 #address-cells = <1>;
441 #size-cells = <1>;
442 ranges = <0 0 0xe63c0000 0x1000>;
443
444 smp-sram@0 {
445 compatible = "renesas,smp-sram";
446 reg = <0 0x10>;
447 };
448 };
449
450 i2c0: i2c@e6508000 {
451 #address-cells = <1>;
452 #size-cells = <0>;
453 compatible = "renesas,i2c-r8a7790",
454 "renesas,rcar-gen2-i2c";
455 reg = <0 0xe6508000 0 0x40>;
456 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
457 clocks = <&cpg CPG_MOD 931>;
458 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
459 resets = <&cpg 931>;
460 i2c-scl-internal-delay-ns = <110>;
461 status = "disabled";
462 };
463
464 i2c1: i2c@e6518000 {
465 #address-cells = <1>;
466 #size-cells = <0>;
467 compatible = "renesas,i2c-r8a7790",
468 "renesas,rcar-gen2-i2c";
469 reg = <0 0xe6518000 0 0x40>;
470 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
471 clocks = <&cpg CPG_MOD 930>;
472 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
473 resets = <&cpg 930>;
474 i2c-scl-internal-delay-ns = <6>;
475 status = "disabled";
476 };
477
478 i2c2: i2c@e6530000 {
479 #address-cells = <1>;
480 #size-cells = <0>;
481 compatible = "renesas,i2c-r8a7790",
482 "renesas,rcar-gen2-i2c";
483 reg = <0 0xe6530000 0 0x40>;
484 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
485 clocks = <&cpg CPG_MOD 929>;
486 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
487 resets = <&cpg 929>;
488 i2c-scl-internal-delay-ns = <6>;
489 status = "disabled";
490 };
491
492 i2c3: i2c@e6540000 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "renesas,i2c-r8a7790",
496 "renesas,rcar-gen2-i2c";
497 reg = <0 0xe6540000 0 0x40>;
498 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 928>;
500 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
501 resets = <&cpg 928>;
502 i2c-scl-internal-delay-ns = <110>;
503 status = "disabled";
504 };
505
506 iic0: i2c@e6500000 {
507 #address-cells = <1>;
508 #size-cells = <0>;
509 compatible = "renesas,iic-r8a7790",
510 "renesas,rcar-gen2-iic",
511 "renesas,rmobile-iic";
512 reg = <0 0xe6500000 0 0x425>;
513 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
514 clocks = <&cpg CPG_MOD 318>;
515 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
516 <&dmac1 0x61>, <&dmac1 0x62>;
517 dma-names = "tx", "rx", "tx", "rx";
518 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
519 resets = <&cpg 318>;
520 status = "disabled";
521 };
522
523 iic1: i2c@e6510000 {
524 #address-cells = <1>;
525 #size-cells = <0>;
526 compatible = "renesas,iic-r8a7790",
527 "renesas,rcar-gen2-iic",
528 "renesas,rmobile-iic";
529 reg = <0 0xe6510000 0 0x425>;
530 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
531 clocks = <&cpg CPG_MOD 323>;
532 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
533 <&dmac1 0x65>, <&dmac1 0x66>;
534 dma-names = "tx", "rx", "tx", "rx";
535 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
536 resets = <&cpg 323>;
537 status = "disabled";
538 };
539
540 iic2: i2c@e6520000 {
541 #address-cells = <1>;
542 #size-cells = <0>;
543 compatible = "renesas,iic-r8a7790",
544 "renesas,rcar-gen2-iic",
545 "renesas,rmobile-iic";
546 reg = <0 0xe6520000 0 0x425>;
547 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&cpg CPG_MOD 300>;
549 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
550 <&dmac1 0x69>, <&dmac1 0x6a>;
551 dma-names = "tx", "rx", "tx", "rx";
552 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
553 resets = <&cpg 300>;
554 status = "disabled";
555 };
556
557 iic3: i2c@e60b0000 {
558 #address-cells = <1>;
559 #size-cells = <0>;
560 compatible = "renesas,iic-r8a7790",
561 "renesas,rcar-gen2-iic",
562 "renesas,rmobile-iic";
563 reg = <0 0xe60b0000 0 0x425>;
564 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&cpg CPG_MOD 926>;
566 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
567 <&dmac1 0x77>, <&dmac1 0x78>;
568 dma-names = "tx", "rx", "tx", "rx";
569 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
570 resets = <&cpg 926>;
571 status = "disabled";
572 };
573
574 hsusb: usb@e6590000 {
575 compatible = "renesas,usbhs-r8a7790",
576 "renesas,rcar-gen2-usbhs";
577 reg = <0 0xe6590000 0 0x100>;
578 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
579 clocks = <&cpg CPG_MOD 704>;
580 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
581 <&usb_dmac1 0>, <&usb_dmac1 1>;
582 dma-names = "ch0", "ch1", "ch2", "ch3";
583 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
584 resets = <&cpg 704>;
585 renesas,buswait = <4>;
586 phys = <&usb0 1>;
587 phy-names = "usb";
588 status = "disabled";
589 };
590
591 usbphy: usb-phy@e6590100 {
592 compatible = "renesas,usb-phy-r8a7790",
593 "renesas,rcar-gen2-usb-phy";
594 reg = <0 0xe6590100 0 0x100>;
595 #address-cells = <1>;
596 #size-cells = <0>;
597 clocks = <&cpg CPG_MOD 704>;
598 clock-names = "usbhs";
599 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
600 resets = <&cpg 704>;
601 status = "disabled";
602
603 usb0: usb-channel@0 {
604 reg = <0>;
605 #phy-cells = <1>;
606 };
607 usb2: usb-channel@2 {
608 reg = <2>;
609 #phy-cells = <1>;
610 };
611 };
612
613 usb_dmac0: dma-controller@e65a0000 {
614 compatible = "renesas,r8a7790-usb-dmac",
615 "renesas,usb-dmac";
616 reg = <0 0xe65a0000 0 0x100>;
617 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
618 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
619 interrupt-names = "ch0", "ch1";
620 clocks = <&cpg CPG_MOD 330>;
621 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
622 resets = <&cpg 330>;
623 #dma-cells = <1>;
624 dma-channels = <2>;
625 };
626
627 usb_dmac1: dma-controller@e65b0000 {
628 compatible = "renesas,r8a7790-usb-dmac",
629 "renesas,usb-dmac";
630 reg = <0 0xe65b0000 0 0x100>;
631 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
632 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
633 interrupt-names = "ch0", "ch1";
634 clocks = <&cpg CPG_MOD 331>;
635 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
636 resets = <&cpg 331>;
637 #dma-cells = <1>;
638 dma-channels = <2>;
639 };
640
641 dmac0: dma-controller@e6700000 {
642 compatible = "renesas,dmac-r8a7790",
643 "renesas,rcar-dmac";
644 reg = <0 0xe6700000 0 0x20000>;
645 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
657 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
658 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
659 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
660 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
661 interrupt-names = "error",
662 "ch0", "ch1", "ch2", "ch3",
663 "ch4", "ch5", "ch6", "ch7",
664 "ch8", "ch9", "ch10", "ch11",
665 "ch12", "ch13", "ch14";
666 clocks = <&cpg CPG_MOD 219>;
667 clock-names = "fck";
668 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
669 resets = <&cpg 219>;
670 #dma-cells = <1>;
671 dma-channels = <15>;
672 };
673
674 dmac1: dma-controller@e6720000 {
675 compatible = "renesas,dmac-r8a7790",
676 "renesas,rcar-dmac";
677 reg = <0 0xe6720000 0 0x20000>;
678 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
679 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
680 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
681 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
682 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
694 interrupt-names = "error",
695 "ch0", "ch1", "ch2", "ch3",
696 "ch4", "ch5", "ch6", "ch7",
697 "ch8", "ch9", "ch10", "ch11",
698 "ch12", "ch13", "ch14";
699 clocks = <&cpg CPG_MOD 218>;
700 clock-names = "fck";
701 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
702 resets = <&cpg 218>;
703 #dma-cells = <1>;
704 dma-channels = <15>;
705 };
706
707 avb: ethernet@e6800000 {
708 compatible = "renesas,etheravb-r8a7790",
709 "renesas,etheravb-rcar-gen2";
710 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
711 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&cpg CPG_MOD 812>;
713 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
714 resets = <&cpg 812>;
715 #address-cells = <1>;
716 #size-cells = <0>;
717 status = "disabled";
718 };
719
720 qspi: spi@e6b10000 {
721 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
722 reg = <0 0xe6b10000 0 0x2c>;
723 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
724 clocks = <&cpg CPG_MOD 917>;
725 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
726 <&dmac1 0x17>, <&dmac1 0x18>;
727 dma-names = "tx", "rx", "tx", "rx";
728 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
729 resets = <&cpg 917>;
730 num-cs = <1>;
731 #address-cells = <1>;
732 #size-cells = <0>;
733 status = "disabled";
734 };
735
736 scifa0: serial@e6c40000 {
737 compatible = "renesas,scifa-r8a7790",
738 "renesas,rcar-gen2-scifa", "renesas,scifa";
739 reg = <0 0xe6c40000 0 64>;
740 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
741 clocks = <&cpg CPG_MOD 204>;
742 clock-names = "fck";
743 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
744 <&dmac1 0x21>, <&dmac1 0x22>;
745 dma-names = "tx", "rx", "tx", "rx";
746 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
747 resets = <&cpg 204>;
748 status = "disabled";
749 };
750
751 scifa1: serial@e6c50000 {
752 compatible = "renesas,scifa-r8a7790",
753 "renesas,rcar-gen2-scifa", "renesas,scifa";
754 reg = <0 0xe6c50000 0 64>;
755 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
756 clocks = <&cpg CPG_MOD 203>;
757 clock-names = "fck";
758 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
759 <&dmac1 0x25>, <&dmac1 0x26>;
760 dma-names = "tx", "rx", "tx", "rx";
761 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
762 resets = <&cpg 203>;
763 status = "disabled";
764 };
765
766 scifa2: serial@e6c60000 {
767 compatible = "renesas,scifa-r8a7790",
768 "renesas,rcar-gen2-scifa", "renesas,scifa";
769 reg = <0 0xe6c60000 0 64>;
770 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
771 clocks = <&cpg CPG_MOD 202>;
772 clock-names = "fck";
773 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
774 <&dmac1 0x27>, <&dmac1 0x28>;
775 dma-names = "tx", "rx", "tx", "rx";
776 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
777 resets = <&cpg 202>;
778 status = "disabled";
779 };
780
781 scifb0: serial@e6c20000 {
782 compatible = "renesas,scifb-r8a7790",
783 "renesas,rcar-gen2-scifb", "renesas,scifb";
784 reg = <0 0xe6c20000 0 0x100>;
785 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
786 clocks = <&cpg CPG_MOD 206>;
787 clock-names = "fck";
788 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
789 <&dmac1 0x3d>, <&dmac1 0x3e>;
790 dma-names = "tx", "rx", "tx", "rx";
791 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
792 resets = <&cpg 206>;
793 status = "disabled";
794 };
795
796 scifb1: serial@e6c30000 {
797 compatible = "renesas,scifb-r8a7790",
798 "renesas,rcar-gen2-scifb", "renesas,scifb";
799 reg = <0 0xe6c30000 0 0x100>;
800 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
801 clocks = <&cpg CPG_MOD 207>;
802 clock-names = "fck";
803 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
804 <&dmac1 0x19>, <&dmac1 0x1a>;
805 dma-names = "tx", "rx", "tx", "rx";
806 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
807 resets = <&cpg 207>;
808 status = "disabled";
809 };
810
811 scifb2: serial@e6ce0000 {
812 compatible = "renesas,scifb-r8a7790",
813 "renesas,rcar-gen2-scifb", "renesas,scifb";
814 reg = <0 0xe6ce0000 0 0x100>;
815 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
816 clocks = <&cpg CPG_MOD 216>;
817 clock-names = "fck";
818 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
819 <&dmac1 0x1d>, <&dmac1 0x1e>;
820 dma-names = "tx", "rx", "tx", "rx";
821 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
822 resets = <&cpg 216>;
823 status = "disabled";
824 };
825
826 scif0: serial@e6e60000 {
827 compatible = "renesas,scif-r8a7790",
828 "renesas,rcar-gen2-scif",
829 "renesas,scif";
830 reg = <0 0xe6e60000 0 64>;
831 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
832 clocks = <&cpg CPG_MOD 721>,
833 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
834 clock-names = "fck", "brg_int", "scif_clk";
835 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
836 <&dmac1 0x29>, <&dmac1 0x2a>;
837 dma-names = "tx", "rx", "tx", "rx";
838 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
839 resets = <&cpg 721>;
840 status = "disabled";
841 };
842
843 scif1: serial@e6e68000 {
844 compatible = "renesas,scif-r8a7790",
845 "renesas,rcar-gen2-scif",
846 "renesas,scif";
847 reg = <0 0xe6e68000 0 64>;
848 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
849 clocks = <&cpg CPG_MOD 720>,
850 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
851 clock-names = "fck", "brg_int", "scif_clk";
852 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
853 <&dmac1 0x2d>, <&dmac1 0x2e>;
854 dma-names = "tx", "rx", "tx", "rx";
855 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
856 resets = <&cpg 720>;
857 status = "disabled";
858 };
859
860 scif2: serial@e6e56000 {
861 compatible = "renesas,scif-r8a7790",
862 "renesas,rcar-gen2-scif",
863 "renesas,scif";
864 reg = <0 0xe6e56000 0 64>;
865 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
866 clocks = <&cpg CPG_MOD 310>,
867 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
868 clock-names = "fck", "brg_int", "scif_clk";
869 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
870 <&dmac1 0x2b>, <&dmac1 0x2c>;
871 dma-names = "tx", "rx", "tx", "rx";
872 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
873 resets = <&cpg 310>;
874 status = "disabled";
875 };
876
877 hscif0: serial@e62c0000 {
878 compatible = "renesas,hscif-r8a7790",
879 "renesas,rcar-gen2-hscif", "renesas,hscif";
880 reg = <0 0xe62c0000 0 96>;
881 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
882 clocks = <&cpg CPG_MOD 717>,
883 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
884 clock-names = "fck", "brg_int", "scif_clk";
885 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
886 <&dmac1 0x39>, <&dmac1 0x3a>;
887 dma-names = "tx", "rx", "tx", "rx";
888 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
889 resets = <&cpg 717>;
890 status = "disabled";
891 };
892
893 hscif1: serial@e62c8000 {
894 compatible = "renesas,hscif-r8a7790",
895 "renesas,rcar-gen2-hscif", "renesas,hscif";
896 reg = <0 0xe62c8000 0 96>;
897 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
898 clocks = <&cpg CPG_MOD 716>,
899 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
900 clock-names = "fck", "brg_int", "scif_clk";
901 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
902 <&dmac1 0x4d>, <&dmac1 0x4e>;
903 dma-names = "tx", "rx", "tx", "rx";
904 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
905 resets = <&cpg 716>;
906 status = "disabled";
907 };
908
909 msiof0: spi@e6e20000 {
910 compatible = "renesas,msiof-r8a7790",
911 "renesas,rcar-gen2-msiof";
912 reg = <0 0xe6e20000 0 0x0064>;
913 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
914 clocks = <&cpg CPG_MOD 0>;
915 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
916 <&dmac1 0x51>, <&dmac1 0x52>;
917 dma-names = "tx", "rx", "tx", "rx";
918 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
919 resets = <&cpg 0>;
920 #address-cells = <1>;
921 #size-cells = <0>;
922 status = "disabled";
923 };
924
925 msiof1: spi@e6e10000 {
926 compatible = "renesas,msiof-r8a7790",
927 "renesas,rcar-gen2-msiof";
928 reg = <0 0xe6e10000 0 0x0064>;
929 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
930 clocks = <&cpg CPG_MOD 208>;
931 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
932 <&dmac1 0x55>, <&dmac1 0x56>;
933 dma-names = "tx", "rx", "tx", "rx";
934 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
935 resets = <&cpg 208>;
936 #address-cells = <1>;
937 #size-cells = <0>;
938 status = "disabled";
939 };
940
941 msiof2: spi@e6e00000 {
942 compatible = "renesas,msiof-r8a7790",
943 "renesas,rcar-gen2-msiof";
944 reg = <0 0xe6e00000 0 0x0064>;
945 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
946 clocks = <&cpg CPG_MOD 205>;
947 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
948 <&dmac1 0x41>, <&dmac1 0x42>;
949 dma-names = "tx", "rx", "tx", "rx";
950 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
951 resets = <&cpg 205>;
952 #address-cells = <1>;
953 #size-cells = <0>;
954 status = "disabled";
955 };
956
957 msiof3: spi@e6c90000 {
958 compatible = "renesas,msiof-r8a7790",
959 "renesas,rcar-gen2-msiof";
960 reg = <0 0xe6c90000 0 0x0064>;
961 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
962 clocks = <&cpg CPG_MOD 215>;
963 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
964 <&dmac1 0x45>, <&dmac1 0x46>;
965 dma-names = "tx", "rx", "tx", "rx";
966 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
967 resets = <&cpg 215>;
968 #address-cells = <1>;
969 #size-cells = <0>;
970 status = "disabled";
971 };
972
973 can0: can@e6e80000 {
974 compatible = "renesas,can-r8a7790",
975 "renesas,rcar-gen2-can";
976 reg = <0 0xe6e80000 0 0x1000>;
977 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
978 clocks = <&cpg CPG_MOD 916>,
979 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
980 clock-names = "clkp1", "clkp2", "can_clk";
981 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
982 resets = <&cpg 916>;
983 status = "disabled";
984 };
985
986 can1: can@e6e88000 {
987 compatible = "renesas,can-r8a7790",
988 "renesas,rcar-gen2-can";
989 reg = <0 0xe6e88000 0 0x1000>;
990 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
991 clocks = <&cpg CPG_MOD 915>,
992 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
993 clock-names = "clkp1", "clkp2", "can_clk";
994 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
995 resets = <&cpg 915>;
996 status = "disabled";
997 };
998
999 vin0: video@e6ef0000 {
1000 compatible = "renesas,vin-r8a7790",
1001 "renesas,rcar-gen2-vin";
1002 reg = <0 0xe6ef0000 0 0x1000>;
1003 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1004 clocks = <&cpg CPG_MOD 811>;
1005 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1006 resets = <&cpg 811>;
1007 status = "disabled";
1008 };
1009
1010 vin1: video@e6ef1000 {
1011 compatible = "renesas,vin-r8a7790",
1012 "renesas,rcar-gen2-vin";
1013 reg = <0 0xe6ef1000 0 0x1000>;
1014 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&cpg CPG_MOD 810>;
1016 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1017 resets = <&cpg 810>;
1018 status = "disabled";
1019 };
1020
1021 vin2: video@e6ef2000 {
1022 compatible = "renesas,vin-r8a7790",
1023 "renesas,rcar-gen2-vin";
1024 reg = <0 0xe6ef2000 0 0x1000>;
1025 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1026 clocks = <&cpg CPG_MOD 809>;
1027 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1028 resets = <&cpg 809>;
1029 status = "disabled";
1030 };
1031
1032 vin3: video@e6ef3000 {
1033 compatible = "renesas,vin-r8a7790",
1034 "renesas,rcar-gen2-vin";
1035 reg = <0 0xe6ef3000 0 0x1000>;
1036 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1037 clocks = <&cpg CPG_MOD 808>;
1038 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1039 resets = <&cpg 808>;
1040 status = "disabled";
1041 };
1042
1043 rcar_sound: sound@ec500000 {
1044 /*
1045 * #sound-dai-cells is required
1046 *
1047 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1048 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1049 */
1050 compatible = "renesas,rcar_sound-r8a7790",
1051 "renesas,rcar_sound-gen2";
1052 reg = <0 0xec500000 0 0x1000>, /* SCU */
1053 <0 0xec5a0000 0 0x100>, /* ADG */
1054 <0 0xec540000 0 0x1000>, /* SSIU */
1055 <0 0xec541000 0 0x280>, /* SSI */
1056 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1057 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1058
1059 clocks = <&cpg CPG_MOD 1005>,
1060 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1061 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1062 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1063 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1064 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1065 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1066 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1067 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1068 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1069 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1070 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1071 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1072 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1073 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1074 <&cpg CPG_CORE R8A7790_CLK_M2>;
1075 clock-names = "ssi-all",
1076 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1077 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1078 "ssi.1", "ssi.0",
1079 "src.9", "src.8", "src.7", "src.6",
1080 "src.5", "src.4", "src.3", "src.2",
1081 "src.1", "src.0",
1082 "ctu.0", "ctu.1",
1083 "mix.0", "mix.1",
1084 "dvc.0", "dvc.1",
1085 "clk_a", "clk_b", "clk_c", "clk_i";
1086 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1087 resets = <&cpg 1005>,
1088 <&cpg 1006>, <&cpg 1007>,
1089 <&cpg 1008>, <&cpg 1009>,
1090 <&cpg 1010>, <&cpg 1011>,
1091 <&cpg 1012>, <&cpg 1013>,
1092 <&cpg 1014>, <&cpg 1015>;
1093 reset-names = "ssi-all",
1094 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1095 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1096 "ssi.1", "ssi.0";
1097
1098 status = "disabled";
1099
1100 rcar_sound,dvc {
1101 dvc0: dvc-0 {
1102 dmas = <&audma1 0xbc>;
1103 dma-names = "tx";
1104 };
1105 dvc1: dvc-1 {
1106 dmas = <&audma1 0xbe>;
1107 dma-names = "tx";
1108 };
1109 };
1110
1111 rcar_sound,mix {
1112 mix0: mix-0 { };
1113 mix1: mix-1 { };
1114 };
1115
1116 rcar_sound,ctu {
1117 ctu00: ctu-0 { };
1118 ctu01: ctu-1 { };
1119 ctu02: ctu-2 { };
1120 ctu03: ctu-3 { };
1121 ctu10: ctu-4 { };
1122 ctu11: ctu-5 { };
1123 ctu12: ctu-6 { };
1124 ctu13: ctu-7 { };
1125 };
1126
1127 rcar_sound,src {
1128 src0: src-0 {
1129 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1130 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1131 dma-names = "rx", "tx";
1132 };
1133 src1: src-1 {
1134 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1135 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1136 dma-names = "rx", "tx";
1137 };
1138 src2: src-2 {
1139 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1140 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1141 dma-names = "rx", "tx";
1142 };
1143 src3: src-3 {
1144 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1145 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1146 dma-names = "rx", "tx";
1147 };
1148 src4: src-4 {
1149 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1150 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1151 dma-names = "rx", "tx";
1152 };
1153 src5: src-5 {
1154 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1155 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1156 dma-names = "rx", "tx";
1157 };
1158 src6: src-6 {
1159 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1160 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1161 dma-names = "rx", "tx";
1162 };
1163 src7: src-7 {
1164 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1165 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1166 dma-names = "rx", "tx";
1167 };
1168 src8: src-8 {
1169 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1170 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1171 dma-names = "rx", "tx";
1172 };
1173 src9: src-9 {
1174 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1175 dmas = <&audma0 0x97>, <&audma1 0xba>;
1176 dma-names = "rx", "tx";
1177 };
1178 };
1179
1180 rcar_sound,ssi {
1181 ssi0: ssi-0 {
1182 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1183 dmas = <&audma0 0x01>, <&audma1 0x02>,
1184 <&audma0 0x15>, <&audma1 0x16>;
1185 dma-names = "rx", "tx", "rxu", "txu";
1186 };
1187 ssi1: ssi-1 {
1188 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1189 dmas = <&audma0 0x03>, <&audma1 0x04>,
1190 <&audma0 0x49>, <&audma1 0x4a>;
1191 dma-names = "rx", "tx", "rxu", "txu";
1192 };
1193 ssi2: ssi-2 {
1194 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1195 dmas = <&audma0 0x05>, <&audma1 0x06>,
1196 <&audma0 0x63>, <&audma1 0x64>;
1197 dma-names = "rx", "tx", "rxu", "txu";
1198 };
1199 ssi3: ssi-3 {
1200 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1201 dmas = <&audma0 0x07>, <&audma1 0x08>,
1202 <&audma0 0x6f>, <&audma1 0x70>;
1203 dma-names = "rx", "tx", "rxu", "txu";
1204 };
1205 ssi4: ssi-4 {
1206 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1207 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1208 <&audma0 0x71>, <&audma1 0x72>;
1209 dma-names = "rx", "tx", "rxu", "txu";
1210 };
1211 ssi5: ssi-5 {
1212 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1213 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1214 <&audma0 0x73>, <&audma1 0x74>;
1215 dma-names = "rx", "tx", "rxu", "txu";
1216 };
1217 ssi6: ssi-6 {
1218 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1219 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1220 <&audma0 0x75>, <&audma1 0x76>;
1221 dma-names = "rx", "tx", "rxu", "txu";
1222 };
1223 ssi7: ssi-7 {
1224 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1225 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1226 <&audma0 0x79>, <&audma1 0x7a>;
1227 dma-names = "rx", "tx", "rxu", "txu";
1228 };
1229 ssi8: ssi-8 {
1230 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1231 dmas = <&audma0 0x11>, <&audma1 0x12>,
1232 <&audma0 0x7b>, <&audma1 0x7c>;
1233 dma-names = "rx", "tx", "rxu", "txu";
1234 };
1235 ssi9: ssi-9 {
1236 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1237 dmas = <&audma0 0x13>, <&audma1 0x14>,
1238 <&audma0 0x7d>, <&audma1 0x7e>;
1239 dma-names = "rx", "tx", "rxu", "txu";
1240 };
1241 };
1242 };
1243
1244 audma0: dma-controller@ec700000 {
1245 compatible = "renesas,dmac-r8a7790",
1246 "renesas,rcar-dmac";
1247 reg = <0 0xec700000 0 0x10000>;
1248 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1249 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1250 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1251 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1252 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1253 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1254 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1255 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1256 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1257 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1258 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1259 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1260 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1261 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1262 interrupt-names = "error",
1263 "ch0", "ch1", "ch2", "ch3",
1264 "ch4", "ch5", "ch6", "ch7",
1265 "ch8", "ch9", "ch10", "ch11",
1266 "ch12";
1267 clocks = <&cpg CPG_MOD 502>;
1268 clock-names = "fck";
1269 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1270 resets = <&cpg 502>;
1271 #dma-cells = <1>;
1272 dma-channels = <13>;
1273 };
1274
1275 audma1: dma-controller@ec720000 {
1276 compatible = "renesas,dmac-r8a7790",
1277 "renesas,rcar-dmac";
1278 reg = <0 0xec720000 0 0x10000>;
1279 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1280 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1281 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1282 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1283 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1284 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1285 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1286 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1287 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1288 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1289 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1290 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1291 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1292 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1293 interrupt-names = "error",
1294 "ch0", "ch1", "ch2", "ch3",
1295 "ch4", "ch5", "ch6", "ch7",
1296 "ch8", "ch9", "ch10", "ch11",
1297 "ch12";
1298 clocks = <&cpg CPG_MOD 501>;
1299 clock-names = "fck";
1300 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1301 resets = <&cpg 501>;
1302 #dma-cells = <1>;
1303 dma-channels = <13>;
1304 };
1305
1306 xhci: usb@ee000000 {
1307 compatible = "renesas,xhci-r8a7790",
1308 "renesas,rcar-gen2-xhci";
1309 reg = <0 0xee000000 0 0xc00>;
1310 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1311 clocks = <&cpg CPG_MOD 328>;
1312 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1313 resets = <&cpg 328>;
1314 phys = <&usb2 1>;
1315 phy-names = "usb";
1316 status = "disabled";
1317 };
1318
1319 pci0: pci@ee090000 {
1320 compatible = "renesas,pci-r8a7790",
1321 "renesas,pci-rcar-gen2";
1322 device_type = "pci";
1323 reg = <0 0xee090000 0 0xc00>,
1324 <0 0xee080000 0 0x1100>;
1325 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1326 clocks = <&cpg CPG_MOD 703>;
1327 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1328 resets = <&cpg 703>;
1329 status = "disabled";
1330
1331 bus-range = <0 0>;
1332 #address-cells = <3>;
1333 #size-cells = <2>;
1334 #interrupt-cells = <1>;
1335 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1336 interrupt-map-mask = <0xff00 0 0 0x7>;
1337 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1338 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1339 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1340
1341 usb@1,0 {
1342 reg = <0x800 0 0 0 0>;
1343 phys = <&usb0 0>;
1344 phy-names = "usb";
1345 };
1346
1347 usb@2,0 {
1348 reg = <0x1000 0 0 0 0>;
1349 phys = <&usb0 0>;
1350 phy-names = "usb";
1351 };
1352 };
1353
1354 pci1: pci@ee0b0000 {
1355 compatible = "renesas,pci-r8a7790",
1356 "renesas,pci-rcar-gen2";
1357 device_type = "pci";
1358 reg = <0 0xee0b0000 0 0xc00>,
1359 <0 0xee0a0000 0 0x1100>;
1360 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1361 clocks = <&cpg CPG_MOD 703>;
1362 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1363 resets = <&cpg 703>;
1364 status = "disabled";
1365
1366 bus-range = <1 1>;
1367 #address-cells = <3>;
1368 #size-cells = <2>;
1369 #interrupt-cells = <1>;
1370 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1371 interrupt-map-mask = <0xff00 0 0 0x7>;
1372 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1373 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1374 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1375 };
1376
1377 pci2: pci@ee0d0000 {
1378 compatible = "renesas,pci-r8a7790",
1379 "renesas,pci-rcar-gen2";
1380 device_type = "pci";
1381 clocks = <&cpg CPG_MOD 703>;
1382 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1383 resets = <&cpg 703>;
1384 reg = <0 0xee0d0000 0 0xc00>,
1385 <0 0xee0c0000 0 0x1100>;
1386 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1387 status = "disabled";
1388
1389 bus-range = <2 2>;
1390 #address-cells = <3>;
1391 #size-cells = <2>;
1392 #interrupt-cells = <1>;
1393 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1394 interrupt-map-mask = <0xff00 0 0 0x7>;
1395 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1396 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1397 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1398
1399 usb@1,0 {
1400 reg = <0x20800 0 0 0 0>;
1401 phys = <&usb2 0>;
1402 phy-names = "usb";
1403 };
1404
1405 usb@2,0 {
1406 reg = <0x21000 0 0 0 0>;
1407 phys = <&usb2 0>;
1408 phy-names = "usb";
1409 };
1410 };
1411
1412 sdhi0: sd@ee100000 {
1413 compatible = "renesas,sdhi-r8a7790",
1414 "renesas,rcar-gen2-sdhi";
1415 reg = <0 0xee100000 0 0x328>;
1416 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1417 clocks = <&cpg CPG_MOD 314>;
1418 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1419 <&dmac1 0xcd>, <&dmac1 0xce>;
1420 dma-names = "tx", "rx", "tx", "rx";
1421 max-frequency = <195000000>;
1422 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1423 resets = <&cpg 314>;
1424 status = "disabled";
1425 };
1426
1427 sdhi1: sd@ee120000 {
1428 compatible = "renesas,sdhi-r8a7790",
1429 "renesas,rcar-gen2-sdhi";
1430 reg = <0 0xee120000 0 0x328>;
1431 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1432 clocks = <&cpg CPG_MOD 313>;
1433 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1434 <&dmac1 0xc9>, <&dmac1 0xca>;
1435 dma-names = "tx", "rx", "tx", "rx";
1436 max-frequency = <195000000>;
1437 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1438 resets = <&cpg 313>;
1439 status = "disabled";
1440 };
1441
1442 sdhi2: sd@ee140000 {
1443 compatible = "renesas,sdhi-r8a7790",
1444 "renesas,rcar-gen2-sdhi";
1445 reg = <0 0xee140000 0 0x100>;
1446 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1447 clocks = <&cpg CPG_MOD 312>;
1448 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1449 <&dmac1 0xc1>, <&dmac1 0xc2>;
1450 dma-names = "tx", "rx", "tx", "rx";
1451 max-frequency = <97500000>;
1452 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1453 resets = <&cpg 312>;
1454 status = "disabled";
1455 };
1456
1457 sdhi3: sd@ee160000 {
1458 compatible = "renesas,sdhi-r8a7790",
1459 "renesas,rcar-gen2-sdhi";
1460 reg = <0 0xee160000 0 0x100>;
1461 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1462 clocks = <&cpg CPG_MOD 311>;
1463 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1464 <&dmac1 0xd3>, <&dmac1 0xd4>;
1465 dma-names = "tx", "rx", "tx", "rx";
1466 max-frequency = <97500000>;
1467 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1468 resets = <&cpg 311>;
1469 status = "disabled";
1470 };
1471
1472 mmcif0: mmc@ee200000 {
1473 compatible = "renesas,mmcif-r8a7790",
1474 "renesas,sh-mmcif";
1475 reg = <0 0xee200000 0 0x80>;
1476 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1477 clocks = <&cpg CPG_MOD 315>;
1478 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1479 <&dmac1 0xd1>, <&dmac1 0xd2>;
1480 dma-names = "tx", "rx", "tx", "rx";
1481 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1482 resets = <&cpg 315>;
1483 reg-io-width = <4>;
1484 status = "disabled";
1485 max-frequency = <97500000>;
1486 };
1487
1488 mmcif1: mmc@ee220000 {
1489 compatible = "renesas,mmcif-r8a7790",
1490 "renesas,sh-mmcif";
1491 reg = <0 0xee220000 0 0x80>;
1492 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1493 clocks = <&cpg CPG_MOD 305>;
1494 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1495 <&dmac1 0xe1>, <&dmac1 0xe2>;
1496 dma-names = "tx", "rx", "tx", "rx";
1497 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1498 resets = <&cpg 305>;
1499 reg-io-width = <4>;
1500 status = "disabled";
1501 max-frequency = <97500000>;
1502 };
1503
1504 sata0: sata@ee300000 {
1505 compatible = "renesas,sata-r8a7790",
1506 "renesas,rcar-gen2-sata";
1507 reg = <0 0xee300000 0 0x2000>;
1508 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1509 clocks = <&cpg CPG_MOD 815>;
1510 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1511 resets = <&cpg 815>;
1512 status = "disabled";
1513 };
1514
1515 sata1: sata@ee500000 {
1516 compatible = "renesas,sata-r8a7790",
1517 "renesas,rcar-gen2-sata";
1518 reg = <0 0xee500000 0 0x2000>;
1519 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1520 clocks = <&cpg CPG_MOD 814>;
1521 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1522 resets = <&cpg 814>;
1523 status = "disabled";
1524 };
1525
1526 ether: ethernet@ee700000 {
1527 compatible = "renesas,ether-r8a7790",
1528 "renesas,rcar-gen2-ether";
1529 reg = <0 0xee700000 0 0x400>;
1530 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1531 clocks = <&cpg CPG_MOD 813>;
1532 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1533 resets = <&cpg 813>;
1534 phy-mode = "rmii";
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1537 status = "disabled";
1538 };
1539
1540 gic: interrupt-controller@f1001000 {
1541 compatible = "arm,gic-400";
1542 #interrupt-cells = <3>;
1543 #address-cells = <0>;
1544 interrupt-controller;
1545 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1546 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1547 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
1548 clocks = <&cpg CPG_MOD 408>;
1549 clock-names = "clk";
1550 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1551 resets = <&cpg 408>;
1552 };
1553
1554 pciec: pcie@fe000000 {
1555 compatible = "renesas,pcie-r8a7790",
1556 "renesas,pcie-rcar-gen2";
1557 reg = <0 0xfe000000 0 0x80000>;
1558 #address-cells = <3>;
1559 #size-cells = <2>;
1560 bus-range = <0x00 0xff>;
1561 device_type = "pci";
1562 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1563 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1564 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1565 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1566 /* Map all possible DDR as inbound ranges */
1567 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1568 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1569 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1570 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1571 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1572 #interrupt-cells = <1>;
1573 interrupt-map-mask = <0 0 0 0>;
1574 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1575 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1576 clock-names = "pcie", "pcie_bus";
1577 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1578 resets = <&cpg 319>;
1579 status = "disabled";
1580 };
1581
1582 vsp@fe920000 {
1583 compatible = "renesas,vsp1";
1584 reg = <0 0xfe920000 0 0x8000>;
1585 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1586 clocks = <&cpg CPG_MOD 130>;
1587 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1588 resets = <&cpg 130>;
1589 };
1590
1591 vsp@fe928000 {
1592 compatible = "renesas,vsp1";
1593 reg = <0 0xfe928000 0 0x8000>;
1594 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1595 clocks = <&cpg CPG_MOD 131>;
1596 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1597 resets = <&cpg 131>;
1598 };
1599
1600 vsp@fe930000 {
1601 compatible = "renesas,vsp1";
1602 reg = <0 0xfe930000 0 0x8000>;
1603 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1604 clocks = <&cpg CPG_MOD 128>;
1605 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1606 resets = <&cpg 128>;
1607 };
1608
1609 vsp@fe938000 {
1610 compatible = "renesas,vsp1";
1611 reg = <0 0xfe938000 0 0x8000>;
1612 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1613 clocks = <&cpg CPG_MOD 127>;
1614 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1615 resets = <&cpg 127>;
1616 };
1617
1618 jpu: jpeg-codec@fe980000 {
1619 compatible = "renesas,jpu-r8a7790",
1620 "renesas,rcar-gen2-jpu";
1621 reg = <0 0xfe980000 0 0x10300>;
1622 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1623 clocks = <&cpg CPG_MOD 106>;
1624 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1625 resets = <&cpg 106>;
1626 };
1627
1628 du: display@feb00000 {
1629 compatible = "renesas,du-r8a7790";
1630 reg = <0 0xfeb00000 0 0x70000>;
1631 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1632 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1633 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1634 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1635 <&cpg CPG_MOD 722>;
1636 clock-names = "du.0", "du.1", "du.2";
1637 status = "disabled";
1638
1639 ports {
1640 #address-cells = <1>;
1641 #size-cells = <0>;
1642
1643 port@0 {
1644 reg = <0>;
1645 du_out_rgb: endpoint {
1646 };
1647 };
1648 port@1 {
1649 reg = <1>;
1650 du_out_lvds0: endpoint {
1651 remote-endpoint = <&lvds0_in>;
1652 };
1653 };
1654 port@2 {
1655 reg = <2>;
1656 du_out_lvds1: endpoint {
1657 remote-endpoint = <&lvds1_in>;
1658 };
1659 };
1660 };
1661 };
1662
1663 lvds0: lvds@feb90000 {
1664 compatible = "renesas,r8a7790-lvds";
1665 reg = <0 0xfeb90000 0 0x1c>;
1666 clocks = <&cpg CPG_MOD 726>;
1667 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1668 resets = <&cpg 726>;
1669 status = "disabled";
1670
1671 ports {
1672 #address-cells = <1>;
1673 #size-cells = <0>;
1674
1675 port@0 {
1676 reg = <0>;
1677 lvds0_in: endpoint {
1678 remote-endpoint = <&du_out_lvds0>;
1679 };
1680 };
1681 port@1 {
1682 reg = <1>;
1683 lvds0_out: endpoint {
1684 };
1685 };
1686 };
1687 };
1688
1689 lvds1: lvds@feb94000 {
1690 compatible = "renesas,r8a7790-lvds";
1691 reg = <0 0xfeb94000 0 0x1c>;
1692 clocks = <&cpg CPG_MOD 725>;
1693 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1694 resets = <&cpg 725>;
1695 status = "disabled";
1696
1697 ports {
1698 #address-cells = <1>;
1699 #size-cells = <0>;
1700
1701 port@0 {
1702 reg = <0>;
1703 lvds1_in: endpoint {
1704 remote-endpoint = <&du_out_lvds1>;
1705 };
1706 };
1707 port@1 {
1708 reg = <1>;
1709 lvds1_out: endpoint {
1710 };
1711 };
1712 };
1713 };
1714
1715 prr: chipid@ff000044 {
1716 compatible = "renesas,prr";
1717 reg = <0 0xff000044 0 4>;
1718 };
1719
1720 cmt0: timer@ffca0000 {
1721 compatible = "renesas,r8a7790-cmt0",
1722 "renesas,rcar-gen2-cmt0";
1723 reg = <0 0xffca0000 0 0x1004>;
1724 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1725 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1726 clocks = <&cpg CPG_MOD 124>;
1727 clock-names = "fck";
1728 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1729 resets = <&cpg 124>;
1730
1731 status = "disabled";
1732 };
1733
1734 cmt1: timer@e6130000 {
1735 compatible = "renesas,r8a7790-cmt1",
1736 "renesas,rcar-gen2-cmt1";
1737 reg = <0 0xe6130000 0 0x1004>;
1738 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1739 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1740 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1741 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1742 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1743 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1744 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1745 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1746 clocks = <&cpg CPG_MOD 329>;
1747 clock-names = "fck";
1748 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1749 resets = <&cpg 329>;
1750
1751 status = "disabled";
1752 };
1753 };
1754
1755 thermal-zones {
1756 cpu_thermal: cpu-thermal {
1757 polling-delay-passive = <0>;
1758 polling-delay = <0>;
1759
1760 thermal-sensors = <&thermal>;
1761
1762 trips {
1763 cpu-crit {
1764 temperature = <95000>;
1765 hysteresis = <0>;
1766 type = "critical";
1767 };
1768 };
1769 cooling-maps {
1770 };
1771 };
1772 };
1773
1774 timer {
1775 compatible = "arm,armv7-timer";
1776 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1777 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1778 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1779 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
1780 };
1781
1782 /* External USB clock - can be overridden by the board */
1783 usb_extal_clk: usb_extal {
1784 compatible = "fixed-clock";
1785 #clock-cells = <0>;
1786 clock-frequency = <48000000>;
1787 };
1788};