Loading...
Note: File does not exist in v6.13.7.
1/*
2 * Device Tree Source for the r8a7743 SoC
3 *
4 * Copyright (C) 2016-2017 Cogent Embedded Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
14#include <dt-bindings/power/r8a7743-sysc.h>
15
16/ {
17 compatible = "renesas,r8a7743";
18 #address-cells = <2>;
19 #size-cells = <2>;
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 i2c3 = &i2c3;
26 i2c4 = &i2c4;
27 i2c5 = &i2c5;
28 i2c6 = &iic0;
29 i2c7 = &iic1;
30 i2c8 = &iic3;
31 spi0 = &qspi;
32 spi1 = &msiof0;
33 spi2 = &msiof1;
34 spi3 = &msiof2;
35 vin0 = &vin0;
36 vin1 = &vin1;
37 vin2 = &vin2;
38 };
39
40 /*
41 * The external audio clocks are configured as 0 Hz fixed frequency
42 * clocks by default.
43 * Boards that provide audio clocks should override them.
44 */
45 audio_clk_a: audio_clk_a {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <0>;
49 };
50
51 audio_clk_b: audio_clk_b {
52 compatible = "fixed-clock";
53 #clock-cells = <0>;
54 clock-frequency = <0>;
55 };
56
57 audio_clk_c: audio_clk_c {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
62
63 /* External CAN clock */
64 can_clk: can {
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 /* This value must be overridden by the board. */
68 clock-frequency = <0>;
69 };
70
71 cpus {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 enable-method = "renesas,apmu";
75
76 cpu0: cpu@0 {
77 device_type = "cpu";
78 compatible = "arm,cortex-a15";
79 reg = <0>;
80 clock-frequency = <1500000000>;
81 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
82 clock-latency = <300000>; /* 300 us */
83 power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
84 next-level-cache = <&L2_CA15>;
85
86 /* kHz - uV - OPPs unknown yet */
87 operating-points = <1500000 1000000>,
88 <1312500 1000000>,
89 <1125000 1000000>,
90 < 937500 1000000>,
91 < 750000 1000000>,
92 < 375000 1000000>;
93 };
94
95 cpu1: cpu@1 {
96 device_type = "cpu";
97 compatible = "arm,cortex-a15";
98 reg = <1>;
99 clock-frequency = <1500000000>;
100 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
101 power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
102 next-level-cache = <&L2_CA15>;
103 };
104
105 L2_CA15: cache-controller-0 {
106 compatible = "cache";
107 cache-unified;
108 cache-level = <2>;
109 power-domains = <&sysc R8A7743_PD_CA15_SCU>;
110 };
111 };
112
113 /* External root clock */
114 extal_clk: extal {
115 compatible = "fixed-clock";
116 #clock-cells = <0>;
117 /* This value must be overridden by the board. */
118 clock-frequency = <0>;
119 };
120
121 /* External PCIe clock - can be overridden by the board */
122 pcie_bus_clk: pcie_bus {
123 compatible = "fixed-clock";
124 #clock-cells = <0>;
125 clock-frequency = <0>;
126 };
127
128 /* External SCIF clock */
129 scif_clk: scif {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 /* This value must be overridden by the board. */
133 clock-frequency = <0>;
134 };
135
136 soc {
137 compatible = "simple-bus";
138 interrupt-parent = <&gic>;
139
140 #address-cells = <2>;
141 #size-cells = <2>;
142 ranges;
143
144 gpio0: gpio@e6050000 {
145 compatible = "renesas,gpio-r8a7743",
146 "renesas,rcar-gen2-gpio";
147 reg = <0 0xe6050000 0 0x50>;
148 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
149 #gpio-cells = <2>;
150 gpio-controller;
151 gpio-ranges = <&pfc 0 0 32>;
152 #interrupt-cells = <2>;
153 interrupt-controller;
154 clocks = <&cpg CPG_MOD 912>;
155 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
156 resets = <&cpg 912>;
157 };
158
159 gpio1: gpio@e6051000 {
160 compatible = "renesas,gpio-r8a7743",
161 "renesas,rcar-gen2-gpio";
162 reg = <0 0xe6051000 0 0x50>;
163 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
164 #gpio-cells = <2>;
165 gpio-controller;
166 gpio-ranges = <&pfc 0 32 26>;
167 #interrupt-cells = <2>;
168 interrupt-controller;
169 clocks = <&cpg CPG_MOD 911>;
170 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
171 resets = <&cpg 911>;
172 };
173
174 gpio2: gpio@e6052000 {
175 compatible = "renesas,gpio-r8a7743",
176 "renesas,rcar-gen2-gpio";
177 reg = <0 0xe6052000 0 0x50>;
178 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
179 #gpio-cells = <2>;
180 gpio-controller;
181 gpio-ranges = <&pfc 0 64 32>;
182 #interrupt-cells = <2>;
183 interrupt-controller;
184 clocks = <&cpg CPG_MOD 910>;
185 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
186 resets = <&cpg 910>;
187 };
188
189 gpio3: gpio@e6053000 {
190 compatible = "renesas,gpio-r8a7743",
191 "renesas,rcar-gen2-gpio";
192 reg = <0 0xe6053000 0 0x50>;
193 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
194 #gpio-cells = <2>;
195 gpio-controller;
196 gpio-ranges = <&pfc 0 96 32>;
197 #interrupt-cells = <2>;
198 interrupt-controller;
199 clocks = <&cpg CPG_MOD 909>;
200 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
201 resets = <&cpg 909>;
202 };
203
204 gpio4: gpio@e6054000 {
205 compatible = "renesas,gpio-r8a7743",
206 "renesas,rcar-gen2-gpio";
207 reg = <0 0xe6054000 0 0x50>;
208 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
209 #gpio-cells = <2>;
210 gpio-controller;
211 gpio-ranges = <&pfc 0 128 32>;
212 #interrupt-cells = <2>;
213 interrupt-controller;
214 clocks = <&cpg CPG_MOD 908>;
215 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
216 resets = <&cpg 908>;
217 };
218
219 gpio5: gpio@e6055000 {
220 compatible = "renesas,gpio-r8a7743",
221 "renesas,rcar-gen2-gpio";
222 reg = <0 0xe6055000 0 0x50>;
223 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
224 #gpio-cells = <2>;
225 gpio-controller;
226 gpio-ranges = <&pfc 0 160 32>;
227 #interrupt-cells = <2>;
228 interrupt-controller;
229 clocks = <&cpg CPG_MOD 907>;
230 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
231 resets = <&cpg 907>;
232 };
233
234 gpio6: gpio@e6055400 {
235 compatible = "renesas,gpio-r8a7743",
236 "renesas,rcar-gen2-gpio";
237 reg = <0 0xe6055400 0 0x50>;
238 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
239 #gpio-cells = <2>;
240 gpio-controller;
241 gpio-ranges = <&pfc 0 192 32>;
242 #interrupt-cells = <2>;
243 interrupt-controller;
244 clocks = <&cpg CPG_MOD 905>;
245 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
246 resets = <&cpg 905>;
247 };
248
249 gpio7: gpio@e6055800 {
250 compatible = "renesas,gpio-r8a7743",
251 "renesas,rcar-gen2-gpio";
252 reg = <0 0xe6055800 0 0x50>;
253 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
254 #gpio-cells = <2>;
255 gpio-controller;
256 gpio-ranges = <&pfc 0 224 26>;
257 #interrupt-cells = <2>;
258 interrupt-controller;
259 clocks = <&cpg CPG_MOD 904>;
260 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
261 resets = <&cpg 904>;
262 };
263
264 pfc: pin-controller@e6060000 {
265 compatible = "renesas,pfc-r8a7743";
266 reg = <0 0xe6060000 0 0x250>;
267 };
268
269 tpu: pwm@e60f0000 {
270 compatible = "renesas,tpu-r8a7743", "renesas,tpu";
271 reg = <0 0xe60f0000 0 0x148>;
272 clocks = <&cpg CPG_MOD 304>;
273 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
274 resets = <&cpg 304>;
275 #pwm-cells = <3>;
276 status = "disabled";
277 };
278
279 cpg: clock-controller@e6150000 {
280 compatible = "renesas,r8a7743-cpg-mssr";
281 reg = <0 0xe6150000 0 0x1000>;
282 clocks = <&extal_clk>, <&usb_extal_clk>;
283 clock-names = "extal", "usb_extal";
284 #clock-cells = <2>;
285 #power-domain-cells = <0>;
286 #reset-cells = <1>;
287 };
288
289 apmu@e6152000 {
290 compatible = "renesas,r8a7743-apmu", "renesas,apmu";
291 reg = <0 0xe6152000 0 0x188>;
292 cpus = <&cpu0 &cpu1>;
293 };
294
295 rst: reset-controller@e6160000 {
296 compatible = "renesas,r8a7743-rst";
297 reg = <0 0xe6160000 0 0x100>;
298 };
299
300 sysc: system-controller@e6180000 {
301 compatible = "renesas,r8a7743-sysc";
302 reg = <0 0xe6180000 0 0x200>;
303 #power-domain-cells = <1>;
304 };
305
306 irqc: interrupt-controller@e61c0000 {
307 compatible = "renesas,irqc-r8a7743", "renesas,irqc";
308 #interrupt-cells = <2>;
309 interrupt-controller;
310 reg = <0 0xe61c0000 0 0x200>;
311 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
319 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
320 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
321 clocks = <&cpg CPG_MOD 407>;
322 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
323 resets = <&cpg 407>;
324 };
325
326 thermal: thermal@e61f0000 {
327 compatible = "renesas,thermal-r8a7743",
328 "renesas,rcar-gen2-thermal",
329 "renesas,rcar-thermal";
330 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
331 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
332 clocks = <&cpg CPG_MOD 522>;
333 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
334 resets = <&cpg 522>;
335 #thermal-sensor-cells = <0>;
336 };
337
338 ipmmu_sy0: mmu@e6280000 {
339 compatible = "renesas,ipmmu-r8a7743",
340 "renesas,ipmmu-vmsa";
341 reg = <0 0xe6280000 0 0x1000>;
342 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
344 #iommu-cells = <1>;
345 status = "disabled";
346 };
347
348 ipmmu_sy1: mmu@e6290000 {
349 compatible = "renesas,ipmmu-r8a7743",
350 "renesas,ipmmu-vmsa";
351 reg = <0 0xe6290000 0 0x1000>;
352 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
353 #iommu-cells = <1>;
354 status = "disabled";
355 };
356
357 ipmmu_ds: mmu@e6740000 {
358 compatible = "renesas,ipmmu-r8a7743",
359 "renesas,ipmmu-vmsa";
360 reg = <0 0xe6740000 0 0x1000>;
361 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
363 #iommu-cells = <1>;
364 status = "disabled";
365 };
366
367 ipmmu_mp: mmu@ec680000 {
368 compatible = "renesas,ipmmu-r8a7743",
369 "renesas,ipmmu-vmsa";
370 reg = <0 0xec680000 0 0x1000>;
371 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
372 #iommu-cells = <1>;
373 status = "disabled";
374 };
375
376 ipmmu_mx: mmu@fe951000 {
377 compatible = "renesas,ipmmu-r8a7743",
378 "renesas,ipmmu-vmsa";
379 reg = <0 0xfe951000 0 0x1000>;
380 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
382 #iommu-cells = <1>;
383 status = "disabled";
384 };
385
386 ipmmu_gp: mmu@e62a0000 {
387 compatible = "renesas,ipmmu-r8a7743",
388 "renesas,ipmmu-vmsa";
389 reg = <0 0xe62a0000 0 0x1000>;
390 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
391 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
392 #iommu-cells = <1>;
393 status = "disabled";
394 };
395
396 icram0: sram@e63a0000 {
397 compatible = "mmio-sram";
398 reg = <0 0xe63a0000 0 0x12000>;
399 };
400
401 icram1: sram@e63c0000 {
402 compatible = "mmio-sram";
403 reg = <0 0xe63c0000 0 0x1000>;
404 #address-cells = <1>;
405 #size-cells = <1>;
406 ranges = <0 0 0xe63c0000 0x1000>;
407
408 smp-sram@0 {
409 compatible = "renesas,smp-sram";
410 reg = <0 0x10>;
411 };
412 };
413
414 icram2: sram@e6300000 {
415 compatible = "mmio-sram";
416 reg = <0 0xe6300000 0 0x40000>;
417 };
418
419 /* The memory map in the User's Manual maps the cores to
420 * bus numbers
421 */
422 i2c0: i2c@e6508000 {
423 #address-cells = <1>;
424 #size-cells = <0>;
425 compatible = "renesas,i2c-r8a7743",
426 "renesas,rcar-gen2-i2c";
427 reg = <0 0xe6508000 0 0x40>;
428 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
429 clocks = <&cpg CPG_MOD 931>;
430 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
431 resets = <&cpg 931>;
432 i2c-scl-internal-delay-ns = <6>;
433 status = "disabled";
434 };
435
436 i2c1: i2c@e6518000 {
437 #address-cells = <1>;
438 #size-cells = <0>;
439 compatible = "renesas,i2c-r8a7743",
440 "renesas,rcar-gen2-i2c";
441 reg = <0 0xe6518000 0 0x40>;
442 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
443 clocks = <&cpg CPG_MOD 930>;
444 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
445 resets = <&cpg 930>;
446 i2c-scl-internal-delay-ns = <6>;
447 status = "disabled";
448 };
449
450 i2c2: i2c@e6530000 {
451 #address-cells = <1>;
452 #size-cells = <0>;
453 compatible = "renesas,i2c-r8a7743",
454 "renesas,rcar-gen2-i2c";
455 reg = <0 0xe6530000 0 0x40>;
456 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
457 clocks = <&cpg CPG_MOD 929>;
458 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
459 resets = <&cpg 929>;
460 i2c-scl-internal-delay-ns = <6>;
461 status = "disabled";
462 };
463
464 i2c3: i2c@e6540000 {
465 #address-cells = <1>;
466 #size-cells = <0>;
467 compatible = "renesas,i2c-r8a7743",
468 "renesas,rcar-gen2-i2c";
469 reg = <0 0xe6540000 0 0x40>;
470 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
471 clocks = <&cpg CPG_MOD 928>;
472 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
473 resets = <&cpg 928>;
474 i2c-scl-internal-delay-ns = <6>;
475 status = "disabled";
476 };
477
478 i2c4: i2c@e6520000 {
479 #address-cells = <1>;
480 #size-cells = <0>;
481 compatible = "renesas,i2c-r8a7743",
482 "renesas,rcar-gen2-i2c";
483 reg = <0 0xe6520000 0 0x40>;
484 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
485 clocks = <&cpg CPG_MOD 927>;
486 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
487 resets = <&cpg 927>;
488 i2c-scl-internal-delay-ns = <6>;
489 status = "disabled";
490 };
491
492 i2c5: i2c@e6528000 {
493 /* doesn't need pinmux */
494 #address-cells = <1>;
495 #size-cells = <0>;
496 compatible = "renesas,i2c-r8a7743",
497 "renesas,rcar-gen2-i2c";
498 reg = <0 0xe6528000 0 0x40>;
499 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
500 clocks = <&cpg CPG_MOD 925>;
501 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
502 resets = <&cpg 925>;
503 i2c-scl-internal-delay-ns = <110>;
504 status = "disabled";
505 };
506
507 iic0: i2c@e6500000 {
508 #address-cells = <1>;
509 #size-cells = <0>;
510 compatible = "renesas,iic-r8a7743",
511 "renesas,rcar-gen2-iic",
512 "renesas,rmobile-iic";
513 reg = <0 0xe6500000 0 0x425>;
514 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&cpg CPG_MOD 318>;
516 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
517 <&dmac1 0x61>, <&dmac1 0x62>;
518 dma-names = "tx", "rx", "tx", "rx";
519 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
520 resets = <&cpg 318>;
521 status = "disabled";
522 };
523
524 iic1: i2c@e6510000 {
525 #address-cells = <1>;
526 #size-cells = <0>;
527 compatible = "renesas,iic-r8a7743",
528 "renesas,rcar-gen2-iic",
529 "renesas,rmobile-iic";
530 reg = <0 0xe6510000 0 0x425>;
531 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&cpg CPG_MOD 323>;
533 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
534 <&dmac1 0x65>, <&dmac1 0x66>;
535 dma-names = "tx", "rx", "tx", "rx";
536 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
537 resets = <&cpg 323>;
538 status = "disabled";
539 };
540
541 iic3: i2c@e60b0000 {
542 /* doesn't need pinmux */
543 #address-cells = <1>;
544 #size-cells = <0>;
545 compatible = "renesas,iic-r8a7743",
546 "renesas,rcar-gen2-iic",
547 "renesas,rmobile-iic";
548 reg = <0 0xe60b0000 0 0x425>;
549 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
550 clocks = <&cpg CPG_MOD 926>;
551 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
552 <&dmac1 0x77>, <&dmac1 0x78>;
553 dma-names = "tx", "rx", "tx", "rx";
554 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
555 resets = <&cpg 926>;
556 status = "disabled";
557 };
558
559 hsusb: usb@e6590000 {
560 compatible = "renesas,usbhs-r8a7743",
561 "renesas,rcar-gen2-usbhs";
562 reg = <0 0xe6590000 0 0x100>;
563 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&cpg CPG_MOD 704>;
565 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
566 <&usb_dmac1 0>, <&usb_dmac1 1>;
567 dma-names = "ch0", "ch1", "ch2", "ch3";
568 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
569 resets = <&cpg 704>;
570 renesas,buswait = <4>;
571 phys = <&usb0 1>;
572 phy-names = "usb";
573 status = "disabled";
574 };
575
576 usbphy: usb-phy@e6590100 {
577 compatible = "renesas,usb-phy-r8a7743",
578 "renesas,rcar-gen2-usb-phy";
579 reg = <0 0xe6590100 0 0x100>;
580 #address-cells = <1>;
581 #size-cells = <0>;
582 clocks = <&cpg CPG_MOD 704>;
583 clock-names = "usbhs";
584 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
585 resets = <&cpg 704>;
586 status = "disabled";
587
588 usb0: usb-channel@0 {
589 reg = <0>;
590 #phy-cells = <1>;
591 };
592 usb2: usb-channel@2 {
593 reg = <2>;
594 #phy-cells = <1>;
595 };
596 };
597
598 usb_dmac0: dma-controller@e65a0000 {
599 compatible = "renesas,r8a7743-usb-dmac",
600 "renesas,usb-dmac";
601 reg = <0 0xe65a0000 0 0x100>;
602 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
603 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
604 interrupt-names = "ch0", "ch1";
605 clocks = <&cpg CPG_MOD 330>;
606 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
607 resets = <&cpg 330>;
608 #dma-cells = <1>;
609 dma-channels = <2>;
610 };
611
612 usb_dmac1: dma-controller@e65b0000 {
613 compatible = "renesas,r8a7743-usb-dmac",
614 "renesas,usb-dmac";
615 reg = <0 0xe65b0000 0 0x100>;
616 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
617 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
618 interrupt-names = "ch0", "ch1";
619 clocks = <&cpg CPG_MOD 331>;
620 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
621 resets = <&cpg 331>;
622 #dma-cells = <1>;
623 dma-channels = <2>;
624 };
625
626 dmac0: dma-controller@e6700000 {
627 compatible = "renesas,dmac-r8a7743",
628 "renesas,rcar-dmac";
629 reg = <0 0xe6700000 0 0x20000>;
630 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
631 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
632 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
633 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
634 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
635 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
636 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
637 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
638 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
639 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
640 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
641 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
646 interrupt-names = "error",
647 "ch0", "ch1", "ch2", "ch3",
648 "ch4", "ch5", "ch6", "ch7",
649 "ch8", "ch9", "ch10", "ch11",
650 "ch12", "ch13", "ch14";
651 clocks = <&cpg CPG_MOD 219>;
652 clock-names = "fck";
653 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
654 resets = <&cpg 219>;
655 #dma-cells = <1>;
656 dma-channels = <15>;
657 };
658
659 dmac1: dma-controller@e6720000 {
660 compatible = "renesas,dmac-r8a7743",
661 "renesas,rcar-dmac";
662 reg = <0 0xe6720000 0 0x20000>;
663 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
664 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
665 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
666 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
667 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
668 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
669 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
670 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
671 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
672 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
673 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
674 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
675 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
676 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
677 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
678 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
679 interrupt-names = "error",
680 "ch0", "ch1", "ch2", "ch3",
681 "ch4", "ch5", "ch6", "ch7",
682 "ch8", "ch9", "ch10", "ch11",
683 "ch12", "ch13", "ch14";
684 clocks = <&cpg CPG_MOD 218>;
685 clock-names = "fck";
686 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
687 resets = <&cpg 218>;
688 #dma-cells = <1>;
689 dma-channels = <15>;
690 };
691
692 avb: ethernet@e6800000 {
693 compatible = "renesas,etheravb-r8a7743",
694 "renesas,etheravb-rcar-gen2";
695 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
696 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
697 clocks = <&cpg CPG_MOD 812>;
698 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
699 resets = <&cpg 812>;
700 #address-cells = <1>;
701 #size-cells = <0>;
702 status = "disabled";
703 };
704
705 qspi: spi@e6b10000 {
706 compatible = "renesas,qspi-r8a7743", "renesas,qspi";
707 reg = <0 0xe6b10000 0 0x2c>;
708 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 917>;
710 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
711 <&dmac1 0x17>, <&dmac1 0x18>;
712 dma-names = "tx", "rx", "tx", "rx";
713 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
714 num-cs = <1>;
715 #address-cells = <1>;
716 #size-cells = <0>;
717 resets = <&cpg 917>;
718 status = "disabled";
719 };
720
721 scifa0: serial@e6c40000 {
722 compatible = "renesas,scifa-r8a7743",
723 "renesas,rcar-gen2-scifa", "renesas,scifa";
724 reg = <0 0xe6c40000 0 0x40>;
725 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 204>;
727 clock-names = "fck";
728 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
729 <&dmac1 0x21>, <&dmac1 0x22>;
730 dma-names = "tx", "rx", "tx", "rx";
731 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
732 resets = <&cpg 204>;
733 status = "disabled";
734 };
735
736 scifa1: serial@e6c50000 {
737 compatible = "renesas,scifa-r8a7743",
738 "renesas,rcar-gen2-scifa", "renesas,scifa";
739 reg = <0 0xe6c50000 0 0x40>;
740 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
741 clocks = <&cpg CPG_MOD 203>;
742 clock-names = "fck";
743 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
744 <&dmac1 0x25>, <&dmac1 0x26>;
745 dma-names = "tx", "rx", "tx", "rx";
746 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
747 resets = <&cpg 203>;
748 status = "disabled";
749 };
750
751 scifa2: serial@e6c60000 {
752 compatible = "renesas,scifa-r8a7743",
753 "renesas,rcar-gen2-scifa", "renesas,scifa";
754 reg = <0 0xe6c60000 0 0x40>;
755 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
756 clocks = <&cpg CPG_MOD 202>;
757 clock-names = "fck";
758 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
759 <&dmac1 0x27>, <&dmac1 0x28>;
760 dma-names = "tx", "rx", "tx", "rx";
761 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
762 resets = <&cpg 202>;
763 status = "disabled";
764 };
765
766 scifa3: serial@e6c70000 {
767 compatible = "renesas,scifa-r8a7743",
768 "renesas,rcar-gen2-scifa", "renesas,scifa";
769 reg = <0 0xe6c70000 0 0x40>;
770 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
771 clocks = <&cpg CPG_MOD 1106>;
772 clock-names = "fck";
773 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
774 <&dmac1 0x1b>, <&dmac1 0x1c>;
775 dma-names = "tx", "rx", "tx", "rx";
776 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
777 resets = <&cpg 1106>;
778 status = "disabled";
779 };
780
781 scifa4: serial@e6c78000 {
782 compatible = "renesas,scifa-r8a7743",
783 "renesas,rcar-gen2-scifa", "renesas,scifa";
784 reg = <0 0xe6c78000 0 0x40>;
785 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
786 clocks = <&cpg CPG_MOD 1107>;
787 clock-names = "fck";
788 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
789 <&dmac1 0x1f>, <&dmac1 0x20>;
790 dma-names = "tx", "rx", "tx", "rx";
791 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
792 resets = <&cpg 1107>;
793 status = "disabled";
794 };
795
796 scifa5: serial@e6c80000 {
797 compatible = "renesas,scifa-r8a7743",
798 "renesas,rcar-gen2-scifa", "renesas,scifa";
799 reg = <0 0xe6c80000 0 0x40>;
800 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
801 clocks = <&cpg CPG_MOD 1108>;
802 clock-names = "fck";
803 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
804 <&dmac1 0x23>, <&dmac1 0x24>;
805 dma-names = "tx", "rx", "tx", "rx";
806 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
807 resets = <&cpg 1108>;
808 status = "disabled";
809 };
810
811 scifb0: serial@e6c20000 {
812 compatible = "renesas,scifb-r8a7743",
813 "renesas,rcar-gen2-scifb", "renesas,scifb";
814 reg = <0 0xe6c20000 0 0x100>;
815 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
816 clocks = <&cpg CPG_MOD 206>;
817 clock-names = "fck";
818 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
819 <&dmac1 0x3d>, <&dmac1 0x3e>;
820 dma-names = "tx", "rx", "tx", "rx";
821 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
822 resets = <&cpg 206>;
823 status = "disabled";
824 };
825
826 scifb1: serial@e6c30000 {
827 compatible = "renesas,scifb-r8a7743",
828 "renesas,rcar-gen2-scifb", "renesas,scifb";
829 reg = <0 0xe6c30000 0 0x100>;
830 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
831 clocks = <&cpg CPG_MOD 207>;
832 clock-names = "fck";
833 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
834 <&dmac1 0x19>, <&dmac1 0x1a>;
835 dma-names = "tx", "rx", "tx", "rx";
836 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
837 resets = <&cpg 207>;
838 status = "disabled";
839 };
840
841 scifb2: serial@e6ce0000 {
842 compatible = "renesas,scifb-r8a7743",
843 "renesas,rcar-gen2-scifb", "renesas,scifb";
844 reg = <0 0xe6ce0000 0 0x100>;
845 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
846 clocks = <&cpg CPG_MOD 216>;
847 clock-names = "fck";
848 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
849 <&dmac1 0x1d>, <&dmac1 0x1e>;
850 dma-names = "tx", "rx", "tx", "rx";
851 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
852 resets = <&cpg 216>;
853 status = "disabled";
854 };
855
856 scif0: serial@e6e60000 {
857 compatible = "renesas,scif-r8a7743",
858 "renesas,rcar-gen2-scif", "renesas,scif";
859 reg = <0 0xe6e60000 0 0x40>;
860 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
861 clocks = <&cpg CPG_MOD 721>,
862 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
863 clock-names = "fck", "brg_int", "scif_clk";
864 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
865 <&dmac1 0x29>, <&dmac1 0x2a>;
866 dma-names = "tx", "rx", "tx", "rx";
867 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
868 resets = <&cpg 721>;
869 status = "disabled";
870 };
871
872 scif1: serial@e6e68000 {
873 compatible = "renesas,scif-r8a7743",
874 "renesas,rcar-gen2-scif", "renesas,scif";
875 reg = <0 0xe6e68000 0 0x40>;
876 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 720>,
878 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
879 clock-names = "fck", "brg_int", "scif_clk";
880 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
881 <&dmac1 0x2d>, <&dmac1 0x2e>;
882 dma-names = "tx", "rx", "tx", "rx";
883 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
884 resets = <&cpg 720>;
885 status = "disabled";
886 };
887
888 scif2: serial@e6e58000 {
889 compatible = "renesas,scif-r8a7743",
890 "renesas,rcar-gen2-scif", "renesas,scif";
891 reg = <0 0xe6e58000 0 0x40>;
892 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
893 clocks = <&cpg CPG_MOD 719>,
894 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
895 clock-names = "fck", "brg_int", "scif_clk";
896 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
897 <&dmac1 0x2b>, <&dmac1 0x2c>;
898 dma-names = "tx", "rx", "tx", "rx";
899 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
900 resets = <&cpg 719>;
901 status = "disabled";
902 };
903
904 scif3: serial@e6ea8000 {
905 compatible = "renesas,scif-r8a7743",
906 "renesas,rcar-gen2-scif", "renesas,scif";
907 reg = <0 0xe6ea8000 0 0x40>;
908 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
909 clocks = <&cpg CPG_MOD 718>,
910 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
911 clock-names = "fck", "brg_int", "scif_clk";
912 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
913 <&dmac1 0x2f>, <&dmac1 0x30>;
914 dma-names = "tx", "rx", "tx", "rx";
915 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
916 resets = <&cpg 718>;
917 status = "disabled";
918 };
919
920 scif4: serial@e6ee0000 {
921 compatible = "renesas,scif-r8a7743",
922 "renesas,rcar-gen2-scif", "renesas,scif";
923 reg = <0 0xe6ee0000 0 0x40>;
924 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
925 clocks = <&cpg CPG_MOD 715>,
926 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
927 clock-names = "fck", "brg_int", "scif_clk";
928 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
929 <&dmac1 0xfb>, <&dmac1 0xfc>;
930 dma-names = "tx", "rx", "tx", "rx";
931 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
932 resets = <&cpg 715>;
933 status = "disabled";
934 };
935
936 scif5: serial@e6ee8000 {
937 compatible = "renesas,scif-r8a7743",
938 "renesas,rcar-gen2-scif", "renesas,scif";
939 reg = <0 0xe6ee8000 0 0x40>;
940 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
941 clocks = <&cpg CPG_MOD 714>,
942 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
943 clock-names = "fck", "brg_int", "scif_clk";
944 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
945 <&dmac1 0xfd>, <&dmac1 0xfe>;
946 dma-names = "tx", "rx", "tx", "rx";
947 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
948 resets = <&cpg 714>;
949 status = "disabled";
950 };
951
952 hscif0: serial@e62c0000 {
953 compatible = "renesas,hscif-r8a7743",
954 "renesas,rcar-gen2-hscif", "renesas,hscif";
955 reg = <0 0xe62c0000 0 0x60>;
956 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
957 clocks = <&cpg CPG_MOD 717>,
958 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
959 clock-names = "fck", "brg_int", "scif_clk";
960 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
961 <&dmac1 0x39>, <&dmac1 0x3a>;
962 dma-names = "tx", "rx", "tx", "rx";
963 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
964 resets = <&cpg 717>;
965 status = "disabled";
966 };
967
968 hscif1: serial@e62c8000 {
969 compatible = "renesas,hscif-r8a7743",
970 "renesas,rcar-gen2-hscif", "renesas,hscif";
971 reg = <0 0xe62c8000 0 0x60>;
972 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
973 clocks = <&cpg CPG_MOD 716>,
974 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
975 clock-names = "fck", "brg_int", "scif_clk";
976 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
977 <&dmac1 0x4d>, <&dmac1 0x4e>;
978 dma-names = "tx", "rx", "tx", "rx";
979 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
980 resets = <&cpg 716>;
981 status = "disabled";
982 };
983
984 hscif2: serial@e62d0000 {
985 compatible = "renesas,hscif-r8a7743",
986 "renesas,rcar-gen2-hscif", "renesas,hscif";
987 reg = <0 0xe62d0000 0 0x60>;
988 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
989 clocks = <&cpg CPG_MOD 713>,
990 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
991 clock-names = "fck", "brg_int", "scif_clk";
992 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
993 <&dmac1 0x3b>, <&dmac1 0x3c>;
994 dma-names = "tx", "rx", "tx", "rx";
995 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
996 resets = <&cpg 713>;
997 status = "disabled";
998 };
999
1000 msiof0: spi@e6e20000 {
1001 compatible = "renesas,msiof-r8a7743",
1002 "renesas,rcar-gen2-msiof";
1003 reg = <0 0xe6e20000 0 0x0064>;
1004 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1005 clocks = <&cpg CPG_MOD 000>;
1006 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1007 <&dmac1 0x51>, <&dmac1 0x52>;
1008 dma-names = "tx", "rx", "tx", "rx";
1009 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1010 #address-cells = <1>;
1011 #size-cells = <0>;
1012 resets = <&cpg 000>;
1013 status = "disabled";
1014 };
1015
1016 msiof1: spi@e6e10000 {
1017 compatible = "renesas,msiof-r8a7743",
1018 "renesas,rcar-gen2-msiof";
1019 reg = <0 0xe6e10000 0 0x0064>;
1020 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1021 clocks = <&cpg CPG_MOD 208>;
1022 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1023 <&dmac1 0x55>, <&dmac1 0x56>;
1024 dma-names = "tx", "rx", "tx", "rx";
1025 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1026 #address-cells = <1>;
1027 #size-cells = <0>;
1028 resets = <&cpg 208>;
1029 status = "disabled";
1030 };
1031
1032 msiof2: spi@e6e00000 {
1033 compatible = "renesas,msiof-r8a7743",
1034 "renesas,rcar-gen2-msiof";
1035 reg = <0 0xe6e00000 0 0x0064>;
1036 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1037 clocks = <&cpg CPG_MOD 205>;
1038 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1039 <&dmac1 0x41>, <&dmac1 0x42>;
1040 dma-names = "tx", "rx", "tx", "rx";
1041 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1042 #address-cells = <1>;
1043 #size-cells = <0>;
1044 resets = <&cpg 205>;
1045 status = "disabled";
1046 };
1047
1048 pwm0: pwm@e6e30000 {
1049 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1050 reg = <0 0xe6e30000 0 0x8>;
1051 clocks = <&cpg CPG_MOD 523>;
1052 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1053 resets = <&cpg 523>;
1054 #pwm-cells = <2>;
1055 status = "disabled";
1056 };
1057
1058 pwm1: pwm@e6e31000 {
1059 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1060 reg = <0 0xe6e31000 0 0x8>;
1061 clocks = <&cpg CPG_MOD 523>;
1062 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1063 resets = <&cpg 523>;
1064 #pwm-cells = <2>;
1065 status = "disabled";
1066 };
1067
1068 pwm2: pwm@e6e32000 {
1069 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1070 reg = <0 0xe6e32000 0 0x8>;
1071 clocks = <&cpg CPG_MOD 523>;
1072 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1073 resets = <&cpg 523>;
1074 #pwm-cells = <2>;
1075 status = "disabled";
1076 };
1077
1078 pwm3: pwm@e6e33000 {
1079 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1080 reg = <0 0xe6e33000 0 0x8>;
1081 clocks = <&cpg CPG_MOD 523>;
1082 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1083 resets = <&cpg 523>;
1084 #pwm-cells = <2>;
1085 status = "disabled";
1086 };
1087
1088 pwm4: pwm@e6e34000 {
1089 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1090 reg = <0 0xe6e34000 0 0x8>;
1091 clocks = <&cpg CPG_MOD 523>;
1092 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1093 resets = <&cpg 523>;
1094 #pwm-cells = <2>;
1095 status = "disabled";
1096 };
1097
1098 pwm5: pwm@e6e35000 {
1099 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1100 reg = <0 0xe6e35000 0 0x8>;
1101 clocks = <&cpg CPG_MOD 523>;
1102 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1103 resets = <&cpg 523>;
1104 #pwm-cells = <2>;
1105 status = "disabled";
1106 };
1107
1108 pwm6: pwm@e6e36000 {
1109 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1110 reg = <0 0xe6e36000 0 0x8>;
1111 clocks = <&cpg CPG_MOD 523>;
1112 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1113 resets = <&cpg 523>;
1114 #pwm-cells = <2>;
1115 status = "disabled";
1116 };
1117
1118 can0: can@e6e80000 {
1119 compatible = "renesas,can-r8a7743",
1120 "renesas,rcar-gen2-can";
1121 reg = <0 0xe6e80000 0 0x1000>;
1122 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1123 clocks = <&cpg CPG_MOD 916>,
1124 <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1125 <&can_clk>;
1126 clock-names = "clkp1", "clkp2", "can_clk";
1127 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1128 resets = <&cpg 916>;
1129 status = "disabled";
1130 };
1131
1132 can1: can@e6e88000 {
1133 compatible = "renesas,can-r8a7743",
1134 "renesas,rcar-gen2-can";
1135 reg = <0 0xe6e88000 0 0x1000>;
1136 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1137 clocks = <&cpg CPG_MOD 915>,
1138 <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1139 <&can_clk>;
1140 clock-names = "clkp1", "clkp2", "can_clk";
1141 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1142 resets = <&cpg 915>;
1143 status = "disabled";
1144 };
1145
1146 vin0: video@e6ef0000 {
1147 compatible = "renesas,vin-r8a7743",
1148 "renesas,rcar-gen2-vin";
1149 reg = <0 0xe6ef0000 0 0x1000>;
1150 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1151 clocks = <&cpg CPG_MOD 811>;
1152 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1153 resets = <&cpg 811>;
1154 status = "disabled";
1155 };
1156
1157 vin1: video@e6ef1000 {
1158 compatible = "renesas,vin-r8a7743",
1159 "renesas,rcar-gen2-vin";
1160 reg = <0 0xe6ef1000 0 0x1000>;
1161 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1162 clocks = <&cpg CPG_MOD 810>;
1163 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1164 resets = <&cpg 810>;
1165 status = "disabled";
1166 };
1167
1168 vin2: video@e6ef2000 {
1169 compatible = "renesas,vin-r8a7743",
1170 "renesas,rcar-gen2-vin";
1171 reg = <0 0xe6ef2000 0 0x1000>;
1172 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1173 clocks = <&cpg CPG_MOD 809>;
1174 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1175 resets = <&cpg 809>;
1176 status = "disabled";
1177 };
1178
1179 rcar_sound: sound@ec500000 {
1180 /*
1181 * #sound-dai-cells is required
1182 *
1183 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1184 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1185 */
1186 compatible = "renesas,rcar_sound-r8a7743",
1187 "renesas,rcar_sound-gen2";
1188 reg = <0 0xec500000 0 0x1000>, /* SCU */
1189 <0 0xec5a0000 0 0x100>, /* ADG */
1190 <0 0xec540000 0 0x1000>, /* SSIU */
1191 <0 0xec541000 0 0x280>, /* SSI */
1192 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1193 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1194
1195 clocks = <&cpg CPG_MOD 1005>,
1196 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1197 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1198 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1199 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1200 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1201 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1202 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1203 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1204 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1205 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1206 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1207 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1208 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1209 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1210 <&cpg CPG_CORE R8A7743_CLK_M2>;
1211 clock-names = "ssi-all",
1212 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1213 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1214 "src.9", "src.8", "src.7", "src.6", "src.5",
1215 "src.4", "src.3", "src.2", "src.1", "src.0",
1216 "ctu.0", "ctu.1",
1217 "mix.0", "mix.1",
1218 "dvc.0", "dvc.1",
1219 "clk_a", "clk_b", "clk_c", "clk_i";
1220 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1221 resets = <&cpg 1005>,
1222 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1223 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1224 <&cpg 1014>, <&cpg 1015>;
1225 reset-names = "ssi-all",
1226 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1227 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1228 status = "disabled";
1229
1230 rcar_sound,dvc {
1231 dvc0: dvc-0 {
1232 dmas = <&audma1 0xbc>;
1233 dma-names = "tx";
1234 };
1235 dvc1: dvc-1 {
1236 dmas = <&audma1 0xbe>;
1237 dma-names = "tx";
1238 };
1239 };
1240
1241 rcar_sound,mix {
1242 mix0: mix-0 { };
1243 mix1: mix-1 { };
1244 };
1245
1246 rcar_sound,ctu {
1247 ctu00: ctu-0 { };
1248 ctu01: ctu-1 { };
1249 ctu02: ctu-2 { };
1250 ctu03: ctu-3 { };
1251 ctu10: ctu-4 { };
1252 ctu11: ctu-5 { };
1253 ctu12: ctu-6 { };
1254 ctu13: ctu-7 { };
1255 };
1256
1257 rcar_sound,src {
1258 src0: src-0 {
1259 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1260 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1261 dma-names = "rx", "tx";
1262 };
1263 src1: src-1 {
1264 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1265 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1266 dma-names = "rx", "tx";
1267 };
1268 src2: src-2 {
1269 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1270 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1271 dma-names = "rx", "tx";
1272 };
1273 src3: src-3 {
1274 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1275 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1276 dma-names = "rx", "tx";
1277 };
1278 src4: src-4 {
1279 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1280 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1281 dma-names = "rx", "tx";
1282 };
1283 src5: src-5 {
1284 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1285 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1286 dma-names = "rx", "tx";
1287 };
1288 src6: src-6 {
1289 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1290 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1291 dma-names = "rx", "tx";
1292 };
1293 src7: src-7 {
1294 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1295 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1296 dma-names = "rx", "tx";
1297 };
1298 src8: src-8 {
1299 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1300 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1301 dma-names = "rx", "tx";
1302 };
1303 src9: src-9 {
1304 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1305 dmas = <&audma0 0x97>, <&audma1 0xba>;
1306 dma-names = "rx", "tx";
1307 };
1308 };
1309
1310 rcar_sound,ssi {
1311 ssi0: ssi-0 {
1312 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1313 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1314 dma-names = "rx", "tx", "rxu", "txu";
1315 };
1316 ssi1: ssi-1 {
1317 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1318 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1319 dma-names = "rx", "tx", "rxu", "txu";
1320 };
1321 ssi2: ssi-2 {
1322 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1323 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1324 dma-names = "rx", "tx", "rxu", "txu";
1325 };
1326 ssi3: ssi-3 {
1327 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1328 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1329 dma-names = "rx", "tx", "rxu", "txu";
1330 };
1331 ssi4: ssi-4 {
1332 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1333 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1334 dma-names = "rx", "tx", "rxu", "txu";
1335 };
1336 ssi5: ssi-5 {
1337 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1338 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1339 dma-names = "rx", "tx", "rxu", "txu";
1340 };
1341 ssi6: ssi-6 {
1342 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1343 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1344 dma-names = "rx", "tx", "rxu", "txu";
1345 };
1346 ssi7: ssi-7 {
1347 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1348 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1349 dma-names = "rx", "tx", "rxu", "txu";
1350 };
1351 ssi8: ssi-8 {
1352 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1353 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1354 dma-names = "rx", "tx", "rxu", "txu";
1355 };
1356 ssi9: ssi-9 {
1357 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1358 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1359 dma-names = "rx", "tx", "rxu", "txu";
1360 };
1361 };
1362 };
1363
1364 audma0: dma-controller@ec700000 {
1365 compatible = "renesas,dmac-r8a7743",
1366 "renesas,rcar-dmac";
1367 reg = <0 0xec700000 0 0x10000>;
1368 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1369 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1370 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1371 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1372 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1373 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1374 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1375 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1376 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1377 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1378 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1379 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1380 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1381 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1382 interrupt-names = "error",
1383 "ch0", "ch1", "ch2", "ch3",
1384 "ch4", "ch5", "ch6", "ch7",
1385 "ch8", "ch9", "ch10", "ch11",
1386 "ch12";
1387 clocks = <&cpg CPG_MOD 502>;
1388 clock-names = "fck";
1389 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1390 resets = <&cpg 502>;
1391 #dma-cells = <1>;
1392 dma-channels = <13>;
1393 };
1394
1395 audma1: dma-controller@ec720000 {
1396 compatible = "renesas,dmac-r8a7743",
1397 "renesas,rcar-dmac";
1398 reg = <0 0xec720000 0 0x10000>;
1399 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1400 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1401 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1402 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1403 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1404 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1405 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1406 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1407 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1408 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1409 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1410 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1411 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1412 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1413 interrupt-names = "error",
1414 "ch0", "ch1", "ch2", "ch3",
1415 "ch4", "ch5", "ch6", "ch7",
1416 "ch8", "ch9", "ch10", "ch11",
1417 "ch12";
1418 clocks = <&cpg CPG_MOD 501>;
1419 clock-names = "fck";
1420 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1421 resets = <&cpg 501>;
1422 #dma-cells = <1>;
1423 dma-channels = <13>;
1424 };
1425
1426 /*
1427 * pci1 and xhci share the same phy, therefore only one of them
1428 * can be active at any one time. If both of them are enabled,
1429 * a race condition will determine who'll control the phy.
1430 * A firmware file is needed by the xhci driver in order for
1431 * USB 3.0 to work properly.
1432 */
1433 xhci: usb@ee000000 {
1434 compatible = "renesas,xhci-r8a7743",
1435 "renesas,rcar-gen2-xhci";
1436 reg = <0 0xee000000 0 0xc00>;
1437 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1438 clocks = <&cpg CPG_MOD 328>;
1439 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1440 resets = <&cpg 328>;
1441 phys = <&usb2 1>;
1442 phy-names = "usb";
1443 status = "disabled";
1444 };
1445
1446 pci0: pci@ee090000 {
1447 compatible = "renesas,pci-r8a7743",
1448 "renesas,pci-rcar-gen2";
1449 device_type = "pci";
1450 reg = <0 0xee090000 0 0xc00>,
1451 <0 0xee080000 0 0x1100>;
1452 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1453 clocks = <&cpg CPG_MOD 703>;
1454 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1455 resets = <&cpg 703>;
1456 status = "disabled";
1457
1458 bus-range = <0 0>;
1459 #address-cells = <3>;
1460 #size-cells = <2>;
1461 #interrupt-cells = <1>;
1462 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1463 interrupt-map-mask = <0xff00 0 0 0x7>;
1464 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1465 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1466 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1467
1468 usb@1,0 {
1469 reg = <0x800 0 0 0 0>;
1470 phys = <&usb0 0>;
1471 phy-names = "usb";
1472 };
1473
1474 usb@2,0 {
1475 reg = <0x1000 0 0 0 0>;
1476 phys = <&usb0 0>;
1477 phy-names = "usb";
1478 };
1479 };
1480
1481 pci1: pci@ee0d0000 {
1482 compatible = "renesas,pci-r8a7743",
1483 "renesas,pci-rcar-gen2";
1484 device_type = "pci";
1485 reg = <0 0xee0d0000 0 0xc00>,
1486 <0 0xee0c0000 0 0x1100>;
1487 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1488 clocks = <&cpg CPG_MOD 703>;
1489 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1490 resets = <&cpg 703>;
1491 status = "disabled";
1492
1493 bus-range = <1 1>;
1494 #address-cells = <3>;
1495 #size-cells = <2>;
1496 #interrupt-cells = <1>;
1497 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1498 interrupt-map-mask = <0xff00 0 0 0x7>;
1499 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1500 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1501 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1502
1503 usb@1,0 {
1504 reg = <0x10800 0 0 0 0>;
1505 phys = <&usb2 0>;
1506 phy-names = "usb";
1507 };
1508
1509 usb@2,0 {
1510 reg = <0x11000 0 0 0 0>;
1511 phys = <&usb2 0>;
1512 phy-names = "usb";
1513 };
1514 };
1515
1516 sdhi0: sd@ee100000 {
1517 compatible = "renesas,sdhi-r8a7743",
1518 "renesas,rcar-gen2-sdhi";
1519 reg = <0 0xee100000 0 0x328>;
1520 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1521 clocks = <&cpg CPG_MOD 314>;
1522 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1523 <&dmac1 0xcd>, <&dmac1 0xce>;
1524 dma-names = "tx", "rx", "tx", "rx";
1525 max-frequency = <195000000>;
1526 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1527 resets = <&cpg 314>;
1528 status = "disabled";
1529 };
1530
1531 sdhi1: sd@ee140000 {
1532 compatible = "renesas,sdhi-r8a7743",
1533 "renesas,rcar-gen2-sdhi";
1534 reg = <0 0xee140000 0 0x100>;
1535 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1536 clocks = <&cpg CPG_MOD 312>;
1537 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1538 <&dmac1 0xc1>, <&dmac1 0xc2>;
1539 dma-names = "tx", "rx", "tx", "rx";
1540 max-frequency = <97500000>;
1541 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1542 resets = <&cpg 312>;
1543 status = "disabled";
1544 };
1545
1546 sdhi2: sd@ee160000 {
1547 compatible = "renesas,sdhi-r8a7743",
1548 "renesas,rcar-gen2-sdhi";
1549 reg = <0 0xee160000 0 0x100>;
1550 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1551 clocks = <&cpg CPG_MOD 311>;
1552 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1553 <&dmac1 0xd3>, <&dmac1 0xd4>;
1554 dma-names = "tx", "rx", "tx", "rx";
1555 max-frequency = <97500000>;
1556 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1557 resets = <&cpg 311>;
1558 status = "disabled";
1559 };
1560
1561 mmcif0: mmc@ee200000 {
1562 compatible = "renesas,mmcif-r8a7743",
1563 "renesas,sh-mmcif";
1564 reg = <0 0xee200000 0 0x80>;
1565 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1566 clocks = <&cpg CPG_MOD 315>;
1567 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1568 <&dmac1 0xd1>, <&dmac1 0xd2>;
1569 dma-names = "tx", "rx", "tx", "rx";
1570 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1571 resets = <&cpg 315>;
1572 reg-io-width = <4>;
1573 max-frequency = <97500000>;
1574 status = "disabled";
1575 };
1576
1577 ether: ethernet@ee700000 {
1578 compatible = "renesas,ether-r8a7743",
1579 "renesas,rcar-gen2-ether";
1580 reg = <0 0xee700000 0 0x400>;
1581 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1582 clocks = <&cpg CPG_MOD 813>;
1583 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1584 resets = <&cpg 813>;
1585 phy-mode = "rmii";
1586 #address-cells = <1>;
1587 #size-cells = <0>;
1588 status = "disabled";
1589 };
1590
1591 gic: interrupt-controller@f1001000 {
1592 compatible = "arm,gic-400";
1593 #interrupt-cells = <3>;
1594 #address-cells = <0>;
1595 interrupt-controller;
1596 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1597 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1598 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1599 clocks = <&cpg CPG_MOD 408>;
1600 clock-names = "clk";
1601 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1602 resets = <&cpg 408>;
1603 };
1604
1605 pciec: pcie@fe000000 {
1606 compatible = "renesas,pcie-r8a7743",
1607 "renesas,pcie-rcar-gen2";
1608 reg = <0 0xfe000000 0 0x80000>;
1609 #address-cells = <3>;
1610 #size-cells = <2>;
1611 bus-range = <0x00 0xff>;
1612 device_type = "pci";
1613 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1614 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1615 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1616 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1617 /* Map all possible DDR as inbound ranges */
1618 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1619 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1620 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1621 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1622 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1623 #interrupt-cells = <1>;
1624 interrupt-map-mask = <0 0 0 0>;
1625 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1626 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1627 clock-names = "pcie", "pcie_bus";
1628 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1629 resets = <&cpg 319>;
1630 status = "disabled";
1631 };
1632
1633 vsp@fe928000 {
1634 compatible = "renesas,vsp1";
1635 reg = <0 0xfe928000 0 0x8000>;
1636 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1637 clocks = <&cpg CPG_MOD 131>;
1638 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1639 resets = <&cpg 131>;
1640 };
1641
1642 vsp@fe930000 {
1643 compatible = "renesas,vsp1";
1644 reg = <0 0xfe930000 0 0x8000>;
1645 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1646 clocks = <&cpg CPG_MOD 128>;
1647 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1648 resets = <&cpg 128>;
1649 };
1650
1651 vsp@fe938000 {
1652 compatible = "renesas,vsp1";
1653 reg = <0 0xfe938000 0 0x8000>;
1654 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1655 clocks = <&cpg CPG_MOD 127>;
1656 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1657 resets = <&cpg 127>;
1658 };
1659
1660 du: display@feb00000 {
1661 compatible = "renesas,du-r8a7743";
1662 reg = <0 0xfeb00000 0 0x40000>,
1663 <0 0xfeb90000 0 0x1c>;
1664 reg-names = "du", "lvds.0";
1665 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1666 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MOD 724>,
1668 <&cpg CPG_MOD 723>,
1669 <&cpg CPG_MOD 726>;
1670 clock-names = "du.0", "du.1", "lvds.0";
1671 status = "disabled";
1672
1673 ports {
1674 #address-cells = <1>;
1675 #size-cells = <0>;
1676
1677 port@0 {
1678 reg = <0>;
1679 du_out_rgb: endpoint {
1680 };
1681 };
1682 port@1 {
1683 reg = <1>;
1684 du_out_lvds0: endpoint {
1685 };
1686 };
1687 };
1688 };
1689
1690 prr: chipid@ff000044 {
1691 compatible = "renesas,prr";
1692 reg = <0 0xff000044 0 4>;
1693 };
1694
1695 cmt0: timer@ffca0000 {
1696 compatible = "renesas,r8a7743-cmt0",
1697 "renesas,rcar-gen2-cmt0";
1698 reg = <0 0xffca0000 0 0x1004>;
1699 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1700 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1701 clocks = <&cpg CPG_MOD 124>;
1702 clock-names = "fck";
1703 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1704 resets = <&cpg 124>;
1705 status = "disabled";
1706 };
1707
1708 cmt1: timer@e6130000 {
1709 compatible = "renesas,r8a7743-cmt1",
1710 "renesas,rcar-gen2-cmt1";
1711 reg = <0 0xe6130000 0 0x1004>;
1712 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1713 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1714 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1715 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1716 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1717 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1718 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1719 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1720 clocks = <&cpg CPG_MOD 329>;
1721 clock-names = "fck";
1722 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1723 resets = <&cpg 329>;
1724 status = "disabled";
1725 };
1726 };
1727
1728 thermal-zones {
1729 cpu_thermal: cpu-thermal {
1730 polling-delay-passive = <0>;
1731 polling-delay = <0>;
1732
1733 thermal-sensors = <&thermal>;
1734
1735 trips {
1736 cpu-crit {
1737 temperature = <95000>;
1738 hysteresis = <0>;
1739 type = "critical";
1740 };
1741 };
1742
1743 cooling-maps {
1744 };
1745 };
1746 };
1747
1748 timer {
1749 compatible = "arm,armv7-timer";
1750 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1751 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1752 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1753 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1754 };
1755
1756 /* External USB clock - can be overridden by the board */
1757 usb_extal_clk: usb_extal {
1758 compatible = "fixed-clock";
1759 #clock-cells = <0>;
1760 clock-frequency = <48000000>;
1761 };
1762};