1/*
  2 * Copyright 2017 NXP
  3 *
  4 * This file is dual-licensed: you can use it either under the terms
  5 * of the GPL or the X11 license, at your option. Note that this dual
  6 * licensing only applies to this file, and not this project as a
  7 * whole.
  8 *
  9 *  a) This file is free software; you can redistribute it and/or
 10 *     modify it under the terms of the GNU General Public License as
 11 *     published by the Free Software Foundation; either version 2 of the
 12 *     License, or (at your option) any later version.
 13 *
 14 *     This file is distributed in the hope that it will be useful,
 15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17 *     GNU General Public License for more details.
 18 *
 19 * Or, alternatively,
 20 *
 21 *  b) Permission is hereby granted, free of charge, to any person
 22 *     obtaining a copy of this software and associated documentation
 23 *     files (the "Software"), to deal in the Software without
 24 *     restriction, including without limitation the rights to use,
 25 *     copy, modify, merge, publish, distribute, sublicense, and/or
 26 *     sell copies of the Software, and to permit persons to whom the
 27 *     Software is furnished to do so, subject to the following
 28 *     conditions:
 29 *
 30 *     The above copyright notice and this permission notice shall be
 31 *     included in all copies or substantial portions of the Software.
 32 *
 33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 40 *     OTHER DEALINGS IN THE SOFTWARE.
 41 */
 42
 43#include "imx7d-pico.dtsi"
 44
 45/ {
 46	sound {
 47		compatible = "simple-audio-card";
 48		simple-audio-card,name = "imx7-sgtl5000";
 49		simple-audio-card,format = "i2s";
 50		simple-audio-card,bitclock-master = <&dailink_master>;
 51		simple-audio-card,frame-master = <&dailink_master>;
 52		simple-audio-card,cpu {
 53			sound-dai = <&sai1>;
 54		};
 55
 56		dailink_master: simple-audio-card,codec {
 57			sound-dai = <&codec>;
 58			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
 59		};
 60	};
 61};
 62
 63&fec1 {
 64	pinctrl-names = "default";
 65	pinctrl-0 = <&pinctrl_enet1>;
 66	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
 67			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
 68	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
 69	assigned-clock-rates = <0>, <100000000>;
 70	phy-mode = "rgmii";
 71	phy-handle = <&ethphy0>;
 72	fsl,magic-packet;
 73	status = "okay";
 74
 75	mdio {
 76		#address-cells = <1>;
 77		#size-cells = <0>;
 78
 79		ethphy0: ethernet-phy@1 {
 80			compatible = "ethernet-phy-ieee802.3-c22";
 81			reg = <1>;
 82			status = "okay";
 83		};
 84	};
 85};
 86
 87&i2c1 {
 88	clock-frequency = <100000>;
 89	pinctrl-names = "default";
 90	pinctrl-0 = <&pinctrl_i2c1>;
 91	status = "okay";
 92
 93	codec: sgtl5000@a {
 94		#sound-dai-cells = <0>;
 95		reg = <0x0a>;
 96		compatible = "fsl,sgtl5000";
 97		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
 98		VDDA-supply = <&reg_2p5v>;
 99		VDDIO-supply = <&reg_vref_1v8>;
100	};
101};
102
103
104&sai1 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_sai1>;
107	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
108			  <&clks IMX7D_SAI1_ROOT_CLK>;
109	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
110	assigned-clock-rates = <0>, <24576000>;
111	status = "okay";
112};
113
114&uart5 {
115	pinctrl-names = "default";
116	pinctrl-0 = <&pinctrl_uart5>;
117	assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
118	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
119	status = "okay";
120};
121
122&usbotg1 {
123	vbus-supply = <&reg_usb_otg1_vbus>;
124	status = "okay";
125};
126
127&usbotg2 {
128	vbus-supply = <&reg_usb_otg2_vbus>;
129	dr_mode = "host";
130	status = "okay";
131};
132
133&iomuxc {
134	pinctrl_enet1: enet1grp {
135		fsl,pins = <
136			MX7D_PAD_SD2_CD_B__ENET1_MDIO			0x3
137			MX7D_PAD_SD2_WP__ENET1_MDC			0x3
138			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x1
139			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x1
140			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x1
141			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x1
142			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x1
143			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x1
144			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x1
145			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x1
146			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x1
147			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x1
148			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x1
149			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x1
150		>;
151	};
152
153	pinctrl_i2c1: i2c1grp {
154		fsl,pins = <
155			MX7D_PAD_UART1_TX_DATA__I2C1_SDA	0x4000007f
156			MX7D_PAD_UART1_RX_DATA__I2C1_SCL	0x4000007f
157		>;
158	};
159
160	pinctrl_sai1: sai1grp {
161		fsl,pins = <
162			MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK	0x1f
163			MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC	0x1f
164			MX7D_PAD_ENET1_COL__SAI1_TX_DATA0	0x30
165			MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0	0x1f
166		>;
167	};
168
169	pinctrl_uart5: uart5grp {
170		fsl,pins = <
171			MX7D_PAD_I2C4_SDA__UART5_DCE_TX		0x79
172			MX7D_PAD_I2C4_SCL__UART5_DCE_RX		0x79
173		>;
174	};
175
176	pinctrl_usbotg1_pwr: usbotg_pwr {
177		fsl,pins = <
178			MX7D_PAD_UART3_TX_DATA__GPIO4_IO5	0x14
179		>;
180	};
181};