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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Dynamic DMA mapping support.
4 *
5 * This implementation is a fallback for platforms that do not support
6 * I/O TLBs (aka DMA address translation hardware).
7 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9 * Copyright (C) 2000, 2003 Hewlett-Packard Co
10 * David Mosberger-Tang <davidm@hpl.hp.com>
11 *
12 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
13 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
14 * unnecessary i-cache flushing.
15 * 04/07/.. ak Better overflow handling. Assorted fixes.
16 * 05/09/10 linville Add support for syncing ranges, support syncing for
17 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
18 * 08/12/11 beckyb Add highmem support
19 */
20
21#define pr_fmt(fmt) "software IO TLB: " fmt
22
23#include <linux/cache.h>
24#include <linux/dma-direct.h>
25#include <linux/dma-noncoherent.h>
26#include <linux/mm.h>
27#include <linux/export.h>
28#include <linux/spinlock.h>
29#include <linux/string.h>
30#include <linux/swiotlb.h>
31#include <linux/pfn.h>
32#include <linux/types.h>
33#include <linux/ctype.h>
34#include <linux/highmem.h>
35#include <linux/gfp.h>
36#include <linux/scatterlist.h>
37#include <linux/mem_encrypt.h>
38#include <linux/set_memory.h>
39#ifdef CONFIG_DEBUG_FS
40#include <linux/debugfs.h>
41#endif
42
43#include <asm/io.h>
44#include <asm/dma.h>
45
46#include <linux/init.h>
47#include <linux/memblock.h>
48#include <linux/iommu-helper.h>
49
50#define CREATE_TRACE_POINTS
51#include <trace/events/swiotlb.h>
52
53#define OFFSET(val,align) ((unsigned long) \
54 ( (val) & ( (align) - 1)))
55
56#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
57
58/*
59 * Minimum IO TLB size to bother booting with. Systems with mainly
60 * 64bit capable cards will only lightly use the swiotlb. If we can't
61 * allocate a contiguous 1MB, we're probably in trouble anyway.
62 */
63#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
64
65enum swiotlb_force swiotlb_force;
66
67/*
68 * Used to do a quick range check in swiotlb_tbl_unmap_single and
69 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
70 * API.
71 */
72phys_addr_t io_tlb_start, io_tlb_end;
73
74/*
75 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
76 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
77 */
78static unsigned long io_tlb_nslabs;
79
80/*
81 * The number of used IO TLB block
82 */
83static unsigned long io_tlb_used;
84
85/*
86 * This is a free list describing the number of free entries available from
87 * each index
88 */
89static unsigned int *io_tlb_list;
90static unsigned int io_tlb_index;
91
92/*
93 * Max segment that we can provide which (if pages are contingous) will
94 * not be bounced (unless SWIOTLB_FORCE is set).
95 */
96unsigned int max_segment;
97
98/*
99 * We need to save away the original address corresponding to a mapped entry
100 * for the sync operations.
101 */
102#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
103static phys_addr_t *io_tlb_orig_addr;
104
105/*
106 * Protect the above data structures in the map and unmap calls
107 */
108static DEFINE_SPINLOCK(io_tlb_lock);
109
110static int late_alloc;
111
112static int __init
113setup_io_tlb_npages(char *str)
114{
115 if (isdigit(*str)) {
116 io_tlb_nslabs = simple_strtoul(str, &str, 0);
117 /* avoid tail segment of size < IO_TLB_SEGSIZE */
118 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
119 }
120 if (*str == ',')
121 ++str;
122 if (!strcmp(str, "force")) {
123 swiotlb_force = SWIOTLB_FORCE;
124 } else if (!strcmp(str, "noforce")) {
125 swiotlb_force = SWIOTLB_NO_FORCE;
126 io_tlb_nslabs = 1;
127 }
128
129 return 0;
130}
131early_param("swiotlb", setup_io_tlb_npages);
132
133static bool no_iotlb_memory;
134
135unsigned long swiotlb_nr_tbl(void)
136{
137 return unlikely(no_iotlb_memory) ? 0 : io_tlb_nslabs;
138}
139EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
140
141unsigned int swiotlb_max_segment(void)
142{
143 return unlikely(no_iotlb_memory) ? 0 : max_segment;
144}
145EXPORT_SYMBOL_GPL(swiotlb_max_segment);
146
147void swiotlb_set_max_segment(unsigned int val)
148{
149 if (swiotlb_force == SWIOTLB_FORCE)
150 max_segment = 1;
151 else
152 max_segment = rounddown(val, PAGE_SIZE);
153}
154
155/* default to 64MB */
156#define IO_TLB_DEFAULT_SIZE (64UL<<20)
157unsigned long swiotlb_size_or_default(void)
158{
159 unsigned long size;
160
161 size = io_tlb_nslabs << IO_TLB_SHIFT;
162
163 return size ? size : (IO_TLB_DEFAULT_SIZE);
164}
165
166void swiotlb_print_info(void)
167{
168 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
169
170 if (no_iotlb_memory) {
171 pr_warn("No low mem\n");
172 return;
173 }
174
175 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
176 (unsigned long long)io_tlb_start,
177 (unsigned long long)io_tlb_end,
178 bytes >> 20);
179}
180
181/*
182 * Early SWIOTLB allocation may be too early to allow an architecture to
183 * perform the desired operations. This function allows the architecture to
184 * call SWIOTLB when the operations are possible. It needs to be called
185 * before the SWIOTLB memory is used.
186 */
187void __init swiotlb_update_mem_attributes(void)
188{
189 void *vaddr;
190 unsigned long bytes;
191
192 if (no_iotlb_memory || late_alloc)
193 return;
194
195 vaddr = phys_to_virt(io_tlb_start);
196 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
197 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
198 memset(vaddr, 0, bytes);
199}
200
201int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
202{
203 unsigned long i, bytes;
204 size_t alloc_size;
205
206 bytes = nslabs << IO_TLB_SHIFT;
207
208 io_tlb_nslabs = nslabs;
209 io_tlb_start = __pa(tlb);
210 io_tlb_end = io_tlb_start + bytes;
211
212 /*
213 * Allocate and initialize the free list array. This array is used
214 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
215 * between io_tlb_start and io_tlb_end.
216 */
217 alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int));
218 io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE);
219 if (!io_tlb_list)
220 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
221 __func__, alloc_size, PAGE_SIZE);
222
223 alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t));
224 io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE);
225 if (!io_tlb_orig_addr)
226 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
227 __func__, alloc_size, PAGE_SIZE);
228
229 for (i = 0; i < io_tlb_nslabs; i++) {
230 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
231 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
232 }
233 io_tlb_index = 0;
234
235 if (verbose)
236 swiotlb_print_info();
237
238 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
239 return 0;
240}
241
242/*
243 * Statically reserve bounce buffer space and initialize bounce buffer data
244 * structures for the software IO TLB used to implement the DMA API.
245 */
246void __init
247swiotlb_init(int verbose)
248{
249 size_t default_size = IO_TLB_DEFAULT_SIZE;
250 unsigned char *vstart;
251 unsigned long bytes;
252
253 if (!io_tlb_nslabs) {
254 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
255 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
256 }
257
258 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
259
260 /* Get IO TLB memory from the low pages */
261 vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE);
262 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
263 return;
264
265 if (io_tlb_start)
266 memblock_free_early(io_tlb_start,
267 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
268 pr_warn("Cannot allocate buffer");
269 no_iotlb_memory = true;
270}
271
272/*
273 * Systems with larger DMA zones (those that don't support ISA) can
274 * initialize the swiotlb later using the slab allocator if needed.
275 * This should be just like above, but with some error catching.
276 */
277int
278swiotlb_late_init_with_default_size(size_t default_size)
279{
280 unsigned long bytes, req_nslabs = io_tlb_nslabs;
281 unsigned char *vstart = NULL;
282 unsigned int order;
283 int rc = 0;
284
285 if (!io_tlb_nslabs) {
286 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
287 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
288 }
289
290 /*
291 * Get IO TLB memory from the low pages
292 */
293 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
294 io_tlb_nslabs = SLABS_PER_PAGE << order;
295 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
296
297 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
298 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
299 order);
300 if (vstart)
301 break;
302 order--;
303 }
304
305 if (!vstart) {
306 io_tlb_nslabs = req_nslabs;
307 return -ENOMEM;
308 }
309 if (order != get_order(bytes)) {
310 pr_warn("only able to allocate %ld MB\n",
311 (PAGE_SIZE << order) >> 20);
312 io_tlb_nslabs = SLABS_PER_PAGE << order;
313 }
314 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
315 if (rc)
316 free_pages((unsigned long)vstart, order);
317
318 return rc;
319}
320
321static void swiotlb_cleanup(void)
322{
323 io_tlb_end = 0;
324 io_tlb_start = 0;
325 io_tlb_nslabs = 0;
326 max_segment = 0;
327}
328
329int
330swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
331{
332 unsigned long i, bytes;
333
334 bytes = nslabs << IO_TLB_SHIFT;
335
336 io_tlb_nslabs = nslabs;
337 io_tlb_start = virt_to_phys(tlb);
338 io_tlb_end = io_tlb_start + bytes;
339
340 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
341 memset(tlb, 0, bytes);
342
343 /*
344 * Allocate and initialize the free list array. This array is used
345 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
346 * between io_tlb_start and io_tlb_end.
347 */
348 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
349 get_order(io_tlb_nslabs * sizeof(int)));
350 if (!io_tlb_list)
351 goto cleanup3;
352
353 io_tlb_orig_addr = (phys_addr_t *)
354 __get_free_pages(GFP_KERNEL,
355 get_order(io_tlb_nslabs *
356 sizeof(phys_addr_t)));
357 if (!io_tlb_orig_addr)
358 goto cleanup4;
359
360 for (i = 0; i < io_tlb_nslabs; i++) {
361 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
362 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
363 }
364 io_tlb_index = 0;
365
366 swiotlb_print_info();
367
368 late_alloc = 1;
369
370 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
371
372 return 0;
373
374cleanup4:
375 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
376 sizeof(int)));
377 io_tlb_list = NULL;
378cleanup3:
379 swiotlb_cleanup();
380 return -ENOMEM;
381}
382
383void __init swiotlb_exit(void)
384{
385 if (!io_tlb_orig_addr)
386 return;
387
388 if (late_alloc) {
389 free_pages((unsigned long)io_tlb_orig_addr,
390 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
391 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
392 sizeof(int)));
393 free_pages((unsigned long)phys_to_virt(io_tlb_start),
394 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
395 } else {
396 memblock_free_late(__pa(io_tlb_orig_addr),
397 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
398 memblock_free_late(__pa(io_tlb_list),
399 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
400 memblock_free_late(io_tlb_start,
401 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
402 }
403 swiotlb_cleanup();
404}
405
406/*
407 * Bounce: copy the swiotlb buffer from or back to the original dma location
408 */
409static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
410 size_t size, enum dma_data_direction dir)
411{
412 unsigned long pfn = PFN_DOWN(orig_addr);
413 unsigned char *vaddr = phys_to_virt(tlb_addr);
414
415 if (PageHighMem(pfn_to_page(pfn))) {
416 /* The buffer does not have a mapping. Map it in and copy */
417 unsigned int offset = orig_addr & ~PAGE_MASK;
418 char *buffer;
419 unsigned int sz = 0;
420 unsigned long flags;
421
422 while (size) {
423 sz = min_t(size_t, PAGE_SIZE - offset, size);
424
425 local_irq_save(flags);
426 buffer = kmap_atomic(pfn_to_page(pfn));
427 if (dir == DMA_TO_DEVICE)
428 memcpy(vaddr, buffer + offset, sz);
429 else
430 memcpy(buffer + offset, vaddr, sz);
431 kunmap_atomic(buffer);
432 local_irq_restore(flags);
433
434 size -= sz;
435 pfn++;
436 vaddr += sz;
437 offset = 0;
438 }
439 } else if (dir == DMA_TO_DEVICE) {
440 memcpy(vaddr, phys_to_virt(orig_addr), size);
441 } else {
442 memcpy(phys_to_virt(orig_addr), vaddr, size);
443 }
444}
445
446phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
447 dma_addr_t tbl_dma_addr,
448 phys_addr_t orig_addr,
449 size_t mapping_size,
450 size_t alloc_size,
451 enum dma_data_direction dir,
452 unsigned long attrs)
453{
454 unsigned long flags;
455 phys_addr_t tlb_addr;
456 unsigned int nslots, stride, index, wrap;
457 int i;
458 unsigned long mask;
459 unsigned long offset_slots;
460 unsigned long max_slots;
461 unsigned long tmp_io_tlb_used;
462
463 if (no_iotlb_memory)
464 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
465
466 if (mem_encrypt_active())
467 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
468
469 if (mapping_size > alloc_size) {
470 dev_warn_once(hwdev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
471 mapping_size, alloc_size);
472 return (phys_addr_t)DMA_MAPPING_ERROR;
473 }
474
475 mask = dma_get_seg_boundary(hwdev);
476
477 tbl_dma_addr &= mask;
478
479 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
480
481 /*
482 * Carefully handle integer overflow which can occur when mask == ~0UL.
483 */
484 max_slots = mask + 1
485 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
486 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
487
488 /*
489 * For mappings greater than or equal to a page, we limit the stride
490 * (and hence alignment) to a page size.
491 */
492 nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
493 if (alloc_size >= PAGE_SIZE)
494 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
495 else
496 stride = 1;
497
498 BUG_ON(!nslots);
499
500 /*
501 * Find suitable number of IO TLB entries size that will fit this
502 * request and allocate a buffer from that IO TLB pool.
503 */
504 spin_lock_irqsave(&io_tlb_lock, flags);
505
506 if (unlikely(nslots > io_tlb_nslabs - io_tlb_used))
507 goto not_found;
508
509 index = ALIGN(io_tlb_index, stride);
510 if (index >= io_tlb_nslabs)
511 index = 0;
512 wrap = index;
513
514 do {
515 while (iommu_is_span_boundary(index, nslots, offset_slots,
516 max_slots)) {
517 index += stride;
518 if (index >= io_tlb_nslabs)
519 index = 0;
520 if (index == wrap)
521 goto not_found;
522 }
523
524 /*
525 * If we find a slot that indicates we have 'nslots' number of
526 * contiguous buffers, we allocate the buffers from that slot
527 * and mark the entries as '0' indicating unavailable.
528 */
529 if (io_tlb_list[index] >= nslots) {
530 int count = 0;
531
532 for (i = index; i < (int) (index + nslots); i++)
533 io_tlb_list[i] = 0;
534 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
535 io_tlb_list[i] = ++count;
536 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
537
538 /*
539 * Update the indices to avoid searching in the next
540 * round.
541 */
542 io_tlb_index = ((index + nslots) < io_tlb_nslabs
543 ? (index + nslots) : 0);
544
545 goto found;
546 }
547 index += stride;
548 if (index >= io_tlb_nslabs)
549 index = 0;
550 } while (index != wrap);
551
552not_found:
553 tmp_io_tlb_used = io_tlb_used;
554
555 spin_unlock_irqrestore(&io_tlb_lock, flags);
556 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
557 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
558 alloc_size, io_tlb_nslabs, tmp_io_tlb_used);
559 return (phys_addr_t)DMA_MAPPING_ERROR;
560found:
561 io_tlb_used += nslots;
562 spin_unlock_irqrestore(&io_tlb_lock, flags);
563
564 /*
565 * Save away the mapping from the original address to the DMA address.
566 * This is needed when we sync the memory. Then we sync the buffer if
567 * needed.
568 */
569 for (i = 0; i < nslots; i++)
570 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
571 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
572 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
573 swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_TO_DEVICE);
574
575 return tlb_addr;
576}
577
578/*
579 * tlb_addr is the physical address of the bounce buffer to unmap.
580 */
581void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
582 size_t mapping_size, size_t alloc_size,
583 enum dma_data_direction dir, unsigned long attrs)
584{
585 unsigned long flags;
586 int i, count, nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
587 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
588 phys_addr_t orig_addr = io_tlb_orig_addr[index];
589
590 /*
591 * First, sync the memory before unmapping the entry
592 */
593 if (orig_addr != INVALID_PHYS_ADDR &&
594 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
595 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
596 swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_FROM_DEVICE);
597
598 /*
599 * Return the buffer to the free list by setting the corresponding
600 * entries to indicate the number of contiguous entries available.
601 * While returning the entries to the free list, we merge the entries
602 * with slots below and above the pool being returned.
603 */
604 spin_lock_irqsave(&io_tlb_lock, flags);
605 {
606 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
607 io_tlb_list[index + nslots] : 0);
608 /*
609 * Step 1: return the slots to the free list, merging the
610 * slots with superceeding slots
611 */
612 for (i = index + nslots - 1; i >= index; i--) {
613 io_tlb_list[i] = ++count;
614 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
615 }
616 /*
617 * Step 2: merge the returned slots with the preceding slots,
618 * if available (non zero)
619 */
620 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
621 io_tlb_list[i] = ++count;
622
623 io_tlb_used -= nslots;
624 }
625 spin_unlock_irqrestore(&io_tlb_lock, flags);
626}
627
628void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
629 size_t size, enum dma_data_direction dir,
630 enum dma_sync_target target)
631{
632 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
633 phys_addr_t orig_addr = io_tlb_orig_addr[index];
634
635 if (orig_addr == INVALID_PHYS_ADDR)
636 return;
637 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
638
639 switch (target) {
640 case SYNC_FOR_CPU:
641 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
642 swiotlb_bounce(orig_addr, tlb_addr,
643 size, DMA_FROM_DEVICE);
644 else
645 BUG_ON(dir != DMA_TO_DEVICE);
646 break;
647 case SYNC_FOR_DEVICE:
648 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
649 swiotlb_bounce(orig_addr, tlb_addr,
650 size, DMA_TO_DEVICE);
651 else
652 BUG_ON(dir != DMA_FROM_DEVICE);
653 break;
654 default:
655 BUG();
656 }
657}
658
659/*
660 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
661 * to the device copy the data into it as well.
662 */
663dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
664 enum dma_data_direction dir, unsigned long attrs)
665{
666 phys_addr_t swiotlb_addr;
667 dma_addr_t dma_addr;
668
669 trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
670 swiotlb_force);
671
672 swiotlb_addr = swiotlb_tbl_map_single(dev,
673 __phys_to_dma(dev, io_tlb_start),
674 paddr, size, size, dir, attrs);
675 if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
676 return DMA_MAPPING_ERROR;
677
678 /* Ensure that the address returned is DMA'ble */
679 dma_addr = __phys_to_dma(dev, swiotlb_addr);
680 if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
681 swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, size, dir,
682 attrs | DMA_ATTR_SKIP_CPU_SYNC);
683 dev_WARN_ONCE(dev, 1,
684 "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
685 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
686 return DMA_MAPPING_ERROR;
687 }
688
689 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
690 arch_sync_dma_for_device(swiotlb_addr, size, dir);
691 return dma_addr;
692}
693
694size_t swiotlb_max_mapping_size(struct device *dev)
695{
696 return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
697}
698
699bool is_swiotlb_active(void)
700{
701 /*
702 * When SWIOTLB is initialized, even if io_tlb_start points to physical
703 * address zero, io_tlb_end surely doesn't.
704 */
705 return io_tlb_end != 0;
706}
707
708#ifdef CONFIG_DEBUG_FS
709
710static int __init swiotlb_create_debugfs(void)
711{
712 struct dentry *root;
713
714 root = debugfs_create_dir("swiotlb", NULL);
715 debugfs_create_ulong("io_tlb_nslabs", 0400, root, &io_tlb_nslabs);
716 debugfs_create_ulong("io_tlb_used", 0400, root, &io_tlb_used);
717 return 0;
718}
719
720late_initcall(swiotlb_create_debugfs);
721
722#endif