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1/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18#include <linux/kernel.h>
19#include <linux/string.h>
20#include <linux/ctype.h>
21#include <linux/errno.h>
22#include <linux/unistd.h>
23#include <linux/hwmon.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
36#include <linux/marvell_phy.h>
37#include <linux/of.h>
38
39#include <linux/io.h>
40#include <asm/irq.h>
41#include <linux/uaccess.h>
42
43#define MII_MARVELL_PHY_PAGE 22
44#define MII_MARVELL_COPPER_PAGE 0x00
45#define MII_MARVELL_FIBER_PAGE 0x01
46#define MII_MARVELL_MSCR_PAGE 0x02
47#define MII_MARVELL_LED_PAGE 0x03
48#define MII_MARVELL_MISC_TEST_PAGE 0x06
49#define MII_MARVELL_WOL_PAGE 0x11
50
51#define MII_M1011_IEVENT 0x13
52#define MII_M1011_IEVENT_CLEAR 0x0000
53
54#define MII_M1011_IMASK 0x12
55#define MII_M1011_IMASK_INIT 0x6400
56#define MII_M1011_IMASK_CLEAR 0x0000
57
58#define MII_M1011_PHY_SCR 0x10
59#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60#define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61#define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66#define MII_M1111_PHY_LED_CONTROL 0x18
67#define MII_M1111_PHY_LED_DIRECT 0x4100
68#define MII_M1111_PHY_LED_COMBINE 0x411c
69#define MII_M1111_PHY_EXT_CR 0x14
70#define MII_M1111_RGMII_RX_DELAY BIT(7)
71#define MII_M1111_RGMII_TX_DELAY BIT(1)
72#define MII_M1111_PHY_EXT_SR 0x1b
73
74#define MII_M1111_HWCFG_MODE_MASK 0xf
75#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77#define MII_M1111_HWCFG_MODE_RTBI 0x7
78#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83#define MII_88E1121_PHY_MSCR_REG 21
84#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
87
88#define MII_88E1121_MISC_TEST 0x1a
89#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96#define MII_88E1510_TEMP_SENSOR 0x1b
97#define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99#define MII_88E6390_MISC_TEST 0x1b
100#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
105
106#define MII_88E6390_TEMP_SENSOR 0x1c
107#define MII_88E6390_TEMP_SENSOR_MASK 0xff
108#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
109
110#define MII_88E1318S_PHY_MSCR1_REG 16
111#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
112
113/* Copper Specific Interrupt Enable Register */
114#define MII_88E1318S_PHY_CSIER 0x12
115/* WOL Event Interrupt Enable */
116#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
117
118/* LED Timer Control Register */
119#define MII_88E1318S_PHY_LED_TCR 0x12
120#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
123
124/* Magic Packet MAC address registers */
125#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
128
129#define MII_88E1318S_PHY_WOL_CTRL 0x10
130#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
132
133#define MII_88E1121_PHY_LED_CTRL 16
134#define MII_88E1121_PHY_LED_DEF 0x0030
135
136#define MII_M1011_PHY_STATUS 0x11
137#define MII_M1011_PHY_STATUS_1000 0x8000
138#define MII_M1011_PHY_STATUS_100 0x4000
139#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
140#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
141#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
142#define MII_M1011_PHY_STATUS_LINK 0x0400
143
144#define MII_88E3016_PHY_SPEC_CTRL 0x10
145#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
146#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
147
148#define MII_88E1510_GEN_CTRL_REG_1 0x14
149#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
150#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
151#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
152
153#define LPA_FIBER_1000HALF 0x40
154#define LPA_FIBER_1000FULL 0x20
155
156#define LPA_PAUSE_FIBER 0x180
157#define LPA_PAUSE_ASYM_FIBER 0x100
158
159#define ADVERTISE_FIBER_1000HALF 0x40
160#define ADVERTISE_FIBER_1000FULL 0x20
161
162#define ADVERTISE_PAUSE_FIBER 0x180
163#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
164
165#define REGISTER_LINK_STATUS 0x400
166#define NB_FIBER_STATS 1
167
168MODULE_DESCRIPTION("Marvell PHY driver");
169MODULE_AUTHOR("Andy Fleming");
170MODULE_LICENSE("GPL");
171
172struct marvell_hw_stat {
173 const char *string;
174 u8 page;
175 u8 reg;
176 u8 bits;
177};
178
179static struct marvell_hw_stat marvell_hw_stats[] = {
180 { "phy_receive_errors_copper", 0, 21, 16},
181 { "phy_idle_errors", 0, 10, 8 },
182 { "phy_receive_errors_fiber", 1, 21, 16},
183};
184
185struct marvell_priv {
186 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
187 char *hwmon_name;
188 struct device *hwmon_dev;
189};
190
191static int marvell_read_page(struct phy_device *phydev)
192{
193 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
194}
195
196static int marvell_write_page(struct phy_device *phydev, int page)
197{
198 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
199}
200
201static int marvell_set_page(struct phy_device *phydev, int page)
202{
203 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
204}
205
206static int marvell_ack_interrupt(struct phy_device *phydev)
207{
208 int err;
209
210 /* Clear the interrupts by reading the reg */
211 err = phy_read(phydev, MII_M1011_IEVENT);
212
213 if (err < 0)
214 return err;
215
216 return 0;
217}
218
219static int marvell_config_intr(struct phy_device *phydev)
220{
221 int err;
222
223 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_INIT);
226 else
227 err = phy_write(phydev, MII_M1011_IMASK,
228 MII_M1011_IMASK_CLEAR);
229
230 return err;
231}
232
233static int marvell_set_polarity(struct phy_device *phydev, int polarity)
234{
235 int reg;
236 int err;
237 int val;
238
239 /* get the current settings */
240 reg = phy_read(phydev, MII_M1011_PHY_SCR);
241 if (reg < 0)
242 return reg;
243
244 val = reg;
245 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
246 switch (polarity) {
247 case ETH_TP_MDI:
248 val |= MII_M1011_PHY_SCR_MDI;
249 break;
250 case ETH_TP_MDI_X:
251 val |= MII_M1011_PHY_SCR_MDI_X;
252 break;
253 case ETH_TP_MDI_AUTO:
254 case ETH_TP_MDI_INVALID:
255 default:
256 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
257 break;
258 }
259
260 if (val != reg) {
261 /* Set the new polarity value in the register */
262 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
263 if (err)
264 return err;
265 }
266
267 return 0;
268}
269
270static int marvell_set_downshift(struct phy_device *phydev, bool enable,
271 u8 retries)
272{
273 int reg;
274
275 reg = phy_read(phydev, MII_M1011_PHY_SCR);
276 if (reg < 0)
277 return reg;
278
279 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
280 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
281 if (enable)
282 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
283
284 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
285}
286
287static int marvell_config_aneg(struct phy_device *phydev)
288{
289 int err;
290
291 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
292 if (err < 0)
293 return err;
294
295 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
296 MII_M1111_PHY_LED_DIRECT);
297 if (err < 0)
298 return err;
299
300 err = genphy_config_aneg(phydev);
301 if (err < 0)
302 return err;
303
304 if (phydev->autoneg != AUTONEG_ENABLE) {
305 /* A write to speed/duplex bits (that is performed by
306 * genphy_config_aneg() call above) must be followed by
307 * a software reset. Otherwise, the write has no effect.
308 */
309 err = genphy_soft_reset(phydev);
310 if (err < 0)
311 return err;
312 }
313
314 return 0;
315}
316
317static int m88e1101_config_aneg(struct phy_device *phydev)
318{
319 int err;
320
321 /* This Marvell PHY has an errata which requires
322 * that certain registers get written in order
323 * to restart autonegotiation
324 */
325 err = genphy_soft_reset(phydev);
326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1d, 0x1f);
330 if (err < 0)
331 return err;
332
333 err = phy_write(phydev, 0x1e, 0x200c);
334 if (err < 0)
335 return err;
336
337 err = phy_write(phydev, 0x1d, 0x5);
338 if (err < 0)
339 return err;
340
341 err = phy_write(phydev, 0x1e, 0);
342 if (err < 0)
343 return err;
344
345 err = phy_write(phydev, 0x1e, 0x100);
346 if (err < 0)
347 return err;
348
349 return marvell_config_aneg(phydev);
350}
351
352static int m88e1111_config_aneg(struct phy_device *phydev)
353{
354 int err;
355
356 /* The Marvell PHY has an errata which requires
357 * that certain registers get written in order
358 * to restart autonegotiation
359 */
360 err = genphy_soft_reset(phydev);
361
362 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
363 if (err < 0)
364 return err;
365
366 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
367 MII_M1111_PHY_LED_DIRECT);
368 if (err < 0)
369 return err;
370
371 err = genphy_config_aneg(phydev);
372 if (err < 0)
373 return err;
374
375 if (phydev->autoneg != AUTONEG_ENABLE) {
376 /* A write to speed/duplex bits (that is performed by
377 * genphy_config_aneg() call above) must be followed by
378 * a software reset. Otherwise, the write has no effect.
379 */
380 err = genphy_soft_reset(phydev);
381 if (err < 0)
382 return err;
383 }
384
385 return 0;
386}
387
388#ifdef CONFIG_OF_MDIO
389/* Set and/or override some configuration registers based on the
390 * marvell,reg-init property stored in the of_node for the phydev.
391 *
392 * marvell,reg-init = <reg-page reg mask value>,...;
393 *
394 * There may be one or more sets of <reg-page reg mask value>:
395 *
396 * reg-page: which register bank to use.
397 * reg: the register.
398 * mask: if non-zero, ANDed with existing register value.
399 * value: ORed with the masked value and written to the regiser.
400 *
401 */
402static int marvell_of_reg_init(struct phy_device *phydev)
403{
404 const __be32 *paddr;
405 int len, i, saved_page, current_page, ret = 0;
406
407 if (!phydev->mdio.dev.of_node)
408 return 0;
409
410 paddr = of_get_property(phydev->mdio.dev.of_node,
411 "marvell,reg-init", &len);
412 if (!paddr || len < (4 * sizeof(*paddr)))
413 return 0;
414
415 saved_page = phy_save_page(phydev);
416 if (saved_page < 0)
417 goto err;
418 current_page = saved_page;
419
420 len /= sizeof(*paddr);
421 for (i = 0; i < len - 3; i += 4) {
422 u16 page = be32_to_cpup(paddr + i);
423 u16 reg = be32_to_cpup(paddr + i + 1);
424 u16 mask = be32_to_cpup(paddr + i + 2);
425 u16 val_bits = be32_to_cpup(paddr + i + 3);
426 int val;
427
428 if (page != current_page) {
429 current_page = page;
430 ret = marvell_write_page(phydev, page);
431 if (ret < 0)
432 goto err;
433 }
434
435 val = 0;
436 if (mask) {
437 val = __phy_read(phydev, reg);
438 if (val < 0) {
439 ret = val;
440 goto err;
441 }
442 val &= mask;
443 }
444 val |= val_bits;
445
446 ret = __phy_write(phydev, reg, val);
447 if (ret < 0)
448 goto err;
449 }
450err:
451 return phy_restore_page(phydev, saved_page, ret);
452}
453#else
454static int marvell_of_reg_init(struct phy_device *phydev)
455{
456 return 0;
457}
458#endif /* CONFIG_OF_MDIO */
459
460static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
461{
462 int mscr;
463
464 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
465 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
466 MII_88E1121_PHY_MSCR_TX_DELAY;
467 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
468 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
469 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
470 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
471 else
472 mscr = 0;
473
474 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
475 MII_88E1121_PHY_MSCR_REG,
476 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
477}
478
479static int m88e1121_config_aneg(struct phy_device *phydev)
480{
481 int err = 0;
482
483 if (phy_interface_is_rgmii(phydev)) {
484 err = m88e1121_config_aneg_rgmii_delays(phydev);
485 if (err < 0)
486 return err;
487 }
488
489 err = genphy_soft_reset(phydev);
490 if (err < 0)
491 return err;
492
493 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
494 if (err < 0)
495 return err;
496
497 return genphy_config_aneg(phydev);
498}
499
500static int m88e1318_config_aneg(struct phy_device *phydev)
501{
502 int err;
503
504 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
505 MII_88E1318S_PHY_MSCR1_REG,
506 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
507 if (err < 0)
508 return err;
509
510 return m88e1121_config_aneg(phydev);
511}
512
513/**
514 * ethtool_adv_to_fiber_adv_t
515 * @ethadv: the ethtool advertisement settings
516 *
517 * A small helper function that translates ethtool advertisement
518 * settings to phy autonegotiation advertisements for the
519 * MII_ADV register for fiber link.
520 */
521static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
522{
523 u32 result = 0;
524
525 if (ethadv & ADVERTISED_1000baseT_Half)
526 result |= ADVERTISE_FIBER_1000HALF;
527 if (ethadv & ADVERTISED_1000baseT_Full)
528 result |= ADVERTISE_FIBER_1000FULL;
529
530 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
531 result |= LPA_PAUSE_ASYM_FIBER;
532 else if (ethadv & ADVERTISE_PAUSE_CAP)
533 result |= (ADVERTISE_PAUSE_FIBER
534 & (~ADVERTISE_PAUSE_ASYM_FIBER));
535
536 return result;
537}
538
539/**
540 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
541 * @phydev: target phy_device struct
542 *
543 * Description: If auto-negotiation is enabled, we configure the
544 * advertising, and then restart auto-negotiation. If it is not
545 * enabled, then we write the BMCR. Adapted for fiber link in
546 * some Marvell's devices.
547 */
548static int marvell_config_aneg_fiber(struct phy_device *phydev)
549{
550 int changed = 0;
551 int err;
552 int adv, oldadv;
553 u32 advertise;
554
555 if (phydev->autoneg != AUTONEG_ENABLE)
556 return genphy_setup_forced(phydev);
557
558 /* Only allow advertising what this PHY supports */
559 phydev->advertising &= phydev->supported;
560 advertise = phydev->advertising;
561
562 /* Setup fiber advertisement */
563 adv = phy_read(phydev, MII_ADVERTISE);
564 if (adv < 0)
565 return adv;
566
567 oldadv = adv;
568 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
569 | LPA_PAUSE_FIBER);
570 adv |= ethtool_adv_to_fiber_adv_t(advertise);
571
572 if (adv != oldadv) {
573 err = phy_write(phydev, MII_ADVERTISE, adv);
574 if (err < 0)
575 return err;
576
577 changed = 1;
578 }
579
580 if (changed == 0) {
581 /* Advertisement hasn't changed, but maybe aneg was never on to
582 * begin with? Or maybe phy was isolated?
583 */
584 int ctl = phy_read(phydev, MII_BMCR);
585
586 if (ctl < 0)
587 return ctl;
588
589 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
590 changed = 1; /* do restart aneg */
591 }
592
593 /* Only restart aneg if we are advertising something different
594 * than we were before.
595 */
596 if (changed > 0)
597 changed = genphy_restart_aneg(phydev);
598
599 return changed;
600}
601
602static int m88e1510_config_aneg(struct phy_device *phydev)
603{
604 int err;
605
606 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
607 if (err < 0)
608 goto error;
609
610 /* Configure the copper link first */
611 err = m88e1318_config_aneg(phydev);
612 if (err < 0)
613 goto error;
614
615 /* Do not touch the fiber page if we're in copper->sgmii mode */
616 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
617 return 0;
618
619 /* Then the fiber link */
620 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
621 if (err < 0)
622 goto error;
623
624 err = marvell_config_aneg_fiber(phydev);
625 if (err < 0)
626 goto error;
627
628 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
629
630error:
631 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
632 return err;
633}
634
635static int marvell_config_init(struct phy_device *phydev)
636{
637 /* Set registers from marvell,reg-init DT property */
638 return marvell_of_reg_init(phydev);
639}
640
641static int m88e1116r_config_init(struct phy_device *phydev)
642{
643 int err;
644
645 err = genphy_soft_reset(phydev);
646 if (err < 0)
647 return err;
648
649 mdelay(500);
650
651 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
652 if (err < 0)
653 return err;
654
655 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
656 if (err < 0)
657 return err;
658
659 err = marvell_set_downshift(phydev, true, 8);
660 if (err < 0)
661 return err;
662
663 if (phy_interface_is_rgmii(phydev)) {
664 err = m88e1121_config_aneg_rgmii_delays(phydev);
665 if (err < 0)
666 return err;
667 }
668
669 err = genphy_soft_reset(phydev);
670 if (err < 0)
671 return err;
672
673 return marvell_config_init(phydev);
674}
675
676static int m88e3016_config_init(struct phy_device *phydev)
677{
678 int ret;
679
680 /* Enable Scrambler and Auto-Crossover */
681 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
682 MII_88E3016_DISABLE_SCRAMBLER,
683 MII_88E3016_AUTO_MDIX_CROSSOVER);
684 if (ret < 0)
685 return ret;
686
687 return marvell_config_init(phydev);
688}
689
690static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
691 u16 mode,
692 int fibre_copper_auto)
693{
694 if (fibre_copper_auto)
695 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
696
697 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
698 MII_M1111_HWCFG_MODE_MASK |
699 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
700 MII_M1111_HWCFG_FIBER_COPPER_RES,
701 mode);
702}
703
704static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
705{
706 int delay;
707
708 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
709 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
710 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
711 delay = MII_M1111_RGMII_RX_DELAY;
712 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
713 delay = MII_M1111_RGMII_TX_DELAY;
714 } else {
715 delay = 0;
716 }
717
718 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
719 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
720 delay);
721}
722
723static int m88e1111_config_init_rgmii(struct phy_device *phydev)
724{
725 int temp;
726 int err;
727
728 err = m88e1111_config_init_rgmii_delays(phydev);
729 if (err < 0)
730 return err;
731
732 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
733 if (temp < 0)
734 return temp;
735
736 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
737
738 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
739 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
740 else
741 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
742
743 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
744}
745
746static int m88e1111_config_init_sgmii(struct phy_device *phydev)
747{
748 int err;
749
750 err = m88e1111_config_init_hwcfg_mode(
751 phydev,
752 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
753 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
754 if (err < 0)
755 return err;
756
757 /* make sure copper is selected */
758 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
759}
760
761static int m88e1111_config_init_rtbi(struct phy_device *phydev)
762{
763 int err;
764
765 err = m88e1111_config_init_rgmii_delays(phydev);
766 if (err < 0)
767 return err;
768
769 err = m88e1111_config_init_hwcfg_mode(
770 phydev,
771 MII_M1111_HWCFG_MODE_RTBI,
772 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
773 if (err < 0)
774 return err;
775
776 /* soft reset */
777 err = genphy_soft_reset(phydev);
778 if (err < 0)
779 return err;
780
781 return m88e1111_config_init_hwcfg_mode(
782 phydev,
783 MII_M1111_HWCFG_MODE_RTBI,
784 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
785}
786
787static int m88e1111_config_init(struct phy_device *phydev)
788{
789 int err;
790
791 if (phy_interface_is_rgmii(phydev)) {
792 err = m88e1111_config_init_rgmii(phydev);
793 if (err < 0)
794 return err;
795 }
796
797 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
798 err = m88e1111_config_init_sgmii(phydev);
799 if (err < 0)
800 return err;
801 }
802
803 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
804 err = m88e1111_config_init_rtbi(phydev);
805 if (err < 0)
806 return err;
807 }
808
809 err = marvell_of_reg_init(phydev);
810 if (err < 0)
811 return err;
812
813 return genphy_soft_reset(phydev);
814}
815
816static int m88e1121_config_init(struct phy_device *phydev)
817{
818 int err;
819
820 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
821 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
822 MII_88E1121_PHY_LED_CTRL,
823 MII_88E1121_PHY_LED_DEF);
824 if (err < 0)
825 return err;
826
827 /* Set marvell,reg-init configuration from device tree */
828 return marvell_config_init(phydev);
829}
830
831static int m88e1318_config_init(struct phy_device *phydev)
832{
833 if (phy_interrupt_is_valid(phydev)) {
834 int err = phy_modify_paged(
835 phydev, MII_MARVELL_LED_PAGE,
836 MII_88E1318S_PHY_LED_TCR,
837 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
838 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
839 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
840 if (err < 0)
841 return err;
842 }
843
844 return m88e1121_config_init(phydev);
845}
846
847static int m88e1510_config_init(struct phy_device *phydev)
848{
849 int err;
850
851 /* SGMII-to-Copper mode initialization */
852 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
853 u32 pause;
854
855 /* Select page 18 */
856 err = marvell_set_page(phydev, 18);
857 if (err < 0)
858 return err;
859
860 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
861 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
862 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
863 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
864 if (err < 0)
865 return err;
866
867 /* PHY reset is necessary after changing MODE[2:0] */
868 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
869 MII_88E1510_GEN_CTRL_REG_1_RESET);
870 if (err < 0)
871 return err;
872
873 /* Reset page selection */
874 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
875 if (err < 0)
876 return err;
877
878 /* There appears to be a bug in the 88e1512 when used in
879 * SGMII to copper mode, where the AN advertisement register
880 * clears the pause bits each time a negotiation occurs.
881 * This means we can never be truely sure what was advertised,
882 * so disable Pause support.
883 */
884 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
885 phydev->supported &= ~pause;
886 phydev->advertising &= ~pause;
887 }
888
889 return m88e1318_config_init(phydev);
890}
891
892static int m88e1118_config_aneg(struct phy_device *phydev)
893{
894 int err;
895
896 err = genphy_soft_reset(phydev);
897 if (err < 0)
898 return err;
899
900 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
901 if (err < 0)
902 return err;
903
904 err = genphy_config_aneg(phydev);
905 return 0;
906}
907
908static int m88e1118_config_init(struct phy_device *phydev)
909{
910 int err;
911
912 /* Change address */
913 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
914 if (err < 0)
915 return err;
916
917 /* Enable 1000 Mbit */
918 err = phy_write(phydev, 0x15, 0x1070);
919 if (err < 0)
920 return err;
921
922 /* Change address */
923 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
924 if (err < 0)
925 return err;
926
927 /* Adjust LED Control */
928 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
929 err = phy_write(phydev, 0x10, 0x1100);
930 else
931 err = phy_write(phydev, 0x10, 0x021e);
932 if (err < 0)
933 return err;
934
935 err = marvell_of_reg_init(phydev);
936 if (err < 0)
937 return err;
938
939 /* Reset address */
940 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
941 if (err < 0)
942 return err;
943
944 return genphy_soft_reset(phydev);
945}
946
947static int m88e1149_config_init(struct phy_device *phydev)
948{
949 int err;
950
951 /* Change address */
952 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
953 if (err < 0)
954 return err;
955
956 /* Enable 1000 Mbit */
957 err = phy_write(phydev, 0x15, 0x1048);
958 if (err < 0)
959 return err;
960
961 err = marvell_of_reg_init(phydev);
962 if (err < 0)
963 return err;
964
965 /* Reset address */
966 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
967 if (err < 0)
968 return err;
969
970 return genphy_soft_reset(phydev);
971}
972
973static int m88e1145_config_init_rgmii(struct phy_device *phydev)
974{
975 int err;
976
977 err = m88e1111_config_init_rgmii_delays(phydev);
978 if (err < 0)
979 return err;
980
981 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
982 err = phy_write(phydev, 0x1d, 0x0012);
983 if (err < 0)
984 return err;
985
986 err = phy_modify(phydev, 0x1e, 0x0fc0,
987 2 << 9 | /* 36 ohm */
988 2 << 6); /* 39 ohm */
989 if (err < 0)
990 return err;
991
992 err = phy_write(phydev, 0x1d, 0x3);
993 if (err < 0)
994 return err;
995
996 err = phy_write(phydev, 0x1e, 0x8000);
997 }
998 return err;
999}
1000
1001static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1002{
1003 return m88e1111_config_init_hwcfg_mode(
1004 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1005 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1006}
1007
1008static int m88e1145_config_init(struct phy_device *phydev)
1009{
1010 int err;
1011
1012 /* Take care of errata E0 & E1 */
1013 err = phy_write(phydev, 0x1d, 0x001b);
1014 if (err < 0)
1015 return err;
1016
1017 err = phy_write(phydev, 0x1e, 0x418f);
1018 if (err < 0)
1019 return err;
1020
1021 err = phy_write(phydev, 0x1d, 0x0016);
1022 if (err < 0)
1023 return err;
1024
1025 err = phy_write(phydev, 0x1e, 0xa2da);
1026 if (err < 0)
1027 return err;
1028
1029 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1030 err = m88e1145_config_init_rgmii(phydev);
1031 if (err < 0)
1032 return err;
1033 }
1034
1035 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1036 err = m88e1145_config_init_sgmii(phydev);
1037 if (err < 0)
1038 return err;
1039 }
1040
1041 err = marvell_of_reg_init(phydev);
1042 if (err < 0)
1043 return err;
1044
1045 return 0;
1046}
1047
1048/**
1049 * fiber_lpa_to_ethtool_lpa_t
1050 * @lpa: value of the MII_LPA register for fiber link
1051 *
1052 * A small helper function that translates MII_LPA
1053 * bits to ethtool LP advertisement settings.
1054 */
1055static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1056{
1057 u32 result = 0;
1058
1059 if (lpa & LPA_FIBER_1000HALF)
1060 result |= ADVERTISED_1000baseT_Half;
1061 if (lpa & LPA_FIBER_1000FULL)
1062 result |= ADVERTISED_1000baseT_Full;
1063
1064 return result;
1065}
1066
1067/**
1068 * marvell_update_link - update link status in real time in @phydev
1069 * @phydev: target phy_device struct
1070 *
1071 * Description: Update the value in phydev->link to reflect the
1072 * current link value.
1073 */
1074static int marvell_update_link(struct phy_device *phydev, int fiber)
1075{
1076 int status;
1077
1078 /* Use the generic register for copper link, or specific
1079 * register for fiber case
1080 */
1081 if (fiber) {
1082 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1083 if (status < 0)
1084 return status;
1085
1086 if ((status & REGISTER_LINK_STATUS) == 0)
1087 phydev->link = 0;
1088 else
1089 phydev->link = 1;
1090 } else {
1091 return genphy_update_link(phydev);
1092 }
1093
1094 return 0;
1095}
1096
1097static int marvell_read_status_page_an(struct phy_device *phydev,
1098 int fiber)
1099{
1100 int status;
1101 int lpa;
1102 int lpagb;
1103
1104 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1105 if (status < 0)
1106 return status;
1107
1108 lpa = phy_read(phydev, MII_LPA);
1109 if (lpa < 0)
1110 return lpa;
1111
1112 lpagb = phy_read(phydev, MII_STAT1000);
1113 if (lpagb < 0)
1114 return lpagb;
1115
1116 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1117 phydev->duplex = DUPLEX_FULL;
1118 else
1119 phydev->duplex = DUPLEX_HALF;
1120
1121 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1122 phydev->pause = 0;
1123 phydev->asym_pause = 0;
1124
1125 switch (status) {
1126 case MII_M1011_PHY_STATUS_1000:
1127 phydev->speed = SPEED_1000;
1128 break;
1129
1130 case MII_M1011_PHY_STATUS_100:
1131 phydev->speed = SPEED_100;
1132 break;
1133
1134 default:
1135 phydev->speed = SPEED_10;
1136 break;
1137 }
1138
1139 if (!fiber) {
1140 phydev->lp_advertising =
1141 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1142 mii_lpa_to_ethtool_lpa_t(lpa);
1143
1144 if (phydev->duplex == DUPLEX_FULL) {
1145 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1146 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1147 }
1148 } else {
1149 /* The fiber link is only 1000M capable */
1150 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1151
1152 if (phydev->duplex == DUPLEX_FULL) {
1153 if (!(lpa & LPA_PAUSE_FIBER)) {
1154 phydev->pause = 0;
1155 phydev->asym_pause = 0;
1156 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1157 phydev->pause = 1;
1158 phydev->asym_pause = 1;
1159 } else {
1160 phydev->pause = 1;
1161 phydev->asym_pause = 0;
1162 }
1163 }
1164 }
1165 return 0;
1166}
1167
1168static int marvell_read_status_page_fixed(struct phy_device *phydev)
1169{
1170 int bmcr = phy_read(phydev, MII_BMCR);
1171
1172 if (bmcr < 0)
1173 return bmcr;
1174
1175 if (bmcr & BMCR_FULLDPLX)
1176 phydev->duplex = DUPLEX_FULL;
1177 else
1178 phydev->duplex = DUPLEX_HALF;
1179
1180 if (bmcr & BMCR_SPEED1000)
1181 phydev->speed = SPEED_1000;
1182 else if (bmcr & BMCR_SPEED100)
1183 phydev->speed = SPEED_100;
1184 else
1185 phydev->speed = SPEED_10;
1186
1187 phydev->pause = 0;
1188 phydev->asym_pause = 0;
1189 phydev->lp_advertising = 0;
1190
1191 return 0;
1192}
1193
1194/* marvell_read_status_page
1195 *
1196 * Description:
1197 * Check the link, then figure out the current state
1198 * by comparing what we advertise with what the link partner
1199 * advertises. Start by checking the gigabit possibilities,
1200 * then move on to 10/100.
1201 */
1202static int marvell_read_status_page(struct phy_device *phydev, int page)
1203{
1204 int fiber;
1205 int err;
1206
1207 /* Detect and update the link, but return if there
1208 * was an error
1209 */
1210 if (page == MII_MARVELL_FIBER_PAGE)
1211 fiber = 1;
1212 else
1213 fiber = 0;
1214
1215 err = marvell_update_link(phydev, fiber);
1216 if (err)
1217 return err;
1218
1219 if (phydev->autoneg == AUTONEG_ENABLE)
1220 err = marvell_read_status_page_an(phydev, fiber);
1221 else
1222 err = marvell_read_status_page_fixed(phydev);
1223
1224 return err;
1225}
1226
1227/* marvell_read_status
1228 *
1229 * Some Marvell's phys have two modes: fiber and copper.
1230 * Both need status checked.
1231 * Description:
1232 * First, check the fiber link and status.
1233 * If the fiber link is down, check the copper link and status which
1234 * will be the default value if both link are down.
1235 */
1236static int marvell_read_status(struct phy_device *phydev)
1237{
1238 int err;
1239
1240 /* Check the fiber mode first */
1241 if (phydev->supported & SUPPORTED_FIBRE &&
1242 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1243 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1244 if (err < 0)
1245 goto error;
1246
1247 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1248 if (err < 0)
1249 goto error;
1250
1251 /* If the fiber link is up, it is the selected and
1252 * used link. In this case, we need to stay in the
1253 * fiber page. Please to be careful about that, avoid
1254 * to restore Copper page in other functions which
1255 * could break the behaviour for some fiber phy like
1256 * 88E1512.
1257 */
1258 if (phydev->link)
1259 return 0;
1260
1261 /* If fiber link is down, check and save copper mode state */
1262 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1263 if (err < 0)
1264 goto error;
1265 }
1266
1267 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1268
1269error:
1270 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1271 return err;
1272}
1273
1274/* marvell_suspend
1275 *
1276 * Some Marvell's phys have two modes: fiber and copper.
1277 * Both need to be suspended
1278 */
1279static int marvell_suspend(struct phy_device *phydev)
1280{
1281 int err;
1282
1283 /* Suspend the fiber mode first */
1284 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1285 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1286 if (err < 0)
1287 goto error;
1288
1289 /* With the page set, use the generic suspend */
1290 err = genphy_suspend(phydev);
1291 if (err < 0)
1292 goto error;
1293
1294 /* Then, the copper link */
1295 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1296 if (err < 0)
1297 goto error;
1298 }
1299
1300 /* With the page set, use the generic suspend */
1301 return genphy_suspend(phydev);
1302
1303error:
1304 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1305 return err;
1306}
1307
1308/* marvell_resume
1309 *
1310 * Some Marvell's phys have two modes: fiber and copper.
1311 * Both need to be resumed
1312 */
1313static int marvell_resume(struct phy_device *phydev)
1314{
1315 int err;
1316
1317 /* Resume the fiber mode first */
1318 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1319 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1320 if (err < 0)
1321 goto error;
1322
1323 /* With the page set, use the generic resume */
1324 err = genphy_resume(phydev);
1325 if (err < 0)
1326 goto error;
1327
1328 /* Then, the copper link */
1329 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1330 if (err < 0)
1331 goto error;
1332 }
1333
1334 /* With the page set, use the generic resume */
1335 return genphy_resume(phydev);
1336
1337error:
1338 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1339 return err;
1340}
1341
1342static int marvell_aneg_done(struct phy_device *phydev)
1343{
1344 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1345
1346 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1347}
1348
1349static int m88e1121_did_interrupt(struct phy_device *phydev)
1350{
1351 int imask;
1352
1353 imask = phy_read(phydev, MII_M1011_IEVENT);
1354
1355 if (imask & MII_M1011_IMASK_INIT)
1356 return 1;
1357
1358 return 0;
1359}
1360
1361static void m88e1318_get_wol(struct phy_device *phydev,
1362 struct ethtool_wolinfo *wol)
1363{
1364 int oldpage, ret = 0;
1365
1366 wol->supported = WAKE_MAGIC;
1367 wol->wolopts = 0;
1368
1369 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1370 if (oldpage < 0)
1371 goto error;
1372
1373 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1374 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1375 wol->wolopts |= WAKE_MAGIC;
1376
1377error:
1378 phy_restore_page(phydev, oldpage, ret);
1379}
1380
1381static int m88e1318_set_wol(struct phy_device *phydev,
1382 struct ethtool_wolinfo *wol)
1383{
1384 int err = 0, oldpage;
1385
1386 oldpage = phy_save_page(phydev);
1387 if (oldpage < 0)
1388 goto error;
1389
1390 if (wol->wolopts & WAKE_MAGIC) {
1391 /* Explicitly switch to page 0x00, just to be sure */
1392 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1393 if (err < 0)
1394 goto error;
1395
1396 /* If WOL event happened once, the LED[2] interrupt pin
1397 * will not be cleared unless we reading the interrupt status
1398 * register. If interrupts are in use, the normal interrupt
1399 * handling will clear the WOL event. Clear the WOL event
1400 * before enabling it if !phy_interrupt_is_valid()
1401 */
1402 if (!phy_interrupt_is_valid(phydev))
1403 phy_read(phydev, MII_M1011_IEVENT);
1404
1405 /* Enable the WOL interrupt */
1406 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1407 MII_88E1318S_PHY_CSIER_WOL_EIE);
1408 if (err < 0)
1409 goto error;
1410
1411 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1412 if (err < 0)
1413 goto error;
1414
1415 /* Setup LED[2] as interrupt pin (active low) */
1416 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1417 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1418 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1419 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1420 if (err < 0)
1421 goto error;
1422
1423 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1424 if (err < 0)
1425 goto error;
1426
1427 /* Store the device address for the magic packet */
1428 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1429 ((phydev->attached_dev->dev_addr[5] << 8) |
1430 phydev->attached_dev->dev_addr[4]));
1431 if (err < 0)
1432 goto error;
1433 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1434 ((phydev->attached_dev->dev_addr[3] << 8) |
1435 phydev->attached_dev->dev_addr[2]));
1436 if (err < 0)
1437 goto error;
1438 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1439 ((phydev->attached_dev->dev_addr[1] << 8) |
1440 phydev->attached_dev->dev_addr[0]));
1441 if (err < 0)
1442 goto error;
1443
1444 /* Clear WOL status and enable magic packet matching */
1445 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1446 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1447 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1448 if (err < 0)
1449 goto error;
1450 } else {
1451 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1452 if (err < 0)
1453 goto error;
1454
1455 /* Clear WOL status and disable magic packet matching */
1456 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1457 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1458 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1459 if (err < 0)
1460 goto error;
1461 }
1462
1463error:
1464 return phy_restore_page(phydev, oldpage, err);
1465}
1466
1467static int marvell_get_sset_count(struct phy_device *phydev)
1468{
1469 if (phydev->supported & SUPPORTED_FIBRE)
1470 return ARRAY_SIZE(marvell_hw_stats);
1471 else
1472 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1473}
1474
1475static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1476{
1477 int i;
1478
1479 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1480 strlcpy(data + i * ETH_GSTRING_LEN,
1481 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1482 }
1483}
1484
1485#ifndef UINT64_MAX
1486#define UINT64_MAX (u64)(~((u64)0))
1487#endif
1488static u64 marvell_get_stat(struct phy_device *phydev, int i)
1489{
1490 struct marvell_hw_stat stat = marvell_hw_stats[i];
1491 struct marvell_priv *priv = phydev->priv;
1492 int val;
1493 u64 ret;
1494
1495 val = phy_read_paged(phydev, stat.page, stat.reg);
1496 if (val < 0) {
1497 ret = UINT64_MAX;
1498 } else {
1499 val = val & ((1 << stat.bits) - 1);
1500 priv->stats[i] += val;
1501 ret = priv->stats[i];
1502 }
1503
1504 return ret;
1505}
1506
1507static void marvell_get_stats(struct phy_device *phydev,
1508 struct ethtool_stats *stats, u64 *data)
1509{
1510 int i;
1511
1512 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1513 data[i] = marvell_get_stat(phydev, i);
1514}
1515
1516#ifdef CONFIG_HWMON
1517static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1518{
1519 int oldpage;
1520 int ret = 0;
1521 int val;
1522
1523 *temp = 0;
1524
1525 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1526 if (oldpage < 0)
1527 goto error;
1528
1529 /* Enable temperature sensor */
1530 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1531 if (ret < 0)
1532 goto error;
1533
1534 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1535 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1536 if (ret < 0)
1537 goto error;
1538
1539 /* Wait for temperature to stabilize */
1540 usleep_range(10000, 12000);
1541
1542 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1543 if (val < 0) {
1544 ret = val;
1545 goto error;
1546 }
1547
1548 /* Disable temperature sensor */
1549 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1550 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1551 if (ret < 0)
1552 goto error;
1553
1554 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1555
1556error:
1557 return phy_restore_page(phydev, oldpage, ret);
1558}
1559
1560static int m88e1121_hwmon_read(struct device *dev,
1561 enum hwmon_sensor_types type,
1562 u32 attr, int channel, long *temp)
1563{
1564 struct phy_device *phydev = dev_get_drvdata(dev);
1565 int err;
1566
1567 switch (attr) {
1568 case hwmon_temp_input:
1569 err = m88e1121_get_temp(phydev, temp);
1570 break;
1571 default:
1572 return -EOPNOTSUPP;
1573 }
1574
1575 return err;
1576}
1577
1578static umode_t m88e1121_hwmon_is_visible(const void *data,
1579 enum hwmon_sensor_types type,
1580 u32 attr, int channel)
1581{
1582 if (type != hwmon_temp)
1583 return 0;
1584
1585 switch (attr) {
1586 case hwmon_temp_input:
1587 return 0444;
1588 default:
1589 return 0;
1590 }
1591}
1592
1593static u32 m88e1121_hwmon_chip_config[] = {
1594 HWMON_C_REGISTER_TZ,
1595 0
1596};
1597
1598static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1599 .type = hwmon_chip,
1600 .config = m88e1121_hwmon_chip_config,
1601};
1602
1603static u32 m88e1121_hwmon_temp_config[] = {
1604 HWMON_T_INPUT,
1605 0
1606};
1607
1608static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1609 .type = hwmon_temp,
1610 .config = m88e1121_hwmon_temp_config,
1611};
1612
1613static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1614 &m88e1121_hwmon_chip,
1615 &m88e1121_hwmon_temp,
1616 NULL
1617};
1618
1619static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1620 .is_visible = m88e1121_hwmon_is_visible,
1621 .read = m88e1121_hwmon_read,
1622};
1623
1624static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1625 .ops = &m88e1121_hwmon_hwmon_ops,
1626 .info = m88e1121_hwmon_info,
1627};
1628
1629static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1630{
1631 int ret;
1632
1633 *temp = 0;
1634
1635 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1636 MII_88E1510_TEMP_SENSOR);
1637 if (ret < 0)
1638 return ret;
1639
1640 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1641
1642 return 0;
1643}
1644
1645static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1646{
1647 int ret;
1648
1649 *temp = 0;
1650
1651 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1652 MII_88E1121_MISC_TEST);
1653 if (ret < 0)
1654 return ret;
1655
1656 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1657 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1658 /* convert to mC */
1659 *temp *= 1000;
1660
1661 return 0;
1662}
1663
1664static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1665{
1666 temp = temp / 1000;
1667 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1668
1669 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1670 MII_88E1121_MISC_TEST,
1671 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1672 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1673}
1674
1675static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1676{
1677 int ret;
1678
1679 *alarm = false;
1680
1681 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1682 MII_88E1121_MISC_TEST);
1683 if (ret < 0)
1684 return ret;
1685
1686 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1687
1688 return 0;
1689}
1690
1691static int m88e1510_hwmon_read(struct device *dev,
1692 enum hwmon_sensor_types type,
1693 u32 attr, int channel, long *temp)
1694{
1695 struct phy_device *phydev = dev_get_drvdata(dev);
1696 int err;
1697
1698 switch (attr) {
1699 case hwmon_temp_input:
1700 err = m88e1510_get_temp(phydev, temp);
1701 break;
1702 case hwmon_temp_crit:
1703 err = m88e1510_get_temp_critical(phydev, temp);
1704 break;
1705 case hwmon_temp_max_alarm:
1706 err = m88e1510_get_temp_alarm(phydev, temp);
1707 break;
1708 default:
1709 return -EOPNOTSUPP;
1710 }
1711
1712 return err;
1713}
1714
1715static int m88e1510_hwmon_write(struct device *dev,
1716 enum hwmon_sensor_types type,
1717 u32 attr, int channel, long temp)
1718{
1719 struct phy_device *phydev = dev_get_drvdata(dev);
1720 int err;
1721
1722 switch (attr) {
1723 case hwmon_temp_crit:
1724 err = m88e1510_set_temp_critical(phydev, temp);
1725 break;
1726 default:
1727 return -EOPNOTSUPP;
1728 }
1729 return err;
1730}
1731
1732static umode_t m88e1510_hwmon_is_visible(const void *data,
1733 enum hwmon_sensor_types type,
1734 u32 attr, int channel)
1735{
1736 if (type != hwmon_temp)
1737 return 0;
1738
1739 switch (attr) {
1740 case hwmon_temp_input:
1741 case hwmon_temp_max_alarm:
1742 return 0444;
1743 case hwmon_temp_crit:
1744 return 0644;
1745 default:
1746 return 0;
1747 }
1748}
1749
1750static u32 m88e1510_hwmon_temp_config[] = {
1751 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1752 0
1753};
1754
1755static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1756 .type = hwmon_temp,
1757 .config = m88e1510_hwmon_temp_config,
1758};
1759
1760static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1761 &m88e1121_hwmon_chip,
1762 &m88e1510_hwmon_temp,
1763 NULL
1764};
1765
1766static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1767 .is_visible = m88e1510_hwmon_is_visible,
1768 .read = m88e1510_hwmon_read,
1769 .write = m88e1510_hwmon_write,
1770};
1771
1772static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1773 .ops = &m88e1510_hwmon_hwmon_ops,
1774 .info = m88e1510_hwmon_info,
1775};
1776
1777static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1778{
1779 int sum = 0;
1780 int oldpage;
1781 int ret = 0;
1782 int i;
1783
1784 *temp = 0;
1785
1786 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1787 if (oldpage < 0)
1788 goto error;
1789
1790 /* Enable temperature sensor */
1791 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1792 if (ret < 0)
1793 goto error;
1794
1795 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1796 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1797 MII_88E6390_MISC_TEST_SAMPLE_1S;
1798
1799 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1800 if (ret < 0)
1801 goto error;
1802
1803 /* Wait for temperature to stabilize */
1804 usleep_range(10000, 12000);
1805
1806 /* Reading the temperature sense has an errata. You need to read
1807 * a number of times and take an average.
1808 */
1809 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1810 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1811 if (ret < 0)
1812 goto error;
1813 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1814 }
1815
1816 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1817 *temp = (sum - 75) * 1000;
1818
1819 /* Disable temperature sensor */
1820 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1821 if (ret < 0)
1822 goto error;
1823
1824 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1825 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1826
1827 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1828
1829error:
1830 phy_restore_page(phydev, oldpage, ret);
1831
1832 return ret;
1833}
1834
1835static int m88e6390_hwmon_read(struct device *dev,
1836 enum hwmon_sensor_types type,
1837 u32 attr, int channel, long *temp)
1838{
1839 struct phy_device *phydev = dev_get_drvdata(dev);
1840 int err;
1841
1842 switch (attr) {
1843 case hwmon_temp_input:
1844 err = m88e6390_get_temp(phydev, temp);
1845 break;
1846 default:
1847 return -EOPNOTSUPP;
1848 }
1849
1850 return err;
1851}
1852
1853static umode_t m88e6390_hwmon_is_visible(const void *data,
1854 enum hwmon_sensor_types type,
1855 u32 attr, int channel)
1856{
1857 if (type != hwmon_temp)
1858 return 0;
1859
1860 switch (attr) {
1861 case hwmon_temp_input:
1862 return 0444;
1863 default:
1864 return 0;
1865 }
1866}
1867
1868static u32 m88e6390_hwmon_temp_config[] = {
1869 HWMON_T_INPUT,
1870 0
1871};
1872
1873static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1874 .type = hwmon_temp,
1875 .config = m88e6390_hwmon_temp_config,
1876};
1877
1878static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1879 &m88e1121_hwmon_chip,
1880 &m88e6390_hwmon_temp,
1881 NULL
1882};
1883
1884static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1885 .is_visible = m88e6390_hwmon_is_visible,
1886 .read = m88e6390_hwmon_read,
1887};
1888
1889static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1890 .ops = &m88e6390_hwmon_hwmon_ops,
1891 .info = m88e6390_hwmon_info,
1892};
1893
1894static int marvell_hwmon_name(struct phy_device *phydev)
1895{
1896 struct marvell_priv *priv = phydev->priv;
1897 struct device *dev = &phydev->mdio.dev;
1898 const char *devname = dev_name(dev);
1899 size_t len = strlen(devname);
1900 int i, j;
1901
1902 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1903 if (!priv->hwmon_name)
1904 return -ENOMEM;
1905
1906 for (i = j = 0; i < len && devname[i]; i++) {
1907 if (isalnum(devname[i]))
1908 priv->hwmon_name[j++] = devname[i];
1909 }
1910
1911 return 0;
1912}
1913
1914static int marvell_hwmon_probe(struct phy_device *phydev,
1915 const struct hwmon_chip_info *chip)
1916{
1917 struct marvell_priv *priv = phydev->priv;
1918 struct device *dev = &phydev->mdio.dev;
1919 int err;
1920
1921 err = marvell_hwmon_name(phydev);
1922 if (err)
1923 return err;
1924
1925 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1926 dev, priv->hwmon_name, phydev, chip, NULL);
1927
1928 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1929}
1930
1931static int m88e1121_hwmon_probe(struct phy_device *phydev)
1932{
1933 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1934}
1935
1936static int m88e1510_hwmon_probe(struct phy_device *phydev)
1937{
1938 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1939}
1940
1941static int m88e6390_hwmon_probe(struct phy_device *phydev)
1942{
1943 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1944}
1945#else
1946static int m88e1121_hwmon_probe(struct phy_device *phydev)
1947{
1948 return 0;
1949}
1950
1951static int m88e1510_hwmon_probe(struct phy_device *phydev)
1952{
1953 return 0;
1954}
1955
1956static int m88e6390_hwmon_probe(struct phy_device *phydev)
1957{
1958 return 0;
1959}
1960#endif
1961
1962static int marvell_probe(struct phy_device *phydev)
1963{
1964 struct marvell_priv *priv;
1965
1966 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1967 if (!priv)
1968 return -ENOMEM;
1969
1970 phydev->priv = priv;
1971
1972 return 0;
1973}
1974
1975static int m88e1121_probe(struct phy_device *phydev)
1976{
1977 int err;
1978
1979 err = marvell_probe(phydev);
1980 if (err)
1981 return err;
1982
1983 return m88e1121_hwmon_probe(phydev);
1984}
1985
1986static int m88e1510_probe(struct phy_device *phydev)
1987{
1988 int err;
1989
1990 err = marvell_probe(phydev);
1991 if (err)
1992 return err;
1993
1994 return m88e1510_hwmon_probe(phydev);
1995}
1996
1997static int m88e6390_probe(struct phy_device *phydev)
1998{
1999 int err;
2000
2001 err = marvell_probe(phydev);
2002 if (err)
2003 return err;
2004
2005 return m88e6390_hwmon_probe(phydev);
2006}
2007
2008static struct phy_driver marvell_drivers[] = {
2009 {
2010 .phy_id = MARVELL_PHY_ID_88E1101,
2011 .phy_id_mask = MARVELL_PHY_ID_MASK,
2012 .name = "Marvell 88E1101",
2013 .features = PHY_GBIT_FEATURES,
2014 .flags = PHY_HAS_INTERRUPT,
2015 .probe = marvell_probe,
2016 .config_init = &marvell_config_init,
2017 .config_aneg = &m88e1101_config_aneg,
2018 .ack_interrupt = &marvell_ack_interrupt,
2019 .config_intr = &marvell_config_intr,
2020 .resume = &genphy_resume,
2021 .suspend = &genphy_suspend,
2022 .read_page = marvell_read_page,
2023 .write_page = marvell_write_page,
2024 .get_sset_count = marvell_get_sset_count,
2025 .get_strings = marvell_get_strings,
2026 .get_stats = marvell_get_stats,
2027 },
2028 {
2029 .phy_id = MARVELL_PHY_ID_88E1112,
2030 .phy_id_mask = MARVELL_PHY_ID_MASK,
2031 .name = "Marvell 88E1112",
2032 .features = PHY_GBIT_FEATURES,
2033 .flags = PHY_HAS_INTERRUPT,
2034 .probe = marvell_probe,
2035 .config_init = &m88e1111_config_init,
2036 .config_aneg = &marvell_config_aneg,
2037 .ack_interrupt = &marvell_ack_interrupt,
2038 .config_intr = &marvell_config_intr,
2039 .resume = &genphy_resume,
2040 .suspend = &genphy_suspend,
2041 .read_page = marvell_read_page,
2042 .write_page = marvell_write_page,
2043 .get_sset_count = marvell_get_sset_count,
2044 .get_strings = marvell_get_strings,
2045 .get_stats = marvell_get_stats,
2046 },
2047 {
2048 .phy_id = MARVELL_PHY_ID_88E1111,
2049 .phy_id_mask = MARVELL_PHY_ID_MASK,
2050 .name = "Marvell 88E1111",
2051 .features = PHY_GBIT_FEATURES,
2052 .flags = PHY_HAS_INTERRUPT,
2053 .probe = marvell_probe,
2054 .config_init = &m88e1111_config_init,
2055 .config_aneg = &m88e1111_config_aneg,
2056 .read_status = &marvell_read_status,
2057 .ack_interrupt = &marvell_ack_interrupt,
2058 .config_intr = &marvell_config_intr,
2059 .resume = &genphy_resume,
2060 .suspend = &genphy_suspend,
2061 .read_page = marvell_read_page,
2062 .write_page = marvell_write_page,
2063 .get_sset_count = marvell_get_sset_count,
2064 .get_strings = marvell_get_strings,
2065 .get_stats = marvell_get_stats,
2066 },
2067 {
2068 .phy_id = MARVELL_PHY_ID_88E1118,
2069 .phy_id_mask = MARVELL_PHY_ID_MASK,
2070 .name = "Marvell 88E1118",
2071 .features = PHY_GBIT_FEATURES,
2072 .flags = PHY_HAS_INTERRUPT,
2073 .probe = marvell_probe,
2074 .config_init = &m88e1118_config_init,
2075 .config_aneg = &m88e1118_config_aneg,
2076 .ack_interrupt = &marvell_ack_interrupt,
2077 .config_intr = &marvell_config_intr,
2078 .resume = &genphy_resume,
2079 .suspend = &genphy_suspend,
2080 .read_page = marvell_read_page,
2081 .write_page = marvell_write_page,
2082 .get_sset_count = marvell_get_sset_count,
2083 .get_strings = marvell_get_strings,
2084 .get_stats = marvell_get_stats,
2085 },
2086 {
2087 .phy_id = MARVELL_PHY_ID_88E1121R,
2088 .phy_id_mask = MARVELL_PHY_ID_MASK,
2089 .name = "Marvell 88E1121R",
2090 .features = PHY_GBIT_FEATURES,
2091 .flags = PHY_HAS_INTERRUPT,
2092 .probe = &m88e1121_probe,
2093 .config_init = &m88e1121_config_init,
2094 .config_aneg = &m88e1121_config_aneg,
2095 .read_status = &marvell_read_status,
2096 .ack_interrupt = &marvell_ack_interrupt,
2097 .config_intr = &marvell_config_intr,
2098 .did_interrupt = &m88e1121_did_interrupt,
2099 .resume = &genphy_resume,
2100 .suspend = &genphy_suspend,
2101 .read_page = marvell_read_page,
2102 .write_page = marvell_write_page,
2103 .get_sset_count = marvell_get_sset_count,
2104 .get_strings = marvell_get_strings,
2105 .get_stats = marvell_get_stats,
2106 },
2107 {
2108 .phy_id = MARVELL_PHY_ID_88E1318S,
2109 .phy_id_mask = MARVELL_PHY_ID_MASK,
2110 .name = "Marvell 88E1318S",
2111 .features = PHY_GBIT_FEATURES,
2112 .flags = PHY_HAS_INTERRUPT,
2113 .probe = marvell_probe,
2114 .config_init = &m88e1318_config_init,
2115 .config_aneg = &m88e1318_config_aneg,
2116 .read_status = &marvell_read_status,
2117 .ack_interrupt = &marvell_ack_interrupt,
2118 .config_intr = &marvell_config_intr,
2119 .did_interrupt = &m88e1121_did_interrupt,
2120 .get_wol = &m88e1318_get_wol,
2121 .set_wol = &m88e1318_set_wol,
2122 .resume = &genphy_resume,
2123 .suspend = &genphy_suspend,
2124 .read_page = marvell_read_page,
2125 .write_page = marvell_write_page,
2126 .get_sset_count = marvell_get_sset_count,
2127 .get_strings = marvell_get_strings,
2128 .get_stats = marvell_get_stats,
2129 },
2130 {
2131 .phy_id = MARVELL_PHY_ID_88E1145,
2132 .phy_id_mask = MARVELL_PHY_ID_MASK,
2133 .name = "Marvell 88E1145",
2134 .features = PHY_GBIT_FEATURES,
2135 .flags = PHY_HAS_INTERRUPT,
2136 .probe = marvell_probe,
2137 .config_init = &m88e1145_config_init,
2138 .config_aneg = &m88e1101_config_aneg,
2139 .read_status = &genphy_read_status,
2140 .ack_interrupt = &marvell_ack_interrupt,
2141 .config_intr = &marvell_config_intr,
2142 .resume = &genphy_resume,
2143 .suspend = &genphy_suspend,
2144 .read_page = marvell_read_page,
2145 .write_page = marvell_write_page,
2146 .get_sset_count = marvell_get_sset_count,
2147 .get_strings = marvell_get_strings,
2148 .get_stats = marvell_get_stats,
2149 },
2150 {
2151 .phy_id = MARVELL_PHY_ID_88E1149R,
2152 .phy_id_mask = MARVELL_PHY_ID_MASK,
2153 .name = "Marvell 88E1149R",
2154 .features = PHY_GBIT_FEATURES,
2155 .flags = PHY_HAS_INTERRUPT,
2156 .probe = marvell_probe,
2157 .config_init = &m88e1149_config_init,
2158 .config_aneg = &m88e1118_config_aneg,
2159 .ack_interrupt = &marvell_ack_interrupt,
2160 .config_intr = &marvell_config_intr,
2161 .resume = &genphy_resume,
2162 .suspend = &genphy_suspend,
2163 .read_page = marvell_read_page,
2164 .write_page = marvell_write_page,
2165 .get_sset_count = marvell_get_sset_count,
2166 .get_strings = marvell_get_strings,
2167 .get_stats = marvell_get_stats,
2168 },
2169 {
2170 .phy_id = MARVELL_PHY_ID_88E1240,
2171 .phy_id_mask = MARVELL_PHY_ID_MASK,
2172 .name = "Marvell 88E1240",
2173 .features = PHY_GBIT_FEATURES,
2174 .flags = PHY_HAS_INTERRUPT,
2175 .probe = marvell_probe,
2176 .config_init = &m88e1111_config_init,
2177 .config_aneg = &marvell_config_aneg,
2178 .ack_interrupt = &marvell_ack_interrupt,
2179 .config_intr = &marvell_config_intr,
2180 .resume = &genphy_resume,
2181 .suspend = &genphy_suspend,
2182 .read_page = marvell_read_page,
2183 .write_page = marvell_write_page,
2184 .get_sset_count = marvell_get_sset_count,
2185 .get_strings = marvell_get_strings,
2186 .get_stats = marvell_get_stats,
2187 },
2188 {
2189 .phy_id = MARVELL_PHY_ID_88E1116R,
2190 .phy_id_mask = MARVELL_PHY_ID_MASK,
2191 .name = "Marvell 88E1116R",
2192 .features = PHY_GBIT_FEATURES,
2193 .flags = PHY_HAS_INTERRUPT,
2194 .probe = marvell_probe,
2195 .config_init = &m88e1116r_config_init,
2196 .ack_interrupt = &marvell_ack_interrupt,
2197 .config_intr = &marvell_config_intr,
2198 .resume = &genphy_resume,
2199 .suspend = &genphy_suspend,
2200 .read_page = marvell_read_page,
2201 .write_page = marvell_write_page,
2202 .get_sset_count = marvell_get_sset_count,
2203 .get_strings = marvell_get_strings,
2204 .get_stats = marvell_get_stats,
2205 },
2206 {
2207 .phy_id = MARVELL_PHY_ID_88E1510,
2208 .phy_id_mask = MARVELL_PHY_ID_MASK,
2209 .name = "Marvell 88E1510",
2210 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2211 .flags = PHY_HAS_INTERRUPT,
2212 .probe = &m88e1510_probe,
2213 .config_init = &m88e1510_config_init,
2214 .config_aneg = &m88e1510_config_aneg,
2215 .read_status = &marvell_read_status,
2216 .ack_interrupt = &marvell_ack_interrupt,
2217 .config_intr = &marvell_config_intr,
2218 .did_interrupt = &m88e1121_did_interrupt,
2219 .get_wol = &m88e1318_get_wol,
2220 .set_wol = &m88e1318_set_wol,
2221 .resume = &marvell_resume,
2222 .suspend = &marvell_suspend,
2223 .read_page = marvell_read_page,
2224 .write_page = marvell_write_page,
2225 .get_sset_count = marvell_get_sset_count,
2226 .get_strings = marvell_get_strings,
2227 .get_stats = marvell_get_stats,
2228 .set_loopback = genphy_loopback,
2229 },
2230 {
2231 .phy_id = MARVELL_PHY_ID_88E1540,
2232 .phy_id_mask = MARVELL_PHY_ID_MASK,
2233 .name = "Marvell 88E1540",
2234 .features = PHY_GBIT_FEATURES,
2235 .flags = PHY_HAS_INTERRUPT,
2236 .probe = m88e1510_probe,
2237 .config_init = &marvell_config_init,
2238 .config_aneg = &m88e1510_config_aneg,
2239 .read_status = &marvell_read_status,
2240 .ack_interrupt = &marvell_ack_interrupt,
2241 .config_intr = &marvell_config_intr,
2242 .did_interrupt = &m88e1121_did_interrupt,
2243 .resume = &genphy_resume,
2244 .suspend = &genphy_suspend,
2245 .read_page = marvell_read_page,
2246 .write_page = marvell_write_page,
2247 .get_sset_count = marvell_get_sset_count,
2248 .get_strings = marvell_get_strings,
2249 .get_stats = marvell_get_stats,
2250 },
2251 {
2252 .phy_id = MARVELL_PHY_ID_88E1545,
2253 .phy_id_mask = MARVELL_PHY_ID_MASK,
2254 .name = "Marvell 88E1545",
2255 .probe = m88e1510_probe,
2256 .features = PHY_GBIT_FEATURES,
2257 .flags = PHY_HAS_INTERRUPT,
2258 .config_init = &marvell_config_init,
2259 .config_aneg = &m88e1510_config_aneg,
2260 .read_status = &marvell_read_status,
2261 .ack_interrupt = &marvell_ack_interrupt,
2262 .config_intr = &marvell_config_intr,
2263 .did_interrupt = &m88e1121_did_interrupt,
2264 .resume = &genphy_resume,
2265 .suspend = &genphy_suspend,
2266 .read_page = marvell_read_page,
2267 .write_page = marvell_write_page,
2268 .get_sset_count = marvell_get_sset_count,
2269 .get_strings = marvell_get_strings,
2270 .get_stats = marvell_get_stats,
2271 },
2272 {
2273 .phy_id = MARVELL_PHY_ID_88E3016,
2274 .phy_id_mask = MARVELL_PHY_ID_MASK,
2275 .name = "Marvell 88E3016",
2276 .features = PHY_BASIC_FEATURES,
2277 .flags = PHY_HAS_INTERRUPT,
2278 .probe = marvell_probe,
2279 .config_init = &m88e3016_config_init,
2280 .aneg_done = &marvell_aneg_done,
2281 .read_status = &marvell_read_status,
2282 .ack_interrupt = &marvell_ack_interrupt,
2283 .config_intr = &marvell_config_intr,
2284 .did_interrupt = &m88e1121_did_interrupt,
2285 .resume = &genphy_resume,
2286 .suspend = &genphy_suspend,
2287 .read_page = marvell_read_page,
2288 .write_page = marvell_write_page,
2289 .get_sset_count = marvell_get_sset_count,
2290 .get_strings = marvell_get_strings,
2291 .get_stats = marvell_get_stats,
2292 },
2293 {
2294 .phy_id = MARVELL_PHY_ID_88E6390,
2295 .phy_id_mask = MARVELL_PHY_ID_MASK,
2296 .name = "Marvell 88E6390",
2297 .features = PHY_GBIT_FEATURES,
2298 .flags = PHY_HAS_INTERRUPT,
2299 .probe = m88e6390_probe,
2300 .config_init = &marvell_config_init,
2301 .config_aneg = &m88e1510_config_aneg,
2302 .read_status = &marvell_read_status,
2303 .ack_interrupt = &marvell_ack_interrupt,
2304 .config_intr = &marvell_config_intr,
2305 .did_interrupt = &m88e1121_did_interrupt,
2306 .resume = &genphy_resume,
2307 .suspend = &genphy_suspend,
2308 .read_page = marvell_read_page,
2309 .write_page = marvell_write_page,
2310 .get_sset_count = marvell_get_sset_count,
2311 .get_strings = marvell_get_strings,
2312 .get_stats = marvell_get_stats,
2313 },
2314};
2315
2316module_phy_driver(marvell_drivers);
2317
2318static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2319 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2320 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2321 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2322 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2323 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2324 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2325 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2326 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2327 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2328 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2329 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2330 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2331 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2332 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2333 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2334 { }
2335};
2336
2337MODULE_DEVICE_TABLE(mdio, marvell_tbl);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 */
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/ctype.h>
16#include <linux/errno.h>
17#include <linux/unistd.h>
18#include <linux/hwmon.h>
19#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/ethtool_netlink.h>
31#include <linux/phy.h>
32#include <linux/marvell_phy.h>
33#include <linux/bitfield.h>
34#include <linux/of.h>
35
36#include <linux/io.h>
37#include <asm/irq.h>
38#include <linux/uaccess.h>
39
40#define MII_MARVELL_PHY_PAGE 22
41#define MII_MARVELL_COPPER_PAGE 0x00
42#define MII_MARVELL_FIBER_PAGE 0x01
43#define MII_MARVELL_MSCR_PAGE 0x02
44#define MII_MARVELL_LED_PAGE 0x03
45#define MII_MARVELL_VCT5_PAGE 0x05
46#define MII_MARVELL_MISC_TEST_PAGE 0x06
47#define MII_MARVELL_VCT7_PAGE 0x07
48#define MII_MARVELL_WOL_PAGE 0x11
49
50#define MII_M1011_IEVENT 0x13
51#define MII_M1011_IEVENT_CLEAR 0x0000
52
53#define MII_M1011_IMASK 0x12
54#define MII_M1011_IMASK_INIT 0x6400
55#define MII_M1011_IMASK_CLEAR 0x0000
56
57#define MII_M1011_PHY_SCR 0x10
58#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
59#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
60#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
61#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
62#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
63#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
64
65#define MII_M1011_PHY_SSR 0x11
66#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
67
68#define MII_M1111_PHY_LED_CONTROL 0x18
69#define MII_M1111_PHY_LED_DIRECT 0x4100
70#define MII_M1111_PHY_LED_COMBINE 0x411c
71#define MII_M1111_PHY_EXT_CR 0x14
72#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
73#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
74#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
75#define MII_M1111_RGMII_RX_DELAY BIT(7)
76#define MII_M1111_RGMII_TX_DELAY BIT(1)
77#define MII_M1111_PHY_EXT_SR 0x1b
78
79#define MII_M1111_HWCFG_MODE_MASK 0xf
80#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
81#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
82#define MII_M1111_HWCFG_MODE_RTBI 0x7
83#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
84#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
85#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
86#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
87
88#define MII_88E1121_PHY_MSCR_REG 21
89#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
90#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
91#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
92
93#define MII_88E1121_MISC_TEST 0x1a
94#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
95#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
96#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
97#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
98#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
99#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
100
101#define MII_88E1510_TEMP_SENSOR 0x1b
102#define MII_88E1510_TEMP_SENSOR_MASK 0xff
103
104#define MII_88E1540_COPPER_CTRL3 0x1a
105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
107#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
108#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
109#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
110#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
111
112#define MII_88E6390_MISC_TEST 0x1b
113#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
114#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
115#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
116#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
117#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
118
119#define MII_88E6390_TEMP_SENSOR 0x1c
120#define MII_88E6390_TEMP_SENSOR_MASK 0xff
121#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
122
123#define MII_88E1318S_PHY_MSCR1_REG 16
124#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
125
126/* Copper Specific Interrupt Enable Register */
127#define MII_88E1318S_PHY_CSIER 0x12
128/* WOL Event Interrupt Enable */
129#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
130
131/* LED Timer Control Register */
132#define MII_88E1318S_PHY_LED_TCR 0x12
133#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
134#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
135#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
136
137/* Magic Packet MAC address registers */
138#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
139#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
140#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
141
142#define MII_88E1318S_PHY_WOL_CTRL 0x10
143#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
144#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
145
146#define MII_PHY_LED_CTRL 16
147#define MII_88E1121_PHY_LED_DEF 0x0030
148#define MII_88E1510_PHY_LED_DEF 0x1177
149#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
150
151#define MII_M1011_PHY_STATUS 0x11
152#define MII_M1011_PHY_STATUS_1000 0x8000
153#define MII_M1011_PHY_STATUS_100 0x4000
154#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
155#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
156#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
157#define MII_M1011_PHY_STATUS_LINK 0x0400
158
159#define MII_88E3016_PHY_SPEC_CTRL 0x10
160#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
161#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
162
163#define MII_88E1510_GEN_CTRL_REG_1 0x14
164#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
165#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
166#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
167
168#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
169#define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
170#define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
171#define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
172#define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
173#define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
174#define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
175
176#define MII_VCT5_CTRL 0x17
177#define MII_VCT5_CTRL_ENABLE BIT(15)
178#define MII_VCT5_CTRL_COMPLETE BIT(14)
179#define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
180#define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
181#define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
182#define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
183#define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
184#define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
185#define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
186#define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
187#define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
188#define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
189#define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
190#define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
191#define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
192#define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
193#define MII_VCT5_CTRL_SAMPLES_SHIFT 8
194#define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
195#define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
196#define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
197#define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
198#define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
199
200#define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
201#define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
202#define MII_VCT5_TX_PULSE_CTRL 0x1c
203#define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
204#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
205#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
206#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
207#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
208#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
209#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
210#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
211#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
212#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
213#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
214#define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
215#define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
216
217/* For TDR measurements less than 11 meters, a short pulse should be
218 * used.
219 */
220#define TDR_SHORT_CABLE_LENGTH 11
221
222#define MII_VCT7_PAIR_0_DISTANCE 0x10
223#define MII_VCT7_PAIR_1_DISTANCE 0x11
224#define MII_VCT7_PAIR_2_DISTANCE 0x12
225#define MII_VCT7_PAIR_3_DISTANCE 0x13
226
227#define MII_VCT7_RESULTS 0x14
228#define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
229#define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
230#define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
231#define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
232#define MII_VCT7_RESULTS_PAIR3_SHIFT 12
233#define MII_VCT7_RESULTS_PAIR2_SHIFT 8
234#define MII_VCT7_RESULTS_PAIR1_SHIFT 4
235#define MII_VCT7_RESULTS_PAIR0_SHIFT 0
236#define MII_VCT7_RESULTS_INVALID 0
237#define MII_VCT7_RESULTS_OK 1
238#define MII_VCT7_RESULTS_OPEN 2
239#define MII_VCT7_RESULTS_SAME_SHORT 3
240#define MII_VCT7_RESULTS_CROSS_SHORT 4
241#define MII_VCT7_RESULTS_BUSY 9
242
243#define MII_VCT7_CTRL 0x15
244#define MII_VCT7_CTRL_RUN_NOW BIT(15)
245#define MII_VCT7_CTRL_RUN_ANEG BIT(14)
246#define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
247#define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
248#define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
249#define MII_VCT7_CTRL_METERS BIT(10)
250#define MII_VCT7_CTRL_CENTIMETERS 0
251
252#define LPA_PAUSE_FIBER 0x180
253#define LPA_PAUSE_ASYM_FIBER 0x100
254
255#define NB_FIBER_STATS 1
256
257MODULE_DESCRIPTION("Marvell PHY driver");
258MODULE_AUTHOR("Andy Fleming");
259MODULE_LICENSE("GPL");
260
261struct marvell_hw_stat {
262 const char *string;
263 u8 page;
264 u8 reg;
265 u8 bits;
266};
267
268static struct marvell_hw_stat marvell_hw_stats[] = {
269 { "phy_receive_errors_copper", 0, 21, 16},
270 { "phy_idle_errors", 0, 10, 8 },
271 { "phy_receive_errors_fiber", 1, 21, 16},
272};
273
274struct marvell_priv {
275 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
276 char *hwmon_name;
277 struct device *hwmon_dev;
278 bool cable_test_tdr;
279 u32 first;
280 u32 last;
281 u32 step;
282 s8 pair;
283};
284
285static int marvell_read_page(struct phy_device *phydev)
286{
287 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
288}
289
290static int marvell_write_page(struct phy_device *phydev, int page)
291{
292 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
293}
294
295static int marvell_set_page(struct phy_device *phydev, int page)
296{
297 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
298}
299
300static int marvell_ack_interrupt(struct phy_device *phydev)
301{
302 int err;
303
304 /* Clear the interrupts by reading the reg */
305 err = phy_read(phydev, MII_M1011_IEVENT);
306
307 if (err < 0)
308 return err;
309
310 return 0;
311}
312
313static int marvell_config_intr(struct phy_device *phydev)
314{
315 int err;
316
317 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
318 err = phy_write(phydev, MII_M1011_IMASK,
319 MII_M1011_IMASK_INIT);
320 else
321 err = phy_write(phydev, MII_M1011_IMASK,
322 MII_M1011_IMASK_CLEAR);
323
324 return err;
325}
326
327static int marvell_set_polarity(struct phy_device *phydev, int polarity)
328{
329 int reg;
330 int err;
331 int val;
332
333 /* get the current settings */
334 reg = phy_read(phydev, MII_M1011_PHY_SCR);
335 if (reg < 0)
336 return reg;
337
338 val = reg;
339 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
340 switch (polarity) {
341 case ETH_TP_MDI:
342 val |= MII_M1011_PHY_SCR_MDI;
343 break;
344 case ETH_TP_MDI_X:
345 val |= MII_M1011_PHY_SCR_MDI_X;
346 break;
347 case ETH_TP_MDI_AUTO:
348 case ETH_TP_MDI_INVALID:
349 default:
350 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
351 break;
352 }
353
354 if (val != reg) {
355 /* Set the new polarity value in the register */
356 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
357 if (err)
358 return err;
359 }
360
361 return val != reg;
362}
363
364static int marvell_config_aneg(struct phy_device *phydev)
365{
366 int changed = 0;
367 int err;
368
369 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
370 if (err < 0)
371 return err;
372
373 changed = err;
374
375 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
376 MII_M1111_PHY_LED_DIRECT);
377 if (err < 0)
378 return err;
379
380 err = genphy_config_aneg(phydev);
381 if (err < 0)
382 return err;
383
384 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
385 /* A write to speed/duplex bits (that is performed by
386 * genphy_config_aneg() call above) must be followed by
387 * a software reset. Otherwise, the write has no effect.
388 */
389 err = genphy_soft_reset(phydev);
390 if (err < 0)
391 return err;
392 }
393
394 return 0;
395}
396
397static int m88e1101_config_aneg(struct phy_device *phydev)
398{
399 int err;
400
401 /* This Marvell PHY has an errata which requires
402 * that certain registers get written in order
403 * to restart autonegotiation
404 */
405 err = genphy_soft_reset(phydev);
406 if (err < 0)
407 return err;
408
409 err = phy_write(phydev, 0x1d, 0x1f);
410 if (err < 0)
411 return err;
412
413 err = phy_write(phydev, 0x1e, 0x200c);
414 if (err < 0)
415 return err;
416
417 err = phy_write(phydev, 0x1d, 0x5);
418 if (err < 0)
419 return err;
420
421 err = phy_write(phydev, 0x1e, 0);
422 if (err < 0)
423 return err;
424
425 err = phy_write(phydev, 0x1e, 0x100);
426 if (err < 0)
427 return err;
428
429 return marvell_config_aneg(phydev);
430}
431
432#if IS_ENABLED(CONFIG_OF_MDIO)
433/* Set and/or override some configuration registers based on the
434 * marvell,reg-init property stored in the of_node for the phydev.
435 *
436 * marvell,reg-init = <reg-page reg mask value>,...;
437 *
438 * There may be one or more sets of <reg-page reg mask value>:
439 *
440 * reg-page: which register bank to use.
441 * reg: the register.
442 * mask: if non-zero, ANDed with existing register value.
443 * value: ORed with the masked value and written to the regiser.
444 *
445 */
446static int marvell_of_reg_init(struct phy_device *phydev)
447{
448 const __be32 *paddr;
449 int len, i, saved_page, current_page, ret = 0;
450
451 if (!phydev->mdio.dev.of_node)
452 return 0;
453
454 paddr = of_get_property(phydev->mdio.dev.of_node,
455 "marvell,reg-init", &len);
456 if (!paddr || len < (4 * sizeof(*paddr)))
457 return 0;
458
459 saved_page = phy_save_page(phydev);
460 if (saved_page < 0)
461 goto err;
462 current_page = saved_page;
463
464 len /= sizeof(*paddr);
465 for (i = 0; i < len - 3; i += 4) {
466 u16 page = be32_to_cpup(paddr + i);
467 u16 reg = be32_to_cpup(paddr + i + 1);
468 u16 mask = be32_to_cpup(paddr + i + 2);
469 u16 val_bits = be32_to_cpup(paddr + i + 3);
470 int val;
471
472 if (page != current_page) {
473 current_page = page;
474 ret = marvell_write_page(phydev, page);
475 if (ret < 0)
476 goto err;
477 }
478
479 val = 0;
480 if (mask) {
481 val = __phy_read(phydev, reg);
482 if (val < 0) {
483 ret = val;
484 goto err;
485 }
486 val &= mask;
487 }
488 val |= val_bits;
489
490 ret = __phy_write(phydev, reg, val);
491 if (ret < 0)
492 goto err;
493 }
494err:
495 return phy_restore_page(phydev, saved_page, ret);
496}
497#else
498static int marvell_of_reg_init(struct phy_device *phydev)
499{
500 return 0;
501}
502#endif /* CONFIG_OF_MDIO */
503
504static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
505{
506 int mscr;
507
508 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
509 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
510 MII_88E1121_PHY_MSCR_TX_DELAY;
511 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
512 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
513 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
514 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
515 else
516 mscr = 0;
517
518 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
519 MII_88E1121_PHY_MSCR_REG,
520 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
521}
522
523static int m88e1121_config_aneg(struct phy_device *phydev)
524{
525 int changed = 0;
526 int err = 0;
527
528 if (phy_interface_is_rgmii(phydev)) {
529 err = m88e1121_config_aneg_rgmii_delays(phydev);
530 if (err < 0)
531 return err;
532 }
533
534 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
535 if (err < 0)
536 return err;
537
538 changed = err;
539
540 err = genphy_config_aneg(phydev);
541 if (err < 0)
542 return err;
543
544 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
545 /* A software reset is used to ensure a "commit" of the
546 * changes is done.
547 */
548 err = genphy_soft_reset(phydev);
549 if (err < 0)
550 return err;
551 }
552
553 return 0;
554}
555
556static int m88e1318_config_aneg(struct phy_device *phydev)
557{
558 int err;
559
560 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
561 MII_88E1318S_PHY_MSCR1_REG,
562 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
563 if (err < 0)
564 return err;
565
566 return m88e1121_config_aneg(phydev);
567}
568
569/**
570 * linkmode_adv_to_fiber_adv_t
571 * @advertise: the linkmode advertisement settings
572 *
573 * A small helper function that translates linkmode advertisement
574 * settings to phy autonegotiation advertisements for the MII_ADV
575 * register for fiber link.
576 */
577static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
578{
579 u32 result = 0;
580
581 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
582 result |= ADVERTISE_1000XHALF;
583 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
584 result |= ADVERTISE_1000XFULL;
585
586 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
587 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
588 result |= ADVERTISE_1000XPSE_ASYM;
589 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
590 result |= ADVERTISE_1000XPAUSE;
591
592 return result;
593}
594
595/**
596 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
597 * @phydev: target phy_device struct
598 *
599 * Description: If auto-negotiation is enabled, we configure the
600 * advertising, and then restart auto-negotiation. If it is not
601 * enabled, then we write the BMCR. Adapted for fiber link in
602 * some Marvell's devices.
603 */
604static int marvell_config_aneg_fiber(struct phy_device *phydev)
605{
606 int changed = 0;
607 int err;
608 u16 adv;
609
610 if (phydev->autoneg != AUTONEG_ENABLE)
611 return genphy_setup_forced(phydev);
612
613 /* Only allow advertising what this PHY supports */
614 linkmode_and(phydev->advertising, phydev->advertising,
615 phydev->supported);
616
617 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
618
619 /* Setup fiber advertisement */
620 err = phy_modify_changed(phydev, MII_ADVERTISE,
621 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
622 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
623 adv);
624 if (err < 0)
625 return err;
626 if (err > 0)
627 changed = 1;
628
629 return genphy_check_and_restart_aneg(phydev, changed);
630}
631
632static int m88e1510_config_aneg(struct phy_device *phydev)
633{
634 int err;
635
636 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
637 if (err < 0)
638 goto error;
639
640 /* Configure the copper link first */
641 err = m88e1318_config_aneg(phydev);
642 if (err < 0)
643 goto error;
644
645 /* Do not touch the fiber page if we're in copper->sgmii mode */
646 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
647 return 0;
648
649 /* Then the fiber link */
650 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
651 if (err < 0)
652 goto error;
653
654 err = marvell_config_aneg_fiber(phydev);
655 if (err < 0)
656 goto error;
657
658 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
659
660error:
661 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
662 return err;
663}
664
665static void marvell_config_led(struct phy_device *phydev)
666{
667 u16 def_config;
668 int err;
669
670 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
671 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
672 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
673 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
674 def_config = MII_88E1121_PHY_LED_DEF;
675 break;
676 /* Default PHY LED config:
677 * LED[0] .. 1000Mbps Link
678 * LED[1] .. 100Mbps Link
679 * LED[2] .. Blink, Activity
680 */
681 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
682 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
683 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
684 else
685 def_config = MII_88E1510_PHY_LED_DEF;
686 break;
687 default:
688 return;
689 }
690
691 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
692 def_config);
693 if (err < 0)
694 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
695}
696
697static int marvell_config_init(struct phy_device *phydev)
698{
699 /* Set defalut LED */
700 marvell_config_led(phydev);
701
702 /* Set registers from marvell,reg-init DT property */
703 return marvell_of_reg_init(phydev);
704}
705
706static int m88e3016_config_init(struct phy_device *phydev)
707{
708 int ret;
709
710 /* Enable Scrambler and Auto-Crossover */
711 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
712 MII_88E3016_DISABLE_SCRAMBLER,
713 MII_88E3016_AUTO_MDIX_CROSSOVER);
714 if (ret < 0)
715 return ret;
716
717 return marvell_config_init(phydev);
718}
719
720static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
721 u16 mode,
722 int fibre_copper_auto)
723{
724 if (fibre_copper_auto)
725 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
726
727 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
728 MII_M1111_HWCFG_MODE_MASK |
729 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
730 MII_M1111_HWCFG_FIBER_COPPER_RES,
731 mode);
732}
733
734static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
735{
736 int delay;
737
738 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
739 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
740 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
741 delay = MII_M1111_RGMII_RX_DELAY;
742 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
743 delay = MII_M1111_RGMII_TX_DELAY;
744 } else {
745 delay = 0;
746 }
747
748 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
749 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
750 delay);
751}
752
753static int m88e1111_config_init_rgmii(struct phy_device *phydev)
754{
755 int temp;
756 int err;
757
758 err = m88e1111_config_init_rgmii_delays(phydev);
759 if (err < 0)
760 return err;
761
762 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
763 if (temp < 0)
764 return temp;
765
766 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
767
768 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
769 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
770 else
771 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
772
773 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
774}
775
776static int m88e1111_config_init_sgmii(struct phy_device *phydev)
777{
778 int err;
779
780 err = m88e1111_config_init_hwcfg_mode(
781 phydev,
782 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
783 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
784 if (err < 0)
785 return err;
786
787 /* make sure copper is selected */
788 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
789}
790
791static int m88e1111_config_init_rtbi(struct phy_device *phydev)
792{
793 int err;
794
795 err = m88e1111_config_init_rgmii_delays(phydev);
796 if (err < 0)
797 return err;
798
799 err = m88e1111_config_init_hwcfg_mode(
800 phydev,
801 MII_M1111_HWCFG_MODE_RTBI,
802 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
803 if (err < 0)
804 return err;
805
806 /* soft reset */
807 err = genphy_soft_reset(phydev);
808 if (err < 0)
809 return err;
810
811 return m88e1111_config_init_hwcfg_mode(
812 phydev,
813 MII_M1111_HWCFG_MODE_RTBI,
814 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
815}
816
817static int m88e1111_config_init(struct phy_device *phydev)
818{
819 int err;
820
821 if (phy_interface_is_rgmii(phydev)) {
822 err = m88e1111_config_init_rgmii(phydev);
823 if (err < 0)
824 return err;
825 }
826
827 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
828 err = m88e1111_config_init_sgmii(phydev);
829 if (err < 0)
830 return err;
831 }
832
833 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
834 err = m88e1111_config_init_rtbi(phydev);
835 if (err < 0)
836 return err;
837 }
838
839 err = marvell_of_reg_init(phydev);
840 if (err < 0)
841 return err;
842
843 return genphy_soft_reset(phydev);
844}
845
846static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
847{
848 int val, cnt, enable;
849
850 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
851 if (val < 0)
852 return val;
853
854 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
855 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
856
857 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
858
859 return 0;
860}
861
862static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
863{
864 int val;
865
866 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
867 return -E2BIG;
868
869 if (!cnt)
870 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
871 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
872
873 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
874 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
875
876 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
877 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
878 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
879 val);
880}
881
882static int m88e1111_get_tunable(struct phy_device *phydev,
883 struct ethtool_tunable *tuna, void *data)
884{
885 switch (tuna->id) {
886 case ETHTOOL_PHY_DOWNSHIFT:
887 return m88e1111_get_downshift(phydev, data);
888 default:
889 return -EOPNOTSUPP;
890 }
891}
892
893static int m88e1111_set_tunable(struct phy_device *phydev,
894 struct ethtool_tunable *tuna, const void *data)
895{
896 switch (tuna->id) {
897 case ETHTOOL_PHY_DOWNSHIFT:
898 return m88e1111_set_downshift(phydev, *(const u8 *)data);
899 default:
900 return -EOPNOTSUPP;
901 }
902}
903
904static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
905{
906 int val, cnt, enable;
907
908 val = phy_read(phydev, MII_M1011_PHY_SCR);
909 if (val < 0)
910 return val;
911
912 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
913 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
914
915 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
916
917 return 0;
918}
919
920static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
921{
922 int val;
923
924 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
925 return -E2BIG;
926
927 if (!cnt)
928 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
929 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
930
931 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
932 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
933
934 return phy_modify(phydev, MII_M1011_PHY_SCR,
935 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
936 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
937 val);
938}
939
940static int m88e1011_get_tunable(struct phy_device *phydev,
941 struct ethtool_tunable *tuna, void *data)
942{
943 switch (tuna->id) {
944 case ETHTOOL_PHY_DOWNSHIFT:
945 return m88e1011_get_downshift(phydev, data);
946 default:
947 return -EOPNOTSUPP;
948 }
949}
950
951static int m88e1011_set_tunable(struct phy_device *phydev,
952 struct ethtool_tunable *tuna, const void *data)
953{
954 switch (tuna->id) {
955 case ETHTOOL_PHY_DOWNSHIFT:
956 return m88e1011_set_downshift(phydev, *(const u8 *)data);
957 default:
958 return -EOPNOTSUPP;
959 }
960}
961
962static int m88e1116r_config_init(struct phy_device *phydev)
963{
964 int err;
965
966 err = genphy_soft_reset(phydev);
967 if (err < 0)
968 return err;
969
970 msleep(500);
971
972 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
973 if (err < 0)
974 return err;
975
976 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
977 if (err < 0)
978 return err;
979
980 err = m88e1011_set_downshift(phydev, 8);
981 if (err < 0)
982 return err;
983
984 if (phy_interface_is_rgmii(phydev)) {
985 err = m88e1121_config_aneg_rgmii_delays(phydev);
986 if (err < 0)
987 return err;
988 }
989
990 err = genphy_soft_reset(phydev);
991 if (err < 0)
992 return err;
993
994 return marvell_config_init(phydev);
995}
996
997static int m88e1318_config_init(struct phy_device *phydev)
998{
999 if (phy_interrupt_is_valid(phydev)) {
1000 int err = phy_modify_paged(
1001 phydev, MII_MARVELL_LED_PAGE,
1002 MII_88E1318S_PHY_LED_TCR,
1003 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1004 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1005 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1006 if (err < 0)
1007 return err;
1008 }
1009
1010 return marvell_config_init(phydev);
1011}
1012
1013static int m88e1510_config_init(struct phy_device *phydev)
1014{
1015 int err;
1016
1017 /* SGMII-to-Copper mode initialization */
1018 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1019 /* Select page 18 */
1020 err = marvell_set_page(phydev, 18);
1021 if (err < 0)
1022 return err;
1023
1024 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1025 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1026 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1027 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1028 if (err < 0)
1029 return err;
1030
1031 /* PHY reset is necessary after changing MODE[2:0] */
1032 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
1033 MII_88E1510_GEN_CTRL_REG_1_RESET);
1034 if (err < 0)
1035 return err;
1036
1037 /* Reset page selection */
1038 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1039 if (err < 0)
1040 return err;
1041 }
1042
1043 return m88e1318_config_init(phydev);
1044}
1045
1046static int m88e1118_config_aneg(struct phy_device *phydev)
1047{
1048 int err;
1049
1050 err = genphy_soft_reset(phydev);
1051 if (err < 0)
1052 return err;
1053
1054 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1055 if (err < 0)
1056 return err;
1057
1058 err = genphy_config_aneg(phydev);
1059 return 0;
1060}
1061
1062static int m88e1118_config_init(struct phy_device *phydev)
1063{
1064 int err;
1065
1066 /* Change address */
1067 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1068 if (err < 0)
1069 return err;
1070
1071 /* Enable 1000 Mbit */
1072 err = phy_write(phydev, 0x15, 0x1070);
1073 if (err < 0)
1074 return err;
1075
1076 /* Change address */
1077 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1078 if (err < 0)
1079 return err;
1080
1081 /* Adjust LED Control */
1082 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1083 err = phy_write(phydev, 0x10, 0x1100);
1084 else
1085 err = phy_write(phydev, 0x10, 0x021e);
1086 if (err < 0)
1087 return err;
1088
1089 err = marvell_of_reg_init(phydev);
1090 if (err < 0)
1091 return err;
1092
1093 /* Reset address */
1094 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1095 if (err < 0)
1096 return err;
1097
1098 return genphy_soft_reset(phydev);
1099}
1100
1101static int m88e1149_config_init(struct phy_device *phydev)
1102{
1103 int err;
1104
1105 /* Change address */
1106 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1107 if (err < 0)
1108 return err;
1109
1110 /* Enable 1000 Mbit */
1111 err = phy_write(phydev, 0x15, 0x1048);
1112 if (err < 0)
1113 return err;
1114
1115 err = marvell_of_reg_init(phydev);
1116 if (err < 0)
1117 return err;
1118
1119 /* Reset address */
1120 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1121 if (err < 0)
1122 return err;
1123
1124 return genphy_soft_reset(phydev);
1125}
1126
1127static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1128{
1129 int err;
1130
1131 err = m88e1111_config_init_rgmii_delays(phydev);
1132 if (err < 0)
1133 return err;
1134
1135 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1136 err = phy_write(phydev, 0x1d, 0x0012);
1137 if (err < 0)
1138 return err;
1139
1140 err = phy_modify(phydev, 0x1e, 0x0fc0,
1141 2 << 9 | /* 36 ohm */
1142 2 << 6); /* 39 ohm */
1143 if (err < 0)
1144 return err;
1145
1146 err = phy_write(phydev, 0x1d, 0x3);
1147 if (err < 0)
1148 return err;
1149
1150 err = phy_write(phydev, 0x1e, 0x8000);
1151 }
1152 return err;
1153}
1154
1155static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1156{
1157 return m88e1111_config_init_hwcfg_mode(
1158 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1159 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1160}
1161
1162static int m88e1145_config_init(struct phy_device *phydev)
1163{
1164 int err;
1165
1166 /* Take care of errata E0 & E1 */
1167 err = phy_write(phydev, 0x1d, 0x001b);
1168 if (err < 0)
1169 return err;
1170
1171 err = phy_write(phydev, 0x1e, 0x418f);
1172 if (err < 0)
1173 return err;
1174
1175 err = phy_write(phydev, 0x1d, 0x0016);
1176 if (err < 0)
1177 return err;
1178
1179 err = phy_write(phydev, 0x1e, 0xa2da);
1180 if (err < 0)
1181 return err;
1182
1183 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1184 err = m88e1145_config_init_rgmii(phydev);
1185 if (err < 0)
1186 return err;
1187 }
1188
1189 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1190 err = m88e1145_config_init_sgmii(phydev);
1191 if (err < 0)
1192 return err;
1193 }
1194
1195 err = marvell_of_reg_init(phydev);
1196 if (err < 0)
1197 return err;
1198
1199 return 0;
1200}
1201
1202static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1203{
1204 int val;
1205
1206 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1207 if (val < 0)
1208 return val;
1209
1210 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1211 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1212 return 0;
1213 }
1214
1215 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1216
1217 switch (val) {
1218 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1219 *msecs = 0;
1220 break;
1221 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1222 *msecs = 10;
1223 break;
1224 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1225 *msecs = 20;
1226 break;
1227 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1228 *msecs = 40;
1229 break;
1230 default:
1231 return -EINVAL;
1232 }
1233
1234 return 0;
1235}
1236
1237static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1238{
1239 struct ethtool_eee eee;
1240 int val, ret;
1241
1242 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1243 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1244 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1245
1246 /* According to the Marvell data sheet EEE must be disabled for
1247 * Fast Link Down detection to work properly
1248 */
1249 ret = phy_ethtool_get_eee(phydev, &eee);
1250 if (!ret && eee.eee_enabled) {
1251 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1252 return -EBUSY;
1253 }
1254
1255 if (*msecs <= 5)
1256 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1257 else if (*msecs <= 15)
1258 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1259 else if (*msecs <= 30)
1260 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1261 else
1262 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1263
1264 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1265
1266 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1267 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1268 if (ret)
1269 return ret;
1270
1271 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1272 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1273}
1274
1275static int m88e1540_get_tunable(struct phy_device *phydev,
1276 struct ethtool_tunable *tuna, void *data)
1277{
1278 switch (tuna->id) {
1279 case ETHTOOL_PHY_FAST_LINK_DOWN:
1280 return m88e1540_get_fld(phydev, data);
1281 case ETHTOOL_PHY_DOWNSHIFT:
1282 return m88e1011_get_downshift(phydev, data);
1283 default:
1284 return -EOPNOTSUPP;
1285 }
1286}
1287
1288static int m88e1540_set_tunable(struct phy_device *phydev,
1289 struct ethtool_tunable *tuna, const void *data)
1290{
1291 switch (tuna->id) {
1292 case ETHTOOL_PHY_FAST_LINK_DOWN:
1293 return m88e1540_set_fld(phydev, data);
1294 case ETHTOOL_PHY_DOWNSHIFT:
1295 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1296 default:
1297 return -EOPNOTSUPP;
1298 }
1299}
1300
1301/* The VOD can be out of specification on link up. Poke an
1302 * undocumented register, in an undocumented page, with a magic value
1303 * to fix this.
1304 */
1305static int m88e6390_errata(struct phy_device *phydev)
1306{
1307 int err;
1308
1309 err = phy_write(phydev, MII_BMCR,
1310 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1311 if (err)
1312 return err;
1313
1314 usleep_range(300, 400);
1315
1316 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1317 if (err)
1318 return err;
1319
1320 return genphy_soft_reset(phydev);
1321}
1322
1323static int m88e6390_config_aneg(struct phy_device *phydev)
1324{
1325 int err;
1326
1327 err = m88e6390_errata(phydev);
1328 if (err)
1329 return err;
1330
1331 return m88e1510_config_aneg(phydev);
1332}
1333
1334/**
1335 * fiber_lpa_mod_linkmode_lpa_t
1336 * @advertising: the linkmode advertisement settings
1337 * @lpa: value of the MII_LPA register for fiber link
1338 *
1339 * A small helper function that translates MII_LPA bits to linkmode LP
1340 * advertisement settings. Other bits in advertising are left
1341 * unchanged.
1342 */
1343static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1344{
1345 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1346 advertising, lpa & LPA_1000XHALF);
1347
1348 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1349 advertising, lpa & LPA_1000XFULL);
1350}
1351
1352static int marvell_read_status_page_an(struct phy_device *phydev,
1353 int fiber, int status)
1354{
1355 int lpa;
1356 int err;
1357
1358 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1359 phydev->link = 0;
1360 return 0;
1361 }
1362
1363 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1364 phydev->duplex = DUPLEX_FULL;
1365 else
1366 phydev->duplex = DUPLEX_HALF;
1367
1368 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1369 case MII_M1011_PHY_STATUS_1000:
1370 phydev->speed = SPEED_1000;
1371 break;
1372
1373 case MII_M1011_PHY_STATUS_100:
1374 phydev->speed = SPEED_100;
1375 break;
1376
1377 default:
1378 phydev->speed = SPEED_10;
1379 break;
1380 }
1381
1382 if (!fiber) {
1383 err = genphy_read_lpa(phydev);
1384 if (err < 0)
1385 return err;
1386
1387 phy_resolve_aneg_pause(phydev);
1388 } else {
1389 lpa = phy_read(phydev, MII_LPA);
1390 if (lpa < 0)
1391 return lpa;
1392
1393 /* The fiber link is only 1000M capable */
1394 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1395
1396 if (phydev->duplex == DUPLEX_FULL) {
1397 if (!(lpa & LPA_PAUSE_FIBER)) {
1398 phydev->pause = 0;
1399 phydev->asym_pause = 0;
1400 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1401 phydev->pause = 1;
1402 phydev->asym_pause = 1;
1403 } else {
1404 phydev->pause = 1;
1405 phydev->asym_pause = 0;
1406 }
1407 }
1408 }
1409
1410 return 0;
1411}
1412
1413/* marvell_read_status_page
1414 *
1415 * Description:
1416 * Check the link, then figure out the current state
1417 * by comparing what we advertise with what the link partner
1418 * advertises. Start by checking the gigabit possibilities,
1419 * then move on to 10/100.
1420 */
1421static int marvell_read_status_page(struct phy_device *phydev, int page)
1422{
1423 int status;
1424 int fiber;
1425 int err;
1426
1427 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1428 if (status < 0)
1429 return status;
1430
1431 /* Use the generic register for copper link status,
1432 * and the PHY status register for fiber link status.
1433 */
1434 if (page == MII_MARVELL_FIBER_PAGE) {
1435 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1436 } else {
1437 err = genphy_update_link(phydev);
1438 if (err)
1439 return err;
1440 }
1441
1442 if (page == MII_MARVELL_FIBER_PAGE)
1443 fiber = 1;
1444 else
1445 fiber = 0;
1446
1447 linkmode_zero(phydev->lp_advertising);
1448 phydev->pause = 0;
1449 phydev->asym_pause = 0;
1450 phydev->speed = SPEED_UNKNOWN;
1451 phydev->duplex = DUPLEX_UNKNOWN;
1452
1453 if (phydev->autoneg == AUTONEG_ENABLE)
1454 err = marvell_read_status_page_an(phydev, fiber, status);
1455 else
1456 err = genphy_read_status_fixed(phydev);
1457
1458 return err;
1459}
1460
1461/* marvell_read_status
1462 *
1463 * Some Marvell's phys have two modes: fiber and copper.
1464 * Both need status checked.
1465 * Description:
1466 * First, check the fiber link and status.
1467 * If the fiber link is down, check the copper link and status which
1468 * will be the default value if both link are down.
1469 */
1470static int marvell_read_status(struct phy_device *phydev)
1471{
1472 int err;
1473
1474 /* Check the fiber mode first */
1475 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1476 phydev->supported) &&
1477 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1478 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1479 if (err < 0)
1480 goto error;
1481
1482 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1483 if (err < 0)
1484 goto error;
1485
1486 /* If the fiber link is up, it is the selected and
1487 * used link. In this case, we need to stay in the
1488 * fiber page. Please to be careful about that, avoid
1489 * to restore Copper page in other functions which
1490 * could break the behaviour for some fiber phy like
1491 * 88E1512.
1492 */
1493 if (phydev->link)
1494 return 0;
1495
1496 /* If fiber link is down, check and save copper mode state */
1497 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1498 if (err < 0)
1499 goto error;
1500 }
1501
1502 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1503
1504error:
1505 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1506 return err;
1507}
1508
1509/* marvell_suspend
1510 *
1511 * Some Marvell's phys have two modes: fiber and copper.
1512 * Both need to be suspended
1513 */
1514static int marvell_suspend(struct phy_device *phydev)
1515{
1516 int err;
1517
1518 /* Suspend the fiber mode first */
1519 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1520 phydev->supported)) {
1521 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1522 if (err < 0)
1523 goto error;
1524
1525 /* With the page set, use the generic suspend */
1526 err = genphy_suspend(phydev);
1527 if (err < 0)
1528 goto error;
1529
1530 /* Then, the copper link */
1531 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1532 if (err < 0)
1533 goto error;
1534 }
1535
1536 /* With the page set, use the generic suspend */
1537 return genphy_suspend(phydev);
1538
1539error:
1540 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1541 return err;
1542}
1543
1544/* marvell_resume
1545 *
1546 * Some Marvell's phys have two modes: fiber and copper.
1547 * Both need to be resumed
1548 */
1549static int marvell_resume(struct phy_device *phydev)
1550{
1551 int err;
1552
1553 /* Resume the fiber mode first */
1554 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1555 phydev->supported)) {
1556 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1557 if (err < 0)
1558 goto error;
1559
1560 /* With the page set, use the generic resume */
1561 err = genphy_resume(phydev);
1562 if (err < 0)
1563 goto error;
1564
1565 /* Then, the copper link */
1566 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1567 if (err < 0)
1568 goto error;
1569 }
1570
1571 /* With the page set, use the generic resume */
1572 return genphy_resume(phydev);
1573
1574error:
1575 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1576 return err;
1577}
1578
1579static int marvell_aneg_done(struct phy_device *phydev)
1580{
1581 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1582
1583 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1584}
1585
1586static int m88e1121_did_interrupt(struct phy_device *phydev)
1587{
1588 int imask;
1589
1590 imask = phy_read(phydev, MII_M1011_IEVENT);
1591
1592 if (imask & MII_M1011_IMASK_INIT)
1593 return 1;
1594
1595 return 0;
1596}
1597
1598static void m88e1318_get_wol(struct phy_device *phydev,
1599 struct ethtool_wolinfo *wol)
1600{
1601 int oldpage, ret = 0;
1602
1603 wol->supported = WAKE_MAGIC;
1604 wol->wolopts = 0;
1605
1606 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1607 if (oldpage < 0)
1608 goto error;
1609
1610 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1611 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1612 wol->wolopts |= WAKE_MAGIC;
1613
1614error:
1615 phy_restore_page(phydev, oldpage, ret);
1616}
1617
1618static int m88e1318_set_wol(struct phy_device *phydev,
1619 struct ethtool_wolinfo *wol)
1620{
1621 int err = 0, oldpage;
1622
1623 oldpage = phy_save_page(phydev);
1624 if (oldpage < 0)
1625 goto error;
1626
1627 if (wol->wolopts & WAKE_MAGIC) {
1628 /* Explicitly switch to page 0x00, just to be sure */
1629 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1630 if (err < 0)
1631 goto error;
1632
1633 /* If WOL event happened once, the LED[2] interrupt pin
1634 * will not be cleared unless we reading the interrupt status
1635 * register. If interrupts are in use, the normal interrupt
1636 * handling will clear the WOL event. Clear the WOL event
1637 * before enabling it if !phy_interrupt_is_valid()
1638 */
1639 if (!phy_interrupt_is_valid(phydev))
1640 __phy_read(phydev, MII_M1011_IEVENT);
1641
1642 /* Enable the WOL interrupt */
1643 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1644 MII_88E1318S_PHY_CSIER_WOL_EIE);
1645 if (err < 0)
1646 goto error;
1647
1648 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1649 if (err < 0)
1650 goto error;
1651
1652 /* Setup LED[2] as interrupt pin (active low) */
1653 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1654 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1655 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1656 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1657 if (err < 0)
1658 goto error;
1659
1660 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1661 if (err < 0)
1662 goto error;
1663
1664 /* Store the device address for the magic packet */
1665 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1666 ((phydev->attached_dev->dev_addr[5] << 8) |
1667 phydev->attached_dev->dev_addr[4]));
1668 if (err < 0)
1669 goto error;
1670 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1671 ((phydev->attached_dev->dev_addr[3] << 8) |
1672 phydev->attached_dev->dev_addr[2]));
1673 if (err < 0)
1674 goto error;
1675 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1676 ((phydev->attached_dev->dev_addr[1] << 8) |
1677 phydev->attached_dev->dev_addr[0]));
1678 if (err < 0)
1679 goto error;
1680
1681 /* Clear WOL status and enable magic packet matching */
1682 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1683 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1684 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1685 if (err < 0)
1686 goto error;
1687 } else {
1688 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1689 if (err < 0)
1690 goto error;
1691
1692 /* Clear WOL status and disable magic packet matching */
1693 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1694 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1695 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1696 if (err < 0)
1697 goto error;
1698 }
1699
1700error:
1701 return phy_restore_page(phydev, oldpage, err);
1702}
1703
1704static int marvell_get_sset_count(struct phy_device *phydev)
1705{
1706 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1707 phydev->supported))
1708 return ARRAY_SIZE(marvell_hw_stats);
1709 else
1710 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1711}
1712
1713static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1714{
1715 int count = marvell_get_sset_count(phydev);
1716 int i;
1717
1718 for (i = 0; i < count; i++) {
1719 strlcpy(data + i * ETH_GSTRING_LEN,
1720 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1721 }
1722}
1723
1724static u64 marvell_get_stat(struct phy_device *phydev, int i)
1725{
1726 struct marvell_hw_stat stat = marvell_hw_stats[i];
1727 struct marvell_priv *priv = phydev->priv;
1728 int val;
1729 u64 ret;
1730
1731 val = phy_read_paged(phydev, stat.page, stat.reg);
1732 if (val < 0) {
1733 ret = U64_MAX;
1734 } else {
1735 val = val & ((1 << stat.bits) - 1);
1736 priv->stats[i] += val;
1737 ret = priv->stats[i];
1738 }
1739
1740 return ret;
1741}
1742
1743static void marvell_get_stats(struct phy_device *phydev,
1744 struct ethtool_stats *stats, u64 *data)
1745{
1746 int count = marvell_get_sset_count(phydev);
1747 int i;
1748
1749 for (i = 0; i < count; i++)
1750 data[i] = marvell_get_stat(phydev, i);
1751}
1752
1753static int marvell_vct5_wait_complete(struct phy_device *phydev)
1754{
1755 int i;
1756 int val;
1757
1758 for (i = 0; i < 32; i++) {
1759 val = __phy_read(phydev, MII_VCT5_CTRL);
1760 if (val < 0)
1761 return val;
1762
1763 if (val & MII_VCT5_CTRL_COMPLETE)
1764 return 0;
1765 }
1766
1767 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1768 return -ETIMEDOUT;
1769}
1770
1771static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1772{
1773 int amplitude;
1774 int val;
1775 int reg;
1776
1777 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1778 val = __phy_read(phydev, reg);
1779
1780 if (val < 0)
1781 return 0;
1782
1783 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1784 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1785
1786 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1787 amplitude = -amplitude;
1788
1789 return 1000 * amplitude / 128;
1790}
1791
1792static u32 marvell_vct5_distance2cm(int distance)
1793{
1794 return distance * 805 / 10;
1795}
1796
1797static u32 marvell_vct5_cm2distance(int cm)
1798{
1799 return cm * 10 / 805;
1800}
1801
1802static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1803 int distance, int pair)
1804{
1805 u16 reg;
1806 int err;
1807 int mV;
1808 int i;
1809
1810 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1811 distance);
1812 if (err)
1813 return err;
1814
1815 reg = MII_VCT5_CTRL_ENABLE |
1816 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1817 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1818 MII_VCT5_CTRL_SAMPLE_POINT |
1819 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1820 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1821 if (err)
1822 return err;
1823
1824 err = marvell_vct5_wait_complete(phydev);
1825 if (err)
1826 return err;
1827
1828 for (i = 0; i < 4; i++) {
1829 if (pair != PHY_PAIR_ALL && i != pair)
1830 continue;
1831
1832 mV = marvell_vct5_amplitude(phydev, i);
1833 ethnl_cable_test_amplitude(phydev, i, mV);
1834 }
1835
1836 return 0;
1837}
1838
1839static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1840{
1841 struct marvell_priv *priv = phydev->priv;
1842 int distance;
1843 u16 width;
1844 int page;
1845 int err;
1846 u16 reg;
1847
1848 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1849 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1850 else
1851 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1852
1853 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1854 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1855 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1856
1857 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1858 MII_VCT5_TX_PULSE_CTRL, reg);
1859 if (err)
1860 return err;
1861
1862 /* Reading the TDR data is very MDIO heavy. We need to optimize
1863 * access to keep the time to a minimum. So lock the bus once,
1864 * and don't release it until complete. We can then avoid having
1865 * to change the page for every access, greatly speeding things
1866 * up.
1867 */
1868 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
1869 if (page < 0)
1870 goto restore_page;
1871
1872 for (distance = priv->first;
1873 distance <= priv->last;
1874 distance += priv->step) {
1875 err = marvell_vct5_amplitude_distance(phydev, distance,
1876 priv->pair);
1877 if (err)
1878 goto restore_page;
1879
1880 if (distance > TDR_SHORT_CABLE_LENGTH &&
1881 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
1882 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1883 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1884 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1885 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1886 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
1887 if (err)
1888 goto restore_page;
1889 }
1890 }
1891
1892restore_page:
1893 return phy_restore_page(phydev, page, err);
1894}
1895
1896static int marvell_cable_test_start_common(struct phy_device *phydev)
1897{
1898 int bmcr, bmsr, ret;
1899
1900 /* If auto-negotiation is enabled, but not complete, the cable
1901 * test never completes. So disable auto-neg.
1902 */
1903 bmcr = phy_read(phydev, MII_BMCR);
1904 if (bmcr < 0)
1905 return bmcr;
1906
1907 bmsr = phy_read(phydev, MII_BMSR);
1908
1909 if (bmsr < 0)
1910 return bmsr;
1911
1912 if (bmcr & BMCR_ANENABLE) {
1913 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
1914 if (ret < 0)
1915 return ret;
1916 ret = genphy_soft_reset(phydev);
1917 if (ret < 0)
1918 return ret;
1919 }
1920
1921 /* If the link is up, allow it some time to go down */
1922 if (bmsr & BMSR_LSTATUS)
1923 msleep(1500);
1924
1925 return 0;
1926}
1927
1928static int marvell_vct7_cable_test_start(struct phy_device *phydev)
1929{
1930 struct marvell_priv *priv = phydev->priv;
1931 int ret;
1932
1933 ret = marvell_cable_test_start_common(phydev);
1934 if (ret)
1935 return ret;
1936
1937 priv->cable_test_tdr = false;
1938
1939 /* Reset the VCT5 API control to defaults, otherwise
1940 * VCT7 does not work correctly.
1941 */
1942 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1943 MII_VCT5_CTRL,
1944 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1945 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1946 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
1947 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
1948 if (ret)
1949 return ret;
1950
1951 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1952 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
1953 if (ret)
1954 return ret;
1955
1956 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
1957 MII_VCT7_CTRL,
1958 MII_VCT7_CTRL_RUN_NOW |
1959 MII_VCT7_CTRL_CENTIMETERS);
1960}
1961
1962static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
1963 const struct phy_tdr_config *cfg)
1964{
1965 struct marvell_priv *priv = phydev->priv;
1966 int ret;
1967
1968 priv->cable_test_tdr = true;
1969 priv->first = marvell_vct5_cm2distance(cfg->first);
1970 priv->last = marvell_vct5_cm2distance(cfg->last);
1971 priv->step = marvell_vct5_cm2distance(cfg->step);
1972 priv->pair = cfg->pair;
1973
1974 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
1975 return -EINVAL;
1976
1977 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
1978 return -EINVAL;
1979
1980 /* Disable VCT7 */
1981 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
1982 MII_VCT7_CTRL, 0);
1983 if (ret)
1984 return ret;
1985
1986 ret = marvell_cable_test_start_common(phydev);
1987 if (ret)
1988 return ret;
1989
1990 ret = ethnl_cable_test_pulse(phydev, 1000);
1991 if (ret)
1992 return ret;
1993
1994 return ethnl_cable_test_step(phydev,
1995 marvell_vct5_distance2cm(priv->first),
1996 marvell_vct5_distance2cm(priv->last),
1997 marvell_vct5_distance2cm(priv->step));
1998}
1999
2000static int marvell_vct7_distance_to_length(int distance, bool meter)
2001{
2002 if (meter)
2003 distance *= 100;
2004
2005 return distance;
2006}
2007
2008static bool marvell_vct7_distance_valid(int result)
2009{
2010 switch (result) {
2011 case MII_VCT7_RESULTS_OPEN:
2012 case MII_VCT7_RESULTS_SAME_SHORT:
2013 case MII_VCT7_RESULTS_CROSS_SHORT:
2014 return true;
2015 }
2016 return false;
2017}
2018
2019static int marvell_vct7_report_length(struct phy_device *phydev,
2020 int pair, bool meter)
2021{
2022 int length;
2023 int ret;
2024
2025 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2026 MII_VCT7_PAIR_0_DISTANCE + pair);
2027 if (ret < 0)
2028 return ret;
2029
2030 length = marvell_vct7_distance_to_length(ret, meter);
2031
2032 ethnl_cable_test_fault_length(phydev, pair, length);
2033
2034 return 0;
2035}
2036
2037static int marvell_vct7_cable_test_report_trans(int result)
2038{
2039 switch (result) {
2040 case MII_VCT7_RESULTS_OK:
2041 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2042 case MII_VCT7_RESULTS_OPEN:
2043 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2044 case MII_VCT7_RESULTS_SAME_SHORT:
2045 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2046 case MII_VCT7_RESULTS_CROSS_SHORT:
2047 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2048 default:
2049 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2050 }
2051}
2052
2053static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2054{
2055 int pair0, pair1, pair2, pair3;
2056 bool meter;
2057 int ret;
2058
2059 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2060 MII_VCT7_RESULTS);
2061 if (ret < 0)
2062 return ret;
2063
2064 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2065 MII_VCT7_RESULTS_PAIR3_SHIFT;
2066 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2067 MII_VCT7_RESULTS_PAIR2_SHIFT;
2068 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2069 MII_VCT7_RESULTS_PAIR1_SHIFT;
2070 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2071 MII_VCT7_RESULTS_PAIR0_SHIFT;
2072
2073 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2074 marvell_vct7_cable_test_report_trans(pair0));
2075 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2076 marvell_vct7_cable_test_report_trans(pair1));
2077 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2078 marvell_vct7_cable_test_report_trans(pair2));
2079 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2080 marvell_vct7_cable_test_report_trans(pair3));
2081
2082 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2083 if (ret < 0)
2084 return ret;
2085
2086 meter = ret & MII_VCT7_CTRL_METERS;
2087
2088 if (marvell_vct7_distance_valid(pair0))
2089 marvell_vct7_report_length(phydev, 0, meter);
2090 if (marvell_vct7_distance_valid(pair1))
2091 marvell_vct7_report_length(phydev, 1, meter);
2092 if (marvell_vct7_distance_valid(pair2))
2093 marvell_vct7_report_length(phydev, 2, meter);
2094 if (marvell_vct7_distance_valid(pair3))
2095 marvell_vct7_report_length(phydev, 3, meter);
2096
2097 return 0;
2098}
2099
2100static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2101 bool *finished)
2102{
2103 struct marvell_priv *priv = phydev->priv;
2104 int ret;
2105
2106 if (priv->cable_test_tdr) {
2107 ret = marvell_vct5_amplitude_graph(phydev);
2108 *finished = true;
2109 return ret;
2110 }
2111
2112 *finished = false;
2113
2114 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2115 MII_VCT7_CTRL);
2116
2117 if (ret < 0)
2118 return ret;
2119
2120 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2121 *finished = true;
2122
2123 return marvell_vct7_cable_test_report(phydev);
2124 }
2125
2126 return 0;
2127}
2128
2129#ifdef CONFIG_HWMON
2130static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2131{
2132 int oldpage;
2133 int ret = 0;
2134 int val;
2135
2136 *temp = 0;
2137
2138 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2139 if (oldpage < 0)
2140 goto error;
2141
2142 /* Enable temperature sensor */
2143 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2144 if (ret < 0)
2145 goto error;
2146
2147 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2148 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2149 if (ret < 0)
2150 goto error;
2151
2152 /* Wait for temperature to stabilize */
2153 usleep_range(10000, 12000);
2154
2155 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2156 if (val < 0) {
2157 ret = val;
2158 goto error;
2159 }
2160
2161 /* Disable temperature sensor */
2162 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2163 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2164 if (ret < 0)
2165 goto error;
2166
2167 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2168
2169error:
2170 return phy_restore_page(phydev, oldpage, ret);
2171}
2172
2173static int m88e1121_hwmon_read(struct device *dev,
2174 enum hwmon_sensor_types type,
2175 u32 attr, int channel, long *temp)
2176{
2177 struct phy_device *phydev = dev_get_drvdata(dev);
2178 int err;
2179
2180 switch (attr) {
2181 case hwmon_temp_input:
2182 err = m88e1121_get_temp(phydev, temp);
2183 break;
2184 default:
2185 return -EOPNOTSUPP;
2186 }
2187
2188 return err;
2189}
2190
2191static umode_t m88e1121_hwmon_is_visible(const void *data,
2192 enum hwmon_sensor_types type,
2193 u32 attr, int channel)
2194{
2195 if (type != hwmon_temp)
2196 return 0;
2197
2198 switch (attr) {
2199 case hwmon_temp_input:
2200 return 0444;
2201 default:
2202 return 0;
2203 }
2204}
2205
2206static u32 m88e1121_hwmon_chip_config[] = {
2207 HWMON_C_REGISTER_TZ,
2208 0
2209};
2210
2211static const struct hwmon_channel_info m88e1121_hwmon_chip = {
2212 .type = hwmon_chip,
2213 .config = m88e1121_hwmon_chip_config,
2214};
2215
2216static u32 m88e1121_hwmon_temp_config[] = {
2217 HWMON_T_INPUT,
2218 0
2219};
2220
2221static const struct hwmon_channel_info m88e1121_hwmon_temp = {
2222 .type = hwmon_temp,
2223 .config = m88e1121_hwmon_temp_config,
2224};
2225
2226static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
2227 &m88e1121_hwmon_chip,
2228 &m88e1121_hwmon_temp,
2229 NULL
2230};
2231
2232static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
2233 .is_visible = m88e1121_hwmon_is_visible,
2234 .read = m88e1121_hwmon_read,
2235};
2236
2237static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
2238 .ops = &m88e1121_hwmon_hwmon_ops,
2239 .info = m88e1121_hwmon_info,
2240};
2241
2242static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2243{
2244 int ret;
2245
2246 *temp = 0;
2247
2248 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2249 MII_88E1510_TEMP_SENSOR);
2250 if (ret < 0)
2251 return ret;
2252
2253 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2254
2255 return 0;
2256}
2257
2258static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2259{
2260 int ret;
2261
2262 *temp = 0;
2263
2264 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2265 MII_88E1121_MISC_TEST);
2266 if (ret < 0)
2267 return ret;
2268
2269 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2270 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2271 /* convert to mC */
2272 *temp *= 1000;
2273
2274 return 0;
2275}
2276
2277static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2278{
2279 temp = temp / 1000;
2280 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2281
2282 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2283 MII_88E1121_MISC_TEST,
2284 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2285 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2286}
2287
2288static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2289{
2290 int ret;
2291
2292 *alarm = false;
2293
2294 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2295 MII_88E1121_MISC_TEST);
2296 if (ret < 0)
2297 return ret;
2298
2299 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2300
2301 return 0;
2302}
2303
2304static int m88e1510_hwmon_read(struct device *dev,
2305 enum hwmon_sensor_types type,
2306 u32 attr, int channel, long *temp)
2307{
2308 struct phy_device *phydev = dev_get_drvdata(dev);
2309 int err;
2310
2311 switch (attr) {
2312 case hwmon_temp_input:
2313 err = m88e1510_get_temp(phydev, temp);
2314 break;
2315 case hwmon_temp_crit:
2316 err = m88e1510_get_temp_critical(phydev, temp);
2317 break;
2318 case hwmon_temp_max_alarm:
2319 err = m88e1510_get_temp_alarm(phydev, temp);
2320 break;
2321 default:
2322 return -EOPNOTSUPP;
2323 }
2324
2325 return err;
2326}
2327
2328static int m88e1510_hwmon_write(struct device *dev,
2329 enum hwmon_sensor_types type,
2330 u32 attr, int channel, long temp)
2331{
2332 struct phy_device *phydev = dev_get_drvdata(dev);
2333 int err;
2334
2335 switch (attr) {
2336 case hwmon_temp_crit:
2337 err = m88e1510_set_temp_critical(phydev, temp);
2338 break;
2339 default:
2340 return -EOPNOTSUPP;
2341 }
2342 return err;
2343}
2344
2345static umode_t m88e1510_hwmon_is_visible(const void *data,
2346 enum hwmon_sensor_types type,
2347 u32 attr, int channel)
2348{
2349 if (type != hwmon_temp)
2350 return 0;
2351
2352 switch (attr) {
2353 case hwmon_temp_input:
2354 case hwmon_temp_max_alarm:
2355 return 0444;
2356 case hwmon_temp_crit:
2357 return 0644;
2358 default:
2359 return 0;
2360 }
2361}
2362
2363static u32 m88e1510_hwmon_temp_config[] = {
2364 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2365 0
2366};
2367
2368static const struct hwmon_channel_info m88e1510_hwmon_temp = {
2369 .type = hwmon_temp,
2370 .config = m88e1510_hwmon_temp_config,
2371};
2372
2373static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
2374 &m88e1121_hwmon_chip,
2375 &m88e1510_hwmon_temp,
2376 NULL
2377};
2378
2379static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
2380 .is_visible = m88e1510_hwmon_is_visible,
2381 .read = m88e1510_hwmon_read,
2382 .write = m88e1510_hwmon_write,
2383};
2384
2385static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
2386 .ops = &m88e1510_hwmon_hwmon_ops,
2387 .info = m88e1510_hwmon_info,
2388};
2389
2390static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2391{
2392 int sum = 0;
2393 int oldpage;
2394 int ret = 0;
2395 int i;
2396
2397 *temp = 0;
2398
2399 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2400 if (oldpage < 0)
2401 goto error;
2402
2403 /* Enable temperature sensor */
2404 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2405 if (ret < 0)
2406 goto error;
2407
2408 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2409 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
2410 MII_88E6390_MISC_TEST_SAMPLE_1S;
2411
2412 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2413 if (ret < 0)
2414 goto error;
2415
2416 /* Wait for temperature to stabilize */
2417 usleep_range(10000, 12000);
2418
2419 /* Reading the temperature sense has an errata. You need to read
2420 * a number of times and take an average.
2421 */
2422 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2423 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2424 if (ret < 0)
2425 goto error;
2426 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2427 }
2428
2429 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2430 *temp = (sum - 75) * 1000;
2431
2432 /* Disable temperature sensor */
2433 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2434 if (ret < 0)
2435 goto error;
2436
2437 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2438 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
2439
2440 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2441
2442error:
2443 phy_restore_page(phydev, oldpage, ret);
2444
2445 return ret;
2446}
2447
2448static int m88e6390_hwmon_read(struct device *dev,
2449 enum hwmon_sensor_types type,
2450 u32 attr, int channel, long *temp)
2451{
2452 struct phy_device *phydev = dev_get_drvdata(dev);
2453 int err;
2454
2455 switch (attr) {
2456 case hwmon_temp_input:
2457 err = m88e6390_get_temp(phydev, temp);
2458 break;
2459 default:
2460 return -EOPNOTSUPP;
2461 }
2462
2463 return err;
2464}
2465
2466static umode_t m88e6390_hwmon_is_visible(const void *data,
2467 enum hwmon_sensor_types type,
2468 u32 attr, int channel)
2469{
2470 if (type != hwmon_temp)
2471 return 0;
2472
2473 switch (attr) {
2474 case hwmon_temp_input:
2475 return 0444;
2476 default:
2477 return 0;
2478 }
2479}
2480
2481static u32 m88e6390_hwmon_temp_config[] = {
2482 HWMON_T_INPUT,
2483 0
2484};
2485
2486static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2487 .type = hwmon_temp,
2488 .config = m88e6390_hwmon_temp_config,
2489};
2490
2491static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2492 &m88e1121_hwmon_chip,
2493 &m88e6390_hwmon_temp,
2494 NULL
2495};
2496
2497static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2498 .is_visible = m88e6390_hwmon_is_visible,
2499 .read = m88e6390_hwmon_read,
2500};
2501
2502static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2503 .ops = &m88e6390_hwmon_hwmon_ops,
2504 .info = m88e6390_hwmon_info,
2505};
2506
2507static int marvell_hwmon_name(struct phy_device *phydev)
2508{
2509 struct marvell_priv *priv = phydev->priv;
2510 struct device *dev = &phydev->mdio.dev;
2511 const char *devname = dev_name(dev);
2512 size_t len = strlen(devname);
2513 int i, j;
2514
2515 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2516 if (!priv->hwmon_name)
2517 return -ENOMEM;
2518
2519 for (i = j = 0; i < len && devname[i]; i++) {
2520 if (isalnum(devname[i]))
2521 priv->hwmon_name[j++] = devname[i];
2522 }
2523
2524 return 0;
2525}
2526
2527static int marvell_hwmon_probe(struct phy_device *phydev,
2528 const struct hwmon_chip_info *chip)
2529{
2530 struct marvell_priv *priv = phydev->priv;
2531 struct device *dev = &phydev->mdio.dev;
2532 int err;
2533
2534 err = marvell_hwmon_name(phydev);
2535 if (err)
2536 return err;
2537
2538 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2539 dev, priv->hwmon_name, phydev, chip, NULL);
2540
2541 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2542}
2543
2544static int m88e1121_hwmon_probe(struct phy_device *phydev)
2545{
2546 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2547}
2548
2549static int m88e1510_hwmon_probe(struct phy_device *phydev)
2550{
2551 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2552}
2553
2554static int m88e6390_hwmon_probe(struct phy_device *phydev)
2555{
2556 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2557}
2558#else
2559static int m88e1121_hwmon_probe(struct phy_device *phydev)
2560{
2561 return 0;
2562}
2563
2564static int m88e1510_hwmon_probe(struct phy_device *phydev)
2565{
2566 return 0;
2567}
2568
2569static int m88e6390_hwmon_probe(struct phy_device *phydev)
2570{
2571 return 0;
2572}
2573#endif
2574
2575static int marvell_probe(struct phy_device *phydev)
2576{
2577 struct marvell_priv *priv;
2578
2579 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2580 if (!priv)
2581 return -ENOMEM;
2582
2583 phydev->priv = priv;
2584
2585 return 0;
2586}
2587
2588static int m88e1121_probe(struct phy_device *phydev)
2589{
2590 int err;
2591
2592 err = marvell_probe(phydev);
2593 if (err)
2594 return err;
2595
2596 return m88e1121_hwmon_probe(phydev);
2597}
2598
2599static int m88e1510_probe(struct phy_device *phydev)
2600{
2601 int err;
2602
2603 err = marvell_probe(phydev);
2604 if (err)
2605 return err;
2606
2607 return m88e1510_hwmon_probe(phydev);
2608}
2609
2610static int m88e6390_probe(struct phy_device *phydev)
2611{
2612 int err;
2613
2614 err = marvell_probe(phydev);
2615 if (err)
2616 return err;
2617
2618 return m88e6390_hwmon_probe(phydev);
2619}
2620
2621static struct phy_driver marvell_drivers[] = {
2622 {
2623 .phy_id = MARVELL_PHY_ID_88E1101,
2624 .phy_id_mask = MARVELL_PHY_ID_MASK,
2625 .name = "Marvell 88E1101",
2626 /* PHY_GBIT_FEATURES */
2627 .probe = marvell_probe,
2628 .config_init = marvell_config_init,
2629 .config_aneg = m88e1101_config_aneg,
2630 .ack_interrupt = marvell_ack_interrupt,
2631 .config_intr = marvell_config_intr,
2632 .resume = genphy_resume,
2633 .suspend = genphy_suspend,
2634 .read_page = marvell_read_page,
2635 .write_page = marvell_write_page,
2636 .get_sset_count = marvell_get_sset_count,
2637 .get_strings = marvell_get_strings,
2638 .get_stats = marvell_get_stats,
2639 },
2640 {
2641 .phy_id = MARVELL_PHY_ID_88E1112,
2642 .phy_id_mask = MARVELL_PHY_ID_MASK,
2643 .name = "Marvell 88E1112",
2644 /* PHY_GBIT_FEATURES */
2645 .probe = marvell_probe,
2646 .config_init = m88e1111_config_init,
2647 .config_aneg = marvell_config_aneg,
2648 .ack_interrupt = marvell_ack_interrupt,
2649 .config_intr = marvell_config_intr,
2650 .resume = genphy_resume,
2651 .suspend = genphy_suspend,
2652 .read_page = marvell_read_page,
2653 .write_page = marvell_write_page,
2654 .get_sset_count = marvell_get_sset_count,
2655 .get_strings = marvell_get_strings,
2656 .get_stats = marvell_get_stats,
2657 .get_tunable = m88e1011_get_tunable,
2658 .set_tunable = m88e1011_set_tunable,
2659 },
2660 {
2661 .phy_id = MARVELL_PHY_ID_88E1111,
2662 .phy_id_mask = MARVELL_PHY_ID_MASK,
2663 .name = "Marvell 88E1111",
2664 /* PHY_GBIT_FEATURES */
2665 .probe = marvell_probe,
2666 .config_init = m88e1111_config_init,
2667 .config_aneg = marvell_config_aneg,
2668 .read_status = marvell_read_status,
2669 .ack_interrupt = marvell_ack_interrupt,
2670 .config_intr = marvell_config_intr,
2671 .resume = genphy_resume,
2672 .suspend = genphy_suspend,
2673 .read_page = marvell_read_page,
2674 .write_page = marvell_write_page,
2675 .get_sset_count = marvell_get_sset_count,
2676 .get_strings = marvell_get_strings,
2677 .get_stats = marvell_get_stats,
2678 .get_tunable = m88e1111_get_tunable,
2679 .set_tunable = m88e1111_set_tunable,
2680 },
2681 {
2682 .phy_id = MARVELL_PHY_ID_88E1118,
2683 .phy_id_mask = MARVELL_PHY_ID_MASK,
2684 .name = "Marvell 88E1118",
2685 /* PHY_GBIT_FEATURES */
2686 .probe = marvell_probe,
2687 .config_init = m88e1118_config_init,
2688 .config_aneg = m88e1118_config_aneg,
2689 .ack_interrupt = marvell_ack_interrupt,
2690 .config_intr = marvell_config_intr,
2691 .resume = genphy_resume,
2692 .suspend = genphy_suspend,
2693 .read_page = marvell_read_page,
2694 .write_page = marvell_write_page,
2695 .get_sset_count = marvell_get_sset_count,
2696 .get_strings = marvell_get_strings,
2697 .get_stats = marvell_get_stats,
2698 },
2699 {
2700 .phy_id = MARVELL_PHY_ID_88E1121R,
2701 .phy_id_mask = MARVELL_PHY_ID_MASK,
2702 .name = "Marvell 88E1121R",
2703 /* PHY_GBIT_FEATURES */
2704 .probe = m88e1121_probe,
2705 .config_init = marvell_config_init,
2706 .config_aneg = m88e1121_config_aneg,
2707 .read_status = marvell_read_status,
2708 .ack_interrupt = marvell_ack_interrupt,
2709 .config_intr = marvell_config_intr,
2710 .did_interrupt = m88e1121_did_interrupt,
2711 .resume = genphy_resume,
2712 .suspend = genphy_suspend,
2713 .read_page = marvell_read_page,
2714 .write_page = marvell_write_page,
2715 .get_sset_count = marvell_get_sset_count,
2716 .get_strings = marvell_get_strings,
2717 .get_stats = marvell_get_stats,
2718 .get_tunable = m88e1011_get_tunable,
2719 .set_tunable = m88e1011_set_tunable,
2720 },
2721 {
2722 .phy_id = MARVELL_PHY_ID_88E1318S,
2723 .phy_id_mask = MARVELL_PHY_ID_MASK,
2724 .name = "Marvell 88E1318S",
2725 /* PHY_GBIT_FEATURES */
2726 .probe = marvell_probe,
2727 .config_init = m88e1318_config_init,
2728 .config_aneg = m88e1318_config_aneg,
2729 .read_status = marvell_read_status,
2730 .ack_interrupt = marvell_ack_interrupt,
2731 .config_intr = marvell_config_intr,
2732 .did_interrupt = m88e1121_did_interrupt,
2733 .get_wol = m88e1318_get_wol,
2734 .set_wol = m88e1318_set_wol,
2735 .resume = genphy_resume,
2736 .suspend = genphy_suspend,
2737 .read_page = marvell_read_page,
2738 .write_page = marvell_write_page,
2739 .get_sset_count = marvell_get_sset_count,
2740 .get_strings = marvell_get_strings,
2741 .get_stats = marvell_get_stats,
2742 },
2743 {
2744 .phy_id = MARVELL_PHY_ID_88E1145,
2745 .phy_id_mask = MARVELL_PHY_ID_MASK,
2746 .name = "Marvell 88E1145",
2747 /* PHY_GBIT_FEATURES */
2748 .probe = marvell_probe,
2749 .config_init = m88e1145_config_init,
2750 .config_aneg = m88e1101_config_aneg,
2751 .read_status = genphy_read_status,
2752 .ack_interrupt = marvell_ack_interrupt,
2753 .config_intr = marvell_config_intr,
2754 .resume = genphy_resume,
2755 .suspend = genphy_suspend,
2756 .read_page = marvell_read_page,
2757 .write_page = marvell_write_page,
2758 .get_sset_count = marvell_get_sset_count,
2759 .get_strings = marvell_get_strings,
2760 .get_stats = marvell_get_stats,
2761 .get_tunable = m88e1111_get_tunable,
2762 .set_tunable = m88e1111_set_tunable,
2763 },
2764 {
2765 .phy_id = MARVELL_PHY_ID_88E1149R,
2766 .phy_id_mask = MARVELL_PHY_ID_MASK,
2767 .name = "Marvell 88E1149R",
2768 /* PHY_GBIT_FEATURES */
2769 .probe = marvell_probe,
2770 .config_init = m88e1149_config_init,
2771 .config_aneg = m88e1118_config_aneg,
2772 .ack_interrupt = marvell_ack_interrupt,
2773 .config_intr = marvell_config_intr,
2774 .resume = genphy_resume,
2775 .suspend = genphy_suspend,
2776 .read_page = marvell_read_page,
2777 .write_page = marvell_write_page,
2778 .get_sset_count = marvell_get_sset_count,
2779 .get_strings = marvell_get_strings,
2780 .get_stats = marvell_get_stats,
2781 },
2782 {
2783 .phy_id = MARVELL_PHY_ID_88E1240,
2784 .phy_id_mask = MARVELL_PHY_ID_MASK,
2785 .name = "Marvell 88E1240",
2786 /* PHY_GBIT_FEATURES */
2787 .probe = marvell_probe,
2788 .config_init = m88e1111_config_init,
2789 .config_aneg = marvell_config_aneg,
2790 .ack_interrupt = marvell_ack_interrupt,
2791 .config_intr = marvell_config_intr,
2792 .resume = genphy_resume,
2793 .suspend = genphy_suspend,
2794 .read_page = marvell_read_page,
2795 .write_page = marvell_write_page,
2796 .get_sset_count = marvell_get_sset_count,
2797 .get_strings = marvell_get_strings,
2798 .get_stats = marvell_get_stats,
2799 },
2800 {
2801 .phy_id = MARVELL_PHY_ID_88E1116R,
2802 .phy_id_mask = MARVELL_PHY_ID_MASK,
2803 .name = "Marvell 88E1116R",
2804 /* PHY_GBIT_FEATURES */
2805 .probe = marvell_probe,
2806 .config_init = m88e1116r_config_init,
2807 .ack_interrupt = marvell_ack_interrupt,
2808 .config_intr = marvell_config_intr,
2809 .resume = genphy_resume,
2810 .suspend = genphy_suspend,
2811 .read_page = marvell_read_page,
2812 .write_page = marvell_write_page,
2813 .get_sset_count = marvell_get_sset_count,
2814 .get_strings = marvell_get_strings,
2815 .get_stats = marvell_get_stats,
2816 .get_tunable = m88e1011_get_tunable,
2817 .set_tunable = m88e1011_set_tunable,
2818 },
2819 {
2820 .phy_id = MARVELL_PHY_ID_88E1510,
2821 .phy_id_mask = MARVELL_PHY_ID_MASK,
2822 .name = "Marvell 88E1510",
2823 .features = PHY_GBIT_FIBRE_FEATURES,
2824 .flags = PHY_POLL_CABLE_TEST,
2825 .probe = m88e1510_probe,
2826 .config_init = m88e1510_config_init,
2827 .config_aneg = m88e1510_config_aneg,
2828 .read_status = marvell_read_status,
2829 .ack_interrupt = marvell_ack_interrupt,
2830 .config_intr = marvell_config_intr,
2831 .did_interrupt = m88e1121_did_interrupt,
2832 .get_wol = m88e1318_get_wol,
2833 .set_wol = m88e1318_set_wol,
2834 .resume = marvell_resume,
2835 .suspend = marvell_suspend,
2836 .read_page = marvell_read_page,
2837 .write_page = marvell_write_page,
2838 .get_sset_count = marvell_get_sset_count,
2839 .get_strings = marvell_get_strings,
2840 .get_stats = marvell_get_stats,
2841 .set_loopback = genphy_loopback,
2842 .get_tunable = m88e1011_get_tunable,
2843 .set_tunable = m88e1011_set_tunable,
2844 .cable_test_start = marvell_vct7_cable_test_start,
2845 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2846 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2847 },
2848 {
2849 .phy_id = MARVELL_PHY_ID_88E1540,
2850 .phy_id_mask = MARVELL_PHY_ID_MASK,
2851 .name = "Marvell 88E1540",
2852 /* PHY_GBIT_FEATURES */
2853 .flags = PHY_POLL_CABLE_TEST,
2854 .probe = m88e1510_probe,
2855 .config_init = marvell_config_init,
2856 .config_aneg = m88e1510_config_aneg,
2857 .read_status = marvell_read_status,
2858 .ack_interrupt = marvell_ack_interrupt,
2859 .config_intr = marvell_config_intr,
2860 .did_interrupt = m88e1121_did_interrupt,
2861 .resume = genphy_resume,
2862 .suspend = genphy_suspend,
2863 .read_page = marvell_read_page,
2864 .write_page = marvell_write_page,
2865 .get_sset_count = marvell_get_sset_count,
2866 .get_strings = marvell_get_strings,
2867 .get_stats = marvell_get_stats,
2868 .get_tunable = m88e1540_get_tunable,
2869 .set_tunable = m88e1540_set_tunable,
2870 .cable_test_start = marvell_vct7_cable_test_start,
2871 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2872 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2873 },
2874 {
2875 .phy_id = MARVELL_PHY_ID_88E1545,
2876 .phy_id_mask = MARVELL_PHY_ID_MASK,
2877 .name = "Marvell 88E1545",
2878 .probe = m88e1510_probe,
2879 /* PHY_GBIT_FEATURES */
2880 .flags = PHY_POLL_CABLE_TEST,
2881 .config_init = marvell_config_init,
2882 .config_aneg = m88e1510_config_aneg,
2883 .read_status = marvell_read_status,
2884 .ack_interrupt = marvell_ack_interrupt,
2885 .config_intr = marvell_config_intr,
2886 .did_interrupt = m88e1121_did_interrupt,
2887 .resume = genphy_resume,
2888 .suspend = genphy_suspend,
2889 .read_page = marvell_read_page,
2890 .write_page = marvell_write_page,
2891 .get_sset_count = marvell_get_sset_count,
2892 .get_strings = marvell_get_strings,
2893 .get_stats = marvell_get_stats,
2894 .get_tunable = m88e1540_get_tunable,
2895 .set_tunable = m88e1540_set_tunable,
2896 .cable_test_start = marvell_vct7_cable_test_start,
2897 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2898 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2899 },
2900 {
2901 .phy_id = MARVELL_PHY_ID_88E3016,
2902 .phy_id_mask = MARVELL_PHY_ID_MASK,
2903 .name = "Marvell 88E3016",
2904 /* PHY_BASIC_FEATURES */
2905 .probe = marvell_probe,
2906 .config_init = m88e3016_config_init,
2907 .aneg_done = marvell_aneg_done,
2908 .read_status = marvell_read_status,
2909 .ack_interrupt = marvell_ack_interrupt,
2910 .config_intr = marvell_config_intr,
2911 .did_interrupt = m88e1121_did_interrupt,
2912 .resume = genphy_resume,
2913 .suspend = genphy_suspend,
2914 .read_page = marvell_read_page,
2915 .write_page = marvell_write_page,
2916 .get_sset_count = marvell_get_sset_count,
2917 .get_strings = marvell_get_strings,
2918 .get_stats = marvell_get_stats,
2919 },
2920 {
2921 .phy_id = MARVELL_PHY_ID_88E6390,
2922 .phy_id_mask = MARVELL_PHY_ID_MASK,
2923 .name = "Marvell 88E6390",
2924 /* PHY_GBIT_FEATURES */
2925 .flags = PHY_POLL_CABLE_TEST,
2926 .probe = m88e6390_probe,
2927 .config_init = marvell_config_init,
2928 .config_aneg = m88e6390_config_aneg,
2929 .read_status = marvell_read_status,
2930 .ack_interrupt = marvell_ack_interrupt,
2931 .config_intr = marvell_config_intr,
2932 .did_interrupt = m88e1121_did_interrupt,
2933 .resume = genphy_resume,
2934 .suspend = genphy_suspend,
2935 .read_page = marvell_read_page,
2936 .write_page = marvell_write_page,
2937 .get_sset_count = marvell_get_sset_count,
2938 .get_strings = marvell_get_strings,
2939 .get_stats = marvell_get_stats,
2940 .get_tunable = m88e1540_get_tunable,
2941 .set_tunable = m88e1540_set_tunable,
2942 .cable_test_start = marvell_vct7_cable_test_start,
2943 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2944 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2945 },
2946 {
2947 .phy_id = MARVELL_PHY_ID_88E1340S,
2948 .phy_id_mask = MARVELL_PHY_ID_MASK,
2949 .name = "Marvell 88E1340S",
2950 .probe = m88e1510_probe,
2951 /* PHY_GBIT_FEATURES */
2952 .config_init = marvell_config_init,
2953 .config_aneg = m88e1510_config_aneg,
2954 .read_status = marvell_read_status,
2955 .ack_interrupt = marvell_ack_interrupt,
2956 .config_intr = marvell_config_intr,
2957 .did_interrupt = m88e1121_did_interrupt,
2958 .resume = genphy_resume,
2959 .suspend = genphy_suspend,
2960 .read_page = marvell_read_page,
2961 .write_page = marvell_write_page,
2962 .get_sset_count = marvell_get_sset_count,
2963 .get_strings = marvell_get_strings,
2964 .get_stats = marvell_get_stats,
2965 .get_tunable = m88e1540_get_tunable,
2966 .set_tunable = m88e1540_set_tunable,
2967 },
2968 {
2969 .phy_id = MARVELL_PHY_ID_88E1548P,
2970 .phy_id_mask = MARVELL_PHY_ID_MASK,
2971 .name = "Marvell 88E1548P",
2972 .probe = m88e1510_probe,
2973 .features = PHY_GBIT_FIBRE_FEATURES,
2974 .config_init = marvell_config_init,
2975 .config_aneg = m88e1510_config_aneg,
2976 .read_status = marvell_read_status,
2977 .ack_interrupt = marvell_ack_interrupt,
2978 .config_intr = marvell_config_intr,
2979 .did_interrupt = m88e1121_did_interrupt,
2980 .resume = genphy_resume,
2981 .suspend = genphy_suspend,
2982 .read_page = marvell_read_page,
2983 .write_page = marvell_write_page,
2984 .get_sset_count = marvell_get_sset_count,
2985 .get_strings = marvell_get_strings,
2986 .get_stats = marvell_get_stats,
2987 .get_tunable = m88e1540_get_tunable,
2988 .set_tunable = m88e1540_set_tunable,
2989 },
2990};
2991
2992module_phy_driver(marvell_drivers);
2993
2994static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2995 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2996 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2997 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2998 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2999 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3000 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3001 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3002 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3003 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3004 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3005 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3006 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3007 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3008 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3009 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
3010 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3011 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3012 { }
3013};
3014
3015MODULE_DEVICE_TABLE(mdio, marvell_tbl);