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1/*
2 * Copyright (c) 2015 MediaTek Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef MTK_DRM_DDP_COMP_H
15#define MTK_DRM_DDP_COMP_H
16
17#include <linux/io.h>
18
19struct device;
20struct device_node;
21struct drm_crtc;
22struct drm_device;
23struct mtk_plane_state;
24struct drm_crtc_state;
25
26enum mtk_ddp_comp_type {
27 MTK_DISP_OVL,
28 MTK_DISP_RDMA,
29 MTK_DISP_WDMA,
30 MTK_DISP_COLOR,
31 MTK_DISP_AAL,
32 MTK_DISP_GAMMA,
33 MTK_DISP_UFOE,
34 MTK_DSI,
35 MTK_DPI,
36 MTK_DISP_PWM,
37 MTK_DISP_MUTEX,
38 MTK_DISP_OD,
39 MTK_DISP_BLS,
40 MTK_DDP_COMP_TYPE_MAX,
41};
42
43enum mtk_ddp_comp_id {
44 DDP_COMPONENT_AAL,
45 DDP_COMPONENT_BLS,
46 DDP_COMPONENT_COLOR0,
47 DDP_COMPONENT_COLOR1,
48 DDP_COMPONENT_DPI0,
49 DDP_COMPONENT_DSI0,
50 DDP_COMPONENT_DSI1,
51 DDP_COMPONENT_GAMMA,
52 DDP_COMPONENT_OD,
53 DDP_COMPONENT_OVL0,
54 DDP_COMPONENT_OVL1,
55 DDP_COMPONENT_PWM0,
56 DDP_COMPONENT_PWM1,
57 DDP_COMPONENT_RDMA0,
58 DDP_COMPONENT_RDMA1,
59 DDP_COMPONENT_RDMA2,
60 DDP_COMPONENT_UFOE,
61 DDP_COMPONENT_WDMA0,
62 DDP_COMPONENT_WDMA1,
63 DDP_COMPONENT_ID_MAX,
64};
65
66struct mtk_ddp_comp;
67
68struct mtk_ddp_comp_funcs {
69 void (*config)(struct mtk_ddp_comp *comp, unsigned int w,
70 unsigned int h, unsigned int vrefresh, unsigned int bpc);
71 void (*start)(struct mtk_ddp_comp *comp);
72 void (*stop)(struct mtk_ddp_comp *comp);
73 void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc);
74 void (*disable_vblank)(struct mtk_ddp_comp *comp);
75 void (*layer_on)(struct mtk_ddp_comp *comp, unsigned int idx);
76 void (*layer_off)(struct mtk_ddp_comp *comp, unsigned int idx);
77 void (*layer_config)(struct mtk_ddp_comp *comp, unsigned int idx,
78 struct mtk_plane_state *state);
79 void (*gamma_set)(struct mtk_ddp_comp *comp,
80 struct drm_crtc_state *state);
81};
82
83struct mtk_ddp_comp {
84 struct clk *clk;
85 void __iomem *regs;
86 int irq;
87 struct device *larb_dev;
88 enum mtk_ddp_comp_id id;
89 const struct mtk_ddp_comp_funcs *funcs;
90};
91
92static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp,
93 unsigned int w, unsigned int h,
94 unsigned int vrefresh, unsigned int bpc)
95{
96 if (comp->funcs && comp->funcs->config)
97 comp->funcs->config(comp, w, h, vrefresh, bpc);
98}
99
100static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp)
101{
102 if (comp->funcs && comp->funcs->start)
103 comp->funcs->start(comp);
104}
105
106static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp)
107{
108 if (comp->funcs && comp->funcs->stop)
109 comp->funcs->stop(comp);
110}
111
112static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp,
113 struct drm_crtc *crtc)
114{
115 if (comp->funcs && comp->funcs->enable_vblank)
116 comp->funcs->enable_vblank(comp, crtc);
117}
118
119static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp)
120{
121 if (comp->funcs && comp->funcs->disable_vblank)
122 comp->funcs->disable_vblank(comp);
123}
124
125static inline void mtk_ddp_comp_layer_on(struct mtk_ddp_comp *comp,
126 unsigned int idx)
127{
128 if (comp->funcs && comp->funcs->layer_on)
129 comp->funcs->layer_on(comp, idx);
130}
131
132static inline void mtk_ddp_comp_layer_off(struct mtk_ddp_comp *comp,
133 unsigned int idx)
134{
135 if (comp->funcs && comp->funcs->layer_off)
136 comp->funcs->layer_off(comp, idx);
137}
138
139static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
140 unsigned int idx,
141 struct mtk_plane_state *state)
142{
143 if (comp->funcs && comp->funcs->layer_config)
144 comp->funcs->layer_config(comp, idx, state);
145}
146
147static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
148 struct drm_crtc_state *state)
149{
150 if (comp->funcs && comp->funcs->gamma_set)
151 comp->funcs->gamma_set(comp, state);
152}
153
154int mtk_ddp_comp_get_id(struct device_node *node,
155 enum mtk_ddp_comp_type comp_type);
156int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
157 struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
158 const struct mtk_ddp_comp_funcs *funcs);
159int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp);
160void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
161void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
162 unsigned int CFG);
163
164#endif /* MTK_DRM_DDP_COMP_H */
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2015 MediaTek Inc.
4 */
5
6#ifndef MTK_DRM_DDP_COMP_H
7#define MTK_DRM_DDP_COMP_H
8
9#include <linux/io.h>
10
11struct device;
12struct device_node;
13struct drm_crtc;
14struct drm_device;
15struct mtk_plane_state;
16struct drm_crtc_state;
17
18enum mtk_ddp_comp_type {
19 MTK_DISP_OVL,
20 MTK_DISP_OVL_2L,
21 MTK_DISP_RDMA,
22 MTK_DISP_WDMA,
23 MTK_DISP_COLOR,
24 MTK_DISP_CCORR,
25 MTK_DISP_DITHER,
26 MTK_DISP_AAL,
27 MTK_DISP_GAMMA,
28 MTK_DISP_UFOE,
29 MTK_DSI,
30 MTK_DPI,
31 MTK_DISP_PWM,
32 MTK_DISP_MUTEX,
33 MTK_DISP_OD,
34 MTK_DISP_BLS,
35 MTK_DDP_COMP_TYPE_MAX,
36};
37
38enum mtk_ddp_comp_id {
39 DDP_COMPONENT_AAL0,
40 DDP_COMPONENT_AAL1,
41 DDP_COMPONENT_BLS,
42 DDP_COMPONENT_CCORR,
43 DDP_COMPONENT_COLOR0,
44 DDP_COMPONENT_COLOR1,
45 DDP_COMPONENT_DITHER,
46 DDP_COMPONENT_DPI0,
47 DDP_COMPONENT_DPI1,
48 DDP_COMPONENT_DSI0,
49 DDP_COMPONENT_DSI1,
50 DDP_COMPONENT_DSI2,
51 DDP_COMPONENT_DSI3,
52 DDP_COMPONENT_GAMMA,
53 DDP_COMPONENT_OD0,
54 DDP_COMPONENT_OD1,
55 DDP_COMPONENT_OVL0,
56 DDP_COMPONENT_OVL_2L0,
57 DDP_COMPONENT_OVL_2L1,
58 DDP_COMPONENT_OVL1,
59 DDP_COMPONENT_PWM0,
60 DDP_COMPONENT_PWM1,
61 DDP_COMPONENT_PWM2,
62 DDP_COMPONENT_RDMA0,
63 DDP_COMPONENT_RDMA1,
64 DDP_COMPONENT_RDMA2,
65 DDP_COMPONENT_UFOE,
66 DDP_COMPONENT_WDMA0,
67 DDP_COMPONENT_WDMA1,
68 DDP_COMPONENT_ID_MAX,
69};
70
71struct mtk_ddp_comp;
72struct cmdq_pkt;
73struct mtk_ddp_comp_funcs {
74 void (*config)(struct mtk_ddp_comp *comp, unsigned int w,
75 unsigned int h, unsigned int vrefresh,
76 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
77 void (*start)(struct mtk_ddp_comp *comp);
78 void (*stop)(struct mtk_ddp_comp *comp);
79 void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc);
80 void (*disable_vblank)(struct mtk_ddp_comp *comp);
81 unsigned int (*supported_rotations)(struct mtk_ddp_comp *comp);
82 unsigned int (*layer_nr)(struct mtk_ddp_comp *comp);
83 int (*layer_check)(struct mtk_ddp_comp *comp,
84 unsigned int idx,
85 struct mtk_plane_state *state);
86 void (*layer_config)(struct mtk_ddp_comp *comp, unsigned int idx,
87 struct mtk_plane_state *state,
88 struct cmdq_pkt *cmdq_pkt);
89 void (*gamma_set)(struct mtk_ddp_comp *comp,
90 struct drm_crtc_state *state);
91 void (*bgclr_in_on)(struct mtk_ddp_comp *comp);
92 void (*bgclr_in_off)(struct mtk_ddp_comp *comp);
93 void (*ctm_set)(struct mtk_ddp_comp *comp,
94 struct drm_crtc_state *state);
95};
96
97struct mtk_ddp_comp {
98 struct clk *clk;
99 void __iomem *regs;
100 int irq;
101 struct device *larb_dev;
102 enum mtk_ddp_comp_id id;
103 const struct mtk_ddp_comp_funcs *funcs;
104 resource_size_t regs_pa;
105 u8 subsys;
106};
107
108static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp,
109 unsigned int w, unsigned int h,
110 unsigned int vrefresh, unsigned int bpc,
111 struct cmdq_pkt *cmdq_pkt)
112{
113 if (comp->funcs && comp->funcs->config)
114 comp->funcs->config(comp, w, h, vrefresh, bpc, cmdq_pkt);
115}
116
117static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp)
118{
119 if (comp->funcs && comp->funcs->start)
120 comp->funcs->start(comp);
121}
122
123static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp)
124{
125 if (comp->funcs && comp->funcs->stop)
126 comp->funcs->stop(comp);
127}
128
129static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp,
130 struct drm_crtc *crtc)
131{
132 if (comp->funcs && comp->funcs->enable_vblank)
133 comp->funcs->enable_vblank(comp, crtc);
134}
135
136static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp)
137{
138 if (comp->funcs && comp->funcs->disable_vblank)
139 comp->funcs->disable_vblank(comp);
140}
141
142static inline
143unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp)
144{
145 if (comp->funcs && comp->funcs->supported_rotations)
146 return comp->funcs->supported_rotations(comp);
147
148 return 0;
149}
150
151static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp)
152{
153 if (comp->funcs && comp->funcs->layer_nr)
154 return comp->funcs->layer_nr(comp);
155
156 return 0;
157}
158
159static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp,
160 unsigned int idx,
161 struct mtk_plane_state *state)
162{
163 if (comp->funcs && comp->funcs->layer_check)
164 return comp->funcs->layer_check(comp, idx, state);
165 return 0;
166}
167
168static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
169 unsigned int idx,
170 struct mtk_plane_state *state,
171 struct cmdq_pkt *cmdq_pkt)
172{
173 if (comp->funcs && comp->funcs->layer_config)
174 comp->funcs->layer_config(comp, idx, state, cmdq_pkt);
175}
176
177static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
178 struct drm_crtc_state *state)
179{
180 if (comp->funcs && comp->funcs->gamma_set)
181 comp->funcs->gamma_set(comp, state);
182}
183
184static inline void mtk_ddp_comp_bgclr_in_on(struct mtk_ddp_comp *comp)
185{
186 if (comp->funcs && comp->funcs->bgclr_in_on)
187 comp->funcs->bgclr_in_on(comp);
188}
189
190static inline void mtk_ddp_comp_bgclr_in_off(struct mtk_ddp_comp *comp)
191{
192 if (comp->funcs && comp->funcs->bgclr_in_off)
193 comp->funcs->bgclr_in_off(comp);
194}
195
196static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
197 struct drm_crtc_state *state)
198{
199 if (comp->funcs && comp->funcs->ctm_set)
200 comp->funcs->ctm_set(comp, state);
201}
202
203int mtk_ddp_comp_get_id(struct device_node *node,
204 enum mtk_ddp_comp_type comp_type);
205int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
206 struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
207 const struct mtk_ddp_comp_funcs *funcs);
208int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp);
209void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
210void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
211 unsigned int CFG, struct cmdq_pkt *cmdq_pkt);
212enum mtk_ddp_comp_type mtk_ddp_comp_get_type(enum mtk_ddp_comp_id comp_id);
213void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
214 struct mtk_ddp_comp *comp, unsigned int offset);
215void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value,
216 struct mtk_ddp_comp *comp, unsigned int offset);
217void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value,
218 struct mtk_ddp_comp *comp, unsigned int offset,
219 unsigned int mask);
220#endif /* MTK_DRM_DDP_COMP_H */