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1/* Copyright 2012-15 Advanced Micro Devices, Inc.
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a
4 * copy of this software and associated documentation files (the "Software"),
5 * to deal in the Software without restriction, including without limitation
6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7 * and/or sell copies of the Software, and to permit persons to whom the
8 * Software is furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19 * OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * Authors: AMD
22 *
23 */
24
25#ifndef __DC_MPCC_H__
26#define __DC_MPCC_H__
27
28#include "dc_hw_types.h"
29#include "hw_shared.h"
30
31#define MAX_MPCC 6
32#define MAX_OPP 6
33
34enum mpc_output_csc_mode {
35 MPC_OUTPUT_CSC_DISABLE = 0,
36 MPC_OUTPUT_CSC_COEF_A,
37 MPC_OUTPUT_CSC_COEF_B
38};
39
40
41enum mpcc_blend_mode {
42 MPCC_BLEND_MODE_BYPASS,
43 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH,
44 MPCC_BLEND_MODE_TOP_LAYER_ONLY,
45 MPCC_BLEND_MODE_TOP_BOT_BLENDING
46};
47
48enum mpcc_alpha_blend_mode {
49 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA,
50 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN,
51 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA
52};
53
54/*
55 * MPCC blending configuration
56 */
57struct mpcc_blnd_cfg {
58 struct tg_color black_color; /* background color */
59 enum mpcc_alpha_blend_mode alpha_mode; /* alpha blend mode */
60 bool pre_multiplied_alpha; /* alpha pre-multiplied mode flag */
61 int global_gain;
62 int global_alpha;
63 bool overlap_only;
64
65};
66
67struct mpcc_sm_cfg {
68 bool enable;
69 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */
70 int sm_mode;
71 /* 0- disable frame alternate, 1- enable frame alternate */
72 bool frame_alt;
73 /* 0- disable field alternate, 1- enable field alternate */
74 bool field_alt;
75 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */
76 int force_next_frame_porlarity;
77 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */
78 int force_next_field_polarity;
79};
80
81/*
82 * MPCC connection and blending configuration for a single MPCC instance.
83 * This struct is used as a node in an MPC tree.
84 */
85struct mpcc {
86 int mpcc_id; /* MPCC physical instance */
87 int dpp_id; /* DPP input to this MPCC */
88 struct mpcc *mpcc_bot; /* pointer to bottom layer MPCC. NULL when not connected */
89 struct mpcc_blnd_cfg blnd_cfg; /* The blending configuration for this MPCC */
90 struct mpcc_sm_cfg sm_cfg; /* stereo mix setting for this MPCC */
91};
92
93/*
94 * MPC tree represents all MPCC connections for a pipe.
95 */
96struct mpc_tree {
97 int opp_id; /* The OPP instance that owns this MPC tree */
98 struct mpcc *opp_list; /* The top MPCC layer of the MPC tree that outputs to OPP endpoint */
99};
100
101struct mpc {
102 const struct mpc_funcs *funcs;
103 struct dc_context *ctx;
104
105 struct mpcc mpcc_array[MAX_MPCC];
106};
107
108struct mpc_funcs {
109 /*
110 * Insert DPP into MPC tree based on specified blending position.
111 * Only used for planes that are part of blending chain for OPP output
112 *
113 * Parameters:
114 * [in/out] mpc - MPC context.
115 * [in/out] tree - MPC tree structure that plane will be added to.
116 * [in] blnd_cfg - MPCC blending configuration for the new blending layer.
117 * [in] sm_cfg - MPCC stereo mix configuration for the new blending layer.
118 * stereo mix must disable for the very bottom layer of the tree config.
119 * [in] insert_above_mpcc - Insert new plane above this MPCC. If NULL, insert as bottom plane.
120 * [in] dpp_id - DPP instance for the plane to be added.
121 * [in] mpcc_id - The MPCC physical instance to use for blending.
122 *
123 * Return: struct mpcc* - MPCC that was added.
124 */
125 struct mpcc* (*insert_plane)(
126 struct mpc *mpc,
127 struct mpc_tree *tree,
128 struct mpcc_blnd_cfg *blnd_cfg,
129 struct mpcc_sm_cfg *sm_cfg,
130 struct mpcc *insert_above_mpcc,
131 int dpp_id,
132 int mpcc_id);
133
134 /*
135 * Remove a specified MPCC from the MPC tree.
136 *
137 * Parameters:
138 * [in/out] mpc - MPC context.
139 * [in/out] tree - MPC tree structure that plane will be removed from.
140 * [in/out] mpcc - MPCC to be removed from tree.
141 *
142 * Return: void
143 */
144 void (*remove_mpcc)(
145 struct mpc *mpc,
146 struct mpc_tree *tree,
147 struct mpcc *mpcc);
148
149 /*
150 * Reset the MPCC HW status by disconnecting all muxes.
151 *
152 * Parameters:
153 * [in/out] mpc - MPC context.
154 *
155 * Return: void
156 */
157 void (*mpc_init)(struct mpc *mpc);
158
159 /*
160 * Update the blending configuration for a specified MPCC.
161 *
162 * Parameters:
163 * [in/out] mpc - MPC context.
164 * [in] blnd_cfg - MPCC blending configuration.
165 * [in] mpcc_id - The MPCC physical instance.
166 *
167 * Return: void
168 */
169 void (*update_blending)(
170 struct mpc *mpc,
171 struct mpcc_blnd_cfg *blnd_cfg,
172 int mpcc_id);
173
174 struct mpcc* (*get_mpcc_for_dpp)(
175 struct mpc_tree *tree,
176 int dpp_id);
177
178 void (*wait_for_idle)(struct mpc *mpc, int id);
179
180 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id);
181
182 void (*init_mpcc_list_from_hw)(
183 struct mpc *mpc,
184 struct mpc_tree *tree);
185
186};
187
188#endif
1/* Copyright 2012-15 Advanced Micro Devices, Inc.
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a
4 * copy of this software and associated documentation files (the "Software"),
5 * to deal in the Software without restriction, including without limitation
6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7 * and/or sell copies of the Software, and to permit persons to whom the
8 * Software is furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19 * OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * Authors: AMD
22 *
23 */
24
25#ifndef __DC_MPCC_H__
26#define __DC_MPCC_H__
27
28#include "dc_hw_types.h"
29#include "hw_shared.h"
30#include "transform.h"
31
32#define MAX_MPCC 6
33#define MAX_OPP 6
34
35#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
36#define MAX_DWB 2
37#else
38#define MAX_DWB 1
39#endif
40
41enum mpc_output_csc_mode {
42 MPC_OUTPUT_CSC_DISABLE = 0,
43 MPC_OUTPUT_CSC_COEF_A,
44 MPC_OUTPUT_CSC_COEF_B
45};
46
47
48enum mpcc_blend_mode {
49 MPCC_BLEND_MODE_BYPASS,
50 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH,
51 MPCC_BLEND_MODE_TOP_LAYER_ONLY,
52 MPCC_BLEND_MODE_TOP_BOT_BLENDING
53};
54
55enum mpcc_alpha_blend_mode {
56 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA,
57 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN,
58 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA
59};
60
61/*
62 * MPCC blending configuration
63 */
64struct mpcc_blnd_cfg {
65 struct tg_color black_color; /* background color */
66 enum mpcc_alpha_blend_mode alpha_mode; /* alpha blend mode */
67 bool pre_multiplied_alpha; /* alpha pre-multiplied mode flag */
68 int global_gain;
69 int global_alpha;
70 bool overlap_only;
71
72 /* MPCC top/bottom gain settings */
73 int bottom_gain_mode;
74 int background_color_bpc;
75 int top_gain;
76 int bottom_inside_gain;
77 int bottom_outside_gain;
78};
79
80#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
81struct mpc_grph_gamut_adjustment {
82 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
83 enum graphics_gamut_adjust_type gamut_adjust_type;
84};
85#endif
86struct mpcc_sm_cfg {
87 bool enable;
88 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */
89 int sm_mode;
90 /* 0- disable frame alternate, 1- enable frame alternate */
91 bool frame_alt;
92 /* 0- disable field alternate, 1- enable field alternate */
93 bool field_alt;
94 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */
95 int force_next_frame_porlarity;
96 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */
97 int force_next_field_polarity;
98};
99
100struct mpc_denorm_clamp {
101 int clamp_max_r_cr;
102 int clamp_min_r_cr;
103 int clamp_max_g_y;
104 int clamp_min_g_y;
105 int clamp_max_b_cb;
106 int clamp_min_b_cb;
107};
108
109#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
110struct mpc_dwb_flow_control {
111 int flow_ctrl_mode;
112 int flow_ctrl_cnt0;
113 int flow_ctrl_cnt1;
114};
115#endif
116/*
117 * MPCC connection and blending configuration for a single MPCC instance.
118 * This struct is used as a node in an MPC tree.
119 */
120struct mpcc {
121 int mpcc_id; /* MPCC physical instance */
122 int dpp_id; /* DPP input to this MPCC */
123 struct mpcc *mpcc_bot; /* pointer to bottom layer MPCC. NULL when not connected */
124 struct mpcc_blnd_cfg blnd_cfg; /* The blending configuration for this MPCC */
125 struct mpcc_sm_cfg sm_cfg; /* stereo mix setting for this MPCC */
126#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
127 bool shared_bottom; /* TRUE if MPCC output to both OPP and DWB endpoints, else FALSE */
128#endif
129};
130
131/*
132 * MPC tree represents all MPCC connections for a pipe.
133 */
134struct mpc_tree {
135 int opp_id; /* The OPP instance that owns this MPC tree */
136 struct mpcc *opp_list; /* The top MPCC layer of the MPC tree that outputs to OPP endpoint */
137};
138
139struct mpc {
140 const struct mpc_funcs *funcs;
141 struct dc_context *ctx;
142
143 struct mpcc mpcc_array[MAX_MPCC];
144 struct pwl_params blender_params;
145 bool cm_bypass_mode;
146};
147
148struct mpcc_state {
149 uint32_t opp_id;
150 uint32_t dpp_id;
151 uint32_t bot_mpcc_id;
152 uint32_t mode;
153 uint32_t alpha_mode;
154 uint32_t pre_multiplied_alpha;
155 uint32_t overlap_only;
156 uint32_t idle;
157 uint32_t busy;
158};
159
160struct mpc_funcs {
161 void (*read_mpcc_state)(
162 struct mpc *mpc,
163 int mpcc_inst,
164 struct mpcc_state *s);
165
166 /*
167 * Insert DPP into MPC tree based on specified blending position.
168 * Only used for planes that are part of blending chain for OPP output
169 *
170 * Parameters:
171 * [in/out] mpc - MPC context.
172 * [in/out] tree - MPC tree structure that plane will be added to.
173 * [in] blnd_cfg - MPCC blending configuration for the new blending layer.
174 * [in] sm_cfg - MPCC stereo mix configuration for the new blending layer.
175 * stereo mix must disable for the very bottom layer of the tree config.
176 * [in] insert_above_mpcc - Insert new plane above this MPCC. If NULL, insert as bottom plane.
177 * [in] dpp_id - DPP instance for the plane to be added.
178 * [in] mpcc_id - The MPCC physical instance to use for blending.
179 *
180 * Return: struct mpcc* - MPCC that was added.
181 */
182 struct mpcc* (*insert_plane)(
183 struct mpc *mpc,
184 struct mpc_tree *tree,
185 struct mpcc_blnd_cfg *blnd_cfg,
186 struct mpcc_sm_cfg *sm_cfg,
187 struct mpcc *insert_above_mpcc,
188 int dpp_id,
189 int mpcc_id);
190
191 /*
192 * Remove a specified MPCC from the MPC tree.
193 *
194 * Parameters:
195 * [in/out] mpc - MPC context.
196 * [in/out] tree - MPC tree structure that plane will be removed from.
197 * [in/out] mpcc - MPCC to be removed from tree.
198 *
199 * Return: void
200 */
201 void (*remove_mpcc)(
202 struct mpc *mpc,
203 struct mpc_tree *tree,
204 struct mpcc *mpcc);
205
206 /*
207 * Reset the MPCC HW status by disconnecting all muxes.
208 *
209 * Parameters:
210 * [in/out] mpc - MPC context.
211 *
212 * Return: void
213 */
214 void (*mpc_init)(struct mpc *mpc);
215 void (*mpc_init_single_inst)(
216 struct mpc *mpc,
217 unsigned int mpcc_id);
218
219 /*
220 * Update the blending configuration for a specified MPCC.
221 *
222 * Parameters:
223 * [in/out] mpc - MPC context.
224 * [in] blnd_cfg - MPCC blending configuration.
225 * [in] mpcc_id - The MPCC physical instance.
226 *
227 * Return: void
228 */
229 void (*update_blending)(
230 struct mpc *mpc,
231 struct mpcc_blnd_cfg *blnd_cfg,
232 int mpcc_id);
233
234 /*
235 * Lock cursor updates for the specified OPP.
236 * OPP defines the set of MPCC that are locked together for cursor.
237 *
238 * Parameters:
239 * [in] mpc - MPC context.
240 * [in] opp_id - The OPP to lock cursor updates on
241 * [in] lock - lock/unlock the OPP
242 *
243 * Return: void
244 */
245 void (*cursor_lock)(
246 struct mpc *mpc,
247 int opp_id,
248 bool lock);
249
250#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
251 /*
252 * Add DPP into 'secondary' MPC tree based on specified blending position.
253 * Only used for planes that are part of blending chain for DWB output
254 *
255 * Parameters:
256 * [in/out] mpc - MPC context.
257 * [in/out] tree - MPC tree structure that plane will be added to.
258 * [in] blnd_cfg - MPCC blending configuration for the new blending layer.
259 * [in] sm_cfg - MPCC stereo mix configuration for the new blending layer.
260 * stereo mix must disable for the very bottom layer of the tree config.
261 * [in] insert_above_mpcc - Insert new plane above this MPCC. If NULL, insert as bottom plane.
262 * [in] dpp_id - DPP instance for the plane to be added.
263 * [in] mpcc_id - The MPCC physical instance to use for blending.
264 *
265 * Return: struct mpcc* - MPCC that was added.
266 */
267 struct mpcc* (*insert_plane_to_secondary)(
268 struct mpc *mpc,
269 struct mpc_tree *tree,
270 struct mpcc_blnd_cfg *blnd_cfg,
271 struct mpcc_sm_cfg *sm_cfg,
272 struct mpcc *insert_above_mpcc,
273 int dpp_id,
274 int mpcc_id);
275
276 /*
277 * Remove a specified DPP from the 'secondary' MPC tree.
278 *
279 * Parameters:
280 * [in/out] mpc - MPC context.
281 * [in/out] tree - MPC tree structure that plane will be removed from.
282 * [in] mpcc - MPCC to be removed from tree.
283 * Return: void
284 */
285 void (*remove_mpcc_from_secondary)(
286 struct mpc *mpc,
287 struct mpc_tree *tree,
288 struct mpcc *mpcc);
289
290 struct mpcc* (*get_mpcc_for_dpp_from_secondary)(
291 struct mpc_tree *tree,
292 int dpp_id);
293#endif
294 struct mpcc* (*get_mpcc_for_dpp)(
295 struct mpc_tree *tree,
296 int dpp_id);
297
298 void (*wait_for_idle)(struct mpc *mpc, int id);
299
300 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id);
301
302 void (*init_mpcc_list_from_hw)(
303 struct mpc *mpc,
304 struct mpc_tree *tree);
305
306 void (*set_denorm)(struct mpc *mpc,
307 int opp_id,
308 enum dc_color_depth output_depth);
309
310 void (*set_denorm_clamp)(
311 struct mpc *mpc,
312 int opp_id,
313 struct mpc_denorm_clamp denorm_clamp);
314
315 void (*set_output_csc)(struct mpc *mpc,
316 int opp_id,
317 const uint16_t *regval,
318 enum mpc_output_csc_mode ocsc_mode);
319
320 void (*set_ocsc_default)(struct mpc *mpc,
321 int opp_id,
322 enum dc_color_space color_space,
323 enum mpc_output_csc_mode ocsc_mode);
324
325 void (*set_output_gamma)(
326 struct mpc *mpc,
327 int mpcc_id,
328 const struct pwl_params *params);
329 void (*power_on_mpc_mem_pwr)(
330 struct mpc *mpc,
331 int mpcc_id,
332 bool power_on);
333#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
334 void (*set_dwb_mux)(
335 struct mpc *mpc,
336 int dwb_id,
337 int mpcc_id);
338
339 void (*disable_dwb_mux)(
340 struct mpc *mpc,
341 int dwb_id);
342
343 bool (*is_dwb_idle)(
344 struct mpc *mpc,
345 int dwb_id);
346
347 void (*set_out_rate_control)(
348 struct mpc *mpc,
349 int opp_id,
350 bool enable,
351 bool rate_2x_mode,
352 struct mpc_dwb_flow_control *flow_control);
353#endif
354
355#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
356 void (*set_gamut_remap)(
357 struct mpc *mpc,
358 int mpcc_id,
359 const struct mpc_grph_gamut_adjustment *adjust);
360
361 bool (*program_shaper)(
362 struct mpc *mpc,
363 const struct pwl_params *params,
364 uint32_t rmu_idx);
365
366 uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx);
367
368 bool (*program_3dlut)(
369 struct mpc *mpc,
370 const struct tetrahedral_params *params,
371 int rmu_idx);
372
373 int (*release_rmu)(struct mpc *mpc, int mpcc_id);
374
375#endif
376
377};
378
379#endif