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1&l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am33xx-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
4 <0x44c00800 0x800>,
5 <0x44c01000 0x400>,
6 <0x44c01400 0x400>;
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
13
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
22 };
23
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>; /* ap 7 */
32
33 target-module@0 { /* 0x44d00000, ap 4 28.0 */
34 compatible = "ti,sysc-omap4", "ti,sysc";
35 reg = <0x0 0x4>;
36 reg-names = "rev";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges = <0x0 0x0 0x4000>;
40 status = "disabled";
41 };
42
43 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
44 compatible = "ti,sysc";
45 status = "disabled";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges = <0x0 0x80000 0x2000>;
49 };
50 };
51
52 segment@200000 { /* 0x44e00000 */
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges = <0x00000000 0x00200000 0x002000>, /* ap 8 */
57 <0x00002000 0x00202000 0x001000>, /* ap 9 */
58 <0x00003000 0x00203000 0x001000>, /* ap 10 */
59 <0x00004000 0x00204000 0x001000>, /* ap 11 */
60 <0x00005000 0x00205000 0x001000>, /* ap 12 */
61 <0x00006000 0x00206000 0x001000>, /* ap 13 */
62 <0x00007000 0x00207000 0x001000>, /* ap 14 */
63 <0x00008000 0x00208000 0x001000>, /* ap 15 */
64 <0x00009000 0x00209000 0x001000>, /* ap 16 */
65 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
66 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
67 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
68 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
69 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
70 <0x00010000 0x00210000 0x010000>, /* ap 22 */
71 <0x00020000 0x00220000 0x010000>, /* ap 23 */
72 <0x00030000 0x00230000 0x001000>, /* ap 24 */
73 <0x00031000 0x00231000 0x001000>, /* ap 25 */
74 <0x00032000 0x00232000 0x001000>, /* ap 26 */
75 <0x00033000 0x00233000 0x001000>, /* ap 27 */
76 <0x00034000 0x00234000 0x001000>, /* ap 28 */
77 <0x00035000 0x00235000 0x001000>, /* ap 29 */
78 <0x00036000 0x00236000 0x001000>, /* ap 30 */
79 <0x00037000 0x00237000 0x001000>, /* ap 31 */
80 <0x00038000 0x00238000 0x001000>, /* ap 32 */
81 <0x00039000 0x00239000 0x001000>, /* ap 33 */
82 <0x0003a000 0x0023a000 0x001000>, /* ap 34 */
83 <0x0003e000 0x0023e000 0x001000>, /* ap 35 */
84 <0x0003f000 0x0023f000 0x001000>, /* ap 36 */
85 <0x0000e000 0x0020e000 0x001000>, /* ap 37 */
86 <0x00040000 0x00240000 0x040000>, /* ap 38 */
87 <0x00080000 0x00280000 0x001000>; /* ap 39 */
88
89 target-module@0 { /* 0x44e00000, ap 8 58.0 */
90 compatible = "ti,sysc-omap4", "ti,sysc";
91 reg = <0 0x4>;
92 reg-names = "rev";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges = <0x0 0x0 0x2000>;
96
97 prcm: prcm@0 {
98 compatible = "ti,am3-prcm", "simple-bus";
99 reg = <0 0x2000>;
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges = <0 0 0x2000>;
103
104 prcm_clocks: clocks {
105 #address-cells = <1>;
106 #size-cells = <0>;
107 };
108
109 prcm_clockdomains: clockdomains {
110 };
111 };
112 };
113
114 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
115 compatible = "ti,sysc";
116 status = "disabled";
117 #address-cells = <1>;
118 #size-cells = <1>;
119 ranges = <0x0 0x3000 0x1000>;
120 };
121
122 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
123 compatible = "ti,sysc";
124 status = "disabled";
125 #address-cells = <1>;
126 #size-cells = <1>;
127 ranges = <0x0 0x5000 0x1000>;
128 };
129
130 gpio0_target: target-module@7000 { /* 0x44e07000, ap 14 20.0 */
131 compatible = "ti,sysc-omap2", "ti,sysc";
132 reg = <0x7000 0x4>,
133 <0x7010 0x4>,
134 <0x7114 0x4>;
135 reg-names = "rev", "sysc", "syss";
136 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
137 SYSC_OMAP2_SOFTRESET |
138 SYSC_OMAP2_AUTOIDLE)>;
139 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
140 <SYSC_IDLE_NO>,
141 <SYSC_IDLE_SMART>,
142 <SYSC_IDLE_SMART_WKUP>;
143 ti,syss-mask = <1>;
144 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
145 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>,
146 <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>;
147 clock-names = "fck", "dbclk";
148 #address-cells = <1>;
149 #size-cells = <1>;
150 ranges = <0x0 0x7000 0x1000>;
151
152 gpio0: gpio@0 {
153 compatible = "ti,omap4-gpio";
154 gpio-ranges = <&am33xx_pinmux 0 82 8>,
155 <&am33xx_pinmux 8 52 4>,
156 <&am33xx_pinmux 12 94 4>,
157 <&am33xx_pinmux 16 71 2>,
158 <&am33xx_pinmux 18 135 1>,
159 <&am33xx_pinmux 19 108 2>,
160 <&am33xx_pinmux 21 73 1>,
161 <&am33xx_pinmux 22 8 2>,
162 <&am33xx_pinmux 26 10 2>,
163 <&am33xx_pinmux 28 74 1>,
164 <&am33xx_pinmux 29 81 1>,
165 <&am33xx_pinmux 30 28 2>;
166 gpio-controller;
167 #gpio-cells = <2>;
168 interrupt-controller;
169 #interrupt-cells = <2>;
170 reg = <0x0 0x1000>;
171 interrupts = <96>;
172 };
173 };
174
175 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
176 compatible = "ti,sysc-omap2", "ti,sysc";
177 reg = <0x9050 0x4>,
178 <0x9054 0x4>,
179 <0x9058 0x4>;
180 reg-names = "rev", "sysc", "syss";
181 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
182 SYSC_OMAP2_SOFTRESET |
183 SYSC_OMAP2_AUTOIDLE)>;
184 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
185 <SYSC_IDLE_NO>,
186 <SYSC_IDLE_SMART>,
187 <SYSC_IDLE_SMART_WKUP>;
188 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
189 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>;
190 clock-names = "fck";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 ranges = <0x0 0x9000 0x1000>;
194
195 uart0: serial@0 {
196 compatible = "ti,am3352-uart", "ti,omap3-uart";
197 clock-frequency = <48000000>;
198 reg = <0x0 0x1000>;
199 interrupts = <72>;
200 status = "disabled";
201 dmas = <&edma 26 0>, <&edma 27 0>;
202 dma-names = "tx", "rx";
203 };
204 };
205
206 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
207 compatible = "ti,sysc-omap2", "ti,sysc";
208 reg = <0xb000 0x8>,
209 <0xb010 0x8>,
210 <0xb090 0x8>;
211 reg-names = "rev", "sysc", "syss";
212 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
213 SYSC_OMAP2_ENAWAKEUP |
214 SYSC_OMAP2_SOFTRESET |
215 SYSC_OMAP2_AUTOIDLE)>;
216 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
217 <SYSC_IDLE_NO>,
218 <SYSC_IDLE_SMART>,
219 <SYSC_IDLE_SMART_WKUP>;
220 ti,syss-mask = <1>;
221 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
222 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>;
223 clock-names = "fck";
224 #address-cells = <1>;
225 #size-cells = <1>;
226 ranges = <0x0 0xb000 0x1000>;
227
228 i2c0: i2c@0 {
229 compatible = "ti,omap4-i2c";
230 #address-cells = <1>;
231 #size-cells = <0>;
232 reg = <0x0 0x1000>;
233 interrupts = <70>;
234 status = "disabled";
235 };
236 };
237
238 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
239 compatible = "ti,sysc-omap4", "ti,sysc";
240 reg = <0xd000 0x4>,
241 <0xd010 0x4>;
242 reg-names = "rev", "sysc";
243 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
244 <SYSC_IDLE_NO>,
245 <SYSC_IDLE_SMART>,
246 <SYSC_IDLE_SMART_WKUP>;
247 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
248 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>;
249 clock-names = "fck";
250 #address-cells = <1>;
251 #size-cells = <1>;
252 ranges = <0x00000000 0x0000d000 0x00001000>,
253 <0x00001000 0x0000e000 0x00001000>;
254
255 tscadc: tscadc@0 {
256 compatible = "ti,am3359-tscadc";
257 reg = <0x0 0x1000>;
258 interrupts = <16>;
259 status = "disabled";
260 dmas = <&edma 53 0>, <&edma 57 0>;
261 dma-names = "fifo0", "fifo1";
262
263 tsc {
264 compatible = "ti,am3359-tsc";
265 };
266 am335x_adc: adc {
267 #io-channel-cells = <1>;
268 compatible = "ti,am3359-adc";
269 };
270 };
271 };
272
273 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
274 compatible = "ti,sysc-omap4", "ti,sysc";
275 reg = <0x10000 0x4>;
276 reg-names = "rev";
277 #address-cells = <1>;
278 #size-cells = <1>;
279 ranges = <0x00000000 0x00010000 0x00010000>,
280 <0x00010000 0x00020000 0x00010000>;
281
282 scm: scm@0 {
283 compatible = "ti,am3-scm", "simple-bus";
284 reg = <0x0 0x2000>;
285 #address-cells = <1>;
286 #size-cells = <1>;
287 #pinctrl-cells = <1>;
288 ranges = <0 0 0x2000>;
289
290 am33xx_pinmux: pinmux@800 {
291 compatible = "pinctrl-single";
292 reg = <0x800 0x238>;
293 #pinctrl-cells = <2>;
294 pinctrl-single,register-width = <32>;
295 pinctrl-single,function-mask = <0x7f>;
296 };
297
298 scm_conf: scm_conf@0 {
299 compatible = "syscon", "simple-bus";
300 reg = <0x0 0x800>;
301 #address-cells = <1>;
302 #size-cells = <1>;
303 ranges = <0 0 0x800>;
304
305 phy_gmii_sel: phy-gmii-sel {
306 compatible = "ti,am3352-phy-gmii-sel";
307 reg = <0x650 0x4>;
308 #phy-cells = <2>;
309 };
310
311 scm_clocks: clocks {
312 #address-cells = <1>;
313 #size-cells = <0>;
314 };
315 };
316
317 usb_ctrl_mod: control@620 {
318 compatible = "ti,am335x-usb-ctrl-module";
319 reg = <0x620 0x10>,
320 <0x648 0x4>;
321 reg-names = "phy_ctrl", "wakeup";
322 };
323
324 wkup_m3_ipc: wkup_m3_ipc@1324 {
325 compatible = "ti,am3352-wkup-m3-ipc";
326 reg = <0x1324 0x24>;
327 interrupts = <78>;
328 ti,rproc = <&wkup_m3>;
329 mboxes = <&mailbox &mbox_wkupm3>;
330 };
331
332 edma_xbar: dma-router@f90 {
333 compatible = "ti,am335x-edma-crossbar";
334 reg = <0xf90 0x40>;
335 #dma-cells = <3>;
336 dma-requests = <32>;
337 dma-masters = <&edma>;
338 };
339
340 scm_clockdomains: clockdomains {
341 };
342 };
343 };
344
345 timer1_target: target-module@31000 { /* 0x44e31000, ap 25 40.0 */
346 compatible = "ti,sysc-omap2-timer", "ti,sysc";
347 reg = <0x31000 0x4>,
348 <0x31010 0x4>,
349 <0x31014 0x4>;
350 reg-names = "rev", "sysc", "syss";
351 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
352 SYSC_OMAP2_SOFTRESET |
353 SYSC_OMAP2_AUTOIDLE)>;
354 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
355 <SYSC_IDLE_NO>,
356 <SYSC_IDLE_SMART>;
357 ti,syss-mask = <1>;
358 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
359 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>;
360 clock-names = "fck";
361 #address-cells = <1>;
362 #size-cells = <1>;
363 ranges = <0x0 0x31000 0x1000>;
364
365 timer1: timer@0 {
366 compatible = "ti,am335x-timer-1ms";
367 reg = <0x0 0x400>;
368 interrupts = <67>;
369 ti,timer-alwon;
370 clocks = <&timer1_fck>;
371 clock-names = "fck";
372 };
373 };
374
375 target-module@33000 { /* 0x44e33000, ap 27 18.0 */
376 compatible = "ti,sysc";
377 status = "disabled";
378 #address-cells = <1>;
379 #size-cells = <1>;
380 ranges = <0x0 0x33000 0x1000>;
381 };
382
383 target-module@35000 { /* 0x44e35000, ap 29 50.0 */
384 compatible = "ti,sysc-omap2", "ti,sysc";
385 reg = <0x35000 0x4>,
386 <0x35010 0x4>,
387 <0x35014 0x4>;
388 reg-names = "rev", "sysc", "syss";
389 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
390 SYSC_OMAP2_SOFTRESET)>;
391 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
392 <SYSC_IDLE_NO>,
393 <SYSC_IDLE_SMART>,
394 <SYSC_IDLE_SMART_WKUP>;
395 ti,syss-mask = <1>;
396 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
397 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
398 clock-names = "fck";
399 #address-cells = <1>;
400 #size-cells = <1>;
401 ranges = <0x0 0x35000 0x1000>;
402
403 wdt2: wdt@0 {
404 compatible = "ti,omap3-wdt";
405 reg = <0x0 0x1000>;
406 interrupts = <91>;
407 };
408 };
409
410 target-module@37000 { /* 0x44e37000, ap 31 08.0 */
411 compatible = "ti,sysc";
412 status = "disabled";
413 #address-cells = <1>;
414 #size-cells = <1>;
415 ranges = <0x0 0x37000 0x1000>;
416 };
417
418 target-module@39000 { /* 0x44e39000, ap 33 02.0 */
419 compatible = "ti,sysc";
420 status = "disabled";
421 #address-cells = <1>;
422 #size-cells = <1>;
423 ranges = <0x0 0x39000 0x1000>;
424 };
425
426 target-module@3e000 { /* 0x44e3e000, ap 35 60.0 */
427 compatible = "ti,sysc-omap4-simple", "ti,sysc";
428 ti,hwmods = "rtc";
429 reg = <0x3e074 0x4>,
430 <0x3e078 0x4>;
431 reg-names = "rev", "sysc";
432 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
433 <SYSC_IDLE_NO>,
434 <SYSC_IDLE_SMART>,
435 <SYSC_IDLE_SMART_WKUP>;
436 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
437 clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;
438 clock-names = "fck";
439 #address-cells = <1>;
440 #size-cells = <1>;
441 ranges = <0x0 0x3e000 0x1000>;
442
443 rtc: rtc@0 {
444 compatible = "ti,am3352-rtc", "ti,da830-rtc";
445 reg = <0x0 0x1000>;
446 interrupts = <75
447 76>;
448 };
449 };
450
451 target-module@40000 { /* 0x44e40000, ap 38 68.0 */
452 compatible = "ti,sysc";
453 status = "disabled";
454 #address-cells = <1>;
455 #size-cells = <1>;
456 ranges = <0x0 0x40000 0x40000>;
457 };
458 };
459};
460
461&l4_fw { /* 0x47c00000 */
462 compatible = "ti,am33xx-l4-fw", "simple-bus";
463 reg = <0x47c00000 0x800>,
464 <0x47c00800 0x800>,
465 <0x47c01000 0x400>;
466 reg-names = "ap", "la", "ia0";
467 #address-cells = <1>;
468 #size-cells = <1>;
469 ranges = <0x00000000 0x47c00000 0x1000000>; /* segment 0 */
470
471 segment@0 { /* 0x47c00000 */
472 compatible = "simple-bus";
473 #address-cells = <1>;
474 #size-cells = <1>;
475 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
476 <0x00000800 0x00000800 0x000800>, /* ap 1 */
477 <0x00001000 0x00001000 0x000400>, /* ap 2 */
478 <0x0000c000 0x0000c000 0x001000>, /* ap 3 */
479 <0x0000d000 0x0000d000 0x001000>, /* ap 4 */
480 <0x0000e000 0x0000e000 0x001000>, /* ap 5 */
481 <0x0000f000 0x0000f000 0x001000>, /* ap 6 */
482 <0x00010000 0x00010000 0x001000>, /* ap 7 */
483 <0x00011000 0x00011000 0x001000>, /* ap 8 */
484 <0x0001a000 0x0001a000 0x001000>, /* ap 9 */
485 <0x0001b000 0x0001b000 0x001000>, /* ap 10 */
486 <0x00024000 0x00024000 0x001000>, /* ap 11 */
487 <0x00025000 0x00025000 0x001000>, /* ap 12 */
488 <0x00026000 0x00026000 0x001000>, /* ap 13 */
489 <0x00027000 0x00027000 0x001000>, /* ap 14 */
490 <0x00030000 0x00030000 0x001000>, /* ap 15 */
491 <0x00031000 0x00031000 0x001000>, /* ap 16 */
492 <0x00038000 0x00038000 0x001000>, /* ap 17 */
493 <0x00039000 0x00039000 0x001000>, /* ap 18 */
494 <0x0003a000 0x0003a000 0x001000>, /* ap 19 */
495 <0x0003b000 0x0003b000 0x001000>, /* ap 20 */
496 <0x0003e000 0x0003e000 0x001000>, /* ap 21 */
497 <0x0003f000 0x0003f000 0x001000>, /* ap 22 */
498 <0x0003c000 0x0003c000 0x001000>, /* ap 23 */
499 <0x00040000 0x00040000 0x001000>, /* ap 24 */
500 <0x00046000 0x00046000 0x001000>, /* ap 25 */
501 <0x00047000 0x00047000 0x001000>, /* ap 26 */
502 <0x00044000 0x00044000 0x001000>, /* ap 27 */
503 <0x00045000 0x00045000 0x001000>, /* ap 28 */
504 <0x00028000 0x00028000 0x001000>, /* ap 29 */
505 <0x00029000 0x00029000 0x001000>, /* ap 30 */
506 <0x00032000 0x00032000 0x001000>, /* ap 31 */
507 <0x00033000 0x00033000 0x001000>, /* ap 32 */
508 <0x0003d000 0x0003d000 0x001000>, /* ap 33 */
509 <0x00041000 0x00041000 0x001000>, /* ap 34 */
510 <0x00042000 0x00042000 0x001000>, /* ap 35 */
511 <0x00043000 0x00043000 0x001000>, /* ap 36 */
512 <0x00014000 0x00014000 0x001000>, /* ap 37 */
513 <0x00015000 0x00015000 0x001000>; /* ap 38 */
514
515 target-module@c000 { /* 0x47c0c000, ap 3 04.0 */
516 compatible = "ti,sysc";
517 status = "disabled";
518 #address-cells = <1>;
519 #size-cells = <1>;
520 ranges = <0x0 0xc000 0x1000>;
521 };
522
523 target-module@e000 { /* 0x47c0e000, ap 5 0c.0 */
524 compatible = "ti,sysc";
525 status = "disabled";
526 #address-cells = <1>;
527 #size-cells = <1>;
528 ranges = <0x0 0xe000 0x1000>;
529 };
530
531 target-module@10000 { /* 0x47c10000, ap 7 20.0 */
532 compatible = "ti,sysc";
533 status = "disabled";
534 #address-cells = <1>;
535 #size-cells = <1>;
536 ranges = <0x0 0x10000 0x1000>;
537 };
538
539 target-module@14000 { /* 0x47c14000, ap 37 3c.0 */
540 compatible = "ti,sysc";
541 status = "disabled";
542 #address-cells = <1>;
543 #size-cells = <1>;
544 ranges = <0x0 0x14000 0x1000>;
545 };
546
547 target-module@1a000 { /* 0x47c1a000, ap 9 08.0 */
548 compatible = "ti,sysc";
549 status = "disabled";
550 #address-cells = <1>;
551 #size-cells = <1>;
552 ranges = <0x0 0x1a000 0x1000>;
553 };
554
555 target-module@24000 { /* 0x47c24000, ap 11 28.0 */
556 compatible = "ti,sysc";
557 status = "disabled";
558 #address-cells = <1>;
559 #size-cells = <1>;
560 ranges = <0x0 0x24000 0x1000>;
561 };
562
563 target-module@26000 { /* 0x47c26000, ap 13 30.0 */
564 compatible = "ti,sysc";
565 status = "disabled";
566 #address-cells = <1>;
567 #size-cells = <1>;
568 ranges = <0x0 0x26000 0x1000>;
569 };
570
571 target-module@28000 { /* 0x47c28000, ap 29 40.0 */
572 compatible = "ti,sysc";
573 status = "disabled";
574 #address-cells = <1>;
575 #size-cells = <1>;
576 ranges = <0x0 0x28000 0x1000>;
577 };
578
579 target-module@30000 { /* 0x47c30000, ap 15 14.0 */
580 compatible = "ti,sysc";
581 status = "disabled";
582 #address-cells = <1>;
583 #size-cells = <1>;
584 ranges = <0x0 0x30000 0x1000>;
585 };
586
587 target-module@32000 { /* 0x47c32000, ap 31 06.0 */
588 compatible = "ti,sysc";
589 status = "disabled";
590 #address-cells = <1>;
591 #size-cells = <1>;
592 ranges = <0x0 0x32000 0x1000>;
593 };
594
595 target-module@38000 { /* 0x47c38000, ap 17 18.0 */
596 compatible = "ti,sysc";
597 status = "disabled";
598 #address-cells = <1>;
599 #size-cells = <1>;
600 ranges = <0x0 0x38000 0x1000>;
601 };
602
603 target-module@3a000 { /* 0x47c3a000, ap 19 1c.0 */
604 compatible = "ti,sysc";
605 status = "disabled";
606 #address-cells = <1>;
607 #size-cells = <1>;
608 ranges = <0x0 0x3a000 0x1000>;
609 };
610
611 target-module@3c000 { /* 0x47c3c000, ap 23 38.0 */
612 compatible = "ti,sysc";
613 status = "disabled";
614 #address-cells = <1>;
615 #size-cells = <1>;
616 ranges = <0x0 0x3c000 0x1000>;
617 };
618
619 target-module@3e000 { /* 0x47c3e000, ap 21 10.0 */
620 compatible = "ti,sysc";
621 status = "disabled";
622 #address-cells = <1>;
623 #size-cells = <1>;
624 ranges = <0x0 0x3e000 0x1000>;
625 };
626
627 target-module@40000 { /* 0x47c40000, ap 24 02.0 */
628 compatible = "ti,sysc";
629 status = "disabled";
630 #address-cells = <1>;
631 #size-cells = <1>;
632 ranges = <0x0 0x40000 0x1000>;
633 };
634
635 target-module@42000 { /* 0x47c42000, ap 35 34.0 */
636 compatible = "ti,sysc";
637 status = "disabled";
638 #address-cells = <1>;
639 #size-cells = <1>;
640 ranges = <0x0 0x42000 0x1000>;
641 };
642
643 target-module@44000 { /* 0x47c44000, ap 27 24.0 */
644 compatible = "ti,sysc";
645 status = "disabled";
646 #address-cells = <1>;
647 #size-cells = <1>;
648 ranges = <0x0 0x44000 0x1000>;
649 };
650
651 target-module@46000 { /* 0x47c46000, ap 25 2c.0 */
652 compatible = "ti,sysc";
653 status = "disabled";
654 #address-cells = <1>;
655 #size-cells = <1>;
656 ranges = <0x0 0x46000 0x1000>;
657 };
658 };
659};
660
661&l4_fast { /* 0x4a000000 */
662 compatible = "ti,am33xx-l4-fast", "simple-bus";
663 reg = <0x4a000000 0x800>,
664 <0x4a000800 0x800>,
665 <0x4a001000 0x400>;
666 reg-names = "ap", "la", "ia0";
667 #address-cells = <1>;
668 #size-cells = <1>;
669 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
670
671 segment@0 { /* 0x4a000000 */
672 compatible = "simple-bus";
673 #address-cells = <1>;
674 #size-cells = <1>;
675 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
676 <0x00000800 0x00000800 0x000800>, /* ap 1 */
677 <0x00001000 0x00001000 0x000400>, /* ap 2 */
678 <0x00100000 0x00100000 0x008000>, /* ap 3 */
679 <0x00108000 0x00108000 0x001000>, /* ap 4 */
680 <0x00180000 0x00180000 0x020000>, /* ap 5 */
681 <0x001a0000 0x001a0000 0x001000>, /* ap 6 */
682 <0x00200000 0x00200000 0x080000>, /* ap 7 */
683 <0x00280000 0x00280000 0x001000>, /* ap 8 */
684 <0x00300000 0x00300000 0x080000>, /* ap 9 */
685 <0x00380000 0x00380000 0x001000>; /* ap 10 */
686
687 target-module@100000 { /* 0x4a100000, ap 3 08.0 */
688 compatible = "ti,sysc-omap4-simple", "ti,sysc";
689 reg = <0x101200 0x4>,
690 <0x101208 0x4>,
691 <0x101204 0x4>;
692 reg-names = "rev", "sysc", "syss";
693 ti,sysc-mask = <0>;
694 ti,sysc-midle = <SYSC_IDLE_FORCE>,
695 <SYSC_IDLE_NO>;
696 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
697 <SYSC_IDLE_NO>;
698 ti,syss-mask = <1>;
699 clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
700 clock-names = "fck";
701 #address-cells = <1>;
702 #size-cells = <1>;
703 ranges = <0x0 0x100000 0x8000>;
704
705 mac: ethernet@0 {
706 compatible = "ti,am335x-cpsw","ti,cpsw";
707 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
708 clock-names = "fck", "cpts";
709 cpdma_channels = <8>;
710 ale_entries = <1024>;
711 bd_ram_size = <0x2000>;
712 mac_control = <0x20>;
713 slaves = <2>;
714 active_slave = <0>;
715 cpts_clock_mult = <0x80000000>;
716 cpts_clock_shift = <29>;
717 reg = <0x0 0x800
718 0x1200 0x100>;
719 #address-cells = <1>;
720 #size-cells = <1>;
721 /*
722 * c0_rx_thresh_pend
723 * c0_rx_pend
724 * c0_tx_pend
725 * c0_misc_pend
726 */
727 interrupts = <40 41 42 43>;
728 ranges = <0 0 0x8000>;
729 syscon = <&scm_conf>;
730 status = "disabled";
731
732 davinci_mdio: mdio@1000 {
733 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
734 clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
735 clock-names = "fck";
736 #address-cells = <1>;
737 #size-cells = <0>;
738 bus_freq = <1000000>;
739 reg = <0x1000 0x100>;
740 status = "disabled";
741 };
742
743 cpsw_emac0: slave@200 {
744 /* Filled in by U-Boot */
745 mac-address = [ 00 00 00 00 00 00 ];
746 phys = <&phy_gmii_sel 1 1>;
747 };
748
749 cpsw_emac1: slave@300 {
750 /* Filled in by U-Boot */
751 mac-address = [ 00 00 00 00 00 00 ];
752 phys = <&phy_gmii_sel 2 1>;
753 };
754 };
755 };
756
757 target-module@180000 { /* 0x4a180000, ap 5 10.0 */
758 compatible = "ti,sysc";
759 status = "disabled";
760 #address-cells = <1>;
761 #size-cells = <1>;
762 ranges = <0x0 0x180000 0x20000>;
763 };
764
765 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
766 compatible = "ti,sysc";
767 status = "disabled";
768 #address-cells = <1>;
769 #size-cells = <1>;
770 ranges = <0x0 0x200000 0x80000>;
771 };
772
773 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */
774 compatible = "ti,sysc-pruss", "ti,sysc";
775 reg = <0x326000 0x4>,
776 <0x326004 0x4>;
777 reg-names = "rev", "sysc";
778 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
779 SYSC_PRUSS_SUB_MWAIT)>;
780 ti,sysc-midle = <SYSC_IDLE_FORCE>,
781 <SYSC_IDLE_NO>,
782 <SYSC_IDLE_SMART>;
783 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
784 <SYSC_IDLE_NO>,
785 <SYSC_IDLE_SMART>;
786 clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>;
787 clock-names = "fck";
788 resets = <&prm_per 1>;
789 reset-names = "rstctrl";
790 #address-cells = <1>;
791 #size-cells = <1>;
792 ranges = <0x0 0x300000 0x80000>;
793 status = "disabled";
794 };
795 };
796};
797
798&l4_mpuss { /* 0x4b140000 */
799 compatible = "ti,am33xx-l4-mpuss", "simple-bus";
800 reg = <0x4b144400 0x100>,
801 <0x4b144800 0x400>;
802 reg-names = "la", "ap";
803 #address-cells = <1>;
804 #size-cells = <1>;
805 ranges = <0x00000000 0x4b140000 0x008000>; /* segment 0 */
806
807 segment@0 { /* 0x4b140000 */
808 compatible = "simple-bus";
809 #address-cells = <1>;
810 #size-cells = <1>;
811 ranges = <0x00004800 0x00004800 0x000400>, /* ap 0 */
812 <0x00001000 0x00001000 0x001000>, /* ap 1 */
813 <0x00002000 0x00002000 0x001000>, /* ap 2 */
814 <0x00004000 0x00004000 0x000400>, /* ap 3 */
815 <0x00005000 0x00005000 0x000400>, /* ap 4 */
816 <0x00000000 0x00000000 0x001000>, /* ap 5 */
817 <0x00003000 0x00003000 0x001000>, /* ap 6 */
818 <0x00000800 0x00000800 0x000800>; /* ap 7 */
819
820 target-module@0 { /* 0x4b140000, ap 5 02.2 */
821 compatible = "ti,sysc";
822 status = "disabled";
823 #address-cells = <1>;
824 #size-cells = <1>;
825 ranges = <0x00000000 0x00000000 0x00001000>,
826 <0x00001000 0x00001000 0x00001000>,
827 <0x00002000 0x00002000 0x00001000>;
828 };
829
830 target-module@3000 { /* 0x4b143000, ap 6 04.0 */
831 compatible = "ti,sysc";
832 status = "disabled";
833 #address-cells = <1>;
834 #size-cells = <1>;
835 ranges = <0x0 0x3000 0x1000>;
836 };
837 };
838};
839
840&l4_per { /* 0x48000000 */
841 compatible = "ti,am33xx-l4-per", "simple-bus";
842 reg = <0x48000000 0x800>,
843 <0x48000800 0x800>,
844 <0x48001000 0x400>,
845 <0x48001400 0x400>,
846 <0x48001800 0x400>,
847 <0x48001c00 0x400>;
848 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
849 #address-cells = <1>;
850 #size-cells = <1>;
851 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
852 <0x00100000 0x48100000 0x100000>, /* segment 1 */
853 <0x00200000 0x48200000 0x100000>, /* segment 2 */
854 <0x00300000 0x48300000 0x100000>, /* segment 3 */
855 <0x46000000 0x46000000 0x400000>, /* l3 data port */
856 <0x46400000 0x46400000 0x400000>; /* l3 data port */
857
858 segment@0 { /* 0x48000000 */
859 compatible = "simple-bus";
860 #address-cells = <1>;
861 #size-cells = <1>;
862 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
863 <0x00000800 0x00000800 0x000800>, /* ap 1 */
864 <0x00001000 0x00001000 0x000400>, /* ap 2 */
865 <0x00001400 0x00001400 0x000400>, /* ap 3 */
866 <0x00001800 0x00001800 0x000400>, /* ap 4 */
867 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
868 <0x00008000 0x00008000 0x001000>, /* ap 6 */
869 <0x00009000 0x00009000 0x001000>, /* ap 7 */
870 <0x00016000 0x00016000 0x001000>, /* ap 8 */
871 <0x00017000 0x00017000 0x001000>, /* ap 9 */
872 <0x00022000 0x00022000 0x001000>, /* ap 10 */
873 <0x00023000 0x00023000 0x001000>, /* ap 11 */
874 <0x00024000 0x00024000 0x001000>, /* ap 12 */
875 <0x00025000 0x00025000 0x001000>, /* ap 13 */
876 <0x0002a000 0x0002a000 0x001000>, /* ap 14 */
877 <0x0002b000 0x0002b000 0x001000>, /* ap 15 */
878 <0x00038000 0x00038000 0x002000>, /* ap 16 */
879 <0x0003a000 0x0003a000 0x001000>, /* ap 17 */
880 <0x00014000 0x00014000 0x001000>, /* ap 18 */
881 <0x00015000 0x00015000 0x001000>, /* ap 19 */
882 <0x0003c000 0x0003c000 0x002000>, /* ap 20 */
883 <0x0003e000 0x0003e000 0x001000>, /* ap 21 */
884 <0x00040000 0x00040000 0x001000>, /* ap 22 */
885 <0x00041000 0x00041000 0x001000>, /* ap 23 */
886 <0x00042000 0x00042000 0x001000>, /* ap 24 */
887 <0x00043000 0x00043000 0x001000>, /* ap 25 */
888 <0x00044000 0x00044000 0x001000>, /* ap 26 */
889 <0x00045000 0x00045000 0x001000>, /* ap 27 */
890 <0x00046000 0x00046000 0x001000>, /* ap 28 */
891 <0x00047000 0x00047000 0x001000>, /* ap 29 */
892 <0x00048000 0x00048000 0x001000>, /* ap 30 */
893 <0x00049000 0x00049000 0x001000>, /* ap 31 */
894 <0x0004c000 0x0004c000 0x001000>, /* ap 32 */
895 <0x0004d000 0x0004d000 0x001000>, /* ap 33 */
896 <0x00050000 0x00050000 0x002000>, /* ap 34 */
897 <0x00052000 0x00052000 0x001000>, /* ap 35 */
898 <0x00060000 0x00060000 0x001000>, /* ap 36 */
899 <0x00061000 0x00061000 0x001000>, /* ap 37 */
900 <0x00080000 0x00080000 0x010000>, /* ap 38 */
901 <0x00090000 0x00090000 0x001000>, /* ap 39 */
902 <0x000a0000 0x000a0000 0x010000>, /* ap 40 */
903 <0x000b0000 0x000b0000 0x001000>, /* ap 41 */
904 <0x00030000 0x00030000 0x001000>, /* ap 77 */
905 <0x00031000 0x00031000 0x001000>, /* ap 78 */
906 <0x0004a000 0x0004a000 0x001000>, /* ap 85 */
907 <0x0004b000 0x0004b000 0x001000>, /* ap 86 */
908 <0x000c8000 0x000c8000 0x001000>, /* ap 87 */
909 <0x000c9000 0x000c9000 0x001000>, /* ap 88 */
910 <0x000cc000 0x000cc000 0x001000>, /* ap 89 */
911 <0x000cd000 0x000cd000 0x001000>, /* ap 90 */
912 <0x000ca000 0x000ca000 0x001000>, /* ap 91 */
913 <0x000cb000 0x000cb000 0x001000>, /* ap 92 */
914 <0x46000000 0x46000000 0x400000>, /* l3 data port */
915 <0x46400000 0x46400000 0x400000>; /* l3 data port */
916
917 target-module@8000 { /* 0x48008000, ap 6 10.0 */
918 compatible = "ti,sysc";
919 status = "disabled";
920 #address-cells = <1>;
921 #size-cells = <1>;
922 ranges = <0x0 0x8000 0x1000>;
923 };
924
925 target-module@14000 { /* 0x48014000, ap 18 58.0 */
926 compatible = "ti,sysc";
927 status = "disabled";
928 #address-cells = <1>;
929 #size-cells = <1>;
930 ranges = <0x0 0x14000 0x1000>;
931 };
932
933 target-module@16000 { /* 0x48016000, ap 8 3c.0 */
934 compatible = "ti,sysc";
935 status = "disabled";
936 #address-cells = <1>;
937 #size-cells = <1>;
938 ranges = <0x0 0x16000 0x1000>;
939 };
940
941 target-module@22000 { /* 0x48022000, ap 10 12.0 */
942 compatible = "ti,sysc-omap2", "ti,sysc";
943 reg = <0x22050 0x4>,
944 <0x22054 0x4>,
945 <0x22058 0x4>;
946 reg-names = "rev", "sysc", "syss";
947 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
948 SYSC_OMAP2_SOFTRESET |
949 SYSC_OMAP2_AUTOIDLE)>;
950 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
951 <SYSC_IDLE_NO>,
952 <SYSC_IDLE_SMART>,
953 <SYSC_IDLE_SMART_WKUP>;
954 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
955 clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
956 clock-names = "fck";
957 #address-cells = <1>;
958 #size-cells = <1>;
959 ranges = <0x0 0x22000 0x1000>;
960
961 uart1: serial@0 {
962 compatible = "ti,am3352-uart", "ti,omap3-uart";
963 clock-frequency = <48000000>;
964 reg = <0x0 0x1000>;
965 interrupts = <73>;
966 status = "disabled";
967 dmas = <&edma 28 0>, <&edma 29 0>;
968 dma-names = "tx", "rx";
969 };
970 };
971
972 target-module@24000 { /* 0x48024000, ap 12 14.0 */
973 compatible = "ti,sysc-omap2", "ti,sysc";
974 reg = <0x24050 0x4>,
975 <0x24054 0x4>,
976 <0x24058 0x4>;
977 reg-names = "rev", "sysc", "syss";
978 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
979 SYSC_OMAP2_SOFTRESET |
980 SYSC_OMAP2_AUTOIDLE)>;
981 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
982 <SYSC_IDLE_NO>,
983 <SYSC_IDLE_SMART>,
984 <SYSC_IDLE_SMART_WKUP>;
985 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
986 clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>;
987 clock-names = "fck";
988 #address-cells = <1>;
989 #size-cells = <1>;
990 ranges = <0x0 0x24000 0x1000>;
991
992 uart2: serial@0 {
993 compatible = "ti,am3352-uart", "ti,omap3-uart";
994 clock-frequency = <48000000>;
995 reg = <0x0 0x1000>;
996 interrupts = <74>;
997 status = "disabled";
998 dmas = <&edma 30 0>, <&edma 31 0>;
999 dma-names = "tx", "rx";
1000 };
1001 };
1002
1003 target-module@2a000 { /* 0x4802a000, ap 14 2a.0 */
1004 compatible = "ti,sysc-omap2", "ti,sysc";
1005 reg = <0x2a000 0x8>,
1006 <0x2a010 0x8>,
1007 <0x2a090 0x8>;
1008 reg-names = "rev", "sysc", "syss";
1009 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1010 SYSC_OMAP2_ENAWAKEUP |
1011 SYSC_OMAP2_SOFTRESET |
1012 SYSC_OMAP2_AUTOIDLE)>;
1013 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1014 <SYSC_IDLE_NO>,
1015 <SYSC_IDLE_SMART>,
1016 <SYSC_IDLE_SMART_WKUP>;
1017 ti,syss-mask = <1>;
1018 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1019 clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>;
1020 clock-names = "fck";
1021 #address-cells = <1>;
1022 #size-cells = <1>;
1023 ranges = <0x0 0x2a000 0x1000>;
1024
1025 i2c1: i2c@0 {
1026 compatible = "ti,omap4-i2c";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1029 reg = <0x0 0x1000>;
1030 interrupts = <71>;
1031 status = "disabled";
1032 };
1033 };
1034
1035 target-module@30000 { /* 0x48030000, ap 77 08.0 */
1036 compatible = "ti,sysc-omap2", "ti,sysc";
1037 reg = <0x30000 0x4>,
1038 <0x30110 0x4>,
1039 <0x30114 0x4>;
1040 reg-names = "rev", "sysc", "syss";
1041 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1042 SYSC_OMAP2_SOFTRESET |
1043 SYSC_OMAP2_AUTOIDLE)>;
1044 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1045 <SYSC_IDLE_NO>,
1046 <SYSC_IDLE_SMART>;
1047 ti,syss-mask = <1>;
1048 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1049 clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>;
1050 clock-names = "fck";
1051 #address-cells = <1>;
1052 #size-cells = <1>;
1053 ranges = <0x0 0x30000 0x1000>;
1054
1055 spi0: spi@0 {
1056 compatible = "ti,omap4-mcspi";
1057 #address-cells = <1>;
1058 #size-cells = <0>;
1059 reg = <0x0 0x400>;
1060 interrupts = <65>;
1061 ti,spi-num-cs = <2>;
1062 dmas = <&edma 16 0
1063 &edma 17 0
1064 &edma 18 0
1065 &edma 19 0>;
1066 dma-names = "tx0", "rx0", "tx1", "rx1";
1067 status = "disabled";
1068 };
1069 };
1070
1071 target-module@38000 { /* 0x48038000, ap 16 02.0 */
1072 compatible = "ti,sysc-omap4-simple", "ti,sysc";
1073 reg = <0x38000 0x4>,
1074 <0x38004 0x4>;
1075 reg-names = "rev", "sysc";
1076 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1077 <SYSC_IDLE_NO>,
1078 <SYSC_IDLE_SMART>;
1079 /* Domains (P, C): per_pwrdm, l3s_clkdm */
1080 clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>;
1081 clock-names = "fck";
1082 #address-cells = <1>;
1083 #size-cells = <1>;
1084 ranges = <0x0 0x38000 0x2000>,
1085 <0x46000000 0x46000000 0x400000>;
1086
1087 mcasp0: mcasp@0 {
1088 compatible = "ti,am33xx-mcasp-audio";
1089 reg = <0x0 0x2000>,
1090 <0x46000000 0x400000>;
1091 reg-names = "mpu", "dat";
1092 interrupts = <80>, <81>;
1093 interrupt-names = "tx", "rx";
1094 status = "disabled";
1095 dmas = <&edma 8 2>,
1096 <&edma 9 2>;
1097 dma-names = "tx", "rx";
1098 };
1099 };
1100
1101 target-module@3c000 { /* 0x4803c000, ap 20 32.0 */
1102 compatible = "ti,sysc-omap4-simple", "ti,sysc";
1103 reg = <0x3c000 0x4>,
1104 <0x3c004 0x4>;
1105 reg-names = "rev", "sysc";
1106 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1107 <SYSC_IDLE_NO>,
1108 <SYSC_IDLE_SMART>;
1109 /* Domains (P, C): per_pwrdm, l3s_clkdm */
1110 clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>;
1111 clock-names = "fck";
1112 #address-cells = <1>;
1113 #size-cells = <1>;
1114 ranges = <0x0 0x3c000 0x2000>,
1115 <0x46400000 0x46400000 0x400000>;
1116
1117 mcasp1: mcasp@0 {
1118 compatible = "ti,am33xx-mcasp-audio";
1119 reg = <0x0 0x2000>,
1120 <0x46400000 0x400000>;
1121 reg-names = "mpu", "dat";
1122 interrupts = <82>, <83>;
1123 interrupt-names = "tx", "rx";
1124 status = "disabled";
1125 dmas = <&edma 10 2>,
1126 <&edma 11 2>;
1127 dma-names = "tx", "rx";
1128 };
1129 };
1130
1131 timer2_target: target-module@40000 { /* 0x48040000, ap 22 1e.0 */
1132 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1133 reg = <0x40000 0x4>,
1134 <0x40010 0x4>,
1135 <0x40014 0x4>;
1136 reg-names = "rev", "sysc", "syss";
1137 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1138 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1139 <SYSC_IDLE_NO>,
1140 <SYSC_IDLE_SMART>,
1141 <SYSC_IDLE_SMART_WKUP>;
1142 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1143 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>;
1144 clock-names = "fck";
1145 #address-cells = <1>;
1146 #size-cells = <1>;
1147 ranges = <0x0 0x40000 0x1000>;
1148
1149 timer2: timer@0 {
1150 compatible = "ti,am335x-timer";
1151 reg = <0x0 0x400>;
1152 interrupts = <68>;
1153 clocks = <&timer2_fck>;
1154 clock-names = "fck";
1155 };
1156 };
1157
1158 target-module@42000 { /* 0x48042000, ap 24 1c.0 */
1159 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1160 reg = <0x42000 0x4>,
1161 <0x42010 0x4>,
1162 <0x42014 0x4>;
1163 reg-names = "rev", "sysc", "syss";
1164 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1165 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1166 <SYSC_IDLE_NO>,
1167 <SYSC_IDLE_SMART>,
1168 <SYSC_IDLE_SMART_WKUP>;
1169 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1170 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>;
1171 clock-names = "fck";
1172 #address-cells = <1>;
1173 #size-cells = <1>;
1174 ranges = <0x0 0x42000 0x1000>;
1175
1176 timer3: timer@0 {
1177 compatible = "ti,am335x-timer";
1178 reg = <0x0 0x400>;
1179 interrupts = <69>;
1180 };
1181 };
1182
1183 target-module@44000 { /* 0x48044000, ap 26 26.0 */
1184 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1185 reg = <0x44000 0x4>,
1186 <0x44010 0x4>,
1187 <0x44014 0x4>;
1188 reg-names = "rev", "sysc", "syss";
1189 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1190 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1191 <SYSC_IDLE_NO>,
1192 <SYSC_IDLE_SMART>,
1193 <SYSC_IDLE_SMART_WKUP>;
1194 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1195 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>;
1196 clock-names = "fck";
1197 #address-cells = <1>;
1198 #size-cells = <1>;
1199 ranges = <0x0 0x44000 0x1000>;
1200
1201 timer4: timer@0 {
1202 compatible = "ti,am335x-timer";
1203 reg = <0x0 0x400>;
1204 interrupts = <92>;
1205 ti,timer-pwm;
1206 };
1207 };
1208
1209 target-module@46000 { /* 0x48046000, ap 28 28.0 */
1210 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1211 reg = <0x46000 0x4>,
1212 <0x46010 0x4>,
1213 <0x46014 0x4>;
1214 reg-names = "rev", "sysc", "syss";
1215 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1216 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1217 <SYSC_IDLE_NO>,
1218 <SYSC_IDLE_SMART>,
1219 <SYSC_IDLE_SMART_WKUP>;
1220 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1221 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>;
1222 clock-names = "fck";
1223 #address-cells = <1>;
1224 #size-cells = <1>;
1225 ranges = <0x0 0x46000 0x1000>;
1226
1227 timer5: timer@0 {
1228 compatible = "ti,am335x-timer";
1229 reg = <0x0 0x400>;
1230 interrupts = <93>;
1231 ti,timer-pwm;
1232 };
1233 };
1234
1235 target-module@48000 { /* 0x48048000, ap 30 22.0 */
1236 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1237 reg = <0x48000 0x4>,
1238 <0x48010 0x4>,
1239 <0x48014 0x4>;
1240 reg-names = "rev", "sysc", "syss";
1241 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1242 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1243 <SYSC_IDLE_NO>,
1244 <SYSC_IDLE_SMART>,
1245 <SYSC_IDLE_SMART_WKUP>;
1246 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1247 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>;
1248 clock-names = "fck";
1249 #address-cells = <1>;
1250 #size-cells = <1>;
1251 ranges = <0x0 0x48000 0x1000>;
1252
1253 timer6: timer@0 {
1254 compatible = "ti,am335x-timer";
1255 reg = <0x0 0x400>;
1256 interrupts = <94>;
1257 ti,timer-pwm;
1258 };
1259 };
1260
1261 target-module@4a000 { /* 0x4804a000, ap 85 60.0 */
1262 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1263 reg = <0x4a000 0x4>,
1264 <0x4a010 0x4>,
1265 <0x4a014 0x4>;
1266 reg-names = "rev", "sysc", "syss";
1267 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1268 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1269 <SYSC_IDLE_NO>,
1270 <SYSC_IDLE_SMART>,
1271 <SYSC_IDLE_SMART_WKUP>;
1272 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1273 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>;
1274 clock-names = "fck";
1275 #address-cells = <1>;
1276 #size-cells = <1>;
1277 ranges = <0x0 0x4a000 0x1000>;
1278
1279 timer7: timer@0 {
1280 compatible = "ti,am335x-timer";
1281 reg = <0x0 0x400>;
1282 interrupts = <95>;
1283 ti,timer-pwm;
1284 };
1285 };
1286
1287 target-module@4c000 { /* 0x4804c000, ap 32 36.0 */
1288 compatible = "ti,sysc-omap2", "ti,sysc";
1289 reg = <0x4c000 0x4>,
1290 <0x4c010 0x4>,
1291 <0x4c114 0x4>;
1292 reg-names = "rev", "sysc", "syss";
1293 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1294 SYSC_OMAP2_SOFTRESET |
1295 SYSC_OMAP2_AUTOIDLE)>;
1296 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1297 <SYSC_IDLE_NO>,
1298 <SYSC_IDLE_SMART>,
1299 <SYSC_IDLE_SMART_WKUP>;
1300 ti,syss-mask = <1>;
1301 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1302 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>,
1303 <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>;
1304 clock-names = "fck", "dbclk";
1305 #address-cells = <1>;
1306 #size-cells = <1>;
1307 ranges = <0x0 0x4c000 0x1000>;
1308
1309 gpio1: gpio@0 {
1310 compatible = "ti,omap4-gpio";
1311 gpio-ranges = <&am33xx_pinmux 0 0 8>,
1312 <&am33xx_pinmux 8 90 4>,
1313 <&am33xx_pinmux 12 12 16>,
1314 <&am33xx_pinmux 28 30 4>;
1315 gpio-controller;
1316 #gpio-cells = <2>;
1317 interrupt-controller;
1318 #interrupt-cells = <2>;
1319 reg = <0x0 0x1000>;
1320 interrupts = <98>;
1321 };
1322 };
1323
1324 target-module@50000 { /* 0x48050000, ap 34 2c.0 */
1325 compatible = "ti,sysc";
1326 status = "disabled";
1327 #address-cells = <1>;
1328 #size-cells = <1>;
1329 ranges = <0x0 0x50000 0x2000>;
1330 };
1331
1332 target-module@60000 { /* 0x48060000, ap 36 0c.0 */
1333 compatible = "ti,sysc-omap2", "ti,sysc";
1334 reg = <0x602fc 0x4>,
1335 <0x60110 0x4>,
1336 <0x60114 0x4>;
1337 reg-names = "rev", "sysc", "syss";
1338 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1339 SYSC_OMAP2_ENAWAKEUP |
1340 SYSC_OMAP2_SOFTRESET |
1341 SYSC_OMAP2_AUTOIDLE)>;
1342 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1343 <SYSC_IDLE_NO>,
1344 <SYSC_IDLE_SMART>;
1345 ti,syss-mask = <1>;
1346 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1347 clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>;
1348 clock-names = "fck";
1349 #address-cells = <1>;
1350 #size-cells = <1>;
1351 ranges = <0x0 0x60000 0x1000>;
1352
1353 mmc1: mmc@0 {
1354 compatible = "ti,am335-sdhci";
1355 ti,needs-special-reset;
1356 dmas = <&edma_xbar 24 0 0
1357 &edma_xbar 25 0 0>;
1358 dma-names = "tx", "rx";
1359 interrupts = <64>;
1360 reg = <0x0 0x1000>;
1361 status = "disabled";
1362 };
1363 };
1364
1365 target-module@80000 { /* 0x48080000, ap 38 18.0 */
1366 compatible = "ti,sysc-omap2", "ti,sysc";
1367 reg = <0x80000 0x4>,
1368 <0x80010 0x4>,
1369 <0x80014 0x4>;
1370 reg-names = "rev", "sysc", "syss";
1371 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1372 SYSC_OMAP2_SOFTRESET |
1373 SYSC_OMAP2_AUTOIDLE)>;
1374 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1375 <SYSC_IDLE_NO>,
1376 <SYSC_IDLE_SMART>;
1377 ti,syss-mask = <1>;
1378 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1379 clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>;
1380 clock-names = "fck";
1381 #address-cells = <1>;
1382 #size-cells = <1>;
1383 ranges = <0x0 0x80000 0x10000>;
1384
1385 elm: elm@0 {
1386 compatible = "ti,am3352-elm";
1387 reg = <0x0 0x2000>;
1388 interrupts = <4>;
1389 status = "disabled";
1390 };
1391 };
1392
1393 target-module@a0000 { /* 0x480a0000, ap 40 5e.0 */
1394 compatible = "ti,sysc";
1395 status = "disabled";
1396 #address-cells = <1>;
1397 #size-cells = <1>;
1398 ranges = <0x0 0xa0000 0x10000>;
1399 };
1400
1401 target-module@c8000 { /* 0x480c8000, ap 87 06.0 */
1402 compatible = "ti,sysc-omap4", "ti,sysc";
1403 reg = <0xc8000 0x4>,
1404 <0xc8010 0x4>;
1405 reg-names = "rev", "sysc";
1406 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1407 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1408 <SYSC_IDLE_NO>,
1409 <SYSC_IDLE_SMART>;
1410 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1411 clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>;
1412 clock-names = "fck";
1413 #address-cells = <1>;
1414 #size-cells = <1>;
1415 ranges = <0x0 0xc8000 0x1000>;
1416
1417 mailbox: mailbox@0 {
1418 compatible = "ti,omap4-mailbox";
1419 reg = <0x0 0x200>;
1420 interrupts = <77>;
1421 #mbox-cells = <1>;
1422 ti,mbox-num-users = <4>;
1423 ti,mbox-num-fifos = <8>;
1424 mbox_wkupm3: wkup_m3 {
1425 ti,mbox-send-noirq;
1426 ti,mbox-tx = <0 0 0>;
1427 ti,mbox-rx = <0 0 3>;
1428 };
1429 };
1430 };
1431
1432 target-module@ca000 { /* 0x480ca000, ap 91 40.0 */
1433 compatible = "ti,sysc-omap2", "ti,sysc";
1434 reg = <0xca000 0x4>,
1435 <0xca010 0x4>,
1436 <0xca014 0x4>;
1437 reg-names = "rev", "sysc", "syss";
1438 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1439 SYSC_OMAP2_ENAWAKEUP |
1440 SYSC_OMAP2_SOFTRESET |
1441 SYSC_OMAP2_AUTOIDLE)>;
1442 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1443 <SYSC_IDLE_NO>,
1444 <SYSC_IDLE_SMART>;
1445 ti,syss-mask = <1>;
1446 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1447 clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>;
1448 clock-names = "fck";
1449 #address-cells = <1>;
1450 #size-cells = <1>;
1451 ranges = <0x0 0xca000 0x1000>;
1452
1453 hwspinlock: spinlock@0 {
1454 compatible = "ti,omap4-hwspinlock";
1455 reg = <0x0 0x1000>;
1456 #hwlock-cells = <1>;
1457 };
1458 };
1459
1460 target-module@cc000 { /* 0x480cc000, ap 89 0e.0 */
1461 compatible = "ti,sysc";
1462 status = "disabled";
1463 #address-cells = <1>;
1464 #size-cells = <1>;
1465 ranges = <0x0 0xcc000 0x1000>;
1466 };
1467 };
1468
1469 segment@100000 { /* 0x48100000 */
1470 compatible = "simple-bus";
1471 #address-cells = <1>;
1472 #size-cells = <1>;
1473 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 42 */
1474 <0x0008d000 0x0018d000 0x001000>, /* ap 43 */
1475 <0x0008e000 0x0018e000 0x001000>, /* ap 44 */
1476 <0x0008f000 0x0018f000 0x001000>, /* ap 45 */
1477 <0x0009c000 0x0019c000 0x001000>, /* ap 46 */
1478 <0x0009d000 0x0019d000 0x001000>, /* ap 47 */
1479 <0x000a6000 0x001a6000 0x001000>, /* ap 48 */
1480 <0x000a7000 0x001a7000 0x001000>, /* ap 49 */
1481 <0x000a8000 0x001a8000 0x001000>, /* ap 50 */
1482 <0x000a9000 0x001a9000 0x001000>, /* ap 51 */
1483 <0x000aa000 0x001aa000 0x001000>, /* ap 52 */
1484 <0x000ab000 0x001ab000 0x001000>, /* ap 53 */
1485 <0x000ac000 0x001ac000 0x001000>, /* ap 54 */
1486 <0x000ad000 0x001ad000 0x001000>, /* ap 55 */
1487 <0x000ae000 0x001ae000 0x001000>, /* ap 56 */
1488 <0x000af000 0x001af000 0x001000>, /* ap 57 */
1489 <0x000b0000 0x001b0000 0x010000>, /* ap 58 */
1490 <0x000c0000 0x001c0000 0x001000>, /* ap 59 */
1491 <0x000cc000 0x001cc000 0x002000>, /* ap 60 */
1492 <0x000ce000 0x001ce000 0x002000>, /* ap 61 */
1493 <0x000d0000 0x001d0000 0x002000>, /* ap 62 */
1494 <0x000d2000 0x001d2000 0x002000>, /* ap 63 */
1495 <0x000d8000 0x001d8000 0x001000>, /* ap 64 */
1496 <0x000d9000 0x001d9000 0x001000>, /* ap 65 */
1497 <0x000a0000 0x001a0000 0x001000>, /* ap 79 */
1498 <0x000a1000 0x001a1000 0x001000>, /* ap 80 */
1499 <0x000a2000 0x001a2000 0x001000>, /* ap 81 */
1500 <0x000a3000 0x001a3000 0x001000>, /* ap 82 */
1501 <0x000a4000 0x001a4000 0x001000>, /* ap 83 */
1502 <0x000a5000 0x001a5000 0x001000>; /* ap 84 */
1503
1504 target-module@8c000 { /* 0x4818c000, ap 42 04.0 */
1505 compatible = "ti,sysc";
1506 status = "disabled";
1507 #address-cells = <1>;
1508 #size-cells = <1>;
1509 ranges = <0x0 0x8c000 0x1000>;
1510 };
1511
1512 target-module@8e000 { /* 0x4818e000, ap 44 0a.0 */
1513 compatible = "ti,sysc";
1514 status = "disabled";
1515 #address-cells = <1>;
1516 #size-cells = <1>;
1517 ranges = <0x0 0x8e000 0x1000>;
1518 };
1519
1520 target-module@9c000 { /* 0x4819c000, ap 46 5a.0 */
1521 compatible = "ti,sysc-omap2", "ti,sysc";
1522 reg = <0x9c000 0x8>,
1523 <0x9c010 0x8>,
1524 <0x9c090 0x8>;
1525 reg-names = "rev", "sysc", "syss";
1526 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1527 SYSC_OMAP2_ENAWAKEUP |
1528 SYSC_OMAP2_SOFTRESET |
1529 SYSC_OMAP2_AUTOIDLE)>;
1530 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1531 <SYSC_IDLE_NO>,
1532 <SYSC_IDLE_SMART>,
1533 <SYSC_IDLE_SMART_WKUP>;
1534 ti,syss-mask = <1>;
1535 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1536 clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>;
1537 clock-names = "fck";
1538 #address-cells = <1>;
1539 #size-cells = <1>;
1540 ranges = <0x0 0x9c000 0x1000>;
1541
1542 i2c2: i2c@0 {
1543 compatible = "ti,omap4-i2c";
1544 #address-cells = <1>;
1545 #size-cells = <0>;
1546 reg = <0x0 0x1000>;
1547 interrupts = <30>;
1548 status = "disabled";
1549 };
1550 };
1551
1552 target-module@a0000 { /* 0x481a0000, ap 79 24.0 */
1553 compatible = "ti,sysc-omap2", "ti,sysc";
1554 reg = <0xa0000 0x4>,
1555 <0xa0110 0x4>,
1556 <0xa0114 0x4>;
1557 reg-names = "rev", "sysc", "syss";
1558 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1559 SYSC_OMAP2_SOFTRESET |
1560 SYSC_OMAP2_AUTOIDLE)>;
1561 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1562 <SYSC_IDLE_NO>,
1563 <SYSC_IDLE_SMART>;
1564 ti,syss-mask = <1>;
1565 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1566 clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>;
1567 clock-names = "fck";
1568 #address-cells = <1>;
1569 #size-cells = <1>;
1570 ranges = <0x0 0xa0000 0x1000>;
1571
1572 spi1: spi@0 {
1573 compatible = "ti,omap4-mcspi";
1574 #address-cells = <1>;
1575 #size-cells = <0>;
1576 reg = <0x0 0x400>;
1577 interrupts = <125>;
1578 ti,spi-num-cs = <2>;
1579 dmas = <&edma 42 0
1580 &edma 43 0
1581 &edma 44 0
1582 &edma 45 0>;
1583 dma-names = "tx0", "rx0", "tx1", "rx1";
1584 status = "disabled";
1585 };
1586 };
1587
1588 target-module@a2000 { /* 0x481a2000, ap 81 2e.0 */
1589 compatible = "ti,sysc";
1590 status = "disabled";
1591 #address-cells = <1>;
1592 #size-cells = <1>;
1593 ranges = <0x0 0xa2000 0x1000>;
1594 };
1595
1596 target-module@a4000 { /* 0x481a4000, ap 83 30.0 */
1597 compatible = "ti,sysc";
1598 status = "disabled";
1599 #address-cells = <1>;
1600 #size-cells = <1>;
1601 ranges = <0x0 0xa4000 0x1000>;
1602 };
1603
1604 target-module@a6000 { /* 0x481a6000, ap 48 16.0 */
1605 compatible = "ti,sysc-omap2", "ti,sysc";
1606 reg = <0xa6050 0x4>,
1607 <0xa6054 0x4>,
1608 <0xa6058 0x4>;
1609 reg-names = "rev", "sysc", "syss";
1610 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1611 SYSC_OMAP2_SOFTRESET |
1612 SYSC_OMAP2_AUTOIDLE)>;
1613 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1614 <SYSC_IDLE_NO>,
1615 <SYSC_IDLE_SMART>,
1616 <SYSC_IDLE_SMART_WKUP>;
1617 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1618 clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>;
1619 clock-names = "fck";
1620 #address-cells = <1>;
1621 #size-cells = <1>;
1622 ranges = <0x0 0xa6000 0x1000>;
1623
1624 uart3: serial@0 {
1625 compatible = "ti,am3352-uart", "ti,omap3-uart";
1626 clock-frequency = <48000000>;
1627 reg = <0x0 0x1000>;
1628 interrupts = <44>;
1629 status = "disabled";
1630 };
1631 };
1632
1633 target-module@a8000 { /* 0x481a8000, ap 50 20.0 */
1634 compatible = "ti,sysc-omap2", "ti,sysc";
1635 reg = <0xa8050 0x4>,
1636 <0xa8054 0x4>,
1637 <0xa8058 0x4>;
1638 reg-names = "rev", "sysc", "syss";
1639 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1640 SYSC_OMAP2_SOFTRESET |
1641 SYSC_OMAP2_AUTOIDLE)>;
1642 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1643 <SYSC_IDLE_NO>,
1644 <SYSC_IDLE_SMART>,
1645 <SYSC_IDLE_SMART_WKUP>;
1646 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1647 clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>;
1648 clock-names = "fck";
1649 #address-cells = <1>;
1650 #size-cells = <1>;
1651 ranges = <0x0 0xa8000 0x1000>;
1652
1653 uart4: serial@0 {
1654 compatible = "ti,am3352-uart", "ti,omap3-uart";
1655 clock-frequency = <48000000>;
1656 reg = <0x0 0x1000>;
1657 interrupts = <45>;
1658 status = "disabled";
1659 };
1660 };
1661
1662 target-module@aa000 { /* 0x481aa000, ap 52 1a.0 */
1663 compatible = "ti,sysc-omap2", "ti,sysc";
1664 reg = <0xaa050 0x4>,
1665 <0xaa054 0x4>,
1666 <0xaa058 0x4>;
1667 reg-names = "rev", "sysc", "syss";
1668 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1669 SYSC_OMAP2_SOFTRESET |
1670 SYSC_OMAP2_AUTOIDLE)>;
1671 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1672 <SYSC_IDLE_NO>,
1673 <SYSC_IDLE_SMART>,
1674 <SYSC_IDLE_SMART_WKUP>;
1675 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1676 clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>;
1677 clock-names = "fck";
1678 #address-cells = <1>;
1679 #size-cells = <1>;
1680 ranges = <0x0 0xaa000 0x1000>;
1681
1682 uart5: serial@0 {
1683 compatible = "ti,am3352-uart", "ti,omap3-uart";
1684 clock-frequency = <48000000>;
1685 reg = <0x0 0x1000>;
1686 interrupts = <46>;
1687 status = "disabled";
1688 };
1689 };
1690
1691 target-module@ac000 { /* 0x481ac000, ap 54 38.0 */
1692 compatible = "ti,sysc-omap2", "ti,sysc";
1693 reg = <0xac000 0x4>,
1694 <0xac010 0x4>,
1695 <0xac114 0x4>;
1696 reg-names = "rev", "sysc", "syss";
1697 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1698 SYSC_OMAP2_SOFTRESET |
1699 SYSC_OMAP2_AUTOIDLE)>;
1700 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1701 <SYSC_IDLE_NO>,
1702 <SYSC_IDLE_SMART>,
1703 <SYSC_IDLE_SMART_WKUP>;
1704 ti,syss-mask = <1>;
1705 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1706 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>,
1707 <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>;
1708 clock-names = "fck", "dbclk";
1709 #address-cells = <1>;
1710 #size-cells = <1>;
1711 ranges = <0x0 0xac000 0x1000>;
1712
1713 gpio2: gpio@0 {
1714 compatible = "ti,omap4-gpio";
1715 gpio-ranges = <&am33xx_pinmux 0 34 18>,
1716 <&am33xx_pinmux 18 77 4>,
1717 <&am33xx_pinmux 22 56 10>;
1718 gpio-controller;
1719 #gpio-cells = <2>;
1720 interrupt-controller;
1721 #interrupt-cells = <2>;
1722 reg = <0x0 0x1000>;
1723 interrupts = <32>;
1724 };
1725 };
1726
1727 target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */
1728 compatible = "ti,sysc-omap2", "ti,sysc";
1729 reg = <0xae000 0x4>,
1730 <0xae010 0x4>,
1731 <0xae114 0x4>;
1732 reg-names = "rev", "sysc", "syss";
1733 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1734 SYSC_OMAP2_SOFTRESET |
1735 SYSC_OMAP2_AUTOIDLE)>;
1736 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1737 <SYSC_IDLE_NO>,
1738 <SYSC_IDLE_SMART>,
1739 <SYSC_IDLE_SMART_WKUP>;
1740 ti,syss-mask = <1>;
1741 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1742 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>,
1743 <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>;
1744 clock-names = "fck", "dbclk";
1745 #address-cells = <1>;
1746 #size-cells = <1>;
1747 ranges = <0x0 0xae000 0x1000>;
1748
1749 gpio3: gpio@0 {
1750 compatible = "ti,omap4-gpio";
1751 gpio-ranges = <&am33xx_pinmux 0 66 5>,
1752 <&am33xx_pinmux 5 98 2>,
1753 <&am33xx_pinmux 7 75 2>,
1754 <&am33xx_pinmux 13 141 1>,
1755 <&am33xx_pinmux 14 100 8>;
1756 gpio-controller;
1757 #gpio-cells = <2>;
1758 interrupt-controller;
1759 #interrupt-cells = <2>;
1760 reg = <0x0 0x1000>;
1761 interrupts = <62>;
1762 };
1763 };
1764
1765 target-module@b0000 { /* 0x481b0000, ap 58 50.0 */
1766 compatible = "ti,sysc";
1767 status = "disabled";
1768 #address-cells = <1>;
1769 #size-cells = <1>;
1770 ranges = <0x0 0xb0000 0x10000>;
1771 };
1772
1773 target-module@cc000 { /* 0x481cc000, ap 60 46.0 */
1774 compatible = "ti,sysc-omap4", "ti,sysc";
1775 reg = <0xcc020 0x4>;
1776 reg-names = "rev";
1777 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1778 clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
1779 <&dcan0_fck>;
1780 clock-names = "fck", "osc";
1781 #address-cells = <1>;
1782 #size-cells = <1>;
1783 ranges = <0x0 0xcc000 0x2000>;
1784
1785 dcan0: can@0 {
1786 compatible = "ti,am3352-d_can";
1787 reg = <0x0 0x2000>;
1788 clocks = <&dcan0_fck>;
1789 clock-names = "fck";
1790 syscon-raminit = <&scm_conf 0x644 0>;
1791 interrupts = <52>;
1792 status = "disabled";
1793 };
1794 };
1795
1796 target-module@d0000 { /* 0x481d0000, ap 62 42.0 */
1797 compatible = "ti,sysc-omap4", "ti,sysc";
1798 reg = <0xd0020 0x4>;
1799 reg-names = "rev";
1800 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1801 clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
1802 <&dcan1_fck>;
1803 clock-names = "fck", "osc";
1804 #address-cells = <1>;
1805 #size-cells = <1>;
1806 ranges = <0x0 0xd0000 0x2000>;
1807
1808 dcan1: can@0 {
1809 compatible = "ti,am3352-d_can";
1810 reg = <0x0 0x2000>;
1811 clocks = <&dcan1_fck>;
1812 clock-names = "fck";
1813 syscon-raminit = <&scm_conf 0x644 1>;
1814 interrupts = <55>;
1815 status = "disabled";
1816 };
1817 };
1818
1819 target-module@d8000 { /* 0x481d8000, ap 64 66.0 */
1820 compatible = "ti,sysc-omap2", "ti,sysc";
1821 reg = <0xd82fc 0x4>,
1822 <0xd8110 0x4>,
1823 <0xd8114 0x4>;
1824 reg-names = "rev", "sysc", "syss";
1825 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1826 SYSC_OMAP2_ENAWAKEUP |
1827 SYSC_OMAP2_SOFTRESET |
1828 SYSC_OMAP2_AUTOIDLE)>;
1829 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1830 <SYSC_IDLE_NO>,
1831 <SYSC_IDLE_SMART>;
1832 ti,syss-mask = <1>;
1833 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1834 clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>;
1835 clock-names = "fck";
1836 #address-cells = <1>;
1837 #size-cells = <1>;
1838 ranges = <0x0 0xd8000 0x1000>;
1839
1840 mmc2: mmc@0 {
1841 compatible = "ti,am335-sdhci";
1842 ti,needs-special-reset;
1843 dmas = <&edma 2 0
1844 &edma 3 0>;
1845 dma-names = "tx", "rx";
1846 interrupts = <28>;
1847 reg = <0x0 0x1000>;
1848 status = "disabled";
1849 };
1850 };
1851 };
1852
1853 segment@200000 { /* 0x48200000 */
1854 compatible = "simple-bus";
1855 #address-cells = <1>;
1856 #size-cells = <1>;
1857 };
1858
1859 segment@300000 { /* 0x48300000 */
1860 compatible = "simple-bus";
1861 #address-cells = <1>;
1862 #size-cells = <1>;
1863 ranges = <0x00000000 0x00300000 0x001000>, /* ap 66 */
1864 <0x00001000 0x00301000 0x001000>, /* ap 67 */
1865 <0x00002000 0x00302000 0x001000>, /* ap 68 */
1866 <0x00003000 0x00303000 0x001000>, /* ap 69 */
1867 <0x00004000 0x00304000 0x001000>, /* ap 70 */
1868 <0x00005000 0x00305000 0x001000>, /* ap 71 */
1869 <0x0000e000 0x0030e000 0x001000>, /* ap 72 */
1870 <0x0000f000 0x0030f000 0x001000>, /* ap 73 */
1871 <0x00018000 0x00318000 0x004000>, /* ap 74 */
1872 <0x0001c000 0x0031c000 0x001000>, /* ap 75 */
1873 <0x00010000 0x00310000 0x002000>, /* ap 76 */
1874 <0x00012000 0x00312000 0x001000>, /* ap 93 */
1875 <0x00015000 0x00315000 0x001000>, /* ap 94 */
1876 <0x00016000 0x00316000 0x001000>, /* ap 95 */
1877 <0x00017000 0x00317000 0x001000>, /* ap 96 */
1878 <0x00013000 0x00313000 0x001000>, /* ap 97 */
1879 <0x00014000 0x00314000 0x001000>, /* ap 98 */
1880 <0x00020000 0x00320000 0x001000>, /* ap 99 */
1881 <0x00021000 0x00321000 0x001000>, /* ap 100 */
1882 <0x00022000 0x00322000 0x001000>, /* ap 101 */
1883 <0x00023000 0x00323000 0x001000>, /* ap 102 */
1884 <0x00024000 0x00324000 0x001000>, /* ap 103 */
1885 <0x00025000 0x00325000 0x001000>; /* ap 104 */
1886
1887 target-module@0 { /* 0x48300000, ap 66 48.0 */
1888 compatible = "ti,sysc-omap4", "ti,sysc";
1889 reg = <0x0 0x4>,
1890 <0x4 0x4>;
1891 reg-names = "rev", "sysc";
1892 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1893 <SYSC_IDLE_NO>,
1894 <SYSC_IDLE_SMART>,
1895 <SYSC_IDLE_SMART_WKUP>;
1896 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1897 <SYSC_IDLE_NO>,
1898 <SYSC_IDLE_SMART>,
1899 <SYSC_IDLE_SMART_WKUP>;
1900 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1901 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>;
1902 clock-names = "fck";
1903 #address-cells = <1>;
1904 #size-cells = <1>;
1905 ranges = <0x0 0x0 0x1000>;
1906
1907 epwmss0: epwmss@0 {
1908 compatible = "ti,am33xx-pwmss";
1909 reg = <0x0 0x10>;
1910 #address-cells = <1>;
1911 #size-cells = <1>;
1912 status = "disabled";
1913 ranges = <0 0 0x1000>;
1914
1915 ecap0: ecap@100 {
1916 compatible = "ti,am3352-ecap",
1917 "ti,am33xx-ecap";
1918 #pwm-cells = <3>;
1919 reg = <0x100 0x80>;
1920 clocks = <&l4ls_gclk>;
1921 clock-names = "fck";
1922 interrupts = <31>;
1923 interrupt-names = "ecap0";
1924 status = "disabled";
1925 };
1926
1927 ehrpwm0: pwm@200 {
1928 compatible = "ti,am3352-ehrpwm",
1929 "ti,am33xx-ehrpwm";
1930 #pwm-cells = <3>;
1931 reg = <0x200 0x80>;
1932 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1933 clock-names = "tbclk", "fck";
1934 status = "disabled";
1935 };
1936 };
1937 };
1938
1939 target-module@2000 { /* 0x48302000, ap 68 52.0 */
1940 compatible = "ti,sysc-omap4", "ti,sysc";
1941 reg = <0x2000 0x4>,
1942 <0x2004 0x4>;
1943 reg-names = "rev", "sysc";
1944 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1945 <SYSC_IDLE_NO>,
1946 <SYSC_IDLE_SMART>,
1947 <SYSC_IDLE_SMART_WKUP>;
1948 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1949 <SYSC_IDLE_NO>,
1950 <SYSC_IDLE_SMART>,
1951 <SYSC_IDLE_SMART_WKUP>;
1952 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1953 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>;
1954 clock-names = "fck";
1955 #address-cells = <1>;
1956 #size-cells = <1>;
1957 ranges = <0x0 0x2000 0x1000>;
1958
1959 epwmss1: epwmss@0 {
1960 compatible = "ti,am33xx-pwmss";
1961 reg = <0x0 0x10>;
1962 #address-cells = <1>;
1963 #size-cells = <1>;
1964 status = "disabled";
1965 ranges = <0 0 0x1000>;
1966
1967 ecap1: ecap@100 {
1968 compatible = "ti,am3352-ecap",
1969 "ti,am33xx-ecap";
1970 #pwm-cells = <3>;
1971 reg = <0x100 0x80>;
1972 clocks = <&l4ls_gclk>;
1973 clock-names = "fck";
1974 interrupts = <47>;
1975 interrupt-names = "ecap1";
1976 status = "disabled";
1977 };
1978
1979 ehrpwm1: pwm@200 {
1980 compatible = "ti,am3352-ehrpwm",
1981 "ti,am33xx-ehrpwm";
1982 #pwm-cells = <3>;
1983 reg = <0x200 0x80>;
1984 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1985 clock-names = "tbclk", "fck";
1986 status = "disabled";
1987 };
1988 };
1989 };
1990
1991 target-module@4000 { /* 0x48304000, ap 70 44.0 */
1992 compatible = "ti,sysc-omap4", "ti,sysc";
1993 reg = <0x4000 0x4>,
1994 <0x4004 0x4>;
1995 reg-names = "rev", "sysc";
1996 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1997 <SYSC_IDLE_NO>,
1998 <SYSC_IDLE_SMART>,
1999 <SYSC_IDLE_SMART_WKUP>;
2000 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2001 <SYSC_IDLE_NO>,
2002 <SYSC_IDLE_SMART>,
2003 <SYSC_IDLE_SMART_WKUP>;
2004 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2005 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>;
2006 clock-names = "fck";
2007 #address-cells = <1>;
2008 #size-cells = <1>;
2009 ranges = <0x0 0x4000 0x1000>;
2010
2011 epwmss2: epwmss@0 {
2012 compatible = "ti,am33xx-pwmss";
2013 reg = <0x0 0x10>;
2014 #address-cells = <1>;
2015 #size-cells = <1>;
2016 status = "disabled";
2017 ranges = <0 0 0x1000>;
2018
2019 ecap2: ecap@100 {
2020 compatible = "ti,am3352-ecap",
2021 "ti,am33xx-ecap";
2022 #pwm-cells = <3>;
2023 reg = <0x100 0x80>;
2024 clocks = <&l4ls_gclk>;
2025 clock-names = "fck";
2026 interrupts = <61>;
2027 interrupt-names = "ecap2";
2028 status = "disabled";
2029 };
2030
2031 ehrpwm2: pwm@200 {
2032 compatible = "ti,am3352-ehrpwm",
2033 "ti,am33xx-ehrpwm";
2034 #pwm-cells = <3>;
2035 reg = <0x200 0x80>;
2036 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
2037 clock-names = "tbclk", "fck";
2038 status = "disabled";
2039 };
2040 };
2041 };
2042
2043 target-module@e000 { /* 0x4830e000, ap 72 4a.0 */
2044 compatible = "ti,sysc-omap4", "ti,sysc";
2045 reg = <0xe000 0x4>,
2046 <0xe054 0x4>;
2047 reg-names = "rev", "sysc";
2048 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2049 <SYSC_IDLE_NO>,
2050 <SYSC_IDLE_SMART>;
2051 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2052 <SYSC_IDLE_NO>,
2053 <SYSC_IDLE_SMART>;
2054 /* Domains (P, C): per_pwrdm, lcdc_clkdm */
2055 clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>;
2056 clock-names = "fck";
2057 #address-cells = <1>;
2058 #size-cells = <1>;
2059 ranges = <0x0 0xe000 0x1000>;
2060
2061 lcdc: lcdc@0 {
2062 compatible = "ti,am33xx-tilcdc";
2063 reg = <0x0 0x1000>;
2064 interrupts = <36>;
2065 status = "disabled";
2066 };
2067 };
2068
2069 target-module@10000 { /* 0x48310000, ap 76 4e.1 */
2070 compatible = "ti,sysc-omap2", "ti,sysc";
2071 reg = <0x11fe0 0x4>,
2072 <0x11fe4 0x4>;
2073 reg-names = "rev", "sysc";
2074 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2075 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2076 <SYSC_IDLE_NO>;
2077 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2078 clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>;
2079 clock-names = "fck";
2080 #address-cells = <1>;
2081 #size-cells = <1>;
2082 ranges = <0x0 0x10000 0x2000>;
2083
2084 rng: rng@0 {
2085 compatible = "ti,omap4-rng";
2086 reg = <0x0 0x2000>;
2087 interrupts = <111>;
2088 };
2089 };
2090
2091 target-module@13000 { /* 0x48313000, ap 97 62.0 */
2092 compatible = "ti,sysc";
2093 status = "disabled";
2094 #address-cells = <1>;
2095 #size-cells = <1>;
2096 ranges = <0x0 0x13000 0x1000>;
2097 };
2098
2099 target-module@15000 { /* 0x48315000, ap 94 56.0 */
2100 compatible = "ti,sysc";
2101 status = "disabled";
2102 #address-cells = <1>;
2103 #size-cells = <1>;
2104 ranges = <0x00000000 0x00015000 0x00001000>,
2105 <0x00001000 0x00016000 0x00001000>;
2106 };
2107
2108 target-module@18000 { /* 0x48318000, ap 74 4c.0 */
2109 compatible = "ti,sysc";
2110 status = "disabled";
2111 #address-cells = <1>;
2112 #size-cells = <1>;
2113 ranges = <0x0 0x18000 0x4000>;
2114 };
2115
2116 target-module@20000 { /* 0x48320000, ap 99 34.0 */
2117 compatible = "ti,sysc";
2118 status = "disabled";
2119 #address-cells = <1>;
2120 #size-cells = <1>;
2121 ranges = <0x0 0x20000 0x1000>;
2122 };
2123
2124 target-module@22000 { /* 0x48322000, ap 101 3e.0 */
2125 compatible = "ti,sysc";
2126 status = "disabled";
2127 #address-cells = <1>;
2128 #size-cells = <1>;
2129 ranges = <0x0 0x22000 0x1000>;
2130 };
2131
2132 target-module@24000 { /* 0x48324000, ap 103 68.0 */
2133 compatible = "ti,sysc";
2134 status = "disabled";
2135 #address-cells = <1>;
2136 #size-cells = <1>;
2137 ranges = <0x0 0x24000 0x1000>;
2138 };
2139 };
2140};
2141