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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include "ice_dcb_lib.h"
5#include "ice_dcb_nl.h"
6
7/**
8 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
9 * @vsi: the VSI being configured
10 * @ena_tc: TC map to be enabled
11 */
12void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
13{
14 struct net_device *netdev = vsi->netdev;
15 struct ice_pf *pf = vsi->back;
16 struct ice_dcbx_cfg *dcbcfg;
17 u8 netdev_tc;
18 int i;
19
20 if (!netdev)
21 return;
22
23 if (!ena_tc) {
24 netdev_reset_tc(netdev);
25 return;
26 }
27
28 if (netdev_set_num_tc(netdev, vsi->tc_cfg.numtc))
29 return;
30
31 dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
32
33 ice_for_each_traffic_class(i)
34 if (vsi->tc_cfg.ena_tc & BIT(i))
35 netdev_set_tc_queue(netdev,
36 vsi->tc_cfg.tc_info[i].netdev_tc,
37 vsi->tc_cfg.tc_info[i].qcount_tx,
38 vsi->tc_cfg.tc_info[i].qoffset);
39
40 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
41 u8 ets_tc = dcbcfg->etscfg.prio_table[i];
42
43 /* Get the mapped netdev TC# for the UP */
44 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
45 netdev_set_prio_tc_map(netdev, i, netdev_tc);
46 }
47}
48
49/**
50 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
51 * @dcbcfg: DCB config to evaluate for enabled TCs
52 */
53u8 ice_dcb_get_ena_tc(struct ice_dcbx_cfg *dcbcfg)
54{
55 u8 i, num_tc, ena_tc = 1;
56
57 num_tc = ice_dcb_get_num_tc(dcbcfg);
58
59 for (i = 0; i < num_tc; i++)
60 ena_tc |= BIT(i);
61
62 return ena_tc;
63}
64
65/**
66 * ice_is_pfc_causing_hung_q
67 * @pf: pointer to PF structure
68 * @txqueue: Tx queue which is supposedly hung queue
69 *
70 * find if PFC is causing the hung queue, if yes return true else false
71 */
72bool ice_is_pfc_causing_hung_q(struct ice_pf *pf, unsigned int txqueue)
73{
74 u8 num_tcs = 0, i, tc, up_mapped_tc, up_in_tc = 0;
75 u64 ref_prio_xoff[ICE_MAX_UP];
76 struct ice_vsi *vsi;
77 u32 up2tc;
78
79 vsi = ice_get_main_vsi(pf);
80 if (!vsi)
81 return false;
82
83 ice_for_each_traffic_class(i)
84 if (vsi->tc_cfg.ena_tc & BIT(i))
85 num_tcs++;
86
87 /* first find out the TC to which the hung queue belongs to */
88 for (tc = 0; tc < num_tcs - 1; tc++)
89 if (ice_find_q_in_range(vsi->tc_cfg.tc_info[tc].qoffset,
90 vsi->tc_cfg.tc_info[tc + 1].qoffset,
91 txqueue))
92 break;
93
94 /* Build a bit map of all UPs associated to the suspect hung queue TC,
95 * so that we check for its counter increment.
96 */
97 up2tc = rd32(&pf->hw, PRTDCB_TUP2TC);
98 for (i = 0; i < ICE_MAX_UP; i++) {
99 up_mapped_tc = (up2tc >> (i * 3)) & 0x7;
100 if (up_mapped_tc == tc)
101 up_in_tc |= BIT(i);
102 }
103
104 /* Now that we figured out that hung queue is PFC enabled, still the
105 * Tx timeout can be legitimate. So to make sure Tx timeout is
106 * absolutely caused by PFC storm, check if the counters are
107 * incrementing.
108 */
109 for (i = 0; i < ICE_MAX_UP; i++)
110 if (up_in_tc & BIT(i))
111 ref_prio_xoff[i] = pf->stats.priority_xoff_rx[i];
112
113 ice_update_dcb_stats(pf);
114
115 for (i = 0; i < ICE_MAX_UP; i++)
116 if (up_in_tc & BIT(i))
117 if (pf->stats.priority_xoff_rx[i] > ref_prio_xoff[i])
118 return true;
119
120 return false;
121}
122
123/**
124 * ice_dcb_get_mode - gets the DCB mode
125 * @port_info: pointer to port info structure
126 * @host: if set it's HOST if not it's MANAGED
127 */
128static u8 ice_dcb_get_mode(struct ice_port_info *port_info, bool host)
129{
130 u8 mode;
131
132 if (host)
133 mode = DCB_CAP_DCBX_HOST;
134 else
135 mode = DCB_CAP_DCBX_LLD_MANAGED;
136
137 if (port_info->local_dcbx_cfg.dcbx_mode & ICE_DCBX_MODE_CEE)
138 return mode | DCB_CAP_DCBX_VER_CEE;
139 else
140 return mode | DCB_CAP_DCBX_VER_IEEE;
141}
142
143/**
144 * ice_dcb_get_num_tc - Get the number of TCs from DCBX config
145 * @dcbcfg: config to retrieve number of TCs from
146 */
147u8 ice_dcb_get_num_tc(struct ice_dcbx_cfg *dcbcfg)
148{
149 bool tc_unused = false;
150 u8 num_tc = 0;
151 u8 ret = 0;
152 int i;
153
154 /* Scan the ETS Config Priority Table to find traffic classes
155 * enabled and create a bitmask of enabled TCs
156 */
157 for (i = 0; i < CEE_DCBX_MAX_PRIO; i++)
158 num_tc |= BIT(dcbcfg->etscfg.prio_table[i]);
159
160 /* Scan bitmask for contiguous TCs starting with TC0 */
161 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
162 if (num_tc & BIT(i)) {
163 if (!tc_unused) {
164 ret++;
165 } else {
166 pr_err("Non-contiguous TCs - Disabling DCB\n");
167 return 1;
168 }
169 } else {
170 tc_unused = true;
171 }
172 }
173
174 /* There is always at least 1 TC */
175 if (!ret)
176 ret = 1;
177
178 return ret;
179}
180
181/**
182 * ice_dcb_get_tc - Get the TC associated with the queue
183 * @vsi: ptr to the VSI
184 * @queue_index: queue number associated with VSI
185 */
186u8 ice_dcb_get_tc(struct ice_vsi *vsi, int queue_index)
187{
188 return vsi->tx_rings[queue_index]->dcb_tc;
189}
190
191/**
192 * ice_vsi_cfg_dcb_rings - Update rings to reflect DCB TC
193 * @vsi: VSI owner of rings being updated
194 */
195void ice_vsi_cfg_dcb_rings(struct ice_vsi *vsi)
196{
197 struct ice_ring *tx_ring, *rx_ring;
198 u16 qoffset, qcount;
199 int i, n;
200
201 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
202 /* Reset the TC information */
203 for (i = 0; i < vsi->num_txq; i++) {
204 tx_ring = vsi->tx_rings[i];
205 tx_ring->dcb_tc = 0;
206 }
207 for (i = 0; i < vsi->num_rxq; i++) {
208 rx_ring = vsi->rx_rings[i];
209 rx_ring->dcb_tc = 0;
210 }
211 return;
212 }
213
214 ice_for_each_traffic_class(n) {
215 if (!(vsi->tc_cfg.ena_tc & BIT(n)))
216 break;
217
218 qoffset = vsi->tc_cfg.tc_info[n].qoffset;
219 qcount = vsi->tc_cfg.tc_info[n].qcount_tx;
220 for (i = qoffset; i < (qoffset + qcount); i++) {
221 tx_ring = vsi->tx_rings[i];
222 rx_ring = vsi->rx_rings[i];
223 tx_ring->dcb_tc = n;
224 rx_ring->dcb_tc = n;
225 }
226 }
227}
228
229/**
230 * ice_dcb_bwchk - check if ETS bandwidth input parameters are correct
231 * @pf: pointer to the PF struct
232 * @dcbcfg: pointer to DCB config structure
233 */
234int ice_dcb_bwchk(struct ice_pf *pf, struct ice_dcbx_cfg *dcbcfg)
235{
236 struct ice_dcb_ets_cfg *etscfg = &dcbcfg->etscfg;
237 u8 num_tc, total_bw = 0;
238 int i;
239
240 /* returns number of contigous TCs and 1 TC for non-contigous TCs,
241 * since at least 1 TC has to be configured
242 */
243 num_tc = ice_dcb_get_num_tc(dcbcfg);
244
245 /* no bandwidth checks required if there's only one TC, so assign
246 * all bandwidth to TC0 and return
247 */
248 if (num_tc == 1) {
249 etscfg->tcbwtable[0] = ICE_TC_MAX_BW;
250 return 0;
251 }
252
253 for (i = 0; i < num_tc; i++)
254 total_bw += etscfg->tcbwtable[i];
255
256 if (!total_bw) {
257 etscfg->tcbwtable[0] = ICE_TC_MAX_BW;
258 } else if (total_bw != ICE_TC_MAX_BW) {
259 dev_err(ice_pf_to_dev(pf), "Invalid config, total bandwidth must equal 100\n");
260 return -EINVAL;
261 }
262
263 return 0;
264}
265
266/**
267 * ice_pf_dcb_cfg - Apply new DCB configuration
268 * @pf: pointer to the PF struct
269 * @new_cfg: DCBX config to apply
270 * @locked: is the RTNL held
271 */
272int ice_pf_dcb_cfg(struct ice_pf *pf, struct ice_dcbx_cfg *new_cfg, bool locked)
273{
274 struct ice_aqc_port_ets_elem buf = { 0 };
275 struct ice_dcbx_cfg *old_cfg, *curr_cfg;
276 struct device *dev = ice_pf_to_dev(pf);
277 int ret = ICE_DCB_NO_HW_CHG;
278 struct ice_vsi *pf_vsi;
279
280 curr_cfg = &pf->hw.port_info->local_dcbx_cfg;
281
282 /* FW does not care if change happened */
283 if (!pf->hw.port_info->is_sw_lldp)
284 ret = ICE_DCB_HW_CHG_RST;
285
286 /* Enable DCB tagging only when more than one TC */
287 if (ice_dcb_get_num_tc(new_cfg) > 1) {
288 dev_dbg(dev, "DCB tagging enabled (num TC > 1)\n");
289 set_bit(ICE_FLAG_DCB_ENA, pf->flags);
290 } else {
291 dev_dbg(dev, "DCB tagging disabled (num TC = 1)\n");
292 clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
293 }
294
295 if (!memcmp(new_cfg, curr_cfg, sizeof(*new_cfg))) {
296 dev_dbg(dev, "No change in DCB config required\n");
297 return ret;
298 }
299
300 if (ice_dcb_bwchk(pf, new_cfg))
301 return -EINVAL;
302
303 /* Store old config in case FW config fails */
304 old_cfg = kmemdup(curr_cfg, sizeof(*old_cfg), GFP_KERNEL);
305 if (!old_cfg)
306 return -ENOMEM;
307
308 dev_info(dev, "Commit DCB Configuration to the hardware\n");
309 pf_vsi = ice_get_main_vsi(pf);
310 if (!pf_vsi) {
311 dev_dbg(dev, "PF VSI doesn't exist\n");
312 ret = -EINVAL;
313 goto free_cfg;
314 }
315
316 /* avoid race conditions by holding the lock while disabling and
317 * re-enabling the VSI
318 */
319 if (!locked)
320 rtnl_lock();
321 ice_dis_vsi(pf_vsi, true);
322
323 memcpy(curr_cfg, new_cfg, sizeof(*curr_cfg));
324 memcpy(&curr_cfg->etsrec, &curr_cfg->etscfg, sizeof(curr_cfg->etsrec));
325 memcpy(&new_cfg->etsrec, &curr_cfg->etscfg, sizeof(curr_cfg->etsrec));
326
327 /* Only send new config to HW if we are in SW LLDP mode. Otherwise,
328 * the new config came from the HW in the first place.
329 */
330 if (pf->hw.port_info->is_sw_lldp) {
331 ret = ice_set_dcb_cfg(pf->hw.port_info);
332 if (ret) {
333 dev_err(dev, "Set DCB Config failed\n");
334 /* Restore previous settings to local config */
335 memcpy(curr_cfg, old_cfg, sizeof(*curr_cfg));
336 goto out;
337 }
338 }
339
340 ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
341 if (ret) {
342 dev_err(dev, "Query Port ETS failed\n");
343 goto out;
344 }
345
346 ice_pf_dcb_recfg(pf);
347
348out:
349 ice_ena_vsi(pf_vsi, true);
350 if (!locked)
351 rtnl_unlock();
352free_cfg:
353 kfree(old_cfg);
354 return ret;
355}
356
357/**
358 * ice_cfg_etsrec_defaults - Set default ETS recommended DCB config
359 * @pi: port information structure
360 */
361static void ice_cfg_etsrec_defaults(struct ice_port_info *pi)
362{
363 struct ice_dcbx_cfg *dcbcfg = &pi->local_dcbx_cfg;
364 u8 i;
365
366 /* Ensure ETS recommended DCB configuration is not already set */
367 if (dcbcfg->etsrec.maxtcs)
368 return;
369
370 /* In CEE mode, set the default to 1 TC */
371 dcbcfg->etsrec.maxtcs = 1;
372 for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
373 dcbcfg->etsrec.tcbwtable[i] = i ? 0 : 100;
374 dcbcfg->etsrec.tsatable[i] = i ? ICE_IEEE_TSA_STRICT :
375 ICE_IEEE_TSA_ETS;
376 }
377}
378
379/**
380 * ice_dcb_need_recfg - Check if DCB needs reconfig
381 * @pf: board private structure
382 * @old_cfg: current DCB config
383 * @new_cfg: new DCB config
384 */
385static bool
386ice_dcb_need_recfg(struct ice_pf *pf, struct ice_dcbx_cfg *old_cfg,
387 struct ice_dcbx_cfg *new_cfg)
388{
389 struct device *dev = ice_pf_to_dev(pf);
390 bool need_reconfig = false;
391
392 /* Check if ETS configuration has changed */
393 if (memcmp(&new_cfg->etscfg, &old_cfg->etscfg,
394 sizeof(new_cfg->etscfg))) {
395 /* If Priority Table has changed reconfig is needed */
396 if (memcmp(&new_cfg->etscfg.prio_table,
397 &old_cfg->etscfg.prio_table,
398 sizeof(new_cfg->etscfg.prio_table))) {
399 need_reconfig = true;
400 dev_dbg(dev, "ETS UP2TC changed.\n");
401 }
402
403 if (memcmp(&new_cfg->etscfg.tcbwtable,
404 &old_cfg->etscfg.tcbwtable,
405 sizeof(new_cfg->etscfg.tcbwtable)))
406 dev_dbg(dev, "ETS TC BW Table changed.\n");
407
408 if (memcmp(&new_cfg->etscfg.tsatable,
409 &old_cfg->etscfg.tsatable,
410 sizeof(new_cfg->etscfg.tsatable)))
411 dev_dbg(dev, "ETS TSA Table changed.\n");
412 }
413
414 /* Check if PFC configuration has changed */
415 if (memcmp(&new_cfg->pfc, &old_cfg->pfc, sizeof(new_cfg->pfc))) {
416 need_reconfig = true;
417 dev_dbg(dev, "PFC config change detected.\n");
418 }
419
420 /* Check if APP Table has changed */
421 if (memcmp(&new_cfg->app, &old_cfg->app, sizeof(new_cfg->app))) {
422 need_reconfig = true;
423 dev_dbg(dev, "APP Table change detected.\n");
424 }
425
426 dev_dbg(dev, "dcb need_reconfig=%d\n", need_reconfig);
427 return need_reconfig;
428}
429
430/**
431 * ice_dcb_rebuild - rebuild DCB post reset
432 * @pf: physical function instance
433 */
434void ice_dcb_rebuild(struct ice_pf *pf)
435{
436 struct ice_aqc_port_ets_elem buf = { 0 };
437 struct device *dev = ice_pf_to_dev(pf);
438 struct ice_dcbx_cfg *err_cfg;
439 enum ice_status ret;
440
441 ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
442 if (ret) {
443 dev_err(dev, "Query Port ETS failed\n");
444 goto dcb_error;
445 }
446
447 mutex_lock(&pf->tc_mutex);
448
449 if (!pf->hw.port_info->is_sw_lldp)
450 ice_cfg_etsrec_defaults(pf->hw.port_info);
451
452 ret = ice_set_dcb_cfg(pf->hw.port_info);
453 if (ret) {
454 dev_err(dev, "Failed to set DCB config in rebuild\n");
455 goto dcb_error;
456 }
457
458 if (!pf->hw.port_info->is_sw_lldp) {
459 ret = ice_cfg_lldp_mib_change(&pf->hw, true);
460 if (ret && !pf->hw.port_info->is_sw_lldp) {
461 dev_err(dev, "Failed to register for MIB changes\n");
462 goto dcb_error;
463 }
464 }
465
466 dev_info(dev, "DCB info restored\n");
467 ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
468 if (ret) {
469 dev_err(dev, "Query Port ETS failed\n");
470 goto dcb_error;
471 }
472
473 mutex_unlock(&pf->tc_mutex);
474
475 return;
476
477dcb_error:
478 dev_err(dev, "Disabling DCB until new settings occur\n");
479 err_cfg = kzalloc(sizeof(*err_cfg), GFP_KERNEL);
480 if (!err_cfg) {
481 mutex_unlock(&pf->tc_mutex);
482 return;
483 }
484
485 err_cfg->etscfg.willing = true;
486 err_cfg->etscfg.tcbwtable[0] = ICE_TC_MAX_BW;
487 err_cfg->etscfg.tsatable[0] = ICE_IEEE_TSA_ETS;
488 memcpy(&err_cfg->etsrec, &err_cfg->etscfg, sizeof(err_cfg->etsrec));
489 /* Coverity warns the return code of ice_pf_dcb_cfg() is not checked
490 * here as is done for other calls to that function. That check is
491 * not necessary since this is in this function's error cleanup path.
492 * Suppress the Coverity warning with the following comment...
493 */
494 /* coverity[check_return] */
495 ice_pf_dcb_cfg(pf, err_cfg, false);
496 kfree(err_cfg);
497
498 mutex_unlock(&pf->tc_mutex);
499}
500
501/**
502 * ice_dcb_init_cfg - set the initial DCB config in SW
503 * @pf: PF to apply config to
504 * @locked: Is the RTNL held
505 */
506static int ice_dcb_init_cfg(struct ice_pf *pf, bool locked)
507{
508 struct ice_dcbx_cfg *newcfg;
509 struct ice_port_info *pi;
510 int ret = 0;
511
512 pi = pf->hw.port_info;
513 newcfg = kmemdup(&pi->local_dcbx_cfg, sizeof(*newcfg), GFP_KERNEL);
514 if (!newcfg)
515 return -ENOMEM;
516
517 memset(&pi->local_dcbx_cfg, 0, sizeof(*newcfg));
518
519 dev_info(ice_pf_to_dev(pf), "Configuring initial DCB values\n");
520 if (ice_pf_dcb_cfg(pf, newcfg, locked))
521 ret = -EINVAL;
522
523 kfree(newcfg);
524
525 return ret;
526}
527
528/**
529 * ice_dcb_sw_dflt_cfg - Apply a default DCB config
530 * @pf: PF to apply config to
531 * @ets_willing: configure ETS willing
532 * @locked: was this function called with RTNL held
533 */
534static int ice_dcb_sw_dflt_cfg(struct ice_pf *pf, bool ets_willing, bool locked)
535{
536 struct ice_aqc_port_ets_elem buf = { 0 };
537 struct ice_dcbx_cfg *dcbcfg;
538 struct ice_port_info *pi;
539 struct ice_hw *hw;
540 int ret;
541
542 hw = &pf->hw;
543 pi = hw->port_info;
544 dcbcfg = kzalloc(sizeof(*dcbcfg), GFP_KERNEL);
545 if (!dcbcfg)
546 return -ENOMEM;
547
548 memset(&pi->local_dcbx_cfg, 0, sizeof(*dcbcfg));
549
550 dcbcfg->etscfg.willing = ets_willing ? 1 : 0;
551 dcbcfg->etscfg.maxtcs = hw->func_caps.common_cap.maxtc;
552 dcbcfg->etscfg.tcbwtable[0] = 100;
553 dcbcfg->etscfg.tsatable[0] = ICE_IEEE_TSA_ETS;
554
555 memcpy(&dcbcfg->etsrec, &dcbcfg->etscfg,
556 sizeof(dcbcfg->etsrec));
557 dcbcfg->etsrec.willing = 0;
558
559 dcbcfg->pfc.willing = 1;
560 dcbcfg->pfc.pfccap = hw->func_caps.common_cap.maxtc;
561
562 dcbcfg->numapps = 1;
563 dcbcfg->app[0].selector = ICE_APP_SEL_ETHTYPE;
564 dcbcfg->app[0].priority = 3;
565 dcbcfg->app[0].prot_id = ICE_APP_PROT_ID_FCOE;
566
567 ret = ice_pf_dcb_cfg(pf, dcbcfg, locked);
568 kfree(dcbcfg);
569 if (ret)
570 return ret;
571
572 return ice_query_port_ets(pi, &buf, sizeof(buf), NULL);
573}
574
575/**
576 * ice_dcb_tc_contig - Check that TCs are contiguous
577 * @prio_table: pointer to priority table
578 *
579 * Check if TCs begin with TC0 and are contiguous
580 */
581static bool ice_dcb_tc_contig(u8 *prio_table)
582{
583 bool found_empty = false;
584 u8 used_tc = 0;
585 int i;
586
587 /* Create a bitmap of used TCs */
588 for (i = 0; i < CEE_DCBX_MAX_PRIO; i++)
589 used_tc |= BIT(prio_table[i]);
590
591 for (i = 0; i < CEE_DCBX_MAX_PRIO; i++) {
592 if (used_tc & BIT(i)) {
593 if (found_empty)
594 return false;
595 } else {
596 found_empty = true;
597 }
598 }
599
600 return true;
601}
602
603/**
604 * ice_dcb_noncontig_cfg - Configure DCB for non-contiguous TCs
605 * @pf: pointer to the PF struct
606 *
607 * If non-contiguous TCs, then configure SW DCB with TC0 and ETS non-willing
608 */
609static int ice_dcb_noncontig_cfg(struct ice_pf *pf)
610{
611 struct ice_dcbx_cfg *dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
612 struct device *dev = ice_pf_to_dev(pf);
613 int ret;
614
615 /* Configure SW DCB default with ETS non-willing */
616 ret = ice_dcb_sw_dflt_cfg(pf, false, true);
617 if (ret) {
618 dev_err(dev, "Failed to set local DCB config %d\n", ret);
619 return ret;
620 }
621
622 /* Reconfigure with ETS willing so that FW will send LLDP MIB event */
623 dcbcfg->etscfg.willing = 1;
624 ret = ice_set_dcb_cfg(pf->hw.port_info);
625 if (ret)
626 dev_err(dev, "Failed to set DCB to unwilling\n");
627
628 return ret;
629}
630
631/**
632 * ice_pf_dcb_recfg - Reconfigure all VEBs and VSIs
633 * @pf: pointer to the PF struct
634 *
635 * Assumed caller has already disabled all VSIs before
636 * calling this function. Reconfiguring DCB based on
637 * local_dcbx_cfg.
638 */
639void ice_pf_dcb_recfg(struct ice_pf *pf)
640{
641 struct ice_dcbx_cfg *dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
642 u8 tc_map = 0;
643 int v, ret;
644
645 /* Update each VSI */
646 ice_for_each_vsi(pf, v) {
647 struct ice_vsi *vsi = pf->vsi[v];
648
649 if (!vsi)
650 continue;
651
652 if (vsi->type == ICE_VSI_PF) {
653 tc_map = ice_dcb_get_ena_tc(dcbcfg);
654
655 /* If DCBX request non-contiguous TC, then configure
656 * default TC
657 */
658 if (!ice_dcb_tc_contig(dcbcfg->etscfg.prio_table)) {
659 tc_map = ICE_DFLT_TRAFFIC_CLASS;
660 ice_dcb_noncontig_cfg(pf);
661 }
662 } else {
663 tc_map = ICE_DFLT_TRAFFIC_CLASS;
664 }
665
666 ret = ice_vsi_cfg_tc(vsi, tc_map);
667 if (ret) {
668 dev_err(ice_pf_to_dev(pf), "Failed to config TC for VSI index: %d\n",
669 vsi->idx);
670 continue;
671 }
672
673 ice_vsi_map_rings_to_vectors(vsi);
674 if (vsi->type == ICE_VSI_PF)
675 ice_dcbnl_set_all(vsi);
676 }
677}
678
679/**
680 * ice_init_pf_dcb - initialize DCB for a PF
681 * @pf: PF to initialize DCB for
682 * @locked: Was function called with RTNL held
683 */
684int ice_init_pf_dcb(struct ice_pf *pf, bool locked)
685{
686 struct device *dev = ice_pf_to_dev(pf);
687 struct ice_port_info *port_info;
688 struct ice_hw *hw = &pf->hw;
689 int err;
690
691 port_info = hw->port_info;
692
693 err = ice_init_dcb(hw, false);
694 if (err && !port_info->is_sw_lldp) {
695 dev_err(dev, "Error initializing DCB %d\n", err);
696 goto dcb_init_err;
697 }
698
699 dev_info(dev, "DCB is enabled in the hardware, max number of TCs supported on this port are %d\n",
700 pf->hw.func_caps.common_cap.maxtc);
701 if (err) {
702 struct ice_vsi *pf_vsi;
703
704 /* FW LLDP is disabled, activate SW DCBX/LLDP mode */
705 dev_info(dev, "FW LLDP is disabled, DCBx/LLDP in SW mode.\n");
706 clear_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags);
707 err = ice_dcb_sw_dflt_cfg(pf, true, locked);
708 if (err) {
709 dev_err(dev, "Failed to set local DCB config %d\n",
710 err);
711 err = -EIO;
712 goto dcb_init_err;
713 }
714
715 /* If the FW DCBX engine is not running then Rx LLDP packets
716 * need to be redirected up the stack.
717 */
718 pf_vsi = ice_get_main_vsi(pf);
719 if (!pf_vsi) {
720 dev_err(dev, "Failed to set local DCB config\n");
721 err = -EIO;
722 goto dcb_init_err;
723 }
724
725 ice_cfg_sw_lldp(pf_vsi, false, true);
726
727 pf->dcbx_cap = ice_dcb_get_mode(port_info, true);
728 return 0;
729 }
730
731 set_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags);
732
733 /* DCBX/LLDP enabled in FW, set DCBNL mode advertisement */
734 pf->dcbx_cap = ice_dcb_get_mode(port_info, false);
735
736 err = ice_dcb_init_cfg(pf, locked);
737 if (err)
738 goto dcb_init_err;
739
740 return err;
741
742dcb_init_err:
743 dev_err(dev, "DCB init failed\n");
744 return err;
745}
746
747/**
748 * ice_update_dcb_stats - Update DCB stats counters
749 * @pf: PF whose stats needs to be updated
750 */
751void ice_update_dcb_stats(struct ice_pf *pf)
752{
753 struct ice_hw_port_stats *prev_ps, *cur_ps;
754 struct ice_hw *hw = &pf->hw;
755 u8 port;
756 int i;
757
758 port = hw->port_info->lport;
759 prev_ps = &pf->stats_prev;
760 cur_ps = &pf->stats;
761
762 for (i = 0; i < 8; i++) {
763 ice_stat_update32(hw, GLPRT_PXOFFRXC(port, i),
764 pf->stat_prev_loaded,
765 &prev_ps->priority_xoff_rx[i],
766 &cur_ps->priority_xoff_rx[i]);
767 ice_stat_update32(hw, GLPRT_PXONRXC(port, i),
768 pf->stat_prev_loaded,
769 &prev_ps->priority_xon_rx[i],
770 &cur_ps->priority_xon_rx[i]);
771 ice_stat_update32(hw, GLPRT_PXONTXC(port, i),
772 pf->stat_prev_loaded,
773 &prev_ps->priority_xon_tx[i],
774 &cur_ps->priority_xon_tx[i]);
775 ice_stat_update32(hw, GLPRT_PXOFFTXC(port, i),
776 pf->stat_prev_loaded,
777 &prev_ps->priority_xoff_tx[i],
778 &cur_ps->priority_xoff_tx[i]);
779 ice_stat_update32(hw, GLPRT_RXON2OFFCNT(port, i),
780 pf->stat_prev_loaded,
781 &prev_ps->priority_xon_2_xoff[i],
782 &cur_ps->priority_xon_2_xoff[i]);
783 }
784}
785
786/**
787 * ice_tx_prepare_vlan_flags_dcb - prepare VLAN tagging for DCB
788 * @tx_ring: ring to send buffer on
789 * @first: pointer to struct ice_tx_buf
790 *
791 * This should not be called if the outer VLAN is software offloaded as the VLAN
792 * tag will already be configured with the correct ID and priority bits
793 */
794void
795ice_tx_prepare_vlan_flags_dcb(struct ice_ring *tx_ring,
796 struct ice_tx_buf *first)
797{
798 struct sk_buff *skb = first->skb;
799
800 if (!test_bit(ICE_FLAG_DCB_ENA, tx_ring->vsi->back->flags))
801 return;
802
803 /* Insert 802.1p priority into VLAN header */
804 if ((first->tx_flags & ICE_TX_FLAGS_HW_VLAN) ||
805 skb->priority != TC_PRIO_CONTROL) {
806 first->tx_flags &= ~ICE_TX_FLAGS_VLAN_PR_M;
807 /* Mask the lower 3 bits to set the 802.1p priority */
808 first->tx_flags |= (skb->priority & 0x7) <<
809 ICE_TX_FLAGS_VLAN_PR_S;
810 /* if this is not already set it means a VLAN 0 + priority needs
811 * to be offloaded
812 */
813 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
814 }
815}
816
817/**
818 * ice_dcb_process_lldp_set_mib_change - Process MIB change
819 * @pf: ptr to ice_pf
820 * @event: pointer to the admin queue receive event
821 */
822void
823ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf,
824 struct ice_rq_event_info *event)
825{
826 struct ice_aqc_port_ets_elem buf = { 0 };
827 struct device *dev = ice_pf_to_dev(pf);
828 struct ice_aqc_lldp_get_mib *mib;
829 struct ice_dcbx_cfg tmp_dcbx_cfg;
830 bool need_reconfig = false;
831 struct ice_port_info *pi;
832 struct ice_vsi *pf_vsi;
833 u8 mib_type;
834 int ret;
835
836 /* Not DCB capable or capability disabled */
837 if (!(test_bit(ICE_FLAG_DCB_CAPABLE, pf->flags)))
838 return;
839
840 if (pf->dcbx_cap & DCB_CAP_DCBX_HOST) {
841 dev_dbg(dev, "MIB Change Event in HOST mode\n");
842 return;
843 }
844
845 pi = pf->hw.port_info;
846 mib = (struct ice_aqc_lldp_get_mib *)&event->desc.params.raw;
847 /* Ignore if event is not for Nearest Bridge */
848 mib_type = ((mib->type >> ICE_AQ_LLDP_BRID_TYPE_S) &
849 ICE_AQ_LLDP_BRID_TYPE_M);
850 dev_dbg(dev, "LLDP event MIB bridge type 0x%x\n", mib_type);
851 if (mib_type != ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID)
852 return;
853
854 /* Check MIB Type and return if event for Remote MIB update */
855 mib_type = mib->type & ICE_AQ_LLDP_MIB_TYPE_M;
856 dev_dbg(dev, "LLDP event mib type %s\n", mib_type ? "remote" : "local");
857 if (mib_type == ICE_AQ_LLDP_MIB_REMOTE) {
858 /* Update the remote cached instance and return */
859 ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
860 ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID,
861 &pi->remote_dcbx_cfg);
862 if (ret) {
863 dev_err(dev, "Failed to get remote DCB config\n");
864 return;
865 }
866 }
867
868 mutex_lock(&pf->tc_mutex);
869
870 /* store the old configuration */
871 tmp_dcbx_cfg = pf->hw.port_info->local_dcbx_cfg;
872
873 /* Reset the old DCBX configuration data */
874 memset(&pi->local_dcbx_cfg, 0, sizeof(pi->local_dcbx_cfg));
875
876 /* Get updated DCBX data from firmware */
877 ret = ice_get_dcb_cfg(pf->hw.port_info);
878 if (ret) {
879 dev_err(dev, "Failed to get DCB config\n");
880 goto out;
881 }
882
883 /* No change detected in DCBX configs */
884 if (!memcmp(&tmp_dcbx_cfg, &pi->local_dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
885 dev_dbg(dev, "No change detected in DCBX configuration.\n");
886 goto out;
887 }
888
889 pf->dcbx_cap = ice_dcb_get_mode(pi, false);
890
891 need_reconfig = ice_dcb_need_recfg(pf, &tmp_dcbx_cfg,
892 &pi->local_dcbx_cfg);
893 ice_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &pi->local_dcbx_cfg);
894 if (!need_reconfig)
895 goto out;
896
897 /* Enable DCB tagging only when more than one TC */
898 if (ice_dcb_get_num_tc(&pi->local_dcbx_cfg) > 1) {
899 dev_dbg(dev, "DCB tagging enabled (num TC > 1)\n");
900 set_bit(ICE_FLAG_DCB_ENA, pf->flags);
901 } else {
902 dev_dbg(dev, "DCB tagging disabled (num TC = 1)\n");
903 clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
904 }
905
906 pf_vsi = ice_get_main_vsi(pf);
907 if (!pf_vsi) {
908 dev_dbg(dev, "PF VSI doesn't exist\n");
909 goto out;
910 }
911
912 rtnl_lock();
913 ice_dis_vsi(pf_vsi, true);
914
915 ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
916 if (ret) {
917 dev_err(dev, "Query Port ETS failed\n");
918 goto unlock_rtnl;
919 }
920
921 /* changes in configuration update VSI */
922 ice_pf_dcb_recfg(pf);
923
924 ice_ena_vsi(pf_vsi, true);
925unlock_rtnl:
926 rtnl_unlock();
927out:
928 mutex_unlock(&pf->tc_mutex);
929}