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1/*
2 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/* APF27Dev is a docking board for the APF27 SOM */
13#include "imx27-apf27.dts"
14
15/ {
16 model = "Armadeus Systems APF27Dev docking/development board";
17 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
18
19 display: display {
20 model = "Chimei-LW700AT9003";
21 native-mode = <&timing0>;
22 bits-per-pixel = <16>; /* non-standard but required */
23 fsl,pcr = <0xfae80083>; /* non-standard but required */
24 display-timings {
25 timing0: 800x480 {
26 clock-frequency = <33000033>;
27 hactive = <800>;
28 vactive = <480>;
29 hback-porch = <96>;
30 hfront-porch = <96>;
31 vback-porch = <20>;
32 vfront-porch = <21>;
33 hsync-len = <64>;
34 vsync-len = <4>;
35 };
36 };
37 };
38
39 gpio-keys {
40 compatible = "gpio-keys";
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_gpio_keys>;
43
44 user-key {
45 label = "user";
46 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
47 linux,code = <276>; /* BTN_EXTRA */
48 };
49 };
50
51 leds {
52 compatible = "gpio-leds";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_gpio_leds>;
55
56 user {
57 label = "Heartbeat";
58 gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
59 linux,default-trigger = "heartbeat";
60 };
61 };
62
63 regulators {
64 compatible = "simple-bus";
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 reg_max5821: regulator@0 {
69 compatible = "regulator-fixed";
70 reg = <0>;
71 regulator-name = "max5821-reg";
72 regulator-min-microvolt = <2500000>;
73 regulator-max-microvolt = <2500000>;
74 regulator-always-on;
75 };
76 };
77};
78
79&cspi1 {
80 cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
83 status = "okay";
84
85 adc@0 {
86 compatible = "maxim,max1027";
87 reg = <0>;
88 interrupt-parent = <&gpio5>;
89 interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_max1027>;
92 spi-max-frequency = <10000000>;
93 };
94};
95
96&cspi2 {
97 cs-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>,
98 <&gpio4 27 GPIO_ACTIVE_LOW>,
99 <&gpio2 17 GPIO_ACTIVE_LOW>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_cspi2 &pinctrl_cspi2_cs>;
102 status = "okay";
103};
104
105&fb {
106 display = <&display>;
107 fsl,dmacr = <0x00020010>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_imxfb1>;
110 status = "okay";
111};
112
113&i2c1 {
114 clock-frequency = <400000>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_i2c1>;
117 status = "okay";
118
119 rtc@68 {
120 compatible = "dallas,ds1374";
121 reg = <0x68>;
122 };
123
124 max5821@38 {
125 compatible = "maxim,max5821";
126 reg = <0x38>;
127 vref-supply = <®_max5821>;
128 };
129};
130
131&i2c2 {
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_i2c2>;
134 status = "okay";
135};
136
137&iomuxc {
138 imx27-apf27dev {
139 pinctrl_cspi1: cspi1grp {
140 fsl,pins = <
141 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
142 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
143 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
144 >;
145 };
146
147 pinctrl_cspi1_cs: cspi1csgrp {
148 fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>;
149 };
150
151 pinctrl_cspi2: cspi2grp {
152 fsl,pins = <
153 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
154 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
155 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
156 >;
157 };
158
159 pinctrl_cspi2_cs: cspi2csgrp {
160 fsl,pins = <
161 MX27_PAD_CSI_D5__GPIO2_17 0x0
162 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0
163 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
164 >;
165 };
166
167 pinctrl_gpio_leds: gpioledsgrp {
168 fsl,pins = <MX27_PAD_PC_VS1__GPIO6_14 0x0>;
169 };
170
171 pinctrl_gpio_keys: gpiokeysgrp {
172 fsl,pins = <MX27_PAD_PC_VS2__GPIO6_13 0x0>;
173 };
174
175 pinctrl_imxfb1: imxfbgrp {
176 fsl,pins = <
177 MX27_PAD_CLS__CLS 0x0
178 MX27_PAD_CONTRAST__CONTRAST 0x0
179 MX27_PAD_LD0__LD0 0x0
180 MX27_PAD_LD1__LD1 0x0
181 MX27_PAD_LD2__LD2 0x0
182 MX27_PAD_LD3__LD3 0x0
183 MX27_PAD_LD4__LD4 0x0
184 MX27_PAD_LD5__LD5 0x0
185 MX27_PAD_LD6__LD6 0x0
186 MX27_PAD_LD7__LD7 0x0
187 MX27_PAD_LD8__LD8 0x0
188 MX27_PAD_LD9__LD9 0x0
189 MX27_PAD_LD10__LD10 0x0
190 MX27_PAD_LD11__LD11 0x0
191 MX27_PAD_LD12__LD12 0x0
192 MX27_PAD_LD13__LD13 0x0
193 MX27_PAD_LD14__LD14 0x0
194 MX27_PAD_LD15__LD15 0x0
195 MX27_PAD_LD16__LD16 0x0
196 MX27_PAD_LD17__LD17 0x0
197 MX27_PAD_LSCLK__LSCLK 0x0
198 MX27_PAD_OE_ACD__OE_ACD 0x0
199 MX27_PAD_PS__PS 0x0
200 MX27_PAD_REV__REV 0x0
201 MX27_PAD_SPL_SPR__SPL_SPR 0x0
202 MX27_PAD_HSYNC__HSYNC 0x0
203 MX27_PAD_VSYNC__VSYNC 0x0
204 >;
205 };
206
207 pinctrl_i2c1: i2c1grp {
208 fsl,pins = <
209 MX27_PAD_I2C_DATA__I2C_DATA 0x0
210 MX27_PAD_I2C_CLK__I2C_CLK 0x0
211 >;
212 };
213
214 pinctrl_i2c2: i2c2grp {
215 fsl,pins = <
216 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
217 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
218 >;
219 };
220
221 pinctrl_max1027: max1027 {
222 fsl,pins = <
223 MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */
224 MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */
225 >;
226 };
227
228 pinctrl_pwm: pwmgrp {
229 fsl,pins = <
230 MX27_PAD_PWMO__PWMO 0x0
231 >;
232 };
233
234 pinctrl_sdhc2: sdhc2grp {
235 fsl,pins = <
236 MX27_PAD_SD2_CLK__SD2_CLK 0x0
237 MX27_PAD_SD2_CMD__SD2_CMD 0x0
238 MX27_PAD_SD2_D0__SD2_D0 0x0
239 MX27_PAD_SD2_D1__SD2_D1 0x0
240 MX27_PAD_SD2_D2__SD2_D2 0x0
241 MX27_PAD_SD2_D3__SD2_D3 0x0
242 >;
243 };
244
245 pinctrl_sdhc2_cd: sdhc2cdgrp {
246 fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
247 };
248 };
249};
250
251&sdhci2 {
252 bus-width = <4>;
253 cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_sdhc2 &pinctrl_sdhc2_cd>;
256 status = "okay";
257};
258
259&pwm {
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_pwm>;
262};
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
4 */
5
6/* APF27Dev is a docking board for the APF27 SOM */
7#include "imx27-apf27.dts"
8
9/ {
10 model = "Armadeus Systems APF27Dev docking/development board";
11 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
12
13 display: display {
14 model = "Chimei-LW700AT9003";
15 bits-per-pixel = <16>; /* non-standard but required */
16 fsl,pcr = <0xfae80083>; /* non-standard but required */
17 display-timings {
18 native-mode = <&timing0>;
19 timing0: 800x480 {
20 clock-frequency = <33000033>;
21 hactive = <800>;
22 vactive = <480>;
23 hback-porch = <96>;
24 hfront-porch = <96>;
25 vback-porch = <20>;
26 vfront-porch = <21>;
27 hsync-len = <64>;
28 vsync-len = <4>;
29 };
30 };
31 };
32
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_gpio_keys>;
37
38 user-key {
39 label = "user";
40 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
41 linux,code = <276>; /* BTN_EXTRA */
42 };
43 };
44
45 leds {
46 compatible = "gpio-leds";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_gpio_leds>;
49
50 user {
51 label = "Heartbeat";
52 gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
53 linux,default-trigger = "heartbeat";
54 };
55 };
56
57 regulators {
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <0>;
61
62 reg_max5821: regulator@0 {
63 compatible = "regulator-fixed";
64 reg = <0>;
65 regulator-name = "max5821-reg";
66 regulator-min-microvolt = <2500000>;
67 regulator-max-microvolt = <2500000>;
68 regulator-always-on;
69 };
70 };
71};
72
73&cspi1 {
74 cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
77 status = "okay";
78
79 adc@0 {
80 compatible = "maxim,max1027";
81 reg = <0>;
82 interrupt-parent = <&gpio5>;
83 interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_max1027>;
86 spi-max-frequency = <10000000>;
87 };
88};
89
90&cspi2 {
91 cs-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>,
92 <&gpio4 27 GPIO_ACTIVE_LOW>,
93 <&gpio2 17 GPIO_ACTIVE_LOW>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_cspi2 &pinctrl_cspi2_cs>;
96 status = "okay";
97};
98
99&fb {
100 display = <&display>;
101 fsl,dmacr = <0x00020010>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_imxfb1>;
104 status = "okay";
105};
106
107&i2c1 {
108 clock-frequency = <400000>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_i2c1>;
111 status = "okay";
112
113 rtc@68 {
114 compatible = "dallas,ds1374";
115 reg = <0x68>;
116 };
117
118 max5821@38 {
119 compatible = "maxim,max5821";
120 reg = <0x38>;
121 vref-supply = <®_max5821>;
122 };
123};
124
125&i2c2 {
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_i2c2>;
128 status = "okay";
129};
130
131&iomuxc {
132 imx27-apf27dev {
133 pinctrl_cspi1: cspi1grp {
134 fsl,pins = <
135 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
136 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
137 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
138 >;
139 };
140
141 pinctrl_cspi1_cs: cspi1csgrp {
142 fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>;
143 };
144
145 pinctrl_cspi2: cspi2grp {
146 fsl,pins = <
147 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
148 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
149 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
150 >;
151 };
152
153 pinctrl_cspi2_cs: cspi2csgrp {
154 fsl,pins = <
155 MX27_PAD_CSI_D5__GPIO2_17 0x0
156 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0
157 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
158 >;
159 };
160
161 pinctrl_gpio_leds: gpioledsgrp {
162 fsl,pins = <MX27_PAD_PC_VS1__GPIO6_14 0x0>;
163 };
164
165 pinctrl_gpio_keys: gpiokeysgrp {
166 fsl,pins = <MX27_PAD_PC_VS2__GPIO6_13 0x0>;
167 };
168
169 pinctrl_imxfb1: imxfbgrp {
170 fsl,pins = <
171 MX27_PAD_CLS__CLS 0x0
172 MX27_PAD_CONTRAST__CONTRAST 0x0
173 MX27_PAD_LD0__LD0 0x0
174 MX27_PAD_LD1__LD1 0x0
175 MX27_PAD_LD2__LD2 0x0
176 MX27_PAD_LD3__LD3 0x0
177 MX27_PAD_LD4__LD4 0x0
178 MX27_PAD_LD5__LD5 0x0
179 MX27_PAD_LD6__LD6 0x0
180 MX27_PAD_LD7__LD7 0x0
181 MX27_PAD_LD8__LD8 0x0
182 MX27_PAD_LD9__LD9 0x0
183 MX27_PAD_LD10__LD10 0x0
184 MX27_PAD_LD11__LD11 0x0
185 MX27_PAD_LD12__LD12 0x0
186 MX27_PAD_LD13__LD13 0x0
187 MX27_PAD_LD14__LD14 0x0
188 MX27_PAD_LD15__LD15 0x0
189 MX27_PAD_LD16__LD16 0x0
190 MX27_PAD_LD17__LD17 0x0
191 MX27_PAD_LSCLK__LSCLK 0x0
192 MX27_PAD_OE_ACD__OE_ACD 0x0
193 MX27_PAD_PS__PS 0x0
194 MX27_PAD_REV__REV 0x0
195 MX27_PAD_SPL_SPR__SPL_SPR 0x0
196 MX27_PAD_HSYNC__HSYNC 0x0
197 MX27_PAD_VSYNC__VSYNC 0x0
198 >;
199 };
200
201 pinctrl_i2c1: i2c1grp {
202 fsl,pins = <
203 MX27_PAD_I2C_DATA__I2C_DATA 0x0
204 MX27_PAD_I2C_CLK__I2C_CLK 0x0
205 >;
206 };
207
208 pinctrl_i2c2: i2c2grp {
209 fsl,pins = <
210 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
211 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
212 >;
213 };
214
215 pinctrl_max1027: max1027 {
216 fsl,pins = <
217 MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */
218 MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */
219 >;
220 };
221
222 pinctrl_pwm: pwmgrp {
223 fsl,pins = <
224 MX27_PAD_PWMO__PWMO 0x0
225 >;
226 };
227
228 pinctrl_sdhc2: sdhc2grp {
229 fsl,pins = <
230 MX27_PAD_SD2_CLK__SD2_CLK 0x0
231 MX27_PAD_SD2_CMD__SD2_CMD 0x0
232 MX27_PAD_SD2_D0__SD2_D0 0x0
233 MX27_PAD_SD2_D1__SD2_D1 0x0
234 MX27_PAD_SD2_D2__SD2_D2 0x0
235 MX27_PAD_SD2_D3__SD2_D3 0x0
236 >;
237 };
238
239 pinctrl_sdhc2_cd: sdhc2cdgrp {
240 fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
241 };
242 };
243};
244
245&sdhci2 {
246 bus-width = <4>;
247 cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_sdhc2 &pinctrl_sdhc2_cd>;
250 status = "okay";
251};
252
253&pwm {
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_pwm>;
256};